Semiconductor internal structure information identification method, system, device and medium

Abstract

The embodiment of the present disclosure provides a semiconductor internal structure information identification method, system, device and medium, which belongs to the technical field of electricity, and specifically comprises the following steps: step 1, obtaining the transient temperature response curve of the semiconductor to be measured by using a preset method; step 2, calculating the transient thermal impedance curve according to the transient temperature response curve; step 3, calculating the to-be-solved structure function of the semiconductor to be measured according to the transient thermal impedance curve; and step 4, obtaining the structure function by Foster to Cauer transformation through the to-be-solved structure function. Through the scheme of the present disclosure, the deconvolution process is directly converted into an optimization problem and solved from the time domain, avoiding the use of frequency domain deconvolution calculation with mathematical ill-posedness, so that the obtained structure function has a turning point closer to the ideal state, accurately identifies the change of the structure parameter, and improves the identification accuracy.

Description

Technical Field

[0001] This disclosure relates to the field of electrical technology, and in particular to a method, system, device, and medium for identifying semiconductor internal structure information. Background Technology

[0002] High-resolution acquisition of thermal parameters and structural information of electronic devices and semiconductors plays a crucial role in the development of semiconductor packaging, quality inspection during the manufacturing process, fault detection, and achieving long-term reliability of electronic systems. Currently, there are two main technical approaches:

[0003] Option 1: Deconvolution identification using Fourier transform. This method is widely used in industry and is included in the standard JEDEC JESD 51-14. However, its limitations are mainly threefold. First, this method relies on multiple Fourier transforms and inverse transforms, theoretically requiring information across the entire frequency domain. However, practical time-domain measurements are limited by a certain sampling frequency, making it impossible to effectively observe information across the entire frequency domain. Second, the deconvolution identification method using Fourier transform utilizes division in the frequency domain. This method suffers from a near-zero denominator in the high-frequency range, a typical mathematical ill-posed problem. In practical applications, this manifests as amplified noise and limited identification resolution, particularly for adjacent time constants, where accurate identification may be impossible. Finally, the structure function derived from this method is insufficient to clearly identify the internal structural parameters of the semiconductor, and the test results contain numerous inflection points without physical meaning.

[0004] Option 2: Solve the time constant spectrum based on the Bayesian deconvolution method. This method is not significantly different from Option 1 in essence, as it still relies on mathematically ill-conditioned division. Although some studies indicate that the results based on the Bayesian deconvolution method are better, the effect is not significant and depends on a large number of iterations.

[0005] It is evident that there is an urgent need for a method that can identify semiconductor internal structure information with high efficiency and accuracy. Summary of the Invention

[0006] In view of this, the present disclosure provides a method, system, device and medium for identifying semiconductor internal structure information, which at least partially solves the problems of poor identification efficiency and accuracy in the prior art.

[0007] In a first aspect, embodiments of this disclosure provide a method for identifying semiconductor internal structure information, including:

[0008] Step 1: Obtain the transient temperature response curve of the semiconductor under test using a preset method;

[0009] Step 2: Calculate the transient thermal impedance curve based on the transient temperature response curve;

[0010] Step 3: Calculate the structure function to be determined for the semiconductor under test based on the transient thermal impedance curve;

[0011] Step 4: Obtain the structure function by performing a Foster-Cauer transformation on the structure function to be determined.

[0012] According to a specific implementation of an embodiment of this disclosure, step 1 specifically includes:

[0013] Power is applied to the semiconductor under test within a preset time period, and the rise / fall history of the transient thermal resistance of the active region with the duration of power is obtained using a preset temperature measurement method, forming the transient temperature response curve.

[0014] According to one specific implementation of this disclosure, the preset temperature measurement method is at least one of electrical temperature measurement, infrared temperature measurement, optical measurement, physical contact, or electrical indirect measurement.

[0015] According to a specific implementation of this disclosure, the expression for the transient thermal impedance curve is as follows:

[0016]

[0017] T(0) is the initial temperature, T(t) is the transient temperature response, P is the loss, and a(t) is the transient thermal impedance.

[0018] According to a specific implementation of an embodiment of this disclosure, step 3 specifically includes:

[0019] Step 3.1: Obtain the transient thermal response deconvolution problem based on the preset theoretical relationship and the transient thermal impedance curve;

[0020] Step 3.2: Solve the transient thermal response deconvolution problem using a convex optimization method to obtain the desired structure function.

[0021] Secondly, embodiments of this disclosure provide a semiconductor internal structure information identification system, comprising:

[0022] The acquisition module is used to acquire the transient temperature response curve of the semiconductor under test using a preset method;

[0023] The first calculation module is used to calculate the transient thermal impedance curve based on the transient temperature response curve.

[0024] The second calculation module is used to calculate the structure function to be determined for the semiconductor under test based on the transient thermal impedance curve.

[0025] The transformation module is used to obtain the structure function by performing a Foster-Cauer transformation on the structure function to be determined.

[0026] Thirdly, embodiments of this disclosure also provide an electronic device, the electronic device comprising:

[0027] At least one processor; and,

[0028] The memory is communicatively connected to the at least one processor; wherein,

[0029] The memory stores instructions that can be executed by the at least one processor to enable the at least one processor to perform the semiconductor internal structure information identification method in the first aspect or any implementation thereof.

[0030] Fourthly, embodiments of this disclosure also provide a non-transitory computer-readable storage medium storing computer instructions for causing the computer to execute the semiconductor internal structure information identification method in the first aspect or any implementation thereof.

[0031] Fifthly, embodiments of this disclosure also provide a computer program product, which includes a computing program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions that, when executed by a computer, cause the computer to perform the semiconductor internal structure information identification method in the first aspect or any implementation thereof.

[0032] The semiconductor internal structure information identification scheme in this embodiment includes: Step 1, obtaining the transient temperature response curve of the semiconductor under test using a preset method; Step 2, calculating the transient thermal impedance curve based on the transient temperature response curve; Step 3, calculating the desired structure function of the semiconductor under test based on the transient thermal impedance curve; Step 4, obtaining the structure function by performing a Foster-Cauer transformation on the desired structure function.

[0033] The beneficial effects of the embodiments of this disclosure are as follows: the solution of this disclosure directly transforms the deconvolution process into an optimization problem and solves it from the time domain, avoiding the use of frequency domain deconvolution calculation with mathematical ill-conditioning, so that the obtained structure function has an inflection point that is closer to the ideal state, accurately identifies the changes in structure parameters, and improves the recognition accuracy. Attached Figure Description

[0034] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0035] Figure 1 A schematic flowchart illustrating a method for identifying semiconductor internal structure information provided in an embodiment of this disclosure;

[0036] Figure 2 This is a schematic diagram of a Cauer thermal network structure and parameters provided in an embodiment of the present disclosure;

[0037] Figure 3 This is a schematic diagram of the transient thermal response curve of a Cauer thermal network provided in an embodiment of the present disclosure;

[0038] Figure 4 A schematic diagram of the time constant spectrum and integral structure function corresponding to a Cauer thermal network provided in this embodiment of the disclosure;

[0039] Figure 5 A schematic diagram of a conventional frequency-domain-based solution for the time constant spectrum and integral structure function of a Cauer thermal network is provided for embodiments of this disclosure.

[0040] Figure 6 A schematic diagram of the structure and parameters of a fifth-order Cauer model provided in this embodiment of the disclosure;

[0041] Figure 7 A schematic diagram of the transient thermal response curve corresponding to a fifth-order Cauer model provided in this embodiment of the disclosure;

[0042] Figure 8 A schematic diagram of the time constant spectrum and integral structure function corresponding to a fifth-order Cauer model provided in this embodiment of the present disclosure;

[0043] Figure 9 A schematic diagram of the time constant spectrum and integral structure function of a conventional frequency domain-based solution of a fifth-order Cauer model is provided for embodiments of this disclosure.

[0044] Figure 10 This is a schematic diagram illustrating a conventional method for solving the time constant spectrum and integral structure function of a packaged IGBT, provided in an embodiment of this disclosure.

[0045] Figure 11 This is a schematic diagram illustrating the method of the present invention for solving the time constant spectrum and integral structure function of a packaged IGBT, provided in an embodiment of the present disclosure.

[0046] Figure 12 This is a schematic diagram of a semiconductor internal structure information recognition system provided in an embodiment of the present disclosure;

[0047] Figure 13 A schematic diagram of an electronic device provided in an embodiment of this disclosure. Detailed Implementation

[0048] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings.

[0049] The following specific examples illustrate the implementation of this disclosure. Those skilled in the art can easily understand other advantages and effects of this disclosure from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of this disclosure, and not all of them. This disclosure can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this disclosure. It should be noted that, in the absence of conflict, the following embodiments and features in the embodiments can be combined with each other. Based on the embodiments in this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0050] It should be noted that various aspects of embodiments within the scope of the appended claims are described below. It will be apparent that the aspects described herein can be embodied in a wide variety of forms, and any particular structure and / or function described herein is merely illustrative. Based on this disclosure, those skilled in the art will understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects set forth herein can be used to implement the device and / or practice the method. Additionally, this device and / or method can be implemented using structures and / or functionalities other than one or more of the aspects set forth herein.

[0051] It should also be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this disclosure. The drawings only show the components related to this disclosure and are not drawn according to the number, shape and size of the components in actual implementation. In actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0052] Furthermore, specific details are provided in the following description to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that the described aspects can be practiced without these specific details.

[0053] This disclosure provides a method for identifying internal structure information of a semiconductor, which can be applied to the quality inspection process in electronic device or semiconductor manufacturing scenarios.

[0054] See Figure 1 This is a flowchart illustrating a method for identifying semiconductor internal structure information according to an embodiment of this disclosure. Figure 1 As shown, the method mainly includes the following steps:

[0055] Step 1: Obtain the transient temperature response curve of the semiconductor under test using a preset method;

[0056] Furthermore, step 1 specifically includes:

[0057] Power is applied to the semiconductor under test within a preset time period, and the rise / fall history of the transient thermal resistance of the active region with the duration of power is obtained using a preset temperature measurement method, forming the transient temperature response curve.

[0058] Optionally, the preset temperature measurement method is at least one of electrical temperature measurement, infrared temperature measurement, optical measurement, physical contact, or electrical indirect measurement.

[0059] In practice, power can be applied to the semiconductor under test within a preset time period, and the transient thermal resistance of the active region as a function of power duration can be obtained by using at least one of electrical thermometry, infrared thermometry, optical measurement, physical contact method or electrical indirect measurement method, thus forming the transient temperature response curve.

[0060] Step 2: Calculate the transient thermal impedance curve based on the transient temperature response curve;

[0061] Based on the above embodiments, the expression for the transient thermal impedance curve is as follows:

[0062]

[0063] T(0) is the initial temperature, T(t) is the transient temperature response, P is the loss, and a(t) is the transient thermal impedance.

[0064] In practice, after obtaining the transient temperature response curve, it can be substituted into the expression of the transient thermal impedance curve to calculate the transient thermal impedance curve.

[0065] Step 3: Calculate the structure function to be determined for the semiconductor under test based on the transient thermal impedance curve;

[0066] Furthermore, step 3 specifically includes:

[0067] Step 3.1: Obtain the transient thermal response deconvolution problem based on the preset theoretical relationship and the transient thermal impedance curve;

[0068] Step 3.2: Solve the transient thermal response deconvolution problem using a convex optimization method to obtain the desired structure function.

[0069] In practical implementation, the transient thermal impedance curve theoretically satisfies the following relationship:

[0070]

[0071] W(z)=e z-exp(z)

[0072] z = ln(t)

[0073] Let R(z) represent the convolution operation, where R(z) is the structure function to be determined. This function reflects the thermal network and structural information inside semiconductors and electronic devices. Therefore, solving R(z) allows for the effective observation of the internal structural information of the device. Traditional solutions use Fourier transform to convert the equation to the frequency domain and then use division in the frequency domain to solve for R. However, division suffers from mathematical ill-conditioning when the denominator approaches zero, making the final solution R susceptible to noise and severely limiting the resolution. This disclosure redefines the deconvolution problem as Ax = b and uses an optimized method to directly solve the result in the time domain without using division.

[0074]

[0075] Solving the above optimization problem can be done using common 1-norm regularization methods, such as...

[0076]

[0077] This allows the optimization objective to find a solution x that can well achieve Ax = b, but x is not too large, causing overfitting to the test data. Of course, the embodiments of this disclosure use L1 regularization to solve the optimization problem, but it is not limited to L1 regularization methods. It is also applicable to other solution methods, such as the common L2 method, or the elastic network method, etc., which will not be listed here.

[0078]

[0079]

[0080] Step 4: Obtain the structure function by performing a Foster-Cauer transformation on the structure function to be determined.

[0081] In practice, after obtaining the structure function to be determined, the structure function is obtained by converting Foster to Cauer transformation, and then the internal structure of the semiconductor under test can be identified based on the structure function.

[0082] The semiconductor internal structure information identification method provided in this embodiment transforms the deconvolution process directly from the time domain into an optimization problem and solves it, avoiding the use of mathematically ill-conditioned division. This results in the obtained structure function having an inflection point that is closer to the ideal state, accurately identifying changes in structure parameters, and improving identification efficiency and accuracy.

[0083] The following will describe this solution with reference to two specific embodiments.

[0084] Example 1: Simulation Verification Based on a Third-Order Model

[0085] (1) Establishing a simulation model

[0086] like Figure 2 As shown, the model structure adopts the common Cauer thermal network structure, with parameters including two cases: Case 1 and Case 2. Rth is the thermal resistance, and Cth is the heat capacity of each layer. Simulations were performed to obtain the transient thermal response curves for Case 1 and Case 2, respectively. Figure 3 As shown, the transient thermal response is solved using a convex optimization method, i.e., by solving the following formula:

[0087]

[0088] The time constant spectrum and integral structure function obtained by solving are as follows: Figure 4 As shown, (a) and (c) are the time constant spectra of Case 1 and Case 2, respectively, and (b) and (d) are the integral structure functions of Case 1 and Case 2, respectively. The time constant spectra (a) and (c) obtained in this embodiment clearly reflect that the thermal network has three thermally dominant poles. The inflection points of the integral structure function obtained by this invention correspond completely to the true values ​​in the simulation structure.

[0089] A comparison of traditional frequency domain-based solution methods Figure 5 As shown, (a) and (c) are the time constant spectra of Case 1 and Case 2, respectively, and (b) and (d) are the integral structure functions of Case 1 and Case 2, respectively. First, the time constant spectra obtained by the frequency domain method are shown in (a) and (c). (a) contains three main poles, but each peak has a large span, which has an error compared with the three concentrated parameters shown in the simulation. In Figure (c), because the parameters of the two layers in the simulation network are relatively close, it is no longer possible to clearly observe the three peaks, and only two peaks are visible. This shows that the resolution of the traditional method is limited and cannot distinguish between two layers with similar structural parameters. Comparing the integral structure function solved by the frequency domain method with the simulation true value, as shown in (b) and (d), there is a significant difference between the inflection point of the curve and the position of the true value.

[0090] Example 2:

[0091] Simulation Case 2 uses a fifth-order Cauer model, with its thermal network structure and parameters as follows: Figure 6 As shown, the transient temperature response is simulated and measured. Figure 7 As shown, the convex optimization proposed in this invention is used to calculate the time constant spectrum and integral structure function, as follows: Figure 8As shown, (a) is the time constant spectrum and (b) is the integral structure function. The time constant spectrum (a) contains 5 distinct peaks, indicating that the structure has 5 distinct poles. The integral structure function (b) shows that all the inflection points of the curves correspond completely to the simulation true values.

[0092] However, using the traditional frequency domain solution method, the result is as follows: Figure 9 As shown, (a) is the time constant spectrum and (b) is the integral structure function. It can be seen that the time constant spectrum (a) has large peak spans, failing to clearly indicate the main structure of the thermal network. The integral structure function (b), especially the last two true values, shows a significant difference between the true values ​​and the inflection points of the curve. The results of the two simulation cases are summarized in Table 1. The peak values ​​of the time constant spectrum obtained by the method proposed in this invention are completely consistent with the number of layers given in the simulation case. However, traditional methods cannot fully reflect the network structure in some cases. Comparing the given parameter true values ​​and the obtained integral structure function, the maximum distance of the traditional method is approximately 10% of the total thermal resistance, while the distance of the method proposed here is less than 1%. From this perspective, the resolution of this invention is ten times higher than that of the traditional method.

[0093] Experimental verification as follows Figure 10 and 11 As shown, the experiment used a common TO-packaged insulated gate bipolar transistor (IGBT), which mainly consists of three layers: a silicon chip, a solder connection layer, and a metal frame layer. The results obtained using traditional methods are as follows... Figure 10 As shown, (a) is the time constant spectrum and (b) is the integral structure function. R(z) obtained by the traditional frequency domain solution method has values ​​in all time constants, which is different from the fact that the semiconductor only has a simple structure and material. In the structure function (b), the inflection point inside the package is not clear, and it is difficult to see different layered structures. Figure 11 (a) and (b) are the results of this solution. Under this solution, R(z) has only 7-8 main time constants. Furthermore, the structure function (b) has three distinct inflection points inside its package, which is consistent with the fact that the device contains three main structures.

[0094]

[0095]

[0096] in: 1 Existing methods refer to frequency domain deconvolution solutions. 2 The maximum relative error is defined as the maximum distance divided by the total thermal resistance.

[0097] Table 1

[0098] For a corresponding method embodiment, see [link to relevant documentation]. Figure 12This disclosure also provides a semiconductor internal structure information identification system 10, comprising:

[0099] The acquisition module 121 is used to acquire the transient temperature response curve of the semiconductor under test using a preset method;

[0100] The first calculation module 122 is used to calculate the transient thermal impedance curve based on the transient temperature response curve.

[0101] The second calculation module 123 is used to calculate the structural function to be determined for the semiconductor under test based on the transient thermal impedance curve.

[0102] Transformation module 124 is used to obtain the structure function by transforming the structure function to be determined through Foster-Cauer transformation.

[0103] Figure 12 The system shown can execute the contents of the above method embodiments. For the parts not described in detail in this embodiment, please refer to the contents recorded in the above method embodiments, and they will not be repeated here.

[0104] See Figure 13 This disclosure also provides an electronic device 13, which includes at least one processor and a memory communicatively connected to the at least one processor. The memory stores instructions executable by the at least one processor, which, when executed, enables the at least one processor to perform the semiconductor internal structure information identification method described in the foregoing method embodiments.

[0105] This disclosure also provides a non-transitory computer-readable storage medium that stores computer instructions for causing the computer to execute the semiconductor internal structure information identification method in the foregoing method embodiments.

[0106] This disclosure also provides a computer program product, which includes a computing program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions that, when executed by a computer, cause the computer to perform the semiconductor internal structure information identification method in the foregoing method embodiments.

[0107] The following is for reference. Figure 13 The diagram illustrates a structural schematic of an electronic device 13 suitable for implementing embodiments of the present disclosure. The electronic devices in the embodiments of the present disclosure may include, but are not limited to, mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers. Figure 13 The electronic device shown is merely an example and should not be construed as limiting the functionality and scope of the embodiments disclosed herein.

[0108] like Figure 13 As shown, the electronic device 13 may include a processing unit (e.g., a central processing unit, a graphics processing unit, etc.) 131, which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 132 or a program loaded from a storage device 138 into a random access memory (RAM) 133. The RAM 133 also stores various programs and data required for the operation of the electronic device 13. The processing unit 131, ROM 132, and RAM 133 are interconnected via a bus 134. An input / output (I / O) interface 135 is also connected to the bus 134.

[0109] Typically, the following devices can be connected to I / O interface 135: input devices 136 including, for example, touchscreens, touchpads, keyboards, mice, image sensors, microphones, accelerometers, gyroscopes, etc.; output devices 137 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 138 including, for example, magnetic tapes, hard disks, etc.; and communication devices 139. Communication device 139 allows electronic device 13 to communicate wirelessly or wiredly with other devices to exchange data. Although electronic device 13 with various devices is shown in the figure, it should be understood that it is not required to implement or possess all of the devices shown. More or fewer devices may be implemented or possessed alternatively.

[0110] In particular, according to embodiments of this disclosure, the processes described above with reference to the flowcharts can be implemented as computer software programs. For example, embodiments of this disclosure include a computer program product comprising a computer program carried on a computer-readable medium, the computer program containing program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device 139, or installed from a storage device 138, or installed from a ROM 132. When the computer program is executed by the processing device 131, it performs the functions defined in the methods of embodiments of this disclosure.

[0111] It should be noted that the computer-readable medium described in this disclosure can be a computer-readable signal medium or a computer-readable storage medium, or any combination thereof. A computer-readable storage medium can be, for example,—but not limited to—an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of a computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this disclosure, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in connection with an instruction execution system, apparatus, or device. In this disclosure, a computer-readable signal medium can include a data signal propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals can take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium can be any computer-readable medium other than a computer-readable storage medium, which can send, propagate, or transmit a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the computer-readable medium can be transmitted using any suitable medium, including but not limited to: wires, optical fibers, RF (radio frequency), etc., or any suitable combination thereof.

[0112] The aforementioned computer-readable medium may be included in the aforementioned electronic device; or it may exist independently and not assembled into the electronic device.

[0113] The aforementioned computer-readable medium carries one or more programs, which, when executed by the electronic device, enable the electronic device to perform the relevant steps of the above-described method embodiments.

[0114] Alternatively, the aforementioned computer-readable medium carries one or more programs, which, when executed by the electronic device, enable the electronic device to perform the relevant steps of the above method embodiments.

[0115] Computer program code for performing the operations of this disclosure can be written in one or more programming languages ​​or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, and C++, and conventional procedural programming languages ​​such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0116] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of this disclosure. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing a specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.

[0117] The units described in the embodiments of this disclosure can be implemented in software or in hardware.

[0118] It should be understood that the various parts of this disclosure can be implemented in hardware, software, firmware, or a combination thereof.

[0119] The above description is merely a specific embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. A method for identifying semiconductor internal structure information, characterized in that, include: Step 1: Obtain the transient temperature response curve of the semiconductor under test using a preset method; Step 2: Calculate the transient thermal impedance curve based on the transient temperature response curve; Step 3: Calculate the time constant spectrum of the semiconductor under test based on the transient thermal impedance curve; Step 3 specifically includes: Based on the transient thermal impedance curve and the preset theoretical relationship, a transient thermal response deconvolution problem is constructed, and the transient thermal response deconvolution problem is transformed into Ax=b, where, The transient thermal response deconvolution problem is solved directly in the time domain using a convex optimization method, without using division in the frequency domain, to obtain the time constant spectrum of the semiconductor under test. The transient thermal impedance curve theoretically satisfies the following relationship: in, This represents the convolution operation. The time constant spectrum of the semiconductor under test is used to reflect the internal thermal network and structural information of the semiconductor under test; The convex optimization method is a regularization method, which adopts a 1-norm regularization method, a 2-norm regularization method, or an elastic network regularization method. Step 4: Obtain the structure function by performing a Foster-Cauer transform on the time constant spectrum, and identify the internal structure information of the semiconductor under test based on the structure function.

2. The method according to claim 1, characterized in that... Step 1 specifically includes: Power is applied to the semiconductor under test within a preset time period, and the transient thermal resistance of the active region of the semiconductor under test is obtained as a function of the power duration by a preset temperature measurement method, thus forming the transient temperature response curve.

3. The method according to claim 2, characterized in that... The preset temperature measurement method is at least one of electrical temperature measurement, infrared temperature measurement, optical measurement, physical contact method, or electrical indirect measurement method.

4. The method according to claim 1, characterized in that... The expression for the transient thermal impedance curve is as follows: The initial temperature. For transient temperature response, For loss, This is the transient thermal impedance.

5. The method according to claim 1, characterized in that... The regularization method can be any of the following methods to solve the transient thermal response deconvolution problem: The 1-norm regularization method, and its corresponding expression is: ； The 2-norm regularization method, and its corresponding expression is: ； The regularization method for elastic networks, and its corresponding expression is: 。 6. A semiconductor internal structure information identification system, used to execute the semiconductor internal structure information identification method according to any one of claims 1 to 5, characterized in that, include: The acquisition module is used to acquire the transient temperature response curve of the semiconductor under test using a preset method; The first calculation module is used to calculate the transient thermal impedance curve based on the transient temperature response curve. The second calculation module is used to calculate the time constant spectrum of the semiconductor under test based on the transient thermal impedance curve. The transformation module is used to obtain the structure function by converting the time constant spectrum through Foster-Cauer transformation, and to identify the internal structure information of the semiconductor under test based on the structure function.

7. An electronic device, characterized in that, The electronic device includes: At least one processor; and, A memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, which, when executed by the at least one processor, enables the at least one processor to perform the semiconductor internal structure information identification method according to any one of claims 1-5.

8. A non-transitory computer-readable storage medium storing computer instructions for causing the computer to perform the semiconductor internal structure information identification method according to any one of claims 1-5.

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