Methods, apparatuses, devices, media, and program products for simulating circuits

Abstract

Embodiments of the present disclosure provide methods, devices, apparatuses, media and program products for simulating circuits, relating to the field of electronic circuits. In the method, a first simulation result of a model for characterizing a circuit is determined, the model including a set of modules under test, the set of modules under test being stimulated by a corresponding set of test stimuli. A target simulation state snapshot of the model at a target time is obtained from the first simulation result based on one of a modified test stimulus in the set of test stimuli and a modified module under test in the set of modules under test. The modified model is simulated based on the target simulation state snapshot to obtain a second simulation result. In this way, by obtaining a target simulation state snapshot based on one of a modified test stimulus and a modified module under test, an accurate previous simulation state can be automatically obtained to speed up the simulation process, thereby improving simulation efficiency.

Description

Technical Field

[0001] The embodiments of this disclosure primarily relate to the field of circuits. More specifically, the embodiments of this disclosure relate to methods, apparatus, devices, computer-readable storage media, and computer program products for simulating circuits. Background Technology

[0002] In chip design and development, using digital simulators to simulate and verify circuits can save significant hardware resources. However, as chip designs grow in scale, performing a complete circuit simulation can be time-consuming. In such cases, performing a full simulation after each circuit modification (also known as full simulation) will greatly increase the chip development cycle. Therefore, a solution is needed that can simulate circuit modifications to improve simulation efficiency. Summary of the Invention

[0003] The embodiments of this disclosure provide a scheme for simulating circuits.

[0004] In a first aspect of this disclosure, a method for simulating a circuit is provided. The method includes: determining a first simulation result for a model characterizing the circuit, wherein the model includes a set of modules under test (DUTs) and the DUTs are excited by a corresponding set of test stimuli. The method further includes: obtaining a snapshot of the model at a target simulation state at a target time from the first simulation result, based on identifying one of a modified test stimulus in the test stimuli set and a modified DUT in the DUTs set in the modified model. The method further includes: simulating the modified model based on the target simulation state snapshot to obtain a second simulation result.

[0005] In this way, by obtaining a snapshot of the target simulation state based on one of the modified test stimuli and the modified module under test, the simulation process can be accelerated by automatically acquiring an accurate previous simulation state, thereby improving simulation efficiency.

[0006] In some embodiments of the first aspect, a modified module under test (DUT) can be identified by: identifying one or more modified files corresponding to a modified model; and determining the DUT within one or more modified files as the modified DUT. This method allows for rapid identification of modified DUTs, thereby accelerating the second simulation process.

[0007] In some embodiments of the first aspect, a snapshot of the target simulation state can be obtained from the first simulation result in the following manner: based on identifying the modified test stimulus in the modified model and determining that the set of modules under test remains unchanged in the model and the modified model, a first moment before the set of modules under test in the model begins simulation is determined as the target moment; or based on identifying the modified module under test in the modified model and determining that the set of test stimulus remains unchanged in the model and the modified model, and based on determining that the modified module under test satisfies at least a predetermined condition associated with timing, a second moment when the modified module under test in the model begins simulation is determined as the target moment.

[0008] In this way, a suitable snapshot of the target simulation state can be obtained automatically and quickly, thereby accelerating the simulation process.

[0009] In some embodiments of the first aspect, it can be determined that the modified module under test (DUT) meets predetermined conditions by determining that the timing of the modified DUT remains unchanged in both the model and the modified model. In this way, the acquired snapshot of the target simulation state can be applied to the simulation of the modified model.

[0010] In some embodiments of the first aspect, the timing of the modified module under test (DUT) can be determined to be invariant in both the model and the modified model by: determining that the instantiation relationships and external connectivity relationships of the modified DUT remain invariant in both the model and the modified model. In this way, it can be efficiently determined whether the modified DUT satisfies the condition of timing invariance.

[0011] In some embodiments of the first aspect, one of the modified test stimuli in the test stimulus set and the modified modules under test in the module under test set can be identified by: identifying a plurality of modified modules under test in the module under test set, wherein the modified module under test is the earliest among the plurality of modified modules under test to start simulation, and wherein determining that the modified module under test satisfies the predetermined condition includes determining that the corresponding multiple timing sequences of the plurality of modified modules under test remain unchanged in the model and the modified model. In this way, the acquired target simulation state snapshot can be applied to the simulation of the modified model, thereby avoiding simulation errors.

[0012] In some embodiments of the first aspect, the method further includes: obtaining the instantiation relationship and the external connectivity relationship of the modified module under test from the first simulation result, for determining that the timing of the modified module under test remains unchanged in the model and the modified model. In this way, the obtained target simulation state snapshot can be applied to the simulation of the modified model.

[0013] In some embodiments of the first aspect, the method further includes: marking a group of modules in the module set to be tested, wherein the first simulation result includes a set of simulation state snapshots of the module set to be tested when the marked group of modules begins simulation, but does not include simulation state snapshots of the module set to be tested when the unmarked modules in the module set to be tested begin simulation.

[0014] In some embodiments of the first aspect, it can also be determined that the modified module under test meets predetermined conditions by determining that the modified module under test is included in the marked set of modules. In this way, the number of simulation state snapshots that need to be recorded during the first simulation can be reduced, thereby saving resources.

[0015] In some embodiments of the first aspect, the one or more modified files can be identified based on at least one of the following: the file's modification time; and a file-specific hash value. In this way, modified files can be quickly identified, thereby quickly identifying the modified module under test.

[0016] In a second aspect of this disclosure, an apparatus for simulating a circuit is provided. The apparatus includes: a first simulation unit configured to determine a first simulation result for a model characterizing the circuit, the model including a set of modules under test (DUTs) excited by corresponding test stimulus sets. The apparatus further includes: a snapshot acquisition unit configured to acquire a snapshot of the model at a target simulation state at a target time based on identifying one of a modified test stimulus in the test stimulus set and a modified DUT in the set of DUTs in the modified model. The apparatus further includes: a second simulation unit configured to simulate the modified model based on the target simulation state snapshot to obtain a second simulation result.

[0017] In some embodiments of the second aspect, the snapshot acquisition unit is configured to identify one of the modified test stimuli in the test stimulus set and the modified test modules in the test module set in the modified model by: identifying one or more modified files corresponding to the modified model; and determining the test modules in the one or more modified files as the modified test modules.

[0018] In some embodiments of the second aspect, the snapshot acquisition unit is configured to: determine a first moment before the simulation of the set of modules under test in the model begins as the target moment, based on identifying the modified test stimulus in the modified model and determining that the set of modules under test remains unchanged in the model and the modified model; or determine a second moment when the simulation of the modified module under test begins in the model as the target moment, based on identifying the modified module under test in the modified model and determining that the set of test stimulus remains unchanged in the model and the modified model, and based on determining that the modified module under test satisfies at least a predetermined condition associated with timing.

[0019] In some embodiments of the second aspect, the snapshot acquisition unit is configured to determine that the modified module under test satisfies the predetermined condition by determining that the timing of the modified module under test remains unchanged in the model and the modified model.

[0020] In some embodiments of the second aspect, the snapshot acquisition unit is configured to determine that the timing of the modified module under test remains unchanged in the model and the modified model by: determining that the instantiation relationship and external connection relationship of the modified module under test remain unchanged in the model and the modified model.

[0021] In some embodiments of the second aspect, the snapshot acquisition unit is configured to identify one of the modified test stimuli in the test stimulus set and the modified modules under test in the module under test set by identifying a plurality of modified modules under test in the module under test set, wherein the modified module under test is the earliest module under test to start simulation among the plurality of modified modules under test, and wherein the snapshot acquisition unit is configured to determine that the modified module under test satisfies the predetermined condition by determining that a plurality of corresponding timing sequences of the plurality of modified modules under test remain unchanged in the model and the modified model.

[0022] In some embodiments of the second aspect, the apparatus further includes: a module data acquisition unit configured to acquire the instantiation relationship and the external connection relationship of the modified module under test from the first simulation result, for determining that the timing of the modified module under test remains unchanged in the model and the modified model.

[0023] In some embodiments of the second aspect, the apparatus further includes: a marking unit configured to mark a group of modules in the module set under test, wherein the first simulation result includes a set of simulation state snapshots of the module set under test when the marked group of modules begins simulation, but does not include simulation state snapshots of the module set under test when the unmarked modules in the module set under test begin simulation.

[0024] In some embodiments of the second aspect, the snapshot acquisition unit is configured to determine that the modified module under test is included in the marked set of modules by: determining that the modified module under test is included in the marked set of modules.

[0025] In some embodiments of the second aspect, the snapshot acquisition unit is configured to identify the one or more modified files based on at least one of the following: the modification time of the file; and a file-specific hash value.

[0026] In a third aspect of this disclosure, an electronic device is provided, comprising: at least one computing unit; at least one memory coupled to the at least one computing unit and storing instructions for execution by the at least one computing unit, the instructions, when executed by the at least one computing unit, causing the device to implement the method provided in the first aspect.

[0027] In a fourth aspect of this disclosure, a computer-readable storage medium is provided having a computer program stored thereon, wherein the computer program is executed by a processor to implement the method provided in the first aspect.

[0028] In a fifth aspect of this disclosure, a computer program product is provided, including computer-executable instructions that, when executed by a processor, implement some or all of the steps of the method of the first aspect.

[0029] It is understood that the electronic device of the third aspect, the computer storage medium of the fourth aspect, or the computer program product of the fifth aspect provided above are used to perform at least a portion of the method provided in the first aspect. Therefore, the explanations or descriptions regarding the first aspect also apply to the third, fourth, and fifth aspects. Furthermore, the beneficial effects achievable by the second, third, fourth, and fifth aspects can be referred to in the beneficial effects of the corresponding methods, and will not be repeated here. Attached Figure Description

[0030] The above and other features, advantages, and aspects of the embodiments of this disclosure will become more apparent from the accompanying drawings and the following detailed description. In the drawings, the same or similar reference numerals denote the same or similar elements, wherein: Figure 1A schematic diagram of an example environment in which several embodiments of the present disclosure can be implemented is shown; Figure 2 A schematic diagram of the process of a simulation circuit according to some embodiments of the present disclosure is shown; Figure 3 A schematic diagram illustrates a process for accelerating simulation for modified test stimuli according to some embodiments of the present disclosure; Figure 4 A schematic diagram illustrating a process for accelerating simulation of a modified module under test according to some embodiments of the present disclosure is shown; Figure 5 A flowchart of a process for simulating a circuit according to some embodiments of the present disclosure is shown; Figure 6 A schematic block diagram of an apparatus for simulating a circuit according to some embodiments of the present disclosure is shown; and Figure 7 A block diagram of a computing device capable of implementing several embodiments of the present disclosure is shown. Detailed Implementation

[0031] Embodiments of this disclosure will now be described in more detail with reference to the accompanying drawings. While some embodiments of this disclosure are shown in the drawings, it should be understood that this disclosure can be implemented in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided to provide a more thorough and complete understanding of this disclosure. It should be understood that the accompanying drawings and embodiments of this disclosure are for illustrative purposes only and are not intended to limit the scope of protection of this disclosure.

[0032] In the description of embodiments of this disclosure, the term "comprising" and similar terms should be understood as open-ended inclusion, i.e., "including but not limited to". The term "based on" should be understood as "at least partially based on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first", "second", etc., may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0033] Currently, the chip design process can include steps such as chip architecture, register transfer level (RTL) design, functional simulation, synthesis, static timing analysis, design for test (DFT) design, formal verification or equivalence checking, place and routing, design rule checking, and GDSII file generation. The final generated GDSII file can then be delivered to the chip manufacturer for production.

[0034] As briefly mentioned above, in the functional simulation (also known as pre-simulation, or simply simulation below) stage, simulators can be used to efficiently analyze and verify the correctness of the circuit design logic, thereby improving the efficiency of chip design. However, as the scale of chip design increases, the time required for a complete simulation is relatively long. Therefore, a solution is needed that can simulate circuit modifications, i.e., incremental simulation technology, to improve simulation efficiency and shorten the chip development cycle.

[0035] During simulation, the use of a simulator can be divided into the simulation compilation phase (i.e., compilation period) and the simulation runtime phase (i.e., runtime period). In the simulation compilation phase, the simulator receives source files and compiles them to obtain simulation files. Source files can be code files written in a hardware description language, and examples of hardware description languages ​​can include VHDL and Verilog, among others.

[0036] Source files can include DUT files describing the design under test (DUT) in the circuit and TB files describing the test bench (TB). The DUT in the circuit can include one or more modules under test (DUTs) designed to perform a target function and be tested during simulation. The test bench, also known as the test environment, refers to the environment used to test the DUT. The test bench can include multiple modules, such as interface modules for interacting with the DUT, stimulus modules for generating stimuli, driver modules for driving the stimuli to the DUT, and other modules for monitoring the DUT's output and verifying whether the output meets certain conditions.

[0037] Based on the source files, the simulator can compile to obtain simulation files. During the simulation run phase, users can run simulation software, which uses the simulation files as the primary carrier, to obtain simulation results. The simulation results can include profiling data obtained after the simulation is completed.

[0038] Currently, several incremental simulation schemes for simulating circuits have been proposed. For example, the inputs and outputs of each circuit module at consecutive clock cycles in previous simulations can be recorded. When simulating a modified circuit model, the inputs of the unmodified circuit modules can be compared at each time step to see if they are the same as those in the previous simulation. If the inputs remain unchanged, the outputs of the circuit module from the previous simulation can be used without resimulating the circuit module. However, this scheme requires recording the inputs and outputs of each circuit module at each time step in the first simulation and comparing the inputs of the unmodified circuit modules at each time step in the second simulation, which consumes significant time and memory resources.

[0039] In other examples, a snapshot of the circuit model's simulation state at certain points (also called checkpoints) can be recorded during the first simulation. This allows the second simulation to avoid resimulating the circuit model's state before the checkpoints by loading the recorded snapshots, thus accelerating the simulation process. However, in this approach, if the module under test (DUT) in the circuit is modified during the second simulation, the previous simulation state snapshots may no longer be applicable to the modified circuit model. Furthermore, this approach relies on the user's expert experience to set multiple checkpoints to record corresponding simulation state snapshots during the first simulation, and requires manual determination of target checkpoints to obtain suitable simulation state snapshots during the second simulation, which can be very difficult. For example, since potential circuit modifications cannot be predicted during the first simulation, multiple checkpoints might be evenly distributed over time to record corresponding simulation state snapshots, potentially leading to unnecessary snapshots being recorded and wasting resources. Additionally, during the second simulation, the user may not be able to determine which checkpoints are associated with the circuit modifications, making it difficult to obtain accurate simulation state snapshots to accelerate the second simulation.

[0040] To at least partially address the aforementioned problems and other potential issues, various embodiments of this disclosure provide a scheme for simulating circuits. Generally, according to the various embodiments described herein, a first simulation result is determined for a model characterizing the circuit, the model including a set of modules under test (DUTs) excited by corresponding test stimulus sets. Based on identifying one of the modified test stimulus in the test stimulus set and the modified DUT in the set of DUTs in the modified model, a snapshot of the model's target simulation state at a target time is obtained from the first simulation result. Based on the target simulation state snapshot, the modified model is simulated to obtain a second simulation result.

[0041] In this way, by determining the target time corresponding to the target simulation state snapshot based on one of the identified modified test stimulus and the modified module under test, a more accurate simulation state snapshot can be obtained, thus accelerating the second simulation. Furthermore, according to embodiments of this disclosure, it is not necessary to compare whether the input of the module under test has changed at each time step, thereby reducing the time and memory resources required for simulation.

[0042] Various exemplary embodiments of this disclosure are described below with reference to the accompanying drawings.

[0043] Figure 1 Schematic diagrams are shown illustrating example environments in which various embodiments of this disclosure can be implemented. For example... Figure 1As shown, user 110 can input source files into simulator 120 and obtain the compiled simulation file 130 from simulator 120. User 110 can also input compilation options into simulator 120 to specify compilation rules for the source files. Based on simulation file 130, user 110 can input simulation commands to run simulation file 130 to obtain simulation results. In some embodiments, simulation results can be directly sent to other processing devices without being sent to user 110 (as shown by the dashed lines). Simulator 120 and simulation file 130 can run on any suitable computing device, and the scope of this disclosure is not limited thereto.

[0044] Figure 2 A schematic diagram of a simulation circuit process 200 according to some embodiments of the present disclosure is shown. Reference will be made below. Figure 1 Process 200 is described below. Process 200 can be implemented using any suitable simulation equipment for simulating the circuit, and the scope of this disclosure is not limited thereto. Figure 2 As shown, the simulation device can perform at least two simulations and can use the simulation results of the first simulation to accelerate the second simulation. In the first simulation, at block 201, the simulation device uses simulator 120 to statically compile the source file to obtain simulation file 202. As described above, the source file can describe a simulation model (hereinafter also referred to as the model) used to characterize the circuit under test. The model includes a set of modules under test in the circuit and a stimulus module for stimulating the set of modules under test. The stimulus module can generate a set of test stimuli to stimulate the corresponding set of modules under test. At block 203, the simulation device runs simulation file 202 to perform a simulation, thereby determining simulation result 204. Simulation result 204 can include profiling data of the circuit under test. Simulation result 204 also includes a snapshot of the simulation state of the model at at least one moment. In some embodiments, the recorded at least one moment can include the moment when each module in the set of modules under test begins simulation, without including every moment during the simulation process. Additionally, the recorded at least one moment can include a moment before the module under test begins simulation.

[0045] In some embodiments, during static compilation at block 201, the simulation device may tag a set of modules in the module set under test. Depending on the application, the tagged set of modules (also called tagged modules) may be one or more modules of interest to user 110, such as modules that user 110 believes may change in subsequent simulations. In this case, simulation results 204 may only include a snapshot of the simulation state of the module set under test when each tagged module begins simulation, without including a snapshot of the simulation state when each module begins simulation. In this way, the number of simulation state snapshots that need to be recorded during the first simulation can be reduced, thereby reducing resource consumption.

[0046] In the second simulation, at block 221, the simulation apparatus uses simulator 120 to recompile the modified source files corresponding to the modified model to obtain simulation file 222. During the compilation process, in some embodiments, modified test stimuli may be identified in the modified model. For example, one or more test stimuli in the test stimulus set may be modified to increase coverage. Alternatively or additionally, modified modules under test (DUTs) may be identified in the modified model. For example, DUTs may be modified to attempt to meet power, performance, and area (PPA) requirements.

[0047] Based on identifying one of the modified test stimuli and the modified module under test in the modified model, the simulation device runs simulation file 222 at box 223. While running simulation file 222, the simulation device obtains a target simulation state snapshot 224 of the model at the target time from simulation result 204, and runs simulation file 222 based on the target simulation state snapshot 224 to obtain a new simulation result 225. In other words, the simulation device uses the target simulation state snapshot 225 as a starting point for a second simulation.

[0048] In some embodiments, if only the modified test stimulus is identified in the modified model, that is, the set of modules under test is not modified, the first moment before the start of the simulation of the set of modules under test in the model of the first simulation can be determined as the target moment, that is, the second simulation can be accelerated based on the simulation state snapshot of the model at the first moment.

[0049] In some embodiments, the first moment is when the model initialization is complete or when it is completed. Model initialization may include a memory allocation process. Additionally or alternatively, model initialization may include a signal initialization process. In this way, by loading a snapshot of the model's simulation state at the first moment, redundant memory allocation and / or signal initialization processes can be avoided, thereby reducing simulation overhead.

[0050] Figure 3 A schematic diagram of a process 300 for accelerating simulation with modified test stimuli according to some embodiments of the present disclosure is shown. Figure 3 As shown, TB 310 interacts with DUT 320 to test DUT 320. TB 310 can deliver a set of test stimuli to DUT 320 to stimulate the set of modules under test in DUT 320. The set of modules under test may include module 321 and module 322.

[0051] During the first simulation, model initialization is performed before simulating the module under test (DUT), such as memory allocation and / or signal initialization. After model initialization is complete, the DUT set is simulated based on the delivered test stimulus set. During the first simulation, a snapshot of the model's simulation state is recorded at at least one time point. Figure 3 As shown, a snapshot of the model's simulation state at time 0, either upon completion of initialization or after completion, is recorded. Snapshots of the model's simulation state at the start of simulations for modules 321 and 322 are also recorded. Specifically, module 321 is simulated at time T0, and a snapshot of the model's simulation state at time T0, S0, is recorded; module 322 is simulated at time T1, and a snapshot of the model's simulation state at time T1, S1, is recorded. It should be understood that the time when a module begins simulation can also include a time close to the start of simulation, preceding the start of the simulation itself.

[0052] During the second simulation, based on the determination at box 221 that the modified model only includes the modified test stimuli, the simulation device obtains a snapshot of the model's simulation state at the first time point (i.e., time 0, shown by the dashed line) from the simulation result 204 as a snapshot. Figure 2 The target simulation state snapshot 224 is shown below. Figure 3 In the example shown, target simulation state snapshot 224 records a snapshot of the simulation state of the model after initialization.

[0053] Continue to refer to Figure 2 In some embodiments, if only the modified module under test (DUT) is identified in the modified model, i.e., the test stimulus set is not modified, the simulation device can determine whether the modified DUT satisfies at least a predetermined condition associated with timing. If the modified DUT is determined to satisfy the predetermined condition, at block 223, the simulation device can obtain a snapshot of the model's simulation state at the second moment when the modified DUT begins simulation, from the simulation result 204 of the first simulation, as a target simulation state snapshot 224. Based on the target simulation state snapshot 224, the simulation device can run the simulation file 222 to obtain new simulation results 225.

[0054] In some embodiments, at block 221, a modified module under test can be identified using a file corresponding to the modified model. Typically, the source file may include one or more files describing the module under test, each file including code describing one or more modules under test. In some embodiments, a modified file may be identified among multiple files corresponding to the modified model, and one or more modules under test in the modified file may be identified as the modified module under test.

[0055] In some embodiments, a modified file can be identified based on its modification time. For example, if it is determined that a file was modified after the first simulation, the file can be determined to be a modified file. Conversely, if it is determined that the file was modified before the first simulation, the file can be determined to be an unmodified file. Alternatively or additionally, a modified file can be identified based on a file-specific hash value. If the hash value of a file changes, the file can be determined to be a modified file. For example, a suitable algorithm such as the MD5 algorithm can be used to calculate the hash value of the file.

[0056] In some embodiments, at block 221, the simulation apparatus may load module data 226 generated during the first simulation to determine whether the modified module under test (DUT) satisfies a predetermined condition at least related to timing. Module data 226 may also be included in the simulation result 204. In some embodiments, if it is determined that the timing of the modified DUT remains unchanged in the model during the first simulation and the modified model during the second simulation, the modified DUT can be determined to satisfy the predetermined condition. In other words, if the modification to the model does not involve a change in the timing of the DUT, the modified DUT can be considered to satisfy the predetermined condition.

[0057] In some embodiments, the timing of the module under test (DUT) can be determined based on the data in module data 226 indicating the instantiation relationships and external connectivity relationships of the DUT. For each DUT, the instantiation relationships and external connectivity relationships between the module and other DUTs can be determined during the compilation phase. External connectivity relationships may include pin connections and flywire connections between modules. If it is determined that either the instantiation relationship or the external connectivity relationship of the DUT has changed, the timing of the module can be considered to have changed. Conversely, if it is determined that neither the instantiation relationship nor the external connectivity relationship of the DUT has changed, the timing of the module can be considered to have remained unchanged.

[0058] In some embodiments, as described above, if a group of modules is marked in the module under test set and the simulation result 204 only includes a snapshot of the model's simulation state when the set of marked modules begins simulation, excluding snapshots of the model's simulation state at other times, the predetermined condition is also associated with whether the module under test is a marked module. Therefore, in addition to detecting whether the timing has changed, the simulation device also detects whether the module under test is a marked module. If it is determined that the modified module under test is included in the group of marked modules, i.e., the modified module under test is a marked module, then the modified module under test can be determined to meet the predetermined condition. Conversely, if it is determined that the modified module under test is not a marked module, then the modified module under test does not meet the predetermined condition. This avoids simulation errors caused by the simulation result 204 not including the corresponding simulation state snapshot.

[0059] In some embodiments, if only one modified module under test is identified in the modified model and that module meets predetermined conditions, the time when the module begins simulation in the first simulation can be determined as the second time, i.e., the target time. In some embodiments, if multiple modified modules under test are identified in the modified model, it is necessary to determine whether all of the multiple modified modules under test meet predetermined conditions, such as unchanged timing and being marked modules. If one or more modified modules under test do not meet predetermined conditions, the compilation process can be stopped to prevent subsequent simulation errors. Simulation errors may occur, for example, because the simulation result 204 does not include the corresponding simulation state snapshot. Simulation errors may also occur because the obtained target simulation state snapshot 224 is no longer applicable to the modified model.

[0060] If it is determined that all the modified modules under test (DUTs) meet the predetermined conditions, the corresponding time of the earliest DUT that starts simulation among the modified DUTs can be determined as the second time and the target time. This ensures that the acquired target simulation state snapshot 224 does not include simulations of any modified DUTs, thus avoiding simulation errors.

[0061] Figure 4 A schematic diagram of a process 400 for accelerating simulation of a modified module under test according to some embodiments of this disclosure is shown. (See reference...) Figure 3 As described, TB 310 interacts with DUT 320 to test DUT 320. TB 310 can deliver a set of test stimuli to DUT 320 to stimulate the set of modules under test in DUT 320. The set of modules under test may include module 321 and module 322.

[0062] During the first simulation, model initialization is performed before simulating the module under test (DUT), such as memory allocation and / or signal initialization. After model initialization is complete, the DUT set is simulated based on the delivered test stimulus set. During the first simulation, a snapshot of the model's simulation state is recorded at at least one time point. Figure 3 As shown, a snapshot of the model's simulation state at time 0 after initialization is completed is recorded. Snapshots of the model's simulation state at the start of simulations for modules 321 and 322 are also recorded. Specifically, module 321 is simulated at time T0, and a snapshot of the model's simulation state at time T0 is recorded; module 322 is simulated at time T1, and a snapshot of the model's simulation state at time T1 is recorded.

[0063] In the second simulation, if it is determined at box 221 that the modified model only includes the modified module under test 322 and the modified module under test 322 meets the predetermined conditions, then a snapshot of the simulation state of the model at time T1 (i.e., the time when the module under test 322 starts the simulation, shown by the dashed line) in the first simulation can be obtained from the simulation result 204 as a snapshot of the model's simulation state at time T1 (i.e., the time when the module under test 322 starts the simulation, shown by the dashed line). Figure 2 The target simulation state snapshot 224 is shown. Based on this simulation state snapshot 224, at box 223, the simulation device continues to simulate the modified model to obtain simulation results 225.

[0064] In other examples, although Figure 4 As not shown in the diagram, if it is determined at box 221 that the modified model includes only the modified module under test 321 and the modified module under test 321 meets predetermined conditions, then a snapshot of the simulation state of the model at time T0 (i.e., the time when the module under test 321 starts simulation) in the first simulation can be obtained from simulation result 204 as a snapshot of the simulation state of the model in the first simulation. Figure 2 The target simulation state snapshot 224 is shown.

[0065] In some other examples, if it is determined at box 221 that the modified model includes the modified test modules 321 and 322 and that the modified test modules 321 and 322 meet predetermined conditions, then a snapshot of the model's simulation state at time T0 (i.e., the time when the test module 321 begins simulation) in the first simulation can be obtained from simulation result 204 as a snapshot of the model's simulation state at time T0 (i.e., the time when the test module 321 begins simulation). Figure 2 The target simulation state snapshot 224 is shown.

[0066] In this way, by utilizing previous target simulation state snapshots, simulation overhead before the target time can be saved, thereby improving simulation efficiency and shortening the verification cycle. Secondly, since only a snapshot of the model's simulation state when the module under test starts simulation is recorded in the first simulation, rather than recording snapshots of the model's simulation state at all times, the resources required to record simulation state snapshots in the first simulation can be reduced. Furthermore, by determining the time when the modified module under test starts simulation or the time when initialization is completed as the target time to obtain a target simulation state snapshot at the target time, the simulation state snapshots at key moments for model modifications can be automatically determined, thereby obtaining more accurate simulation state snapshots to accelerate simulation.

[0067] Figure 5 A flowchart of a process 500 for simulating a circuit according to some embodiments of the present disclosure is shown. Process 500 can be implemented by any suitable computing device. In block 510, a first simulation result for a model used to characterize the circuit is determined, the model including a set of modules under test, the set of modules under test being excited by a corresponding set of test stimuli.

[0068] In box 520, a snapshot of the target simulation state of the model at the target time is obtained from the first simulation result based on one of the modified test stimuli in the modified model set and the modified test modules in the test module set.

[0069] In some embodiments, identifying one of the modified test stimuli in the test stimulus set and the modified test modules in the test module set in the modified model includes: identifying one or more modified files corresponding to the modified model; and identifying the test modules in the one or more modified files as the modified test modules.

[0070] In some embodiments, obtaining the target simulation state snapshot from the first simulation result based on identifying one of the modified test stimuli in the test stimulus set and the modified module under test in the module under test set in the modified model includes: determining the first moment before the module under test set in the model starts simulation as the target moment based on identifying the modified test stimuli in the modified model and determining that the module under test set remains unchanged in the model and the modified model; or determining the second moment when the modified module under test starts simulation in the model as the target moment based on identifying the modified module under test in the modified model and determining that the test stimulus set remains unchanged in the model and the modified model, and determining that the modified module under test satisfies at least a predetermined condition associated with timing.

[0071] In some embodiments, determining that the modified module under test satisfies the predetermined condition includes: determining that the timing of the modified module under test remains unchanged in the model and the modified model.

[0072] In some embodiments, determining that the timing of the modified module under test remains unchanged in the model and the modified model includes: determining that the timing of the modified module under test remains unchanged in the model and the modified model based on determining that the instantiation relationship and external connection relationship of the modified module under test remain unchanged in the model and the modified model.

[0073] In some embodiments, identifying one of the modified test stimuli in the test stimulus set and the modified test modules in the test module set includes identifying a plurality of modified test modules in the test module set, wherein the modified test module is the earliest among the plurality of modified test modules to start simulation, and wherein determining that the modified test module satisfies the predetermined condition includes determining that the corresponding multiple timing sequences of the plurality of modified test modules remain unchanged in the model and the modified model.

[0074] In box 530, based on the target simulation state snapshot, the modified model is simulated to obtain a second simulation result.

[0075] In some embodiments, process 500 further includes: obtaining the instantiation relationship and the external connection relationship of the modified module under test from the first simulation result, for determining that the timing of the modified module under test remains unchanged in the model and the modified model.

[0076] In some embodiments, process 500 further includes: marking a group of modules in the module set under test, wherein the first simulation result includes a set of simulation state snapshots of the module set under test when the marked group of modules begin simulation, but does not include the simulation state snapshots of the module set under test when the unmarked modules in the module set under test begin simulation.

[0077] In some embodiments, determining that the modified module under test meets predetermined conditions further includes: determining that the modified module under test is included in the marked set of modules.

[0078] In some embodiments, identifying one or more modified files corresponding to the modified model includes identifying the one or more modified files based on at least one of the following: the modification time of the file; and a file-specific hash value.

[0079] The above references Figures 1 to 5 The principles and details of the simulation circuit are described. It should be understood that processes 200 and 500 described above are merely exemplary and do not constitute a limitation on the scope of this disclosure.

[0080] Example devices and equipment Figure 6 A block diagram of an apparatus 600 for simulating circuits according to an embodiment of the present disclosure is shown. The apparatus 600 may include a plurality of modules for performing, for example... Figure 2 and Figure 5 The corresponding steps in processes 200 and 500 discussed herein. For example... Figure 6As shown, the apparatus 600 includes: a first simulation unit 610 configured to determine a first simulation result for a model used to characterize the circuit, the model including a set of modules under test (DUTs) excited by corresponding test stimulus sets. The apparatus 600 also includes: a snapshot acquisition unit 620 configured to acquire a snapshot of the model at a target simulation state at a target time based on identifying one of the modified test stimulus in the test stimulus set and the modified DUT in the DUT set within the modified model. The apparatus 600 further includes: a second simulation unit 630 configured to simulate the modified model based on the target simulation state snapshot to obtain a second simulation result.

[0081] In some embodiments, the snapshot acquisition unit 620 is configured to identify one of the modified test stimuli in the test stimulus set and the modified test modules in the test module set in the modified model by: identifying one or more modified files corresponding to the modified model; and determining the test modules in the one or more modified files as the modified test modules.

[0082] In some embodiments, the snapshot acquisition unit 620 is configured to: determine a first moment before the simulation of the set of modules under test in the model begins as the target moment, based on identifying the modified test stimulus in the modified model and determining that the set of modules under test remains unchanged in the model and the modified model; or determine a second moment when the simulation of the modified module under test begins as the target moment, based on identifying the modified module under test in the modified model and determining that the set of test stimulus remains unchanged in the model and the modified model, and based on determining that the modified module under test satisfies at least a predetermined condition associated with timing.

[0083] In some embodiments, the snapshot acquisition unit 620 is configured to determine that the modified module under test satisfies the predetermined condition by determining that the timing of the modified module under test remains unchanged in the model and the modified model.

[0084] In some embodiments, the snapshot acquisition unit 620 is configured to determine that the timing of the modified module under test remains unchanged in the model and the modified model by: determining that the instantiation relationship and external connection relationship of the modified module under test remain unchanged in the model and the modified model.

[0085] In some embodiments, the snapshot acquisition unit 620 is configured to identify one of the modified test stimuli in the test stimulus set and the modified test modules in the test module set by identifying a plurality of modified test modules in the test module set, wherein the modified test module is the earliest test module to start simulation among the plurality of modified test modules, and wherein the snapshot acquisition unit is configured to determine that the modified test module satisfies the predetermined condition by determining that a plurality of corresponding timing sequences of the plurality of modified test modules remain unchanged in the model and the modified model.

[0086] In some embodiments, the apparatus 600 further includes: a module data acquisition unit configured to acquire the instantiation relationship and the external connection relationship of the modified module under test from the first simulation result, for determining that the timing of the modified module under test remains unchanged in the model and the modified model.

[0087] In some embodiments, the apparatus 600 further includes: a marking unit configured to mark a group of modules in the module set under test, wherein the first simulation result includes a set of simulation state snapshots of the module set under test when the marked group of modules begins simulation, but does not include simulation state snapshots of the module set under test when the unmarked modules in the module set under test begin simulation.

[0088] In some embodiments, the snapshot acquisition unit 620 is configured to determine that the modified module under test is included in the marked set of modules by: determining that the modified module under test is included in the marked set of modules.

[0089] In some embodiments, the snapshot acquisition unit 620 is configured to identify the one or more modified files based on at least one of the following: the modification time of the file; and a file-specific hash value.

[0090] Figure 7 A schematic block diagram of an example device 700 that can be used to implement embodiments of the present disclosure is shown. As shown, device 700 includes a computing unit 701, which can perform various appropriate actions and processes according to computer program instructions stored in random access memory (RAM) 703 and / or read-only memory (ROM) 702 or computer program instructions loaded from storage unit 708 into RAM 703 and / or ROM 702. Various programs and data required for the operation of device 700 may also be stored in RAM 703 and / or ROM 702. The computing unit 701 and RAM 703 and / or ROM 702 are interconnected to each other via bus 704. Input / output (I / O) interface 705 is also connected to bus 704.

[0091] Multiple components in device 700 are connected to I / O interface 705, including: input unit 706, such as keyboard, mouse, etc.; output unit 707, such as various types of monitors, speakers, etc.; storage unit 708, such as disk, optical disk, etc.; and communication unit 709, such as network card, modem, wireless transceiver, etc. Communication unit 709 allows device 700 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0092] The computing unit 701 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of the computing unit 701 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. The computing unit 701 performs the various methods and processes described above, such as processes 200 and 500. For example, in some embodiments, processes 200 and 500 may be implemented as computer software programs tangibly contained in a machine-readable medium, such as storage unit 708. In some embodiments, part or all of the computer program may be loaded and / or installed on device 700 via RAM and / or ROM and / or communication unit 709. When the computer program is loaded into RAM and / or ROM and executed by the computing unit 701, one or more steps of processes 200 and 500 described above may be performed. Alternatively, in other embodiments, the computing unit 701 may be configured to execute processes 200 and 500 by any other suitable means (e.g., by means of firmware).

[0093] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer instructions. When these computer program instructions are loaded and executed on a server or terminal, they generate all or part of the processes or functions described in the embodiments of this application. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., coaxial cable, fiber optic cable, digital subscriber line) or wireless (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium accessible to the server or terminal, or a data storage device such as a server or data center that integrates one or more available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, and magnetic tape), an optical medium (e.g., digital video disk (DVD), etc.), or a semiconductor medium (e.g., solid-state drive, etc.).

[0094] Furthermore, although the operations are described in a specific order, this should be understood as requiring that such operations be performed in the specific order shown or in sequential order, or requiring that all illustrated operations be performed to achieve the desired result. In certain environments, multitasking and parallel processing may be advantageous. Similarly, although several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of this disclosure. Certain features described in the context of individual embodiments may also be implemented in combination in a single implementation. Conversely, various features described in the context of a single implementation may also be implemented individually or in any suitable sub-combination in multiple implementations.

[0095] Although the subject matter has been described using language specific to structural features and / or methodological logic, it should be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or actions described above. Rather, the specific features and actions described above are merely illustrative examples of implementing the claims.

Claims

1. A method for simulating circuits, characterized in that, include: Determine the first simulation result of the model used to characterize the circuit, the model including a set of modules under test, the set of modules under test being excited by a corresponding set of test stimuli; Based on identifying one of the modified test stimuli in the test stimulus set and the modified test modules in the test module set in the modified model, a snapshot of the target simulation state of the model at the target time is obtained from the first simulation result. as well as Based on the target simulation state snapshot, the modified model is simulated to obtain a second simulation result. The process of obtaining the target simulation state snapshot from the first simulation result, based on identifying one of the modified test stimuli in the modified model set and the modified test modules in the test module set, includes: Based on identifying the modified test stimulus in the modified model and determining that the set of modules under test remains unchanged in the model and the modified model, the first moment before the set of modules under test in the model starts simulation is determined as the target moment; or Based on identifying the modified module under test in the modified model and determining that the test stimulus set remains unchanged in the model and the modified model, and based on determining that the modified module under test satisfies at least a predetermined condition associated with timing, the second moment when the modified module under test in the model begins simulation is determined as the target moment.

2. The method of claim 1, wherein identifying one of the modified test stimuli in the test stimulus set and the modified test module in the test module set in the modified model comprises: Identify one or more modified files corresponding to the modified model; as well as The module to be tested in one or more modified files is identified as the modified module to be tested.

3. The method according to claim 1, wherein determining that the modified module under test satisfies the predetermined condition includes: It is determined that the timing of the modified module under test remains unchanged in both the model and the modified model.

4. The method of claim 3, wherein determining that the timing of the modified module under test remains unchanged in the model and the modified model comprises: Based on the determination that the instantiation relationship and external connection relationship of the modified module under test remain unchanged in the model and the modified model, it is determined that the timing of the modified module under test remains unchanged in the model and the modified model.

5. The method according to claim 4, The identifier for one of the modified test stimuli in the test stimulus set and the modified test module in the test module set includes identifying multiple modified test modules in the test module set, wherein the modified test module is the earliest among the multiple modified test modules to start simulation, and Determining that the modified module under test satisfies the predetermined conditions includes determining that the corresponding timing sequences of the modified modules under test remain unchanged in the model and the modified model.

6. The method according to claim 4 or 5, further comprising: The instantiation relationship and the external connection relationship of the modified module under test are obtained from the first simulation results, in order to determine that the timing of the modified module under test remains unchanged in the model and the modified model.

7. The method according to any one of claims 3 to 6, further comprising marking a group of modules in the module set under test, wherein the first simulation result includes a set of simulation state snapshots of the module set under test when the marked group of modules begins simulation, but excludes the simulation state snapshots of the module set under test when the unmarked modules in the module set under test begin simulation.

8. The method of claim 7, wherein determining that the modified module under test satisfies the predetermined conditions further includes: It is determined that the modified module under test is included in the marked set of modules.

9. The method according to any one of claims 2 to 8, wherein identifying one or more modified files corresponding to the modified model comprises identifying the one or more modified files based on at least one of the following: The file's modification time; and A file-specific hash value.

10. An apparatus for simulating circuits, comprising: The first simulation unit is configured to determine a first simulation result of a model used to characterize the circuit, the model including a set of modules under test, the set of modules under test being excited by a corresponding set of test stimuli; The snapshot acquisition unit is configured to acquire a snapshot of the target simulation state of the model at a target time from the first simulation result based on one of the modified test stimuli in the modified model and the modified test modules in the test module set. as well as The second simulation unit is configured to simulate the modified model based on the target simulation state snapshot to obtain a second simulation result. The snapshot acquisition unit is configured as follows: Based on identifying the modified test stimulus in the modified model and determining that the set of modules under test remains unchanged in the model and the modified model, the first moment before the set of modules under test in the model starts simulation is determined as the target moment; or Based on identifying the modified module under test in the modified model and determining that the test stimulus set remains unchanged in the model and the modified model, and based on determining that the modified module under test satisfies at least a predetermined condition associated with timing, the second moment when the modified module under test in the model begins simulation is determined as the target moment.

11. The apparatus of claim 10, wherein the snapshot acquisition unit is configured to identify one of the modified test stimuli in the test stimulus set and the modified test modules in the test module set in the modified model by: One or more modified files that identify the modified model; and The module to be tested in one or more modified files is identified as the modified module to be tested.

12. The apparatus of claim 11, wherein the snapshot acquisition unit is configured to determine that the modified module under test satisfies the predetermined condition by: It is determined that the timing of the modified module under test remains unchanged in both the model and the modified model.

13. The apparatus of claim 12, wherein the snapshot acquisition unit is configured to determine that the timing of the modified module under test remains unchanged in both the model and the modified model by: Based on the determination that the instantiation relationship and external connection relationship of the modified module under test remain unchanged in the model and the modified model, it is determined that the timing of the modified module under test remains unchanged in the model and the modified model.

14. The apparatus according to claim 13, The snapshot acquisition unit is configured to identify one of the modified test stimuli in the test stimulus set and the modified modules under test in the module under test set by: identifying a plurality of modified modules under test in the module under test set, wherein the modified module under test is the earliest among the plurality of modified modules under test to start simulation, and The snapshot acquisition unit is configured to determine that the modified module under test satisfies the predetermined conditions by determining that the corresponding timing sequences of the modified multiple modules under test remain unchanged in the model and the modified model.

15. The apparatus according to claim 13 or 14, further comprising: The module data acquisition unit is configured to acquire the instantiation relationship and the external connection relationship of the modified module under test from the first simulation result, so as to determine that the timing of the modified module under test remains unchanged in the model and the modified model.

16. The apparatus according to any one of claims 12 to 15, further comprising: A marking unit is configured to mark a group of modules in the module set under test, wherein the first simulation result includes a set of simulation state snapshots of the module set under test when the marked group of modules begins simulation, but does not include the simulation state snapshots of the module set under test when the unmarked modules in the module set under test begin simulation.

17. The apparatus of claim 16, wherein the snapshot acquisition unit is configured to determine that the modified module under test is included in the tagged set of modules by: It is determined that the modified module under test is included in the marked set of modules.

18. The apparatus according to any one of claims 11 to 17, wherein the snapshot acquisition unit is configured to identify the one or more modified files based on at least one of the following: The file's modification time; and A file-specific hash value.

19. An electronic device comprising: At least one computing unit; At least one memory coupled to the at least one computing unit and storing instructions for execution by the at least one computing unit, the instructions, when executed by the at least one computing unit, causing the electronic device to perform the method according to any one of claims 1-9.

20. A computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method according to any one of claims 1-9.

21. A computer program product comprising computer-executable instructions, wherein the computer-executable instructions, when executed by a processor, implement the method according to any one of claims 1-9.

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