A system-in-package circuit, a mainboard and an electronic device

Abstract

The embodiment of the application provides a system-level package circuit, a mainboard and electronic equipment, the system-level package circuit comprises an integrated package microprocessor, a programmable logic device and an independent memory; the programmable logic device comprises a first storage area; the microprocessor comprises a boot function storage area and a management function storage area; the boot function storage area is used for storing a target boot program; the target boot program is used for identifying the configuration of a mode configuration pin of the system-level package circuit, determining a target function program to be booted according to the configuration of the mode configuration pin, obtaining the target function program from the independent memory, booting the target function program into a corresponding target storage area, and starting the target function program; the configuration is simpler, the integration is higher, more functions can be realized, and the versatility and expansibility of the system are higher.

Description

Technical Field

[0001] This application belongs to the field of system-in-package (SIP) circuit technology, specifically relating to a system-in-package circuit, a motherboard, and electronic devices. Background Technology

[0002] Currently, System in a Package (SiP) circuits are characterized by single function, diverse interfaces, complex configuration, and low integration. In practical applications, changes or replacements to the bus require redesign and rewiring of the system hardware, and external cables need to be re-laid out and re-wired, resulting in a large workload and complexity. The system's versatility and scalability are extremely low. Summary of the Invention

[0003] The purpose of this application is to provide a system-in-package circuit, motherboard, and electronic device that is simpler to configure, more integrated, capable of performing more functions, and has high system versatility and scalability.

[0004] In a first aspect, embodiments of this application provide a system-in-package circuit that integrates a microprocessor, a programmable logic device, and a separate memory; the programmable logic device includes a first memory area;

[0005] The microprocessor includes a boot function storage area and an administration function storage area; the boot function storage area is used to store the target boot program;

[0006] The target bootloader is used to identify the configuration of the mode configuration pins of the system-in-package circuit, determine the target function program to be booted according to the configuration of the mode configuration pins, retrieve the target function program from the independent memory, and boot the target function program into the corresponding target memory area to start the target function program.

[0007] The target storage area is the first storage area and / or the management function storage area.

[0008] In some embodiments, the system-in-package circuit further includes an integrated packaged power module, the power module including a power conversion unit that converts the external input power of the system-in-package circuit.

[0009] In some embodiments, the programmable logic device includes a physical layer interface unit, a MAC layer interface unit, and a functional unit capable of converting the interface unit.

[0010] In some implementations, the programmable logic device includes input / output units with embedded different protocol bus network interfaces.

[0011] In some implementations, the microprocessor includes at least two standardized communication interfaces.

[0012] In some implementations, the system-in-package circuitry also includes standardized circuit configuration interfaces and circuit status output interfaces.

[0013] In some embodiments, the microprocessor further includes a configuration information storage area; the configuration information storage area is used to store the operating state and attribute characteristics of the system-in-package circuit.

[0014] In some implementations, the independent memory stores at least two functional programs that support different bus protocols.

[0015] Secondly, embodiments of this application provide a motherboard, the motherboard including the system-in-package circuit described in the first aspect.

[0016] Thirdly, embodiments of this application provide an electronic device, which includes the motherboard described in the second aspect.

[0017] In this embodiment, the system-in-package (SiP) circuit includes an integrated microprocessor, a programmable logic device (PLD), and a separate memory. The PLD includes a first memory area. The microprocessor includes a boot function memory area and a management function memory area. The boot function memory area stores a target bootloader. The target bootloader identifies the configuration of the SiP circuit's mode configuration pins, determines the target function program to be booted based on the mode configuration pins, retrieves the target function program from the separate memory, and boots it into the corresponding target memory area to start the target function program. Because the SiP circuit includes mode configuration pins, the corresponding mode configuration pins can be configured according to the function program to be run. This allows the target bootloader to determine the corresponding target function program to be booted based on the mode configuration pins. Even when the memory area includes function programs with different bus protocol functions, the target function program can be retrieved from the separate memory and booted into the corresponding target memory area to start the target function program. This design is simpler to configure, has higher integration, can implement more functions, and offers high system versatility and scalability. Attached Figure Description

[0018] Figure 1 A schematic diagram of the composition structure of a system-in-package circuit provided in an embodiment of this application;

[0019] Figure 2 A schematic diagram of the composition structure of another system-in-package circuit provided in an embodiment of this application;

[0020] Figure 3This is a schematic diagram of a memory space distribution provided in an embodiment of this application. Detailed Implementation

[0021] The technical solutions of the embodiments of this application will be clearly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application are within the scope of protection of this application.

[0022] It is understood that in the embodiments of this application, "software" and "program" are the same concept; for example, functional software is equivalent to functional program.

[0023] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, the first object can be one or at least two. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0024] The system-in-package circuit provided in this application will be described in detail below with reference to the accompanying drawings, through specific embodiments and application scenarios.

[0025] Figure 1 This application provides a schematic diagram of the composition structure of a system-in-package circuit, as shown in the embodiment. Figure 1 As shown, the system-in-package circuit 10 includes an integrated packaged microprocessor 101, a programmable logic device 102, and an independent memory 103; the programmable logic device 102 includes a first memory area 1021;

[0026] The microprocessor 101 includes a boot function storage area 1011 and a management function storage area 1012; the boot function storage area 1011 is used to store the target boot program.

[0027] The target bootloader is used to identify the configuration of the mode configuration pins of the system-in-package circuit 10, determine the target function program to be booted according to the configuration of the mode configuration pins, obtain the target function program from the independent memory 103, and boot the target function program into the corresponding target storage area to start the target function program.

[0028] The target storage area is the first storage area 1021 and / or the management function storage area 1012.

[0029] It is understandable that the first storage area corresponds to the RAM storage area of ​​the programmable logic device; the boot function storage area and the management function storage area are both part of the flash storage area of ​​the microprocessor.

[0030] In some possible implementations, the target bootloader may be a bootloader software program.

[0031] It is understandable that the mode configuration pins of a system-in-package (SoC) circuit can include multiple pins, and different functions can be predefined for each pin. Therefore, the pin configuration of multiple pins can determine the corresponding target function program to be booted. Here, the target function program to be booted refers to the function program that needs to run in the SoC circuit.

[0032] In some possible implementations, at least two functional programs supporting different bus protocols are stored in a separate memory.

[0033] Thus, when the target bootloader identifies the configuration of the mode configuration pins of the system-in-package circuit and determines the target functional program to be booted based on the pin configuration of the mode pins, it can search for the target functional program to be booted from at least two functional programs stored in the independent memory and transfer the target functional program to be booted into the corresponding target memory area.

[0034] For example, the independent memory includes function programs 1 to 10; wherein function programs 1, 2, 3, 4, and 5 are function programs running on a microprocessor; and function programs 6, 7, 8, 9, and 10 are function programs running on a programmable logic device. When the target bootloader identifies the configuration of the mode configuration pins of the system-in-package circuit and determines that the target function programs to be booted are function programs 2 and 8 based on the pin configuration of the mode pins, the target bootloader needs to retrieve function programs 2 and 8 from the independent memory, move function program 2 to the management function storage area, and move function program 8 to the first storage area.

[0035] In this embodiment, the system-in-package (SiP) circuit includes an integrated microprocessor, a programmable logic device (PLD), and a separate memory. The PLD includes a first memory area. The microprocessor includes a boot function memory area and a management function memory area. The boot function memory area stores a target bootloader. The target bootloader identifies the configuration of the SiP circuit's mode configuration pins, determines the target function program to be booted based on the mode configuration pins, retrieves the target function program from the separate memory, and boots it into the corresponding target memory area to start the target function program. Because the SiP circuit includes mode configuration pins, the corresponding mode configuration pins can be configured according to the function program to be run. This allows the target bootloader to determine the corresponding target function program to be booted based on the mode configuration pins. Even when the memory area includes function programs with different bus protocol functions, the target function program can be retrieved from the separate memory and booted into the corresponding target memory area to start the target function program. This design is simpler to configure, has higher integration, can implement more functions, and offers high system versatility and scalability.

[0036] Figure 2 A schematic diagram of another system-in-package circuit provided in this application embodiment is shown below. Figure 2 As shown, the system-in-package circuit 20 includes an integrated microprocessor 201, a programmable logic device 202, an independent memory 203, and a power module 204; the programmable logic device 202 includes a first memory area 2021;

[0037] The power module 204 includes a power conversion unit that converts the external input power of the system-in-package circuit 20.

[0038] The microprocessor 201 includes a boot function storage area 2011 and an administration function storage area 2012; the boot function storage area 2011 is used to store the target boot program;

[0039] The target bootloader is used to identify the configuration of the mode configuration pins of the system-in-package circuit 20, determine the target function program to be booted according to the configuration of the mode configuration pins, obtain the target function program from the independent memory 203, and boot the target function program into the corresponding target storage area to start the target function program.

[0040] The target storage area is the first storage area 2021 and / or the management function storage area 2012.

[0041] In this embodiment, the power module includes a power conversion unit that converts the external input power of the system-in-package circuit. The power conversion unit converts the external input power to provide different power supplies to the microprocessor, programmable device and independent memory in the system-in-package circuit, without relying on complex external power conversion circuits.

[0042] This application provides yet another system-in-package circuit, which includes an integrated packaged microprocessor, a programmable logic device, and an independent memory; the programmable logic device includes a first memory area, a physical layer interface unit, a MAC layer interface unit, and a functional unit capable of converting the interface unit;

[0043] The microprocessor includes a boot function storage area and an administration function storage area; the boot function storage area is used to store the target boot program;

[0044] The target bootloader is used to identify the configuration of the mode configuration pins of the system-in-package circuit, determine the target function program to be booted according to the configuration of the mode configuration pins, retrieve the target function program from the independent memory, and boot the target function program into the corresponding target memory area to start the target function program.

[0045] The target storage area is the first storage area and / or the management function storage area.

[0046] In this embodiment of the application, by setting a physical layer interface unit, a MAC layer interface unit, and a functional unit that can convert the interface unit in the system-in-package circuit, the system-in-package circuit can be adapted to more functional programs.

[0047] This application provides another system-in-package circuit, which includes an integrated packaged microprocessor, a programmable logic device, and a separate memory; the programmable logic device includes input / output units with different protocol bus network interfaces embedded in the package.

[0048] The microprocessor includes a boot function storage area and an administration function storage area; the boot function storage area is used to store the target boot program;

[0049] The target bootloader is used to identify the configuration of the mode configuration pins of the system-in-package circuit, determine the target function program to be booted according to the configuration of the mode configuration pins, retrieve the target function program from the independent memory, and boot the target function program into the corresponding target memory area to start the target function program.

[0050] The target storage area is the first storage area and / or the management function storage area.

[0051] In some possible implementations, the input / output (IO) units in the programmable logic device have custom functions, and the hardware IO allocation of the interface module is fixed.

[0052] In this embodiment of the application, by setting input / output units with different protocol bus network interfaces fixed in the programmable logic device, the standardization of different protocol bus network interfaces can be achieved.

[0053] This application provides another system-in-package circuit, which includes an integrated packaged microprocessor, a programmable logic device, and a separate memory; the programmable logic device includes a first memory area;

[0054] The microprocessor includes a boot function storage area, a management function storage area, and at least two standardized communication interfaces; the boot function storage area is used to store the target boot program.

[0055] The target bootloader is used to identify the configuration of the mode configuration pins of the system-in-package circuit, determine the target function program to be booted according to the configuration of the mode configuration pins, retrieve the target function program from the independent memory, and boot the target function program into the corresponding target memory area to start the target function program.

[0056] The target storage area is the first storage area and / or the management function storage area.

[0057] In some possible implementations, at least two standardized communication interfaces include common communication interfaces such as Universal Asynchronous Receiver / Transmitter (UART), I2C, and Serial Peripheral Interface (SPI).

[0058] Understandably, at least two standardized communication interfaces can cover typical bus management application interfaces.

[0059] In this embodiment of the application, the management structure can be standardized by setting at least two standardized communication interfaces in the microprocessor.

[0060] This application provides another system-in-package (SiP) circuit, which includes an integrated microprocessor, a programmable logic device, an independent memory, a standardized circuit configuration interface, and a circuit status output interface; the programmable logic device includes a first memory area.

[0061] The microprocessor includes a boot function storage area and an administration function storage area; the boot function storage area is used to store the target boot program;

[0062] The target bootloader is used to identify the configuration of the mode configuration pins of the system-in-package circuit, determine the target function program to be booted according to the configuration of the mode configuration pins, retrieve the target function program from the independent memory, and boot the target function program into the corresponding target memory area to start the target function program.

[0063] The target storage area is the first storage area and / or the management function storage area.

[0064] In this embodiment of the application, by setting standardized circuit configuration interfaces and circuit status output interfaces in the system-in-package circuit, the input and output interfaces of the bus control SiP circuit can be unified under different application scenarios, thereby improving the versatility and maintainability of the bus control SiP circuit.

[0065] This application embodiment also provides a system-in-package circuit, which includes an integrated packaged microprocessor, a programmable logic device, and a separate memory; the programmable logic device includes a first memory area;

[0066] The microprocessor includes a boot function storage area, a configuration information storage area, and a management function storage area; the boot function storage area is used to store the target boot program; the configuration information storage area is used to store the operating state and attribute characteristics of the system-in-package circuit.

[0067] The target bootloader is used to identify the configuration of the mode configuration pins of the system-in-package circuit, determine the target function program to be booted according to the configuration of the mode configuration pins, retrieve the target function program from the independent memory, and boot the target function program into the corresponding target memory area to start the target function program.

[0068] The target storage area is the first storage area and / or the management function storage area.

[0069] In some possible implementations, the operating state and attribute characteristics of the system-in-package (SiP) circuit can refer to the key information of the SiP circuit; the key information includes at least the operating functional mode, production date, manufacturer information, online information, etc. of the SiP circuit.

[0070] Yes, the system-in-package circuit can be connected to the host computer via a network port.

[0071] In this embodiment, a configuration information storage area is set in the microprocessor to store the operating status and attribute characteristics of the system-in-package circuit. When the system-in-package circuit is connected to the host computer via a network port, the operating status and attribute characteristics of the system-in-package circuit can be transmitted to the host computer via the network port for display and management by the host computer.

[0072] This application provides a method for implementing a multifunctional bus control SiP circuit, which is compatible with multiple bus protocols, features a standardized bus interface, simplifies system configuration, and improves system integration. It is modular, miniaturized, and versatile, significantly enhancing system functionality and performance. Furthermore, the multifunctional bus control SiP circuit offers strong maintainability and scalability, enabling rapid upgrades and iterations of advanced buses, meeting future development needs.

[0073] To address the issues of limited functionality, diverse interfaces, complex configuration, low integration, poor scalability, and poor maintainability, this application provides a method for implementing a multi-functional bus control SiP circuit, with the following specific steps:

[0074] Step 1: Hardware implementation of bus control SiP circuit

[0075] The bus control SiP circuit hardware is based on a hardware architecture of "microprocessor + programmable logic device + memory + power supply". It adopts SiP circuit integrated packaging technology to realize the bus control SiP circuit hardware design, so that the circuit hardware has embedded microprocessor capabilities, programmable logic capabilities, program storage capabilities, and power management capabilities.

[0076] Among them, the microprocessor has strong transaction management capabilities and can be used to implement bus control and management functions; the programmable logic device has complex logic programming capabilities and can implement complex network services. At the same time, the I / O customization function of the programmable logic device lays the foundation for the standardization of communication interfaces compatible with multiple network functions; the memory is used to store functional programs. The larger the memory space, the more functional programs the circuit can support; the power supply can realize the conversion of multiple power types, so that the circuit can be used as an independent module without relying on complex external power conversion. After being integrated and packaged into a circuit module, it can be powered by an external single power supply. After internal power conversion, the module supplies power to the microprocessor, programmable logic device, and memory.

[0077] This hardware architecture lays the foundation for realizing modular, miniaturized, and universal bus-controlled SiP circuits, while also providing scalability.

[0078] Step 2: Standardize the bus control SiP circuit interface

[0079] Based on typical bus transmission application scenarios, physical layer interface units and MAC layer interface units are designed in programmable logic devices. The input and output interfaces of different bus protocol functional units are converted by the interface units. At the same time, due to the custom I / O function of programmable logic devices, the hardware I / O allocation of the interface modules is fixed, thereby realizing the standardization of different protocol bus network interfaces.

[0080] Since microprocessors have common communication interfaces such as UART, I2C, and SPI, they can cover typical bus management application interfaces. By standardizing the functional definition of each interface, the management interface can be standardized.

[0081] Meanwhile, standardized circuit configuration interfaces and circuit status output interfaces enable unified input and output interfaces for bus-controlled SiP circuits in different application scenarios, thereby improving the versatility and maintainability of bus-controlled SiP circuits.

[0082] Step 3: Divide the functional areas according to the storage area size.

[0083] The bus control SiP circuit integrates two memories (memory 1 and memory 2). Memory 1 (corresponding to the Flash in the processing area) has its storage area divided into three parts: the first part stores the bootloader of the circuit; the second part (equivalent to the auxiliary...) Figure 1 The first part (the management function storage area) stores the functional programs after successful boot; the second part (equivalent to the configuration information storage area) stores configuration information. Memory 2 (corresponding to an independent memory) stores the circuit's multi-functional programs, which can be management function programs, network function programs, and the number of function programs can be expanded according to the size of memory 2, thus giving the bus control SiP circuit strong versatility and functional expandability.

[0084] Figure 3 This application provides a schematic diagram of a memory space distribution, as shown in the embodiment of the present application. Figure 3 As shown, the memory includes memory 1 and memory 2; memory 1 includes bootloader 301, function management area 302, configuration information 303; memory 2 includes function program 1, function program 2, function program 3... function program N.

[0085] Step 4: Integrate multiple bus protocol functional software

[0086] Based on typical application scenarios of bus-controlled SiP circuits, functional software supporting different bus protocols is designed, such as Parallel Redundancy Protocol (PRP protocol), High-availability Seamless Redundancy Protocol (HSR), Intelligent Platform Management Interface (IPMI) chassis health management protocol, Precision Clock Synchronization Protocol (IEEE 1588-2008), Powerlink protocol, etc.

[0087] Thanks to its general-purpose hardware design, standardized interfaces, and expandable memory, the bus control SiP circuit is compatible with a wide range of bus functions, forming an integrated "management" + "network" bus control solution.

[0088] Step 5: Design the boot logic

[0089] The bus-controlled SiP circuit bootloader software is used for circuit configuration mode recognition and function software booting. After the circuit is powered on, the bootloader software starts and operates. It identifies the hardware mode configuration pins and, based on the pin definitions, guides the corresponding function software into the microprocessor and programmable logic device (PLD). Once the function software enters the PLD, if loading is successful, the network function program starts; after the microprocessor function program is booted into the "management function area," the bootloader software jumps to the function software, and the management function program starts.

[0090] Thus, a multifunctional bus control SiP circuit has been completed.

[0091] Based on the above embodiments, this application provides a motherboard, which includes the system-in-package circuit described in any of the above embodiments.

[0092] This application also provides an electronic device, which includes the motherboard described above.

[0093] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a included circuit or method includes not only those elements but also other elements not expressly listed, or elements inherent to such circuit or method. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the circuit or method that includes that element.

[0094] Furthermore, it should be noted that the scope of the circuits and methods in the embodiments of this application is not limited to performing functions in the order shown or discussed, but may also include performing functions in a substantially simultaneous manner or in the reverse order, depending on the functions involved. For example, the described methods may be performed in a different order than described, and various steps may be added, omitted, or combined. In addition, features described with reference to certain examples may be combined in other examples.

[0095] The embodiments of this application have been described above with reference to the accompanying drawings. However, this application is not limited to the specific embodiments described above. The specific embodiments described above are merely illustrative and not restrictive. Those skilled in the art can make many other forms under the guidance of this application without departing from the spirit and scope of the claims, and all of these forms are within the protection scope of this application.

Claims

1. A system-in-package circuit, characterized in that, include: An integrated package of a microprocessor, a programmable logic device, and a separate memory; the programmable logic device includes a first memory area; The microprocessor includes a boot function storage area and a management function storage area; the boot function storage area is used to store the target boot program. The target bootloader is used to identify the configuration of the mode configuration pins of the system-in-package circuit, determine the target function program to be booted according to the configuration of the mode configuration pins, retrieve the target function program from the independent memory, and boot the target function program into the corresponding target memory area to start the target function program. The independent memory stores at least two functional programs that support different bus protocols; The target storage area is the first storage area and / or the management function storage area.

2. The system-in-package circuit according to claim 1, characterized in that, It also includes an integrated packaged power module, which includes a power conversion unit that converts the external input power of the system-in-package circuit.

3. The system-in-package circuit according to claim 1, characterized in that, The programmable logic device includes a physical layer interface unit, a MAC layer interface unit, and a functional unit capable of converting the interface unit.

4. The system-in-package circuit according to claim 1, characterized in that, The programmable logic device includes input / output units with fixed bus network interfaces of different protocols.

5. The system-in-package circuit according to claim 1, characterized in that, The microprocessor includes at least two standardized communication interfaces.

6. The system-in-package circuit according to any one of claims 1 to 5, characterized in that, The system-in-package circuit also includes standardized circuit configuration interfaces and circuit status output interfaces.

7. The system-in-package circuit according to any one of claims 1 to 5, characterized in that, The microprocessor also includes a configuration information storage area; the configuration information storage area is used to store the operating status and attribute characteristics of the system-in-package circuit.

8. A motherboard, characterized in that, The motherboard includes the system-in-package circuitry as described in any one of claims 1 to 7.

9. An electronic device, characterized in that, The electronic device includes the motherboard as described in claim 8.

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