Interleaved parallel inverter adaptive efficiency optimization control method and device

Abstract

The application discloses a kind of interlaced parallel inverter adaptive efficiency optimization control method and device, the method steps include: the load rate state information of the controlled interlaced parallel inverter is obtained in the operation process of controlled interlaced parallel inverter;According to load rate state information, the load state of the controlled interlaced parallel inverter is judged, if in non-light load state, three-phase branch of the controlled interlaced parallel inverter is respectively controlled according to DCM, CRM and specified control mode operation, if for light load state, the phase shielding control mode is controlled to shield one branch in each phase of two-phase branch currently working in CRM, DCM mode.The present application has the advantages of simple implementation method, low cost, high efficiency, low requirement for controller and drive, and strong flexibility.

Description

Technical Field

[0001] This invention relates to the field of inverter technology, and in particular to an adaptive efficiency optimization control method and apparatus for interleaved parallel inverters. Background Technology

[0002] To reduce losses and improve conversion efficiency in three-phase inverters, soft-switching technology is typically employed. Most soft-switching inverters achieve this by adding auxiliary components (inductors, capacitors, auxiliary switches, etc.), but this increases the inverter's size and cost. This problem can be solved by using Critical Conduction Mode (CRM) control. This involves frequency conversion control of the inverter to ensure the inductor current ripple in each switching cycle is twice the current average. After the inductor current crosses zero, a specific switch is controlled to prevent the inductor current from increasing in the reverse direction. The resonance of the filter inductor and junction capacitance discharges the junction capacitance of the switch. After discharge, the anti-parallel diode of the switch conducts, and the switch is turned on before the current crosses zero again, thus achieving zero-voltage switching (ZVS). This means the voltage of the switch is zero at the moment of turn-on, resulting in zero turn-on losses.

[0003] To achieve independent CRM control for three phases in a three-phase inverter circuit, three-phase decoupling is necessary. To reduce the frequency adjustment range and avoid increased turn-off and drive losses due to frequency increases, one solution is to introduce decoupled pulse-width modulation (DPWM) and discontinuous current mode (DCM) to form a combined control method of DCM, CRM, and DPWM. However, when implementing DCM+CRM+DPWM control, the inductor current must cross zero in every switching cycle, resulting in significant inductor current ripple, which increases the current value of the filter capacitor and output harmonics. Although the current of the filter capacitor can be reduced by using a double-interleaved parallel inverter circuit to reduce the ripple of the synthesized current through phase cancellation of inductor current, the interleaved parallel inverters currently using the DCM+CRM+DPWM combined control mode all use frequency conversion control. The lighter the load of the inverter, the higher the frequency required to realize the phase of CRM and DCM at the same time. Especially when close to no load, if the inverter is still under the DCM+CRM+DPWM combined control, the switching frequency will be very high, and the drive loss and turn-off loss will be very large, resulting in very low efficiency under light load. At the same time, it will also cause a series of problems such as the controller, drive circuit and sampling circuit not meeting the requirements, and the difficulty in designing magnetic devices. Summary of the Invention

[0004] The technical problem to be solved by this invention is: in view of the technical problems existing in the prior art, this invention provides an adaptive efficiency optimization control method and device for interleaved parallel inverters that is simple to implement, low in cost, high in efficiency, has low requirements for controllers and drives, and is highly flexible.

[0005] To solve the above-mentioned technical problems, the technical solution proposed by this invention is as follows:

[0006] An adaptive efficiency optimization control method for interleaved parallel inverters, comprising the following steps:

[0007] During operation, the controlled interleaved parallel inverter acquires the load rate status information of the controlled interleaved parallel inverter;

[0008] The load status of the controlled interleaved parallel inverter is determined based on the load rate status information. If it is in a non-light load state, the three-phase branches of the controlled interleaved parallel inverter are controlled to operate in DCM, CRM and specified control modes respectively. If it is in a light load state, the phase shielding control method is used to shield one branch of each phase of the two-phase branches currently operating in CRM and DCM modes.

[0009] Furthermore, when the load rate of the controlled interleaved parallel inverter is less than the preset ultra-light load rate threshold, the fixed frequency control method is used to control each phase branch in the controlled interleaved parallel inverter; otherwise, the variable frequency control method is used to control each phase branch in the controlled interleaved parallel inverter. The preset ultra-light load rate is less than the preset light load state load rate threshold.

[0010] Furthermore, when the load rate of the controlled interleaved parallel inverter is between the preset ultra-light load rate threshold and the preset light load state load rate threshold, the three-phase branches of the controlled interleaved parallel inverter are controlled to operate in DCM, CRM and DPWM modes respectively, and a phase shielding control method is used to shield one branch of each phase of the two-phase branches operating in CRM and DCM modes.

[0011] Furthermore, when the load rate of the controlled interleaved parallel inverter is between 0 and the preset ultra-light load rate, the two target branches of the three-phase branch of the controlled interleaved parallel inverter that originally need to work in CRM and DCM modes are controlled to operate in CCM (Continuous Current Mode) mode and the other branch is controlled to operate in DPWM mode, and one branch in each phase of the two target branches is controlled to be shielded.

[0012] Furthermore, the specified control mode is DPWM mode.

[0013] Furthermore, the controlled interleaved parallel inverter is a dual or multiple three-phase interleaved parallel inverter.

[0014] An adaptive efficiency optimization control device for interleaved parallel inverters includes:

[0015] The current zero-crossing detection module is used to detect the zero-crossing signal of the three-phase output current of the controlled interleaved parallel inverter;

[0016] The modulation wave generation module is used to acquire the three-phase output current value and reference current value of the controlled interleaved parallel inverter, and generate a modulation wave based on the three-phase output current value and reference current value.

[0017] The control pulse generation module is used to generate control pulses based on the mode selection signal, the modulation wave, and the zero-crossing signal to send to the three-phase branches of the controlled interleaved parallel inverter, wherein the switching transistors in the corresponding phase branches operating in CRM mode or DCM mode are turned on based on the mode selection signal and the zero-crossing signal.

[0018] Furthermore, the modulation wave generation module includes:

[0019] The voltage control unit is used to acquire the three-phase output voltage value and reference voltage of the controlled interleaved parallel inverter and to perform voltage control and regulation to obtain the current reference value.

[0020] The current control unit is used to receive the current reference value and the three-phase output current value of the controlled interleaved inverter and perform current control regulation to generate the modulation wave.

[0021] Furthermore, the voltage control unit and / or the current control unit are closed-loop control components for performing closed-loop control regulation.

[0022] Furthermore, it also includes a mode selection module, which is used to acquire a reference voltage and determine the operating mode of each phase of the controlled interleaved parallel inverter based on the reference voltage, and generate a corresponding mode selection signal output.

[0023] Furthermore, it also includes a reference voltage generation module connected to the mode selection module and the modulation wave generation module respectively, used to generate reference voltage outputs corresponding to each control mode.

[0024] An adaptive efficiency optimization control device for interleaved parallel inverters includes a processor and a memory, wherein the memory stores a computer program and the processor executes the computer program to perform the method described above.

[0025] Compared with the prior art, the advantages of the present invention are as follows:

[0026] 1. In the operation process of the controlled interleaved parallel inverter, based on the DCM+CRM+DPWM combined control mode, the present invention controls the controlled interleaved parallel inverter by adopting a phase masking control method when the controlled interleaved parallel inverter is in a preset light load state according to different load rate states of the controlled interleaved parallel inverter, and masks one branch in each phase of the two-phase branches operating in CRM and DCM modes or the two-phase branches originally required to operate in CRM and DCM modes, so as to realize adaptive efficiency optimization control. Combined with the phase masking control method, the present invention can reduce driving loss, turn-off loss, etc., and effectively improve the efficiency of the converter.

[0027] 2. The present invention combines the phase masking control method to realize adaptive efficiency optimization control of the interleaved parallel inverter, which can reduce the requirements for the controller, driving and sampling, and reduce the requirement for the operation speed of the controller. At the same time, it can also reduce the driving power of the driving circuit and the sampling frequency and bandwidth of the sampling circuit, making device selection and circuit design simpler.

[0028] 3. The present invention combines the phase masking control method to realize adaptive efficiency optimization control of the interleaved parallel inverter, which can also make the influence of operating frequency change caused by load change no longer affect the core selection and design of magnetic devices, effectively reducing the design difficulty of magnetic devices. Description of Drawings

[0029] Figure 1 is a schematic diagram of the circuit structure of a three-phase inverter.

[0030] Figure 2 is a schematic diagram of the working area (half cycle) and switching waveforms controlled by DCM+CRM+DPWM, wherein (a) corresponds to the working area, and (b) corresponds to the waveform of the DCM phase following the CRM phase.

[0031] Figure 3 is a schematic diagram of the circuit structure of a two-fold interleaved parallel three-phase inverter.

[0032] Figure 4 is a schematic diagram of the switching frequency range of a three-phase inverter under light load.

[0033] Figure 5 is a schematic diagram of the switching frequency range of a three-phase inverter at no load.

[0034] Figure 6 is a schematic diagram of the implementation flow of the adaptive efficiency optimization control method for the interleaved parallel inverter in this embodiment.

[0035] Figure 7 is a schematic diagram of phase masking in each phase interval of a power frequency half cycle in the first light load state (P2<Po<P1) in this embodiment.

[0036] Figure 8This is a schematic diagram illustrating the working mode setting principle of the interleaved parallel inverter adaptive efficiency optimization control in this embodiment across the entire load range.

[0037] Figure 9 This is a schematic diagram of the structural principle of the adaptive efficiency optimization control device for interleaved parallel inverters in a specific application embodiment of the present invention.

[0038] Figure 10 This is a schematic diagram illustrating the efficiency improvement results obtained in a specific application embodiment.

[0039] Figure 11 This is a schematic diagram of a three-phase PWM rectifier circuit with two interleaved parallel connections.

[0040] Figure 12 This is a schematic diagram of a triple-interleaved parallel inverter circuit.

[0041] Legend: 1. Current zero-crossing detection module; 2. Modulation wave generation module; 201. Voltage control unit; 202. Current control unit; 3. Control pulse generation module; 4. Mode selection module; 5. Reference voltage generation module. Detailed Implementation

[0042] The present invention will be further described below with reference to the accompanying drawings and specific preferred embodiments, but this does not limit the scope of protection of the present invention.

[0043] like Figure 1 As shown, in a three-phase inverter, according to Kirchhoff's current law, I LA +I LB +I LC =0, therefore there are only two degrees of freedom for current control. To achieve independent CRM control for all three phases in a three-phase inverter circuit, three-phase decoupling is necessary. Therefore, a DPWM control mode needs to be introduced to form a combination of CRM and DPWM. That is, at any given moment in the power frequency cycle, the phase with the largest absolute voltage value is clamped, while the other two phases are controlled by CRM. This achieves decoupling of two phases from the third phase at any given moment. To reduce the frequency regulation range and avoid increased turn-off and drive losses due to frequency increases, a DCM is also needed to form a DCM+CRM+DPWM combination. The inverter's operating area under the above control is divided as follows: Figure 2As shown in (a). Taking phase A as an example, the switching transistors alternately operate in DCM (0-30° and 150°-180°), CRM (30°-60° and 120°-150°), and Clamping (60°-120°), each occupying 1 / 3 of the phase interval; at the same time, the three-phase switching transistors operate in the DCM, CRM, and Clamping regions respectively. In the DCM operating region (e.g., the 0-30° power frequency phase region of phase A), by reducing the switching frequency (the switching frequency follows the CRM phase), the system enters DCM mode (after the inductor current crosses zero, the corresponding switching transistor is controlled to prevent the inductor current from increasing in the reverse direction; before the next switching transistor operates, the junction capacitance of the inductor and the switching transistor resonates with damping). The switching waveform of the DCM phase following the CRM phase is shown below. Figure 2 As shown in (b).

[0044] To address the issue of large inductor current ripple in the DCM+CRM+DPWM combined control mode, which increases the current value of the filter capacitor and output harmonics, a dual or multiple interleaved parallel inverter circuit is employed. This utilizes the principle of inductor current phase offset cancellation to reduce the combined current ripple, thereby lowering the filter capacitor current and ultimately reducing the size and weight of the filter capacitor while meeting output harmonic requirements. The specific details of the dual interleaved parallel inverter circuit are as follows: Figure 3 As shown.

[0045] For interleaved parallel inverters employing a DCM+CRM+DPWM combined control mode, the lighter the load, the higher the frequency required to achieve both CRM and DCM phases on the same phase. The switching frequency range varies from 100% load to 20% load. Figure 4 As shown in the figure, the inverter's maximum frequency reaches 1.4MHz at 20% load. Especially when the inverter is unloaded, its load consists only of the reactive current required by its AC filter capacitor. At this time, if the DCM+CRM+DPWM combined control mode is still used, the required switching frequency range is as follows: Figure 5 As shown, the highest switching frequency reaches 18MHz, which introduces very large drive and turn-off losses. High switching frequencies require high control bandwidth from the controller; otherwise, the system will be unstable. This increases the demands on the controller's processing speed. Furthermore, the drive power of the drive circuit is higher at high switching frequencies, and the sampling circuit also requires higher sampling frequency and bandwidth. Therefore, higher demands are placed on component selection and circuit design. Since the core loss of magnetic components is proportional to frequency, it affects the selection of core material, number of turns, and size. There may be cases where the magnetic component experiences maximum loss under a specific load, but this does not necessarily mean that optimal loss-based design is being performed under full load, increasing design complexity.

[0046] This invention addresses the aforementioned problems by employing a phase-shielding control method during the operation of the controlled interleaved parallel inverter. Based on the DCM+CRM+DPWM combined control mode, and according to different load rate states of the controlled interleaved parallel inverter, a phase-shielding control method is used to control the inverter under a preset light load state. This method shields two-phase branches operating in CRM / DCM mode, or one branch of each phase of two-phase branches that would otherwise operate in CRM / DCM mode, achieving adaptive efficiency optimization control. Combined with the phase-shielding control method, this effectively improves the converter's efficiency, reduces the requirements for the controller, drive, and sampling, and lowers the requirements for the controller's processing speed. Simultaneously, it reduces the drive power of the drive circuit, the sampling frequency and bandwidth of the sampling circuit, simplifying device selection and circuit design. This effectively reduces the design difficulty of magnetic devices, as the impact of load changes on the operating frequency no longer affects the core selection and design of magnetic devices, effectively reducing design difficulty by one dimension.

[0047] like Figure 6 As shown, the steps of the adaptive efficiency optimization control method for interleaved parallel inverters in this embodiment include:

[0048] S01. During operation, the controlled interleaved parallel inverter acquires the load rate status information of the controlled interleaved parallel inverter;

[0049] S02. Determine the load status of the controlled interleaved inverter based on the load rate status information;

[0050] S03. If the system is not under light load, control the three-phase branches of the controlled interleaved parallel inverter to operate in DCM, CRM and specified control modes respectively. If the system is under light load, use phase shielding control to shield one branch of each phase of the two-phase branches currently operating in CRM or DCM mode.

[0051] In specific application embodiments, when the load rate is less than the preset light load state load rate threshold (e.g., 40%), it is considered to be in a preset light load state. Of course, the preset light load state load rate threshold can be configured according to actual needs. If the load rate of the controlled interleaved parallel inverter is greater than the preset light load state load rate threshold, it indicates that the load is not in a light load state. Then, the three-phase branches of the controlled interleaved parallel inverter are controlled to operate according to DCM, CRM, and a specified control mode, that is, to adopt the normal combination mode of CRM+DCM+specified mode. The specified mode can be DPWM mode, that is, to form a DPWM+CRM+DCM combination mode, in which the three phases of the inverter operate in DPWM, CRM, and DCM modes respectively. Of course, other modes can also be adopted according to actual needs to form other types of combination modes with CRM and DCM. If the load rate of the controlled interleaved parallel inverter is less than the preset light load state load rate threshold, it indicates that the load is in a light load state. In this case, the phase shielding control method is used to control the controlled interleaved parallel inverter. The two phase branches currently operating in CRM or DCM mode, or one branch of each phase of the two phase branches that originally needed to operate in CRM or DCM mode, are shielded. This can increase the current, reduce the required switching frequency, drive loss, turn-off loss, and turn-on loss in DCM mode, thereby effectively improving the inverter efficiency.

[0052] In this embodiment, in step S03, when the load rate of the controlled interleaved parallel inverter is less than the preset ultra-light load rate threshold (which is close to 0), it indicates that it is close to an unloaded state. The fixed-frequency control method is used to control each phase branch in the controlled interleaved parallel inverter. Otherwise (if the load rate is greater than the preset ultra-light load rate threshold), the variable-frequency control method is used to control each phase branch in the controlled interleaved parallel inverter. This allows the fixed-frequency control method to be used in conjunction with the phase shielding control method when the load of the controlled interleaved parallel inverter is close to an unloaded state, making it suitable for controlling the interleaved parallel inverter when the load is close to an unloaded state.

[0053] In specific application embodiments, the aforementioned preset ultra-light load rate threshold can be set to a value greater than and close to 0 (corresponding to no-load state) and less than the preset light load state load rate threshold, for example, it can be set to 5%. If the load rate of the controlled interleaved parallel inverter is less than the preset ultra-light load rate threshold, it indicates that it is in a light load state close to no-load, and the fixed frequency control method is used to control each phase branch in the controlled interleaved parallel inverter. If the load rate of the controlled interleaved parallel inverter is greater than the preset ultra-light load rate threshold, it indicates that it is in a light load state not close to no-load, and the variable frequency control method is used to control each phase branch in the controlled interleaved parallel inverter.

[0054] In this embodiment, specifically when the load rate of the controlled interleaved parallel inverter is between the preset ultra-light load rate threshold and the preset light-load state load rate threshold, it indicates that the load is in a light-load state not close to no-load. The three-phase branches of the controlled interleaved parallel inverter are controlled to operate in DCM, CRM and DPWM modes respectively, and a phase masking control method is used to mask one branch in each phase of the two-phase branches operating in CRM and DCM modes. This prevents the problems of high switching frequency, large driving loss and turn-off loss, and low light-load efficiency caused by the high frequency required by the phases operating in CRM and DCM at the same time when the interleaved parallel inverter is in a light-load state.

[0055] In this embodiment, specifically when the load rate of the controlled interleaved parallel inverter is between 0 and the preset ultra-light load rate threshold, that is, when it indicates that the load is in a light-load state close to no-load, the two-phase target branches originally required to operate in CRM and DCM modes among the three-phase branches of the controlled interleaved parallel inverter are respectively controlled to operate in CCM mode, and the other phase branch is controlled to operate in DPWM mode. And one branch in each of the two-phase target branches is controlled to be masked, so that when the load of the interleaved parallel inverter is close to no-load, the branches are prevented from operating in CRM and DCM modes, thereby avoiding problems such as high switching frequency, large driving loss and turn-off loss, and low light-load efficiency as much as possible, and effectively improving light-load efficiency.

[0056] In the following, the present invention is further described by taking the implementation of adaptive efficiency optimization control for an interleaved parallel inverter by using the above method of the present invention in a specific application embodiment as an example.

[0057] Assuming that the preset light-load state load rate threshold is P1, the preset ultra-light load rate threshold is P2, and the load rate of the controlled interleaved parallel inverter is Po, different control strategies are adaptively implemented according to different loads Po in this embodiment, which is specifically shown as follows:

[0058] (1) When the load satisfies P2 < Po < P1, the phase masking technology is adopted, combined with the DCM+CRM+DPWM combined control mode. Through phase masking control, one branch in the two phases currently operating in CRM and DCM modes of the interleaved parallel inverter is masked, so that only one branch remains in these two phases to be controlled to operate in the original DCM or CRM mode, and the operating state of the phase currently operating in DPWM mode remains unchanged. Masking one branch operating in CRM or DCM mode through the phase masking control method can double the current, reduce the required switching frequency by half, reduce the driving loss by three quarters, and also reduce the turn-off loss and the turn-on loss in DCM mode.

[0059] When the load satisfies P2 < Po < P1, the control mode of combining phase masking technology with DCM+CRM+DPWM combined control mode is adopted for the interleaved parallel inverter, and the control in the first half of the power frequency cycle is as Figure 7 As shown.

[0060] Phase shielding in the 0–30° power frequency phase range Figure 7 As shown in (a), at this time, one branch of phase A and one branch of phase C are shielded, the other branch of phase A works in DCM mode, the other branch of phase C works in CRM mode, and the two branches of phase B still work in DPWM mode according to the original control.

[0061] Phase shielding in the 30°–60° power frequency phase range Figure 7 As shown in (b), at this time, one branch of phase A and one branch of phase C are shielded, the other branch of phase A works in CRM mode, the other branch of phase C works in DCM mode, and the two branches of phase B still work in DPWM mode according to the original control.

[0062] Phase shielding in the 60°–90° power frequency phase range Figure 7 As shown in (c), at this time, one branch of phase B and one branch of phase C are shielded, the other branch of phase B works in CRM mode, the other branch of phase C works in DCM mode, and the two branches of phase A still work in DPWM mode according to the original control.

[0063] Phase shielding in the 90°–120° power frequency phase range Figure 7 As shown in (d), at this time, one branch of phase B and one branch of phase C are shielded, the other branch of phase B works in DCM mode, the other branch of phase C works in CRM mode, and the two branches of phase A still work in DPWM mode according to the original control.

[0064] Phase shielding in the 120°–150° power frequency phase range, such as Figure 7 As shown in (e), at this time, one branch of phase A and one branch of phase B are shielded, the other branch of phase A works in CRM mode, the other branch of phase C works in DCM mode, and the two branches of phase C still work in DPWM mode according to the original control.

[0065] Phase shielding in the 150°–180° power frequency phase range, such as Figure 7 As shown in (f), at this time, one branch of phase A and one branch of phase B are both shielded, the other branch of phase A works in DCM mode, the other branch of phase B works in CRM mode, and the two branches of phase C still work in DPWM mode according to the original control.

[0066] The control in the second half of the power frequency cycle is similar to that described above, and will not be repeated here.

[0067] (2) When the load satisfies 0<Po<P2, phase-shielding technology is adopted, combined with continuous conduction mode CCM+DPWM control. That is, through phase-shielding control, one branch of the two phases that should have operated in CRM and DCM modes at this moment is shielded, so that only one branch of the two phases is left to be controlled to operate in CCM mode, and the working state of the phase currently operating in DPWM mode remains unchanged. CCM mode adopts fixed-frequency control, and by selecting an appropriate frequency (e.g., 500kHz at no-load), the current ripple can be increased, and the inductor current can continue to increase in the reverse direction after zero crossing. In this way, complete full ZVS of the switch can be achieved, with zero turn-on loss. Combined with the phase-shielding technology, the driving loss can be greatly reduced, and the turn-off loss is also reduced, thereby greatly reducing the loss of the inverter when it is close to no-load. The phase shielding in each phase interval of the power frequency half-cycle controlled by the above-mentioned load is Figure 7 similar to (a)-(e) in , only that the two phases operating in DCM and CRM modes at this time are all replaced with CCM mode.

[0068] (3) When the load satisfies P1<Po, the inverter adopts normal DCM+CRM+DPWM control, that is, in the non-light load condition, the three phases of the interleaved parallel inverter are controlled to keep operating in DCM, CRM and DPWM modes respectively.

[0069] In this embodiment, the efficiency optimization control working mode of the interleaved parallel inverter implemented in the full load range is as shown in Figure 8 , wherein in the load interval between P1 (e.g., 40% load) and 100% load, the combined control mode of DCM+CRM+DPWM is adopted; in the load interval between P2 (e.g., 5% load) and P1, phase-shielding technology is adopted, combined with DCM+CRM+DPWM control. That is, through phase-shielding control, one branch of the two phases currently operating in CRM and DCM modes of the interleaved parallel inverter is shielded, and the working state of the phase currently operating in DPWM mode remains unchanged. This can reduce three quarters of the driving loss, and can also reduce turn-off loss and turn-on loss in DCM mode; in the load interval between no-load and P1, phase-shielding technology is adopted, combined with CCM+DPWM control mode. That is, through phase-shielding control, one branch of the two phases that should have operated in CRM and DCM modes at this moment of the interleaved parallel inverter is shielded, so that only one branch of the two phases is controlled to operate in CCM mode, and the working state of the phase currently operating in DPWM mode remains unchanged. This can achieve zero turn-on loss, and can also reduce driving loss and turn-off loss. In this embodiment, by adaptively matching the control mode of the inverter according to different loads, the loss of the inverter can be greatly reduced, and the efficiency of the inverter below P1 load can be improved.

[0070] To realize the above-mentioned load adaptive efficiency optimization control of the three-phase inverter, the following scheme is adopted: Figure 9The adaptive efficiency optimization control device for the interleaved parallel inverter shown is connected to the output of the interleaved parallel inverter. The control device includes:

[0071] The current zero-crossing detection module 2 is used to detect the zero-crossing signal of the three-phase output current of the controlled interleaved parallel inverter;

[0072] Modulation wave generation module 3 is used to obtain the three-phase output current value and reference current value of the controlled interleaved parallel inverter, and generate a modulation wave based on the three-phase output current value and reference current value;

[0073] The control pulse generation module 4 is used to generate control pulses based on the mode selection signal, modulation wave, and zero-crossing signal, and send them to the three-phase branches of the controlled interleaved parallel inverter. Specifically, it controls the switching transistors in the corresponding phase branches operating in CRM or DCM mode based on the mode selection signal and zero-crossing signal. The mode selection signal is the signal that selects whether the inverter operates in CRM, DCM, or DPWM mode. The inverter's operation is controlled according to the mode selected by the mode selection signal, the modulation wave, and the zero-crossing signal.

[0074] The aforementioned control pulse generation module 4 can be implemented using a pulse generator or similar device.

[0075] In this embodiment, the modulation wave generation module 3 specifically includes:

[0076] The voltage control unit 201 is used to acquire the three-phase output voltage value and reference voltage of the controlled interleaved parallel inverter and perform voltage control regulation to obtain the current reference value.

[0077] The current control unit 202 is used to receive the current reference value and the three-phase output current value of the controlled interleaved parallel inverter and perform current control regulation to generate a modulation wave.

[0078] The voltage control unit 201 and the current control unit 202 mentioned above are both closed-loop control components used for closed-loop control regulation. That is, the voltage control unit 201 uses a voltage closed-loop control component to achieve voltage closed-loop control, and the current control unit 202 uses a current closed-loop control component to achieve current closed-loop control.

[0079] The aforementioned adaptive efficiency optimization control device for interleaved parallel inverters also includes a mode selection module 5, which is used to acquire a reference voltage and determine the operating mode of each phase of the controlled interleaved parallel inverter based on the reference voltage, and generate a corresponding mode selection signal output.

[0080] In this embodiment, a reference voltage generation module 6 is also included, which is connected to the mode selection module 5 and the modulation wave generation module 3 respectively, and is used to generate reference voltage outputs corresponding to each control mode.

[0081] In a specific application embodiment, the modulation wave generation module 3 and the control pulse generation module 4 can be integrated into a control module, while the current zero-crossing detection module 2 is set on the output side of the inverter. Of course, the current zero-crossing detection module 2 can also be integrated into the control module, and the specific configuration can be determined according to actual needs.

[0082] In specific application embodiments, such as Figure 9 As shown, the interleaved parallel inverter specifically includes the following structure:

[0083] Main circuit 1: Three-phase inverter main power circuit.

[0084] Input filter capacitor 101: filters and regulates the DC input voltage, and can be composed of multiple capacitors connected in series and parallel.

[0085] Power switch 102: Turns on and off according to control pulses, and outputs a square wave voltage waveform.

[0086] Output filter inductor 103: filters the front-end voltage and outputs a quasi-sinusoidal voltage waveform.

[0087] Output filter capacitor 104: further filters the front-end quasi-sinusoidal waveform to output a sinusoidal voltage waveform.

[0088] Three-phase load 105: can be a three-phase resistor, inductor, capacitor, or converter load, etc.

[0089] In this embodiment, the adaptive efficiency optimization control device for the interleaved parallel inverter is connected to the output terminal of the interleaved parallel inverter. The current zero-crossing detection module 2 detects the zero-crossing moment of the current in each phase through an analog circuit. Based on the mode selection signal in the control unit, it selects the zero-crossing digital signal operating in the CRM phase and inputs it to the control unit, thereby determining the turn-on time of the switching transistor operating in the CRM phase. The switching transistor operating in the DCM phase turns on following the switching transistor of the CRM phase. The reference voltage module 5 specifically generates the target reference voltage V at the power frequency. A * V B * V C * and the current phase angle θ v In digital control, this can be achieved through table lookup; the voltage control unit 201 specifically uses the sampled voltage V. A V B V C After comparing with the reference voltage, closed-loop regulation is performed to obtain the current reference value I. d * I q * (Transformed to dq coordinate system); Current control unit 202 obtains the current I through sampling. A IB I C and reference current I d * I q * After comparison, closed-loop adjustment is performed to obtain the modulated wave M. A M B M C The mode selection module 5 determines the operating mode (CRM, DCM, or DPWM) of each phase according to the phase of the reference voltage; the control pulse generation module 4 sends control pulses Q to the switches of phases A, B, and C respectively based on the modulation wave generated by the current closed-loop module, the output signal of the current zero-crossing detection module, and the signal from the mode selection module. A Q B Q C This enables the above-mentioned three-phase inverter to achieve load adaptive efficiency optimization control.

[0090] To verify the effectiveness of the present invention, it was tested in specific application embodiments, and the results were as follows: Figure 9 As can be seen from the efficiency improvement curve, between no-load and P1 = 40% load, the efficiency of the inverter using the method of this invention can be significantly improved, especially when close to no-load, the efficiency can be improved by up to 3.6%.

[0091] In another embodiment, the adaptive efficiency optimization control device for interleaved parallel inverters of the present invention may further include a processor and a memory, wherein the memory is used to store a computer program and the processor is used to execute the computer program to perform the control method described above.

[0092] This invention can be applied to dual three-phase interleaved parallel inverters / rectifiers, as well as multiple three-phase interleaved parallel inverters / rectifiers to achieve adaptive efficiency control. It is also applicable to three-phase interleaved parallel PWM rectifiers, and its main circuit is as follows: Figure 11 As shown, the triple interleaved parallel inverter circuit is as follows: Figure 12 As shown, the control principle is the same as described above, that is, one or more branches are adaptively shielded according to the load, thereby reducing drive loss, turn-off loss and turn-on loss, and improving converter efficiency.

[0093] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the invention. Therefore, any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention should fall within the protection scope of the present invention.

Claims

1. An adaptive efficiency optimization control method for interleaved parallel inverters, characterized in that the steps include... include: During operation, the controlled interleaved parallel inverter acquires the load rate status information of the controlled interleaved parallel inverter; The load status of the controlled interleaved parallel inverter is determined based on the load rate status information. If it is in a non-light load state, the three-phase branches of the controlled interleaved parallel inverter are controlled to operate in DCM, CRM and specified control modes respectively. If it is in a light load state, the phase shielding control method is used to shield one branch of each phase of the two-phase branches currently operating in CRM and DCM modes. When the load rate of the controlled interleaved parallel inverter is between 0 and the preset ultra-light load rate, the two target branches of the three-phase branch of the controlled interleaved parallel inverter that originally need to work in CRM and DCM modes are controlled to operate in CCM mode, and the other branch is controlled to operate in DPWM mode. One branch in each phase of the two target branches is also controlled to be shielded.

2. The adaptive efficiency optimization control method for interleaved parallel inverters according to claim 1, characterized in that, When the load rate of the controlled interleaved parallel inverter is less than the preset ultra-light load rate threshold, the fixed frequency control method is used to control each phase branch of the controlled interleaved parallel inverter; otherwise, the variable frequency control method is used to control each phase branch of the controlled interleaved parallel inverter. The preset ultra-light load rate is less than the preset light load rate threshold.

3. The adaptive efficiency optimization control method for interleaved parallel inverters according to claim 2, characterized in that, When the load rate of the controlled interleaved parallel inverter is between the preset ultra-light load rate threshold and the preset light load state load rate threshold, the three-phase branches of the controlled interleaved parallel inverter are controlled to operate in DCM, CRM and DPWM modes respectively, and a phase shielding control method is used to shield one branch of each phase of the two-phase branches operating in CRM and DCM modes.

4. The adaptive efficiency optimization control method for interleaved parallel inverters according to claim 1, characterized in that, The specified control mode is DPWM mode.

5. The adaptive efficiency optimization control method for interleaved parallel inverters according to any one of claims 1 to 4, characterized in that, Controlled interleaved parallel inverters are dual or multiple three-phase interleaved parallel inverters.

6. An adaptive efficiency optimization control device for an interleaved parallel inverter used in any one of claims 1 to 5, connected to the output terminal of the interleaved parallel inverter (1), characterized in that, The control device includes: The current zero-crossing detection module (2) is used to detect the zero-crossing signal of the three-phase output current of the controlled interleaved parallel inverter; The modulation wave generation module (3) is used to obtain the three-phase output current value and reference current value of the controlled interleaved parallel inverter, and generate a modulation wave according to the three-phase output current value and reference current value. The control pulse generation module (4) is used to generate control pulses according to the mode selection signal, the modulation wave and the zero-crossing signal to send to the three-phase branch of the controlled interleaved parallel inverter, wherein the switching transistors in the corresponding phase branch operating in CRM mode or DCM mode are turned on according to the mode selection signal and the zero-crossing signal.

7. The adaptive efficiency optimization control device for interleaved parallel inverters according to claim 6, characterized in that, The modulation wave generation module (2) includes: The voltage control unit (201) is used to acquire the three-phase output voltage value and reference voltage of the controlled interleaved parallel inverter and perform voltage control regulation to obtain the current reference value; The current control unit (202) is used to receive the current reference value and the three-phase output current value of the controlled interleaved inverter and perform current control regulation to generate the modulation wave.

8. The adaptive efficiency optimization control device for interleaved parallel inverters according to claim 7, characterized in that, The voltage control unit (201) and / or the current control unit (202) are closed-loop control components for performing closed-loop control regulation.

9. The adaptive efficiency optimization control device for interleaved parallel inverters according to any one of claims 6 to 8, characterized in that, It also includes a mode selection module (5), which is used to obtain a reference voltage and determine the operating mode of each phase of the controlled interleaved inverter according to the reference voltage, and generate a corresponding mode selection signal output.

10. The adaptive efficiency optimization control device for interleaved parallel inverters according to any one of claims 6 to 8, characterized in that, It also includes a reference voltage generation module (6) connected to the mode selection module (5) and the modulation wave generation module (3) respectively, for generating reference voltage outputs corresponding to each control mode.

11. An adaptive efficiency optimization control device for interleaved parallel inverters, comprising a processor and a memory, wherein the memory is used to store a computer program, characterized in that, The processor is used to execute the computer program to perform the method as described in any one of claims 1 to 5.

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