Surge filter circuit and microcontroller circuit

Abstract

The application provides a surge filter circuit and a micro control circuit. The surge filter circuit includes a comparison circuit and a signal processing circuit. The comparison circuit compares a specific signal with a reference signal to generate an output signal. The signal processing circuit detects a level of a control signal. When the level of the control signal is equal to a turn-on level, the signal processing circuit enters a monitoring mode. In the monitoring mode, the signal processing circuit takes the output signal as a trigger signal. When the level of the control signal is not equal to the turn-on level, the signal processing circuit leaves the monitoring mode and stops taking the output signal as the trigger signal.

Description

Technical Field

[0001] This invention relates to a surge filtering circuit, and more particularly to a circuit that filters surges based on an internal control signal. Background Technology

[0002] With the advancement of technology, electronic devices are becoming increasingly diverse in type and function. These devices typically contain numerous MOSFETs. When a MOSFET is momentarily turned on, it can cause a large current, resulting in a surge that can lead to circuit malfunction. Summary of the Invention

[0003] An embodiment of the present invention provides a surge filtering circuit, including a comparator circuit and a signal processing circuit. The comparator circuit compares a specific signal with a reference signal to generate an output signal. The signal processing circuit detects the level of a control signal. When the level of the control signal is equal to a conduction level, the signal processing circuit enters a monitoring mode. In the monitoring mode, the signal processing circuit uses the output signal as a trigger signal. When the level of the control signal is not equal to the conduction level, the signal processing circuit exits the monitoring mode and stops using the output signal as a trigger signal.

[0004] The present invention further provides a microcontroller circuit, including a surge filtering circuit and a control circuit. The surge filtering circuit includes a comparator circuit and a signal processing circuit. The comparator circuit compares a signal with a reference signal to generate an output signal. The signal processing circuit detects the level of a control signal. When the level of the control signal is equal to a conduction level, the signal processing circuit enters a monitoring mode. In monitoring mode, the signal processing circuit uses the output signal as a trigger signal. When the level of the control signal is not equal to the conduction level, the signal processing circuit exits the monitoring mode and stops using the output signal as a trigger signal. The control circuit generates a drive signal to drive a load. When the level of the trigger signal changes, the control circuit performs a specific action until a release event occurs.

[0005] The embodiments of the present invention can filter out surges and avoid circuit malfunctions caused by surge generation. Attached Figure Description

[0006] Figure 1A This is a schematic diagram of the surge filtering circuit of the present invention.

[0007] Figure 1B This is a timing diagram of the surge filtering circuit of the present invention.

[0008] Figure 1C This is another schematic diagram of the surge filtering circuit of the present invention.

[0009] Figure 2A This is a schematic diagram of the microcontroller circuit of the present invention.

[0010] Figure 2B This is another schematic diagram of the microcontroller circuit of the present invention.

[0011] Figure 2C This is a timing control diagram of the control circuit of the present invention.

[0012] Figure 3 This is another schematic diagram of the microcontroller circuit of the present invention.

[0013] Figure 4 This is another schematic diagram of the microcontroller circuit of the present invention.

[0014] Figure 5 This is another schematic diagram of the microcontroller circuit of the present invention.

[0015] Figure 6 This is a flowchart illustrating the control method of the present invention.

[0016] Figure Labels

[0017] 100, 210A, 210B, 310, 410, 430, 450, 510, 520, 530: Surge filtering circuits; 110, 211, 511, 521, 531: Comparator circuits

[0018] 120, 212, 512, 522, 532: Signal processing circuits

[0019] SP, EXT1~EXT6: Signals

[0020] SN: Reference signal

[0021] SO, SO1~SO3: Output signals

[0022] 111: Analog Comparator

[0023] SC, SC1~SC3: Control signals

[0024] ST, ST1~ST3: Trigger signals

[0025] 130, 213, 320, 513, 523, 533: Selection circuit

[0026] 131: Multiplexer

[0027] en1~en3: Enable signals

[0028] 200A, 200B, 300, 400, 500: Microcontroller circuits

[0029] P1~P3, N1~N3, PIN1~PIN3: Input / output pins

[0030] 220A, 220B, 330, 340, 420, 440, 460, 540: Control circuit

[0031] 202, 302, 304, 402, 404, 406: Load

[0032] T211, T212, T214: Period

[0033] T213: Time Point

[0034] S611~S618: Steps

[0035] CS1~CS3: Control setting circuit

[0036] BF1~BF3: Blocking circuit

[0037] PG1~PG3: Waveform generation circuit

[0038] ODA1~ODA3: Adjustment circuit

[0039] SA1~SA3: Adjustment signals

[0040] SD, SD1~SD3: Drive signals Detailed Implementation

[0041] To make the objectives, features, and advantages of this invention more apparent and understandable, embodiments are provided below, along with detailed descriptions in conjunction with the accompanying drawings. This specification provides different embodiments to illustrate the technical features of different implementations of the invention. The configuration of the elements in the embodiments is for illustrative purposes only and is not intended to limit the invention. Furthermore, the repetition of some reference numerals in the embodiments is for simplification and does not imply any correlation between different embodiments.

[0042] Figure 1AThis is a schematic diagram of the surge filtering circuit of the present invention. As shown, the surge filtering circuit 100 includes a comparator circuit 110 and a signal processing circuit 120. The comparator circuit 110 compares a signal SP with a reference signal SN to generate an output signal SO. In one possible embodiment, both the signal SP and the reference signal SN are voltage signals. In one possible embodiment, the level change of the signal SP is related to the sensing result of a temperature sensor (not shown). In other embodiments, at least one of the signal SP and the reference signal SN is generated by a signal generation circuit (not shown). The signal generation circuit may be integrated into or outside the surge filtering circuit 100. In some embodiments, the reference signal SN is continuously maintained at a fixed level. In this example, when the level of the signal SP changes, the level of the reference signal SN remains constant. The present invention does not limit the architecture of the comparator circuit 110. In one possible embodiment, the comparator circuit 110 is an analog comparator 111.

[0043] Signal processing circuit 120 receives a control signal SC and provides a trigger signal ST based on the control signal SC. For example, when the level of the control signal SC is equal to an on level (e.g., high level), signal processing circuit 120 enters a monitoring mode. In monitoring mode, signal processing circuit 120 uses output signal SO as trigger signal ST. When the level of the control signal SC is not equal to the on level, signal processing circuit 120 exits monitoring mode and stops using output signal SO as trigger signal ST. In one possible embodiment, signal processing circuit 120 sets trigger signal ST to a low level. The present invention does not limit the type of control signal SC. In some embodiments, control signal SC may be a pulse width modulation (PWM) signal.

[0044] Figure 1B This is a timing diagram of the surge filtering circuit of the present invention. When the level of signal SP is greater than the level of reference signal SN, the output signal SO is high. When the level of signal SP is lower than the level of reference signal SN, the output signal SO is low. In this embodiment, when the control signal SC is on (e.g., high), the level of trigger signal ST is equal to the level of output signal SO. When the control signal SC is not on, the trigger signal ST is low. At this time, even if the level of output signal SO experiences a surge due to a large change in the level of signal SP, the trigger signal ST remains low and will not be affected by the boost or buck of signal SP.

[0045] Figure 1C This is another schematic diagram of the surge filtering circuit of the present invention. Figure 1C resemblance Figure 1A The difference is that, Figure 1CThe surge filtering circuit 100 further includes a selection circuit 130. The selection circuit 130 selectively uses one of the external signals EXT1 and EXT2 as the control signal SC. The present invention does not limit the architecture of the selection circuit 130. In one possible embodiment, the selection circuit 130 is a multiplexer 131. When the enable signal en1 is at a specific level (e.g., low), the multiplexer 131 provides the external signal EXT1 to the signal processing circuit 120. When the enable signal en1 is not at a specific level, the multiplexer 131 provides the signal EXT2 to the signal processing circuit 120. In some embodiments, at least one of the external signals EXT1 and EXT2 is a pulse-width modulation (PWM) signal.

[0046] This invention does not limit the application area of ​​the surge filtering circuit 100. Since the trigger signal ST provided by the surge filtering circuit 100 is not affected by sudden increases or decreases in the level of the signal SP, it can provide a stable trigger signal ST to any control circuit. In one possible embodiment, the surge filtering circuit 100 may be integrated with at least one control circuit into a microcontroller circuit, such as a microcontroller unit (MCU).

[0047] Figure 2A This is a schematic diagram of the microcontroller circuit of the present invention. As shown, the microcontroller circuit 200A includes a surge filtering circuit 210A and a control circuit 220A. The surge filtering circuit 210A compares the signal SP with the reference signal SN and sets the level of the trigger signal ST according to the control signal SC. In this embodiment, the control signal SC is provided by the control circuit 220A. Since the microcontroller circuit 200A does not need to receive control signals from the outside through input / output pins, the number of pins of the microcontroller circuit 200A can be reduced.

[0048] In another possible embodiment, the microcontroller circuit 200A further includes an input / output pin P1. The input / output pin P1 is used to receive a signal SP. In this example, the signal SP is an external signal generated by circuitry outside the microcontroller circuit 200A. In other embodiments, the microcontroller circuit 200A further includes an input / output pin N1. The input / output pin N1 is used to receive a reference signal SN. In this example, the reference signal SN is generated by circuitry outside the microcontroller circuit 200A. In some embodiments, the microcontroller circuit 200A has a signal generation circuit (not shown) for providing the reference signal SN. In this example, the microcontroller circuit 200A does not need to utilize the input / output pin N1 to receive the reference signal SN.

[0049] The surge filtering circuit 210A includes a comparator circuit 211 and a signal processing circuit 212. The comparator circuit 211 compares the signal SP and the reference signal SN to generate the output signal SO. Because the characteristics of the comparator circuit 211 are similar to... Figure 1AThe characteristics of the comparator circuit 110 will not be described further. In this embodiment, the signal processing circuit 212 generates a trigger signal ST based on the control signal SC and the output signal SO. Since the characteristics of the signal processing circuit 212 are similar to... Figure 1A The characteristics of the signal processing circuit 120 are not described in detail here.

[0050] Control circuit 220A provides a control signal SC and determines whether to perform a specific action based on a trigger signal ST. For example, when the level of the trigger signal ST does not change (e.g., remains at a specific level, such as low), control circuit 220A does not perform the specific action. In one possible embodiment, control circuit 220A generates a drive signal SD to drive a load 202. However, when the level of the trigger signal ST changes, control circuit 220A performs the specific action. At this time, control circuit 220A may stop generating the drive signal SD. Therefore, load 202 stops operating. In one possible embodiment, when a release event occurs, control circuit 220A stops performing the specific action. Therefore, control circuit 220A may provide the drive signal SD again. Therefore, load 202 resumes operation. In this example, the duty cycle of the new drive signal may be different from the duty cycle of the previous drive signal. The present invention does not limit the type of load 202. In one possible embodiment, load 202 is a motor.

[0051] This invention does not limit the type of specific action. In one possible embodiment, the specific action refers to the control circuit 220A stopping the generation of the drive signal SD. Therefore, the load 202 stops operating. In this example, when the control circuit 220A does not perform the specific action, the control circuit 220A generates the drive signal SD to drive the load 202. In another possible embodiment, the specific action refers to the control circuit 220A generating the drive signal SD to drive the load 202. In this example, when the control circuit 220A does not perform the specific action, the control circuit 220A stops generating the drive signal SD. Therefore, the load 202 stops operating.

[0052] This invention does not limit the types of release events. In one possible embodiment, the user can determine whether the control circuit 220A has performed a specific action based on the operation of the load 202. In this example, the user may command the control circuit 220A to stop performing the specific action via software or hardware. For example, suppose the specific action refers to the control circuit 220A stopping driving the load. In this example, when the user discovers that the load 202 has stopped operating, the user may open software to command the control circuit 220A to stop performing the specific action. Therefore, the control circuit 220A regenerates the drive signal SD. In another possible embodiment, the control circuit 220A detects the level of a specific signal (not shown). When the level of the specific signal is equal to a specific level, it indicates that a release event has occurred. Therefore, the control circuit 220A stops performing the specific action and generates the drive signal SD again. In some embodiments, the microcontroller circuit 200A further includes an input / output pin (not shown) for receiving the specific signal.

[0053] This invention does not limit the architecture of the control circuit 220A. In one possible embodiment, the control circuit 220A is a pulse width modulation (PWM) circuit. In this example, the PWM circuit generates a first PWM signal and a second PWM signal. The PWM circuit uses the first PWM signal as a control signal SC and the second PWM signal as a drive signal SD. In other embodiments, the control circuit 220A may be an analog-to-digital converter (ADC) or a direct memory access (DMA) circuit. In this example, when the level of the trigger signal ST does not change (e.g., remains at a specific level, such as a low level), the control circuit 220A does not operate. However, when the level of the trigger signal ST changes, the control circuit 220A performs a specific action. For example, if the control circuit 220A is an analog-to-digital converter, then when the level of the trigger signal ST changes, the control circuit 220A converts an analog signal into a digital signal. If the control circuit 220A is a direct memory access circuit, when the level of the trigger signal ST changes, the control circuit 220A performs a data transfer operation. Since the trigger signal ST is not affected by the instantaneous rise or fall of the level of the signal SP, the control circuit 220A stably drives the load 202.

[0054] Figure 2BThis is another schematic diagram of the microcontroller circuit of the present invention. As shown, the microcontroller circuit 200B includes input / output pins P1, N1, PIN, a surge filtering circuit 210B, and a control circuit 220B. Input / output pin P1 is used to receive signal SP. Input / output pin N1 is used to receive reference signal SN. Input / output pin PIN is used to receive an external signal EXT1. In some embodiments, at least one of the signal SP and the reference signal SN is generated by other circuitry (not shown) within the microcontroller circuit 200B. In this example, the microcontroller circuit 200B does not need to provide at least one of the input / output pins P1 and N1.

[0055] In this embodiment, the surge filtering circuit 210A includes a comparator circuit 211, a signal processing circuit 212, and a selection circuit 213. The comparator circuit 211 compares the signal SP with the reference signal SN to generate an output signal SO. The signal processing circuit 212 receives the output signal SO and, based on the control signal SC, determines whether to use the output signal SO as the trigger signal ST. The selection circuit 213, based on an enable signal en1, uses either the external signal EXT1 or the signal EXT2 as the control signal SC.

[0056] Because the characteristics of the comparator circuit 211, the signal processing circuit 212, and the selection circuit 213 are similar... Figure 1A The comparator circuit 211, the signal processing circuit 212, and Figure 1C The characteristics of the selection circuit 130 will not be described further. Since the selection circuit 130 selects either the signal EXT1 external to the microcontroller circuit 200B or the signal EXT2 internal to the microcontroller circuit 200B based on the enable signal en1, the design flexibility of the surge filtering circuit 210B can be improved. In this embodiment, the signal EXT2 is provided by the control circuit 220B. Because the characteristics of the control circuit 220B are similar to... Figure 2A The characteristics of the 220A control circuit are not described in detail here.

[0057] Figure 2CThis is a timing control diagram of the control circuit of the present invention. The symbol SD_ori represents the preset drive signal SD. When the level of the trigger signal ST remains unchanged, the level of the drive signal SD is the same as the preset signal SD_ori. During period T211, since the level of the trigger signal ST remains unchanged, the level of the drive signal SD is the same as the preset signal SD_ori. During period T212, the level of the trigger signal ST changes. At this time, since the control circuit 220A stops providing the drive signal SD, the level of the drive signal SD is different from the preset signal SD_ori. At this time, the drive signal SD may remain at a specific level (e.g., low level). At time point T213, due to a release event, the control circuit 220A provides the drive signal SD again. Therefore, the level of the drive signal SD is the same as the preset signal SD_ori. During period T214, since the level of the trigger signal ST remains unchanged, the level of the drive signal SD by the control circuit 220A is the same as the preset signal SD_ori.

[0058] Figure 3 This is another schematic diagram of the microcontroller circuit of the present invention. As shown, the microcontroller circuit 300 includes input / output pins P1 and N1, a surge filter circuit 310, a selection circuit 320, and control circuits 330 and 340. The surge filter circuit 310 generates a trigger signal ST based on the voltage levels on the input / output pins P1 and N1 and the control signal SC. In other embodiments, the surge filter circuit 310 compares the voltage levels of two signals within the microcontroller circuit 300 to generate an output signal, and determines whether to use the output signal as the trigger signal ST based on the control signal SC. Since the characteristics of the surge filter circuit 310 are similar to... Figure 1A The characteristics of the surge filtering circuit 100 are not described in detail here.

[0059] Selection circuit 320 provides trigger signal ST to control circuit 330 or 340 based on an enable signal en2. The present invention does not limit the architecture of selection circuit 320. In one possible embodiment, selection circuit 320 is a multiplexer. In this example, when enable signal en2 has a specific level (e.g., low level), selection circuit 320 outputs trigger signal ST to control circuit 330. However, when enable signal en2 does not have a specific level, selection circuit 320 outputs trigger signal ST to control circuit 340.

[0060] In this embodiment, control circuit 330 performs a first specific action, such as driving load 302, based on trigger signal ST; control circuit 340 performs a second specific action, such as driving load 304, based on trigger signal ST. This invention does not limit the types of control circuits 330 and 340. Control circuits 330 and 340 may be the same type of circuit, such as pulse width modulation circuits. In other embodiments, the type of control circuit 330 differs from the type of control circuit 340. For example, control circuit 330 may be a pulse width modulation circuit, while control circuit 340 may be an analog-to-digital converter.

[0061] In this embodiment, the control signal SC is provided by the control circuit 330. In this example, the control circuit 330 continues to generate the control signal SC even if it does not receive the trigger signal ST. The invention does not limit the number of control circuits. In other embodiments, the microcontroller circuit 300 has more control circuits. In this example, the selection circuit 320 may provide the trigger signal ST to one of the multiple control circuits based on more enable signals.

[0062] Figure 4 This is another schematic diagram of the microcontroller circuit of the present invention. The microcontroller circuit 400 includes input / output pins P1-P3, N1-N3, surge filtering circuits 410, 430, and 450, and control circuits 420, 440, and 460. Surge filtering circuits 410, 430, and 450 are coupled to corresponding input / output pins. Since the operation of surge filtering circuits 410, 430, and 450 is similar, only surge filtering circuit 410 will be described below. In this embodiment, surge filtering circuit 410 compares the voltage levels of input / output pins P1 and N1, and provides a trigger signal ST1 based on the comparison result and control signal SC1. In other embodiments, surge filtering circuit 410 compares the voltage levels of two signals inside the microcontroller circuit 400 to generate an output signal, and determines whether to use the output signal as trigger signal ST1 based on control signal SC1. Since the characteristics of surge filtering circuit 410 are similar to those of... Figure 1A The characteristics of the surge filtering circuit 100 are not described in detail here.

[0063] Control circuits 420, 440, and 460 are coupled to surge filtering circuits 410, 430, and 450, respectively. Since the operation of control circuits 420, 440, and 460 is similar, only the operation of control circuit 420 will be described below. Control circuit 420 provides a control signal SC1 and, based on the level of trigger signal ST1, executes a specific action, such as driving load 402 or stopping the driving of load 402. Due to the characteristics of control circuit 420 and... Figure 2A The characteristics of the control circuit 220A are similar, so they will not be described in detail here.

[0064] This invention does not limit the number of surge filtering circuits and control circuits. In one possible embodiment, the number of surge filtering circuits is the same as or less than the number of control circuits. In other embodiments, the microcontroller circuit 400 has more surge filtering circuits and control circuits.

[0065] In this embodiment, since loads 402, 404, and 406 are controlled by different control circuits, multi-segment control functionality can be achieved. Assume that loads 402, 404, and 406 are three independent motors. Initially, loads 402, 404, and 406 operate simultaneously with different speeds to rapidly cool the environment. When the ambient temperature falls below a preset first temperature value, the level of trigger signal ST1 changes. Therefore, control circuit 420 stops driving load 402. When the ambient temperature rises and exceeds the first temperature value, a release event occurs. Therefore, control circuit 420 resumes driving load 402.

[0066] Figure 5 This is another schematic diagram of the microcontroller circuit of the present invention. The microcontroller circuit 500 includes input / output pins PIN1-PIN3, P1-P3, N1-N3, surge filtering circuits 510, 520, and 530, and a control circuit 540. In this embodiment, the microcontroller circuit 500 provides drive signals SD1-SD3 to drive different loads (not shown).

[0067] Surge filtering circuits 510, 520, and 530 are coupled to corresponding input / output pins. Since surge filtering circuits 510, 520, and 530 operate identically, only the operation of surge filtering circuit 510 will be described below. Surge filtering circuit 510 includes a comparator circuit 511, a signal processing circuit 512, and a selection circuit 513. Comparator circuit 511 compares the levels of input / output pins P1 and N1 to generate an output signal SO1. Signal processing circuit 512 sets a trigger signal ST1 based on control signal SC1 and the output signal SO1. Selection circuit 513 uses an external signal EXT1 or signal EXT2 as the control signal SC1 based on the enable signal en1. Because the characteristics of comparator circuit 511, signal processing circuit 512, and selection circuit 513 are similar... Figure 1C The characteristics of the comparator circuit 110, signal processing circuit 120, and selection circuit 130 are not described in detail here. In other embodiments, the comparator circuit 511 does not compare the levels of the two input / output pins of the microcontroller circuit 500. In this example, at least one input signal of the comparator circuit 511 comes from other circuitry (not shown) within the microcontroller circuit 500.

[0068] Control circuit 540 provides signals EXT2, EXT4, and EXT6. Since signals EXT2, EXT4, and EXT6 are generated by internal circuitry (such as control circuit 540) of microcontroller circuit 500, they can be referred to as internal signals. In one possible embodiment, control circuit 540 is a multi-channel pulse width modulation (PWM) circuit. In this example, the PWM signals output by different channels are signals EXT2, EXT4, and EXT6. In this embodiment, control circuit 540 includes control setting circuits CS1-CS3, blocking circuits BF1-BF3, waveform generation circuits PG1-PG3, and adjustment circuits ODA1-ODA3.

[0069] Control setting circuits CS1 to CS3 provide signals EXT2, EXT4, and EXT6, respectively. Since control setting circuits CS1 to CS3 operate identically, only the operation of control setting circuit CS1 will be described below. Control setting circuit CS1 is used to provide signal EXT2. In one possible embodiment, control setting circuit CS1 is a waveform generation circuit, such as a pulse width modulation circuit.

[0070] Blocking circuits BF1 to BF3 receive trigger signals ST1 to ST3 from surge filtering circuits 510, 520, and 530, respectively. Since blocking circuits BF1 to BF3 operate identically, only the operation of blocking circuit BF1 will be described below. Blocking circuit BF1 determines whether to perform a specific action based on the level of trigger signal ST1. In this example, the specific action is to command waveform generation circuit PG1 to stop generating drive signal SD1.

[0071] For example, when the level of the trigger signal ST1 changes, the blocking circuit BF1 performs a specific action. Therefore, the waveform generation circuit PG1 stops providing the drive signal SD1. When a release event occurs, the blocking circuit BF1 stops performing the specific action. Therefore, the waveform generation circuit PG1 resumes providing the drive signal SD1. In other embodiments, when the level of the trigger signal ST1 does not change (e.g., remains at a specific level), the blocking circuit BF1 does not perform the specific action. Therefore, the waveform generation circuit PG1 generates the drive signal SD1. This invention does not limit the architecture of the waveform generation circuit PG1. In one possible embodiment, the waveform generation circuit PG1 is a pulse width modulation circuit. Since the operation of waveform generation circuits PG1 to PG3 is the same, further details are omitted.

[0072] Adjustment circuits ODA1 to ODA3 respectively provide adjustment signals SA1 to SA3 to waveform generation circuits PG1 to PG3 to adjust the duty cycle of the corresponding drive signal. Since adjustment circuits ODA1 to ODA3 operate identically, only the operation of adjustment circuit ODA1 will be described below. In one possible embodiment, when waveform generation circuit PG1 stops generating drive signal SD1, waveform generation circuit PG1 adjusts the duty cycle of drive signal SD1 according to adjustment signal SA1. When a release event occurs, waveform generation circuit PG1 outputs the adjusted drive signal.

[0073] In some embodiments, the microcontroller circuit 500 further includes switches SW1 to SW3. Switches SW1 to SW3 are respectively coupled between surge filtering circuits 510, 520, and 530 and control circuit 540. Since switches SW1 to SW3 operate identically, only the operation of switch SW1 will be described below. When switch SW1 is on, switch SW1 transmits a trigger signal ST1 to control circuit 540. When switch SW1 is off, switch SW1 stops transmitting the trigger signal ST1 to control circuit 540. In some embodiments, the microcontroller circuit 500 has another control circuit (not shown) for turning switches SW1 to SW3 on or off. In other embodiments, surge filtering circuit 510 may be coupled to other control circuits via other switches to trigger other control circuits.

[0074] Figure 6 This is a flowchart illustrating the control method of the present invention. The control method of the present invention is applicable to a microcontroller circuit (such as microcontrollers 200A, 200B, 300, 400, and 500). First, a signal is received (step S611). In one possible embodiment, the present invention does not limit the source of the signal. In one possible embodiment, the signal is received by an input / output pin of the microcontroller circuit. In another possible embodiment, the reference signal is generated by circuitry within the microcontroller circuit.

[0075] A comparison signal and a reference signal are used to generate an output signal (step S612). In one possible embodiment, the reference signal is received by an input / output pin of the microcontroller circuit. In another possible embodiment, the reference signal is generated by circuitry within the microcontroller circuit.

[0076] Determine whether the level of a control signal is equal to a conduction level (step S613). In one possible embodiment, the control signal is received by another input / output pin of the microcontroller circuit. In another possible embodiment, the control signal is generated by circuitry within the microcontroller circuit.

[0077] When the level of the control signal is equal to the on level, the output signal is used as a trigger signal (step S614). When the level of the control signal is not equal to the on level, using the output signal as a trigger signal is stopped (step S615). Therefore, even if the signal received in step S611 (such as...) Figure 2A The level of the SP changes drastically, and the output signal (such as...) Figure 2A The SO will not be affected. In one possible embodiment, step S615 is to set the trigger signal to a preset level. In some embodiments, the on-level is a high level. In this example, the preset level is lower than the on-level.

[0078] Next, it is determined whether the trigger signal has changed (step S616). When the trigger signal changes, a specific action is performed (step S617). When the trigger signal does not change, the specific action is not performed (step S618). In one possible embodiment, the specific action is to generate a drive signal to drive a load. In this example, step S618 is to stop generating the drive signal to pause driving the load. In another possible embodiment, the specific action is to stop generating a drive signal to stop driving a load. In this example, step S618 is to generate a drive signal to drive a load.

[0079] The control method, or a specific form or part thereof, of the present invention may exist in the form of program code. The program code may be stored on physical media, such as floppy disks, optical discs, hard disks, or any other machine-readable (e.g., computer-readable) storage media, or may be a computer program product, not limited to an external form. When the program code is loaded and executed by a machine, such as a computer, this machine becomes a component of the microcontroller circuit or surge filtering circuit of the present invention. The program code may also be transmitted via some transmission medium, such as wires or cables, optical fibers, or any transmission method. When the program code is received, loaded, and executed by a machine, such as a computer, this machine becomes a component of the microcontroller circuit or surge filtering circuit of the present invention. When implemented in a general-purpose processing unit, the program code, combined with the processing unit, provides a unique device that operates similarly to an application-specific logic circuit.

[0080] Unless otherwise defined, all terms herein (including technical and scientific terms) are as commonly understood by those skilled in the art. Furthermore, unless expressly stated otherwise, definitions of terms in general dictionaries should be interpreted as consistent with their meaning in the context of their relevant technical field, and not as idealized or overly formal expressions. While terms such as "first," "second," etc., may be used to describe various elements, these elements should not be limited by these terms. These terms are merely used to distinguish one element from another.

[0081] While the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the invention. Any person skilled in the art can make modifications and refinements without departing from the spirit and scope of the invention. For example, the systems, apparatus, or methods described in the embodiments of the present invention can be implemented in physical embodiments of hardware, software, or a combination of hardware and software. Therefore, the scope of protection of the present invention must be defined with reference to the appended claims.

Claims

1. A surge filtering circuit, characterized in that, include: A comparator circuit compares a specific signal with a reference signal to generate an output signal; A selection circuit selectively uses either an external signal or a pulse width modulation signal as a control signal. as well as A signal processing circuit detects the level of the control signal. When the level of the control signal is equal to a conduction level, the signal processing circuit enters a monitoring mode. In the monitoring mode, the signal processing circuit uses the output signal as a trigger signal. When the level of the control signal is not equal to the conduction level, the signal processing circuit leaves the monitoring mode and stops using the output signal as the trigger signal.

2. The surge filtering circuit as described in claim 1, characterized in that, The comparison circuit is an analog comparator.

3. A microcontroller circuit, characterized in that, include: A first surge filtering circuit includes: A first comparator circuit compares a first signal with a first reference signal to generate a first output signal; and A first signal processing circuit detects the level of a first control signal. When the level of the first control signal is equal to a conduction level, the first signal processing circuit enters a first monitoring mode. In the first monitoring mode, the first signal processing circuit uses the first output signal as a first trigger signal. When the level of the first control signal is not equal to the conduction level, the first signal processing circuit leaves the first monitoring mode and stops using the first output signal as the first trigger signal. A first control circuit generates a first drive signal to drive a first load; and A selection circuit selectively uses one of an external signal and a second signal as the first control signal. in: When the level of the first trigger signal changes, the first control circuit performs a specific action until a release event occurs. The first control signal is a pulse width modulation signal, and the second signal is generated by the first control circuit.

4. The microcontroller circuit as described in claim 3, characterized in that, The specific action is to stop generating the first drive signal. When the release event occurs, the first control circuit generates the first drive signal.

5. The microcontroller circuit as described in claim 3, characterized in that, Including: A first input / output pin is used to receive the first signal; as well as A second input / output pin is used to receive the first reference signal.

6. The microcontroller circuit as described in claim 3, characterized in that, Including: A third input / output pin is used to receive the external signal.

7. The microcontroller circuit as described in claim 3, characterized in that, Including: A second control circuit, which operates according to the first trigger signal; and A selection circuit selectively provides the first trigger signal to either the first control circuit or the second control circuit.

8. The microcontroller circuit as described in claim 3, characterized in that, Including: An adjustment circuit provides an adjustment signal to the first control circuit when the first control circuit stops generating the first drive signal, in order to change the duty cycle of the first drive signal; The first control circuit is a pulse width modulation circuit, which generates a first pulse width modulation signal and a second pulse width modulation signal. The pulse width modulation circuit uses the first pulse width modulation signal as the second signal and the second pulse width modulation signal as the first drive signal.

9. The microcontroller circuit as described in claim 3, characterized in that, Including: A second surge filtering circuit includes: A second comparator circuit compares the second signal with a second reference signal to generate a second output signal; and A second signal processing circuit detects the level of a second control signal. When the level of the second control signal is equal to the on level, the second signal processing circuit enters a second monitoring mode. In the second monitoring mode, the second signal processing circuit uses the second output signal as a second trigger signal. When the level of the second control signal is not equal to the on level, the second signal processing circuit leaves the second monitoring mode and stops using the second output signal as the second trigger signal. in: When the level of the second trigger signal does not change, the first control circuit generates a second drive signal to drive a second load. When the level of the second trigger signal changes, the first control circuit stops generating the second drive signal until the release event occurs. The first signal and the second control signal are generated by the first control circuit, and the duty cycle of the first control signal is different from the duty cycle of the second control signal.

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