Electronic Devices

Abstract

The present invention discloses an electronic device, including a reset circuit and a pixel sensing circuit. The reset circuit receives a reset signal and includes a plurality of transistors. The pixel sensing circuit includes a photodiode, a first transistor, and a second transistor. The photodiode has a first end, wherein the first end of the photodiode is coupled to the reset circuit. The first transistor has a first end, coupled to the photodiode, and a second end. The second transistor has a first end, coupled to the second end of the first transistor, and a second end, coupled to a data driver to output an output signal.

Description

[0001] This application is a divisional application of the invention patent application with application date of March 28, 2019, application number 201910245217.1, and invention name “electronic device”. Technical Field

[0002] The invention relates to an electronic device, in particular to an electronic device with a light sensing element capable of detecting an image when the intensity of the detected light is weak. Background Art

[0003] Active pixel sensor is an image sensor with photodiode and active amplifier, which has been widely used in image sensing, such as digital cameras, digital scanning and fingerprint recognition. Active pixel sensor uses photodiode to detect light intensity and convert it into current of corresponding magnitude. When the intensity of the detected light is weak, the area of ​​photodiode is increased to increase the current of photodiode in related technology. However, increasing the area of ​​photodiode will also increase the parasitic capacitance of photodiode and reduce the voltage change generated by the current of photodiode, which cannot effectively detect weak light and provide clear image quality.

[0004] In order to enhance the image quality, a pixel sensor is needed that can detect images when the light intensity of the detected light is weak. Summary of the invention

[0005] An embodiment of the present invention provides an electronic device, including a reset circuit and a pixel sensing circuit. The reset circuit receives a reset signal and includes a plurality of transistors. The pixel sensing circuit includes a photodiode, a first transistor, and a second transistor. The photodiode has a first end, wherein the first end of the photodiode is coupled to the reset circuit. The first transistor has a first end, coupled to the photodiode, and a second end. The second transistor has a first end, coupled to the second end of the first transistor, and a second end, coupled to a data driver to output an output signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 is a schematic diagram of an electronic device according to an embodiment of the present invention.

[0007] Figure 2 yes Figure 1 Schematic diagram of an electronic device operating in a reset mode.

[0008] Figure 3 yes Figure 1 Schematic diagram of an electronic device operating in a sensing mode.

[0009] Figure 4 yes Figure 1Schematic diagram of an electronic device operating in a scanning mode.

[0010] Figure 5 yes Figure 1 Timing diagram of the control method of the electronic device.

[0011] Figure 6 yes Figure 1 A timing diagram of another control method of an electronic device.

[0012] Figure 7 is a schematic diagram of another electronic device according to an embodiment of the present invention.

[0013] Description of reference numerals: 1, 7-electronic device; 10-pixel sensing circuit; 11-reset circuit; 12-reset driver; 14-scan driver; 16-data driver; 70-pixel array; Cp-capacitor; D-photodiode; I D1,f ,I D1,r - forward bias current, reverse bias current; Id- drain current; M1- first transistor; M2- second transistor; M3- third transistor; M4- fourth transistor; N1, N2, N3- first node, second node, third node; Srst, Srst[n], Srst[n+1]- reset signal; Srow, Srow[n], Srow[n+1]- row selection signal; Scol- output signal; Treset- reset period; Tscan- scan period; Tsense- sense period; V A 、V B -Voltage; V0, V1, V2, Vdd - bias voltage. DETAILED DESCRIPTION

[0014] Figure 1 1 is a schematic diagram of an electronic device 1 according to an embodiment of the present invention, comprising a pixel sensing circuit 10, a reset circuit 11, a reset driver 12, a scan driver 14 and a data driver 16. The reset driver 12 is coupled to the pixel sensing circuit 10 via the reset circuit 11, and the scan driver 14 and the data driver 16 are coupled to the pixel sensing circuit 10.

[0015] The reset circuit 11 includes a third transistor M3 and a fourth transistor M4 connected in series, and has a first node N1 and a second node N2. The reset circuit 11 is coupled to the reset driver 12 via the first node N1 to receive the reset signal Srst. The third transistor M3 has a control terminal, a first terminal and a second terminal. The control terminal of the third transistor M3 is coupled to the reset driver 12 via the first node N1. The first terminal of the third transistor M3 is coupled to the bias voltage V2, and the second terminal of the third transistor M3 is coupled to the second node N2. The fourth transistor M4 has a control terminal, a first terminal and a second terminal. The control terminal of the fourth transistor M4 is coupled to the reset driver 12 via the first node N1. The first terminal of the fourth transistor M4 is coupled to the second node N2, and the second terminal of the fourth transistor M4 is coupled to the bias voltage V0. The pixel sensor circuit 10 includes a photodiode D, a first transistor M1, a second transistor M2 and a capacitor Cp. The photodiode D has a first terminal and a second terminal. The first terminal of the photodiode D is coupled to the second node N2. The first terminal of the photodiode D can be a cathode, and the second terminal of the photodiode D can be an anode. The capacitor Cp has a first end and a second end, the first end of the capacitor Cp is coupled to the second end of the photodiode D via the third node N3, and the second end of the capacitor Cp is coupled to the bias voltage V1. The first transistor M1 has a control end, a first end and a second end, the control end of the first transistor M1 is coupled to the third node N3, and the first end of the first transistor M1 is coupled to the bias voltage Vdd. The second transistor M2 has a control end, a first end and a second end, the control end of the second transistor M2 is coupled to the scan driver 14 to receive the row selection signal Srow, the first end of the second transistor M2 is coupled to the second end of the first transistor M1, and the second end of the second transistor M2 is coupled to the data driver 16 to output the output signal Scol. The bias voltage V2 is greater than the bias voltage V1, the bias voltage V1 is greater than the bias voltage V0, and the bias voltage Vdd can be a variable voltage. The first transistor M1, the second transistor M2, and the third transistor M3 can be N-type metal oxide semiconductor (NMOS) transistors, and the fourth transistor M4 can be a P-type metal oxide semiconductor (PMOS) transistor. The second transistor M2 may have a dual gate structure (dual gates or double gates) to reduce leakage current. The first transistor M1 may amplify the reverse bias current I of the photodiode D. D,r The second transistor M2 can select the output signal Scol to be read, and the third transistor M3 can discharge the capacitor Cp to reset the voltage V of the third node N3. B , and the fourth transistor M4 can increase the voltage V of the second node N2 A The bias voltage V2 is set to put the photodiode D in a reverse bias state.

[0016] The pixel sensor circuit 10 can operate in a reset mode, a sensing mode or a scanning mode. Figure 2 ,Figure 3 and Figure 4 Schematic diagrams of the electronic device 1 operating in the reset mode, the sensing mode and the scanning mode respectively. Figure 2 As shown, in the reset mode, the reset circuit 11 receives the reset signal Srst to turn off the third transistor M3 and turn on the fourth transistor M4 to reduce the voltage V A Set at bias voltage V0, so that the photodiode D is in forward bias state, so the forward bias current I of the photodiode D D,f The capacitor Cp is discharged and the voltage V B Reset to bias voltage V1. Since bias voltage V1 is greater than bias voltage V0, the voltage V B is greater than the voltage V of the second node N2 A In the reset mode, the row selection signal Srow turns off the second transistor M2. Figure 3 As shown, in the sensing mode, the reset signal Srst turns on the third transistor M3 and turns off the fourth transistor M4 to reduce the voltage V of the second node N2 to A Set at bias voltage V2, so that the photodiode D is in a reverse bias state to convert the incident light into a reverse bias current I D,r , reverse bias current I D,r The capacitor Cp is charged for a period of time so that the voltage V B Rising to (V1+Vd), the voltage Vd is the current I D,r The voltage generated by charging the capacitor Cp. Since the bias voltage V2 is greater than the bias voltage V1, in the sensing mode, the voltage V A is greater than the voltage V of the third node N3 B In the sensing mode, the row signal Srow is selected to turn off the second transistor M2. Figure 4 As shown, in the scan mode, the second transistor M2 receives the row selection signal Srow and is turned on, and the voltage V B The voltage V B The output voltage Vout is converted into a current Id and output as an output signal Scol. Then, a processor (not shown) receives the output signal Scol through a data driver 16 for processing and analysis to obtain light intensity information. The voltage Vout is expressed by formula (1):

[0017]

[0018] in:

[0019] V1 is the bias voltage;

[0020] ID,r is the reverse bias current of the photodiode D;

[0021] t is the charging time of capacitor Cp;

[0022] C is the capacitance value of capacitor Cp;

[0023] V th is the critical voltage of the first transistor M1;

[0024] Id is the drain current of the first transistor M1;

[0025] L, W, μ, C ox They are respectively the channel length, channel width, mobility and oxide layer capacitance per unit area of ​​the first transistor M1.

[0026] As shown in formula (1), the output voltage Vout and the reverse bias current I of the photodiode D are D,r It is positively correlated with the charging time t of capacitor Cp and negatively correlated with the capacitance value C of capacitor Cp. When the capacitance value C is smaller or the reverse bias current I D,r Or when the charging time t is longer, the output voltage Vout is larger, and it is easier to identify low brightness light under the screen. In some embodiments, in order to increase the area of ​​the photodiode D to increase the reverse bias current I D,r The output voltage Vout is increased, and since the capacitor Cp is connected in series with the photodiode D and has a fixed capacitance value C, the equivalent capacitance value of the parasitic capacitance of the photodiode D and the capacitor Cp can be limited to the capacitance value C without being affected by the increased capacitance value of the parasitic capacitance and reducing the output voltage Vout. The capacitor Cp can have a fixed capacitance value C between 1.2fF and 10fF.

[0027] Although Figure 1 Only one pixel sensor circuit 10 is shown, and the electronic device 1 may also include a plurality of pixel sensor circuits 10, which may be arranged in an array and used to sense light at different positions, such as Figure 7 shown.

[0028] Figure 5 and Figure 6 The timing diagram of two signal control modes of the display electronic device 1 includes reset signals Srst[n], Srst[n+1] and row selection signals Srow[n], Srow[n+1], which respectively represent the reset signals and row selection signals transmitted to the nth row and the n+1th row of the pixel sensor circuit 10. Figure 5 and Figure 6Both signal control methods can sense light by sequentially sensing and scanning row by row. The reset signals Srst[n] and Srst[n+1] can set the nth and n+1th rows of the pixel sensor circuit 10 in the reset mode during the reset period Treset, and set the nth and n+1th rows of the pixel sensor circuit 10 in the sensing mode during the sensing period Tsense. The row selection signals Srow[n] and Srow[n+1] can set the nth and n+1th rows of the pixel sensor circuit 10 in the scanning mode during the scanning period Tscan. Figure 5 The display reset signal Srst[n], Srst[n+1] and the row selection signal Srow[n], Srow[n+1] are synchronized in the control mode, and the sensing mode and the scanning mode are performed simultaneously, which can shorten the detection time; Figure 6 The display reset signal Srst[n], Srst[n+1] and the row selection signal Srow[n], Srow[n+1] are not synchronized. The sensing mode is executed for a period of time before the scanning mode is started, which can generate a clearer signal. The operation of the reset mode, sensing mode and scanning mode has been described in Figure 2 , 3 , 4 are provided in the description and will not be repeated here.

[0029] exist Figure 5 In the process, the reset signal Srst[n] is firstly at the low potential VL to set the voltage V A To bias voltage V0 and reset voltage V B To the bias voltage V1, then the reset signal Srst[n] and the row selection signal Srow[n] are simultaneously at the high potential VH to sense the voltage V B The output signal Scol[n] of the nth row is read. When the sensing mode and scanning mode of the nth row are in progress, the reset signal Srst[n+1] of the n+1th row is at a low potential VL. After the sensing mode and scanning mode of the nth row are completed, the reset signal Srst[n+1] and the row selection signal Srow[n+1] are at a high potential VH at the same time to sense the voltage V B The output signal Scol[n+1] of the n+1th row is read by Figure 5 The electronic device 1 can sense the light intensity row by row and read the corresponding output signals Scol[n], Scol[n+1].

[0030] Figure 6 and Figure 5 The signal control method is similar to that of , but the sensing period Tsense of the nth row is prolonged and the scanning period Tscan of the nth row and the sensing period Tsense of the nth row are performed simultaneously when the sensing period Tsense of the nth row is about to end. The operation method of the n+1th row is the same. Figure 5 Compared toFigure 6 The sensing period Tsense is longer, the capacitor Cp can be charged for a longer time, and a higher voltage V is generated. B , so the corresponding output signal Scol is also larger.

[0031] Figure 7 1 is a schematic diagram of another electronic device according to an embodiment of the present invention, including a pixel array 70, a reset circuit 11, a reset driver 12, a scan driver 14 and a data driver 16. The reset driver 12 is coupled to the pixel array 70 via the reset circuit 11, and the scan driver 14 and the data driver 16 are coupled to the pixel array 70, so as to control the pixel array 70 to operate in a reset mode, a sensing mode or a scan mode. The pixel array 70 includes a plurality of pixel sensing circuits 10 (1, 1) to 10 (M, N) arranged in an array. The reset driver 12 and the scan driver 14 can be respectively disposed on both sides of the pixel array 70, and the data driver 16 can be disposed at the bottom of the electronic device 7. The reset signal Srst[1] resets the first pixel sensor circuit 10[1,1] and the second pixel sensor circuit 10[1,N] of the first row, the reset signal Srst[2] resets the pixel sensor circuit 10 of the second row, the row selection signal Srow[1] selects the pixel sensor circuit 10 of the first row, and the row selection signal Srow[2] selects the pixel sensor circuit 10 of the second row to read the sensed light intensity.

[0032] Figure 1 The pixel sensing circuit 10 and Figure 7 The pixel array 70 can increase the reverse bias current I by increasing the illumination area of ​​the photodiode D. D,r At the same time, the capacitor Cp is connected in series with the photodiode D to limit the equivalent capacitance value of the photodiode D and the capacitor Cp to the capacitance value C, thereby increasing the output voltage Vout. When applied to low-light environments such as fingerprint scanners, low-brightness light can be more easily identified from under the screen.

[0033] The above description is only an embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. An electronic device, characterized in that, comprising: a reset circuit (11) for receiving a reset signal (Sret), wherein the reset circuit (11) includes: a first transistor (M3) having a control terminal; and a second transistor (M4) having a control terminal and a first terminal, wherein the control terminal of the first transistor is electrically connected to the control terminal of the second transistor; a scan driver (14); and a first pixel sensing circuit (10) coupled to the reset circuit (11), and the first pixel sensing circuit (10) includes: a third transistor (M1) having a control terminal and a first terminal; a photodiode (D) coupled between the control terminal of the third transistor (M1) and the first terminal of the second transistor (M4); and a fourth transistor (M2) having a control terminal, a first terminal and a second terminal, wherein the control terminal of the fourth transistor (M2) is coupled to the scan driver (14), the first terminal of the fourth transistor (M2) is coupled to the first terminal of the third transistor (M1), and the second terminal of the fourth transistor (M2) is coupled to a data driver (16) to output an output signal (Scol).

2. The electronic device according to claim 1, characterized in that, wherein the control terminal of the fourth transistor (M2) is used to receive a row selection signal.

3. The electronic device according to claim 1, characterized in that, wherein: the control terminal of the second transistor (M4) is further used to receive the reset signal (Sret).

4. The electronic device according to claim 3, characterized in that, wherein: the first transistor (M3) further has a second terminal coupled to the first terminal of the second transistor (M4).

5. The electronic device according to claim 3, characterized in that, wherein: the first transistor (M3) further has a first terminal; the second transistor (M4) further has a second terminal; the first terminal of the first transistor (M3) and the second terminal of the second transistor (M4) receive different voltages.

6. The electronic device according to claim 1, characterized in that, wherein the reset circuit (11) further includes a reset node (N1) coupled to a reset driver (12).

Images