OLED display panel and preparation method thereof

Abstract

The embodiment of the application discloses an OLED display panel, an OLED display panel preparation method, the OLED display panel comprises a substrate, an anode layer, an electron transport layer and a cathode layer, the anode layer comprises an anode and an auxiliary electrode arranged in the same layer, the auxiliary electrode is located in a cathode overlap area, wherein the auxiliary electrode is provided with a groove, the opening of the groove is arranged towards the cathode layer, the auxiliary electrode penetrates through the electron transport layer and is electrically connected with the cathode layer; by arranging the groove on the surface of the auxiliary electrode towards the cathode, the auxiliary electrode at the edge of the groove penetrates through the electron transport layer and is in contact with the cathode layer, so that the conduction characteristic between the cathode layer and the auxiliary electrode is improved, and the yield is improved.

Description

Technical Field

[0001] This application relates to the field of display technology, specifically to an OLED display panel and a method for manufacturing an OLED display panel. Background Technology

[0002] When OLED display panels are deposited with cathode and electron transport layer, the coverage areas of the cathode and electron transport layer are different. The current mass-produced solution requires the use of two evaporation masks, namely the Cathode / ET two-mask evaporation technology.

[0003] In the prior art, the electron transport layer in some OLED display panels is entirely disposed in the surface cathode overlap area. Due to the poor conductivity of the electron transport layer, the contact conduction between the cathode and the metal layer of the underlying array substrate is affected, making it difficult for the cathode to form a good electrical connection with the metal layer of the underlying array substrate in the surface cathode overlap area.

[0004] In the existing OLED display panel 1, please refer to Figure 1 Especially in the cathode overlap area of ​​the non-display area 3, when the electron transport layer 80 and the cathode layer 90 share the same photomask, the poor conductivity of the electron transport layer 80 will separate the cathode layer 90 from the first auxiliary electrode 501, causing data signals to be unable or difficult to be transmitted from the second metal layer 20 of the non-display area 3 to the cathode layer 90, which reduces the conductivity of the cathode layer 90 and the first auxiliary electrode 501, resulting in a decrease in the yield of the existing OLED display panel 1.

[0005] Therefore, existing OLED display panels suffer from a technical problem of low yield when the electron transport layer covers the auxiliary electrode. Summary of the Invention

[0006] This application provides an OLED display panel and an OLED display panel manufacturing method, which can alleviate the technical problem of low yield when the electron transport layer covers the auxiliary electrode in existing OLED display panels.

[0007] This application provides an OLED display panel, including:

[0008] Substrate;

[0009] A second metal layer is disposed above the substrate;

[0010] An anode layer is disposed on the side of the second metal layer away from the substrate. The anode layer includes an anode and an auxiliary electrode disposed in the same layer, and the auxiliary electrode is located in the surface cathode overlap area.

[0011] An electron transport layer is disposed on the side of the anode layer away from the substrate;

[0012] A cathode layer is disposed on the side of the electron transport layer away from the substrate;

[0013] The auxiliary electrode is provided with a groove, the opening of which faces the cathode layer, and the auxiliary electrode penetrates the electron transport layer and is electrically connected to the cathode layer.

[0014] Optionally, in some embodiments of this application, the auxiliary electrode further includes a first auxiliary electrode located in the non-display area and a second auxiliary electrode located in the display area. In the non-display area, the cathode layer is electrically connected to the second metal layer through the first auxiliary electrode, and in the display area, the second auxiliary electrode is electrically connected in parallel with the cathode.

[0015] Optionally, in some embodiments of this application, the first auxiliary electrode has at least one first scratch chamfer structure, the second auxiliary electrode has at least one second scratch chamfer structure, the first scratch chamfer structure is in contact with the cathode layer, and the second scratch chamfer structure is in contact with the cathode layer.

[0016] Optionally, in some embodiments of this application, the first auxiliary electrode is arranged in a grid pattern or in a partially hollowed-out arc shape.

[0017] Optionally, in some embodiments of this application, the longitudinal cross-sectional shape of the first auxiliary electrode is trapezoidal, and the angle between at least one hypotenuse of the trapezoid and the first angle of the substrate ranges from 75° to 90°.

[0018] Optionally, in some embodiments of this application, the groove includes a first groove and a second groove, the first auxiliary electrode is provided with the first groove, the second auxiliary electrode is provided with the second groove, the depth of the first groove is less than or equal to the thickness of the first auxiliary electrode, and the depth of the second groove is less than or equal to the thickness of the second auxiliary electrode.

[0019] Optionally, in some embodiments of this application, the thickness of the electron transport layer is 10 nanometers to 20 nanometers.

[0020] Optionally, in some embodiments of this application, the anode layer is configured as a three-layer stacked structure.

[0021] This application provides a method for manufacturing an OLED display panel, including:

[0022] Provide a substrate;

[0023] A second metal layer is prepared on the substrate;

[0024] At least one layer of conductive material is coated on the side of the second metal layer away from the substrate, and the conductive material is patterned to prepare an anode layer. The anode layer includes an anode and an auxiliary electrode located in the cathode overlap region. A groove is formed on the side of the auxiliary electrode facing the cathode layer.

[0025] An electron transport layer and a cathode layer are sequentially prepared on the side of the anode layer away from the substrate.

[0026] Optionally, in some embodiments of this application, the step of sequentially fabricating an electron transport layer and a cathode layer on the side of the anode layer away from the substrate further includes:

[0027] The electron transport layer and the cathode layer were prepared separately using the same photomask.

[0028] Beneficial effects: In the cathode overlap area, the electron transport layer covers the auxiliary electrode, resulting in poor conductivity between the auxiliary electrode and the cathode layer due to the electron transport layer blocking the connection. This application improves the conductivity between the cathode and the auxiliary electrode by providing a groove on the surface of the auxiliary electrode facing the cathode, allowing the auxiliary electrode to penetrate the electron transport layer and contact the cathode layer. This alleviates the technical problem of low yield in existing OLED display panels when the electron transport layer covers the auxiliary electrode. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a cross-sectional schematic diagram of an existing OLED display panel;

[0031] Figure 2 This is a first cross-sectional schematic diagram of the OLED display panel provided in this application;

[0032] Figure 3 This is a first cross-sectional schematic diagram of the first auxiliary electrode of the OLED display panel provided in this application;

[0033] Figure 4 This is a second cross-sectional schematic diagram of the first auxiliary electrode of the OLED display panel provided in this application;

[0034] Figure 5 This is a third cross-sectional schematic diagram of the first auxiliary electrode of the OLED display panel provided in this application;

[0035] Figure 6This is an enlarged view of the surface cathode overlap area 110 of the OLED display panel provided in this application;

[0036] Figure 7 This is a cross-sectional schematic diagram of the three-layer structure of the first auxiliary electrode of the OLED display panel provided in this application;

[0037] Figure 8 This is a second cross-sectional schematic diagram of the OLED display panel provided in this application;

[0038] Figure 9 This is a schematic flowchart of the OLED display panel manufacturing method provided in this application.

[0039] Explanation of reference numerals in the attached figures:

[0040] Detailed Implementation

[0041] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of the embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. In addition, it should be understood that the specific embodiments described herein are only for illustration and explanation of this application and are not intended to limit this application. In this application, unless otherwise stated, directional terms such as "upper" and "lower" generally refer to the upper and lower positions of the device in actual use or operation, specifically the drawing directions in the accompanying drawings; while "inner" and "outer" refer to the outline of the device.

[0042] This application employs Cathode / ET one-mask evaporation technology, which involves using the same photomask to fabricate the electron transport layer and the cathode layer. Both the electron transport layer and the cathode are deposited on the entire display area. Compared to Cathode / ET two-mask evaporation technology, this saves one photomask used to fabricate the electron transport layer. It is understood that the electron transport layer 80 is deposited on the entire cathode overlap area 110, preventing direct contact between the auxiliary electrode and the cathode layer 90. Since the electron transport layer 80 is not a good conductor, the conductivity between the cathode layer 90 and the auxiliary electrode is poor, which in turn leads to poor conductivity between the cathode layer 90 and the underlying second metal layer 20. A groove 100 is provided on the side of the auxiliary electrode facing the electron transport layer 80. The auxiliary electrode at the edge of the groove can easily penetrate the electron transport layer 80, thereby forming contact between the auxiliary electrode and the cathode, thus improving the conductivity between the cathode layer 90 and the underlying second metal layer 20.

[0043] Please see Figure 2The OLED display panel 1 includes a display area 2 and a non-display area 3. The display area 2 includes a light-emitting area 4 and a non-light-emitting area 5. Both the display area 2 and the non-display area 3 include a surface cathode overlap area 110. The OLED display panel 1 includes a substrate 10, a second metal layer 20, an anode layer 50, an electron transport layer 80, and a cathode layer 90. The second metal layer 20 is disposed above the substrate 10. The anode layer 50 includes an anode 503 and an auxiliary electrode disposed on the same layer. The auxiliary electrode is located in the surface cathode overlap area 110. The electron transport layer 80 is disposed on the side of the anode layer 50 away from the substrate 10. The electron transport layer 80 at least partially covers the auxiliary electrode. The cathode layer 90 is disposed on the side of the electron transport layer 80 away from the substrate 10. The auxiliary electrode is provided with a groove 100. The opening of the groove 100 faces the cathode layer 90. The auxiliary electrode penetrates the electron transport layer 80 and is electrically connected to the cathode layer 90.

[0044] It is understandable that in the area where the auxiliary electrode has a groove 100, the auxiliary electrode at the edge of the groove 100 has a special morphology with a large taper angle and a scratched chamfer, which makes it easier to pierce the electron transport layer 80, or to break through the upper electron transport layer 80 under the action of an external electric field, so that the auxiliary electrode can penetrate the electron transport layer 80 and make contact with the cathode layer 90 to conduct electricity.

[0045] The planarization layer 40 is further provided with a pixel definition layer 60 on the side away from the substrate 10, and the light-emitting layer 70 is disposed in the light-emitting area 4 between adjacent pixel definition layers 60.

[0046] In the face cathode overlap region 110, part of the cathode layer 90 is in face contact with the electron transport layer 80, and this part is not in contact with the auxiliary electrode. Another part of the cathode layer 90 is in contact with the auxiliary electrode that penetrates the electron transport layer 80. The cathode layer 90 and the auxiliary electrode are connected through the other part, thereby improving the conductivity between the cathode layer 90 and the auxiliary electrode.

[0047] The auxiliary electrodes include a first auxiliary electrode 501 located in the non-display area 3 and a second auxiliary electrode 502 located in the display area.

[0048] The substrate has a first metal layer on the side facing the second metal layer, and the first metal layer can be a gate layer.

[0049] In this embodiment, a passivation layer 30 is provided on the side of the second metal layer 20 away from the substrate 10, and a planarization layer 40 is provided on the side of the passivation layer 30 away from the substrate 10. The anode layer 50 is disposed on the side of the planarization layer 40 away from the substrate 10.

[0050] The cathode overlap area refers to the region where the cathode layer 90 and the auxiliary electrode overlap in the film thickness direction. The cathode layer 90 and the auxiliary electrode are in contact with each other in this overlapping region. Furthermore, the auxiliary electrode surface of the cathode overlap area 110 is provided with a groove 100, and the auxiliary electrode at the edge of the groove has a scratched chamfer. The auxiliary electrode penetrates the electron transport layer and is electrically connected to the cathode layer. The edge of the auxiliary electrode at the edge of the groove 100 is in contact with the cathode layer 90.

[0051] The second metal layer 20 further includes a source electrode 202, which is connected to the anode 503.

[0052] Understandably, please refer to Figure 6 By utilizing the fact that the auxiliary electrode is in the same layer as the anode layer 50, and combined with the large taper angle of the anode layer 50, where the taper angle is... Figure 6 As shown by the α angle, since the electron transport layer 80 is relatively thin, the auxiliary electrode has a high probability of puncturing the electron transport layer 80 during its fabrication. Alternatively, when the substrate or the OLED display panel is powered on, the auxiliary electrode may break down the electron transport layer 80, causing the auxiliary electrode to make contact with the cathode, thereby improving the conductivity. Furthermore, the α angle is greater than 75 degrees and less than or equal to 90 degrees.

[0053] In this embodiment, by providing a groove 100 on the surface of the auxiliary electrode facing the cathode, the auxiliary electrode passes through the electron transport layer 80 and contacts the cathode, thereby improving the conductivity between the cathode and the auxiliary electrode and alleviating the technical problem of low yield when the electron transport layer 80 covers the auxiliary electrode in existing OLED display panels.

[0054] Please see Figures 2 to 9 The technical solution of this application will now be described in conjunction with specific embodiments.

[0055] In one embodiment, the groove 100 includes a first groove and a second groove. The first auxiliary electrode 501 is provided with the first groove, and the second auxiliary electrode 502 is provided with the second groove. The depth of the first groove is less than or equal to the thickness of the first auxiliary electrode 501, and the depth of the second groove is less than or equal to the thickness of the second auxiliary electrode 502.

[0056] In one embodiment, the auxiliary electrode further includes a first auxiliary electrode 501 located in the non-display area 3, and the cathode is electrically connected to the second metal layer 20 through the first auxiliary electrode 501.

[0057] In this process, the second metal layer 20 has a connection electrode 201 in the cathode overlap area 110 of the non-display area 3. One end of the connection electrode 201 is connected to an external signal, and the other end is electrically connected to the cathode layer 90 through the first auxiliary electrode 501.

[0058] In the non-display area 3, at the cathode overlap area 110, the cathode layer 90 is electrically connected to the lower connecting electrode 201 through the first auxiliary electrode 501, so that external signals can be transmitted to the surface through the cathode layer 90 that is set throughout the surface.

[0059] The first auxiliary electrode 501 can serve as a transition electrode. The cathode layer 90 and the connecting electrode 201 are respectively connected to both sides of the first auxiliary electrode 501. The first auxiliary electrode 501 is continuously arranged, and the surface facing the connecting electrode 201 is in surface contact with the connecting electrode 201.

[0060] It is understood that a via 130 exists in the cathode overlap area 110. The via 130 penetrates the passivation layer 30, the planarization layer 40, and the pixel definition layer 60. The auxiliary electrode is disposed within the via 130. The via 130 includes a beveled inner wall. When the cathode layer 90 is deposited, abnormalities such as broken lines are prone to occur on the beveled inner wall of the cathode layer 90 within the via 130. By setting the first auxiliary electrode 501 as a transition electrode, since the first auxiliary electrode 501 is fabricated in the same layer as the anode layer 50, the first... The thickness of the first auxiliary electrode 501 is the same as the thickness of the anode layer 50, and the thickness of the first auxiliary electrode 501 is greater than the thickness of the cathode layer 90. The thicker first auxiliary electrode 501 is less likely to break in the via. Therefore, even if the cathode layer 90 breaks in the via, the cathode layer can be repaired by the first auxiliary electrode 501. The two ends of the first auxiliary electrode 501 are respectively connected to the two ends of the cathode layer 90 located at the break point, thereby avoiding abnormal connection between the cathode layer 90 and the lower second metal layer 20 after a break.

[0061] Furthermore, the first auxiliary electrode 501 is provided to at least cover abnormal locations such as broken wires in the cathode layer 90. When the first auxiliary electrode 501 is provided, if the cathode layer 90 experiences a broken wire in the via 130 of the cathode overlap area 110, the cathode layer can still maintain continuous surface contact with the connecting electrode 201 through the first auxiliary electrode 501 because the first auxiliary electrode 501 is continuously provided in the via 130, thereby achieving a good electrical connection.

[0062] In this embodiment, by providing a continuous first auxiliary electrode 501 at the cathode overlap area 110 in the non-display area 3, the cathode and the lower connecting electrode 201 are connected through the first auxiliary electrode 501 to form a better electrical connection, thus avoiding electrical connection abnormalities caused by cathode wire breakage.

[0063] In one embodiment, please refer to Figure 3 , 4 5. The first auxiliary electrode 501 is arranged in a grid pattern or in a partially hollowed-out arc pattern.

[0064] In this configuration, any one of the first auxiliary electrodes 501 is continuously arranged.

[0065] The depth of the first groove can be equal to the thickness of the first auxiliary electrode.

[0066] When the first auxiliary electrode 501 is arranged in a grid pattern, the first auxiliary electrode 501 includes multiple hollow areas, and the hollow areas can be arranged in an array; when the depth of the first groove is equal to the thickness of the first auxiliary electrode, the first groove forms the hollow area.

[0067] It is understandable that by hollowing out the first groove, the step height at the first groove can be further increased, thereby increasing the probability that the auxiliary electrode can penetrate the electron transport layer 80.

[0068] In this embodiment, by limiting the depth and arrangement of the first groove, the probability of the auxiliary electrode penetrating the electron transport layer 80 is further increased, thereby improving the conductivity between the cathode and the connecting electrode 201.

[0069] In one embodiment, the anode layer 50 is configured in a three-layer stacked structure, and the first auxiliary electrode 501 is also configured in a three-layer stacked structure.

[0070] The anode layer 50 can be a titanium / silver / indium tin oxide three-layer structure. The titanium can act as a hydrogen absorption material to prevent hydrogen atoms from diffusing into the TFT device below, thereby improving the stability of the TFT device.

[0071] Understandably, please refer to Figure 7 When the first auxiliary electrode 501 is arranged in a three-layer stacked structure, the first scratch chamfer 120 is easily formed at the edge of the first groove between two adjacent layers. Specifically, at the edge of the first groove, there is a step difference or uneven position between two adjacent layers of the auxiliary electrode, which easily forms the first scratch chamfer. The first scratch chamfer can help the first auxiliary electrode 501 pierce the electron transport layer 80, thereby increasing the probability of the first auxiliary electrode 501 penetrating the electron transport layer 80.

[0072] It is understandable that the three-layer stacked structure has a large thickness and steep sides, which is beneficial for the first auxiliary electrode 501 to penetrate the electron transport layer 80 and form contact with the cathode layer 90.

[0073] In this embodiment, by setting the first auxiliary electrode 501 as a three-layer stacked structure, the probability of forming the first scratch chamfer is increased, thereby increasing the probability of the first auxiliary electrode 501 penetrating the electron transport layer 80 and improving the conductivity between the cathode layer 90 and the connecting electrode 201.

[0074] In one embodiment, please refer to Figure 6 The three-layer stacked structure of the first auxiliary electrode 501 has at least one first scratch chamfer 120, and the first scratch chamfer 120 is in contact with the cathode layer 90.

[0075] Each of the first auxiliary electrodes 501 may include at least two first scratch chamfers 120, and at least one of the first scratch chamfers 120 is in contact with the cathode layer 90.

[0076] The first scratch chamfer 120 penetrating the electron transport layer 80 improves the conductivity between the cathode layer 90 and the connecting electrode 201.

[0077] It is understandable that when the first auxiliary electrode 501 is a three-layer stacked structure, it can have more first scratch chamfers than a single-layer structure. By increasing the number of first scratch chamfers 120, the number of first scratch chamfers 120 in contact with the cathode can be increased. By increasing the number of first scratch chamfers 120 in contact with the cathode, the contact area between the first auxiliary electrode 501 and the cathode layer 90 can be increased, thereby reducing the impedance of the cathode layer 90.

[0078] In this embodiment, the multiple first scratch chamfers 120 formed at the edge of the three-layer stacked structure of the first auxiliary electrode 501 are beneficial to increasing the contact area between the first auxiliary electrode 501 and the cathode layer 90. According to the inverse relationship between contact area and impedance, the impedance of the cathode layer 90 can be reduced.

[0079] In one embodiment, please refer to Figure 6 The first auxiliary electrode 501 has a trapezoidal cross-sectional shape, and the angle α between at least one hypotenuse of the trapezoid and the substrate 10 ranges from 75° to 90°.

[0080] Wherein, the first included angle is the taper angle of the first auxiliary electrode 501.

[0081] It is understood that when the angle α between at least one inclined side of the first auxiliary electrode 501 and the substrate 10 is in the range of 75° to 90°, the side of the first auxiliary electrode 501 is relatively steep, and the first auxiliary electrode 501 penetrates the electron transport layer 80 to contact the cathode layer 90.

[0082] Preferably, the angle α of the first included angle can be 75° or 90°, wherein 75° and 90° are the extreme values ​​of the two endpoints of the angle α. If the angle α of the first included angle is less than 75° or greater than 90°, the side of the first auxiliary electrode will not be steep enough, and the first auxiliary electrode will not easily penetrate the electron transport layer 80 to form a contact. Optionally, the angle α of the first included angle can also be 80°.

[0083] In this embodiment, by specifically defining the shape and taper angle α of the first auxiliary electrode 501, the probability of the first auxiliary electrode 501 penetrating the electron transport layer 80 is further increased.

[0084] In one embodiment, please refer to Figure 8 The auxiliary electrode also includes a second auxiliary electrode 502 located in the display area 2, and the second auxiliary electrode 502 is connected in parallel with the cathode layer 90.

[0085] In the cathode overlap area 110 of the display area 2, the second auxiliary electrode 502 is used to connect in parallel with the cathode layer 90 to reduce the impedance of the cathode layer 90, rather than acting as a transition electrode as the first auxiliary electrode 501. That is, the functions and roles of the first auxiliary electrode 501 and the second auxiliary electrode 502 are different, and their positions are also different. At the same time, the effect of the cathode layer 90 and the auxiliary electrode overlap in the cathode overlap area 110 of the display area 2 is also different from that in the cathode overlap area 110 of the non-display area 3.

[0086] The second auxiliary electrode 502 and the light-emitting area 4 can be in a one-to-one correspondence, or one second auxiliary electrode 502 can correspond to multiple light-emitting areas 4.

[0087] The impedance of the second auxiliary electrode 502 can be less than the impedance of the cathode layer 90.

[0088] The impedance of the second auxiliary electrode 502 can be less than the impedance of the first auxiliary electrode 501.

[0089] The cathode can be connected to the second auxiliary electrode 502 through a bottom-cut second groove.

[0090] It is understood that the second auxiliary electrode 502 is electrically connected in parallel with the cathode layer 90, and the impedance of the second auxiliary electrode 502 is relatively small. According to the calculation formula of the total impedance in parallel, the total impedance of the cathode after parallel connection is less than that of the second auxiliary electrode 502, thereby significantly reducing the impedance of the cathode layer 90 and alleviating the technical problem of large signal loss caused by the large voltage drop of the cathode layer 90.

[0091] It should be noted that the second auxiliary electrode 502 can be arranged in an array in the plane. Specifically, the display area 2 can be divided into multiple regions to be reduced in impedance. Each region to be reduced in impedance is provided with a second auxiliary electrode 502 electrically connected to the cathode layer 90, thereby better reducing the voltage drop of each segment of the cathode layer 90 and making the voltage drop of each region in the plane more uniform, thus ensuring the uniformity of brightness.

[0092] In this embodiment, by setting a second auxiliary electrode 502 in the display area 2 and connecting the second auxiliary electrode 502 to the cathode layer 90, the voltage drop of the cathode layer 90 is reduced, thereby preventing uneven brightness of the display panel caused by large signal loss in the cathode layer 90.

[0093] In one embodiment, the second auxiliary electrode 502 is arranged in a grid pattern or in a partially hollowed-out arc pattern.

[0094] In this configuration, any one of the second auxiliary electrodes 502 is continuously arranged.

[0095] When the second auxiliary electrode 502 is arranged in a grid pattern, the second auxiliary electrode 502 includes multiple hollow areas, and the hollow areas can be arranged in an array.

[0096] It is understandable that by hollowing out the second groove, the step height at the second groove can be further increased. Furthermore, a step height can be generated within the second groove, thereby forming more second scratch chamfers, which increases the probability that the edge of the second groove penetrates the electron transport layer 80.

[0097] In this embodiment, by limiting the depth and arrangement of the second groove, the probability of the edge of the second groove being connected to the electron transport layer 80 is further increased, thereby improving the conductivity between the cathode layer 90 and the connecting electrode 201.

[0098] In one embodiment, the anode layer 50 is configured in a three-layer stacked structure, and the second auxiliary electrode 502 is also configured in a three-layer stacked structure.

[0099] The anode layer 50 can be a titanium / silver / indium tin oxide three-layer structure. The titanium can act as a hydrogen absorption material to prevent hydrogen atoms from diffusing into the TFT device below, thereby improving the stability of the TFT device.

[0100] It is understandable that when the second auxiliary electrode 502 is arranged in a three-layer stacked structure, more second scratch chamfers are easily formed at the edges of adjacent layers. Increasing the number of second scratch chamfers can increase the probability of the second auxiliary electrode 502 penetrating the electron transport layer 80.

[0101] It is understandable that the three-layer stacked structure has a large thickness and steep edges, which is beneficial for the second auxiliary electrode 502 to penetrate the electron transport layer 80 and make contact with the cathode.

[0102] In this embodiment, by setting the second auxiliary electrode 502 as a three-layer stacked structure, the probability of the second auxiliary electrode 502 penetrating the electron transport layer 80 is increased, thereby improving the conductivity between the cathode and the connecting electrode 201.

[0103] In one embodiment, the three-layer stacked structure of the second auxiliary electrode 502 has at least one second scratch chamfer, which contacts the cathode layer 90.

[0104] Each of the second auxiliary electrodes 502 may include at least two second scratch chamfers, and at least one of the second scratch chamfers is in contact with the cathode layer 90.

[0105] Specifically, the second scratch chamfer penetrating the electron transport layer 80 enhances the conductivity between the cathode and the connecting electrode 201.

[0106] It is understandable that by increasing the number of the second scratch chamfers, the contact area between the second scratch chamfers and the cathode layer 90 can be increased, thereby reducing the impedance of the cathode layer 90.

[0107] In this embodiment, the multiple second scratch chamfers formed at the edge of the three-layer stacked structure of the second auxiliary electrode 502 are beneficial to increasing the contact area with the cathode layer 90. According to the inverse relationship between contact area and impedance, the impedance of the cathode layer 90 can be reduced.

[0108] In one embodiment, the cross-sectional shape of the second auxiliary electrode 502 is trapezoidal, and the angle between at least one hypotenuse of the trapezoid and the second angle of the substrate 10 ranges from 75° to 90°.

[0109] It is understood that when the second angle between at least one inclined side of the second auxiliary electrode 502 and the substrate 10 is in the range of 75° to 90°, the side of the second auxiliary electrode 502 is relatively steep, and the second auxiliary electrode 502 penetrates the electron transport layer 80 to contact the cathode layer 90. Optionally, the second angle can be 75°, 80°, or 95°.

[0110] In this embodiment, by specifically defining the shape of the second auxiliary electrode 502 and the taper angle on its side, the probability of the second auxiliary electrode 502 penetrating the electron transport layer 80 is further increased.

[0111] In one embodiment, the thickness of the electron transport layer 80 ranges from 10 nanometers to 20 nanometers.

[0112] Preferably, the thickness of the electron transport layer 80 is 10 nanometers. By reducing the thickness of the electron transport layer, it is easier for the auxiliary electrode to penetrate the electron transport layer 80, thereby enabling the auxiliary electrode to make contact and conduct with the cathode layer 90. The thickness of the electron transport layer can also be 15 nanometers or 20 nanometers; this application does not impose a specific limitation.

[0113] In this embodiment, the electron transport layer 80 is relatively thin, which facilitates the auxiliary electrode to penetrate the electron transport layer 80 and form contact with the cathode layer 90, thereby improving the yield of the OLED display panel 1.

[0114] Please see Figure 9 This application provides a method for manufacturing an OLED display panel 1, comprising:

[0115] S1: Provide a substrate 10;

[0116] S2: A second metal layer 20 is formed on the substrate 10;

[0117] S3: At least one layer of conductive material is coated on the side of the second metal layer 20 away from the substrate 10, and the conductive material is patterned to prepare an anode layer 50. The anode layer 50 includes an anode 503 and an auxiliary electrode located in the surface cathode overlap region 110. The auxiliary electrode has a groove 100 on the side facing the cathode layer 90.

[0118] S4: An electron transport layer 80 and a cathode layer 90 are sequentially prepared on the side of the anode layer 50 away from the substrate 10.

[0119] It is understood that when the electron transport layer 80 is sequentially prepared on the side of the anode layer 50 away from the substrate 10, the electron transport layer 80 is not discontinuously arranged, and the electron transport layer is disconnected at the position where the auxiliary electrode is provided.

[0120] Furthermore, since the electron transport layer 80 itself is relatively thin, and the auxiliary electrode is fabricated in the same layer as the anode layer 50, and because the anode layer 50 and the auxiliary electrode are relatively thick and multiple scratches and chamfers are easily formed at the top corners, the electron transport layer 80 is easily penetrated at the auxiliary electrode, and the auxiliary electrode penetrates the electron transport layer 80 to contact the cathode layer 90.

[0121] In one embodiment, the step of preparing the anode layer 50 further includes: coating two layers of metal material and one layer of indium tin oxide material on the side of the second metal layer 20 away from the substrate 10, and patterning the three layers of metal material to prepare the anode layer 50 with a three-layer stacked structure.

[0122] The two metal layers can be a titanium layer disposed near the substrate 10 and a copper layer disposed on the side of the titanium layer away from the substrate 10.

[0123] This application also proposes a display module and a display device, both of which include the aforementioned OLED display panel, which will not be described in detail here.

[0124] The OLED display panel provided in this embodiment includes a substrate, a second metal layer, an anode layer, an electron transport layer, and a cathode layer. The second metal layer is disposed above the substrate. The anode layer includes an anode and an auxiliary electrode disposed on the same layer. The auxiliary electrode is located in the cathode overlap area. The electron transport layer is disposed on the side of the anode layer away from the substrate. The cathode layer is disposed on the side of the electron transport layer away from the substrate. The auxiliary electrode has a groove with the opening facing the cathode layer. The auxiliary electrode penetrates the electron transport layer and is electrically connected to the cathode layer. By providing a groove on the surface of the auxiliary electrode facing the cathode, a scratched chamfer is formed on the edge of the groove. The scratched chamfer facilitates the auxiliary electrode's penetration through the electron transport layer, allowing it to contact the cathode layer. This improves the conductivity between the cathode layer and the auxiliary electrode, alleviating the technical problem of low yield when the electron transport layer covers the auxiliary electrode in existing OLED display panels, and improving the mass production feasibility of Cathode / ET one mask evaporation technology in OLED display panels.

[0125] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0126] The OLED display panel and OLED display panel manufacturing method provided in the embodiments of this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. An OLED display panel, characterized in that, include: Substrate; A second metal layer is disposed above the substrate; An anode layer is disposed on the side of the second metal layer away from the substrate. The anode layer includes an anode and an auxiliary electrode disposed on the same layer. The auxiliary electrode is located in the surface cathode overlap area and has a three-layer stacked structure composed of at least three different materials. An electron transport layer is disposed on the side of the anode layer away from the substrate; A cathode layer is disposed on the side of the electron transport layer away from the substrate; The auxiliary electrode is provided with a groove, the opening of which faces the cathode layer. The adjacent two layers of the three-layer stacked structure have a step difference or unevenness at the edge of the groove, forming a scratched chamfer. The auxiliary electrode penetrates the electron transport layer and is electrically connected to the cathode layer through the scratched chamfer during the fabrication process. The edge of the auxiliary electrode at the edge of the groove is in contact with the cathode layer.

2. The OLED display panel as described in claim 1, characterized in that, The auxiliary electrode further includes a first auxiliary electrode located in the non-display area and a second auxiliary electrode located in the display area. In the non-display area, the cathode layer is electrically connected to the second metal layer through the first auxiliary electrode. In the display area, the second auxiliary electrode is electrically connected in parallel with the cathode.

3. The OLED display panel as described in claim 2, characterized in that, The first auxiliary electrode has at least one first scratch chamfer structure, and the second auxiliary electrode has at least one second scratch chamfer structure. The first scratch chamfer structure is in contact with the cathode layer, and the second scratch chamfer structure is in contact with the cathode layer.

4. The OLED display panel as described in claim 3, characterized in that, The first auxiliary electrode is arranged in a grid pattern or in a partially hollowed-out arc shape.

5. The OLED display panel as described in claim 3, characterized in that, The longitudinal cross-sectional shape of the first auxiliary electrode is trapezoidal, and the angle between at least one hypotenuse of the trapezoid and the first angle of the substrate ranges from 75° to 90°.

6. The OLED display panel as described in claim 2, characterized in that, The groove includes a first groove and a second groove. The first auxiliary electrode is provided with the first groove, and the second auxiliary electrode is provided with the second groove. The depth of the first groove is less than or equal to the thickness of the first auxiliary electrode, and the depth of the second groove is less than or equal to the thickness of the second auxiliary electrode.

7. The OLED display panel as described in claim 1, characterized in that, The thickness of the electron transport layer is 10 nanometers to 20 nanometers.

8. A method for manufacturing an OLED display panel, characterized in that, include: Provide a substrate; A second metal layer is prepared on the substrate; At least one layer of conductive material is coated on the side of the second metal layer away from the substrate, and the conductive material is patterned to prepare an anode layer. The anode layer includes an anode and an auxiliary electrode located in the cathode overlap area. The auxiliary electrode has a three-layer stacked structure composed of at least three different materials. A groove is formed on the side of the auxiliary electrode facing the cathode layer. Adjacent layers of the three-layer stacked structure have a step difference or unevenness at the edge of the groove to form a scratch chamfer. An electron transport layer and a cathode layer are sequentially formed on the side of the anode layer away from the substrate. The auxiliary electrode penetrates the electron transport layer and is electrically connected to the cathode layer during the fabrication process through the scratched chamfer. The edge of the auxiliary electrode at the edge of the groove is in contact with the cathode layer.

9. The method for manufacturing an OLED display panel as described in claim 8, characterized in that, The step of sequentially fabricating an electron transport layer and a cathode layer on the side of the anode layer away from the substrate further includes: The electron transport layer and the cathode layer were prepared separately using the same photomask.

Images