Systems and methods for multilevel signal cyclic loop image representation for measurement and machine learning

Abstract

A system includes receiving an input of a digital waveform signal, a memory, and one or more processors configured to execute code such that the one or more processors: generate a horizontal ramp scan signal based on the digital waveform signal; receive selection input to identify segments of the digital waveform signal; gate the horizontal ramp scan signal and the digital waveform signal based on the selection input to generate cyclic loop image data of the digital waveform segments; store the cyclic loop image data in the memory; and provide the cyclic loop image data as one or more inputs to a machine learning system. A waveform classification method using cyclic loop images includes: receiving an input waveform; receiving a selection of input waveform segments; transforming the input waveform segments into cyclic loop image data, the transformation including generating a horizontal ramp scan signal based on edge transitions in the input waveform and storing the cyclic loop image data in the memory; and sending the cyclic loop image data to a machine learning system to determine attributes of the input waveform.

Description

[0001] Related applications

[0002] This disclosure claims protection for U.S. Provisional Patent Application No. 63 / 038,040, filed June 11, 2020, entitled “PAM4 CYCLIC EYE IMAGE REPRESENTATION FOR WAVEFORM DATA”; U.S. Provisional Patent Application No. 63 / 039,360, filed June 15, 2020, entitled “READ / WRITE BURST SEPARATION AND MEASUREMENT USING NOVEL CYCLICEYE PLOT AND MACHINE LEARNING”; U.S. Provisional Patent Application No. 63 / 041,041, filed June 18, 2020, entitled “CYCLIC EYE IMAGE REPRESENTATION FOR WAVEFORM DATA”; and U.S. Provisional Patent Application No. 63 / 041,041, filed April 21, 2021, entitled “CYCLIC EYE WITH MACHINE LEARNING FOR MEASURING OR TUNING AN OPTICAL”. The benefit of U.S. Provisional Patent Application No. 63 / 177,930, “TRANSMITTER”, each of which is hereby incorporated herein by reference in its entirety.

[0003] This disclosure relates to the following patent applications: U.S. Patent Application 17 / 345,342 (Atty-Dkt No. 12222-US1), filed June 11, 2021, entitled “SYSTEM AND METHOD FOR SEPARATION AND CLASSIFICATION OF SIGNALS USING CYCLIC LOOP IMAGES”; U.S. Patent Application 17 / 345,283 (Atty-Dkt No. 12223-US1), filed June 11, 2021, entitled “A CYCLIC LOOP IMAGE REPRESENTATION FOR WAVEFORM DATA”; and U.S. Patent Application 17 / 345,312 (Atty-Dkt No. 12222-US1), filed June 11, 2021, entitled “SYSTEM AND METHOD FOR MULTI-LEVELSIGNAL CYCLIC LOOP IMAGE REPRESENTATIONS FOR MEASUREMENTS AND MACHINELEARNING”. 12224-US2). Technical Field

[0004] This disclosure relates to the generation of images for signal analysis and measurement, and more particularly to the transformation of multilevel and / or pulse amplitude modulated signal waveforms into images that can be used for measurement and machine learning. Background Technology

[0005] In the early days of oscilloscopes, using a Lissajous plot of XY scans from two different signals was a popular way to observe some phase and frequency characteristics of the signals. The signals included sinusoidal or square wave signals with the same frequency or different but related frequencies. The plot primarily exhibits the characteristics of a single closed-loop cycle. Where X and Y have the same frequency, the signal repeats along this path with each cycle. Figure 1 An example of such an image 10 is shown, derived from two input signals 12 and 14.

[0006] Another example of XY cyclic plotting comes from observation of the magnetic BH curve on an oscilloscope display. B represents magnetic flux density, and H represents field strength. The resulting cyclic loop on the display shows the hysteresis effect of the magnetization of the core material. In both cases above, the input signal is periodic, not random, and the X and Y axes are not directly linear unless the signal is linear.

[0007] Significant advancements in processors have led to incredible speeds. This, in turn, has enabled the practical implementation of artificial intelligence processes such as deep learning and machine learning.

[0008] Modern communication systems typically use serial data links to transmit periodic clocks or pseudo-random binary sequences (PRBS). In measurements that occur over time, the oscilloscope typically displays... y(t) The signal diagram can be displayed in either YT mode for use in analysis and visualization. These diagrams of serial data signals are often presented in an eye-like shape and are therefore called eye diagrams. Figure 2 An example of such an eye diagram with an "eye" opening 16 is shown.

[0009] Oscilloscopes typically create eye diagrams over time intervals of two unit intervals (UI), where one UI equals one sign interval on the waveform display time axis. In these images, sign transitions overlap, causing positive and negative edges to cross on the left side of the display and again on the right side.

[0010] Machine learning (ML) networks or systems typically work well with image data. However, traditional eye diagrams may not perform well in ML networks. Traditional eye diagrams have redundant data points, high overlap across the top and bottom of the signal, and positive edges overlap with negative edges, with intersections. This tends to make the edge shape that defines the system's transfer function tailed and blurred, a situation that becomes particularly pronounced with increasing inter-symbol interference (ISI). Furthermore, these types of diagrams focus on the eye opening in the center of the display as the primary region of interest. To apply ML techniques in this type of situation, the system requires better images.

[0011] The embodiments of the disclosed apparatus and methods address the shortcomings of the prior art. Attached Figure Description

[0012] Figure 1 An example of a Lissajous diagram is shown.

[0013] Figure 2 An example of eye diagram drawing is shown.

[0014] Figure 3 An example of a cyclic loop diagram for a two-level non-return-to-zero (NRZ) signal is shown.

[0015] Figure 4 An example of a cyclic loop image of a 4-level pulse amplitude modulation (PAM4) signal including all loops and all transition levels is shown.

[0016] Figure 5 Images of the six loops separated from the PAM4 loop image are shown.

[0017] Figure 6 Images of different loop plots generated by varying horizontal ramp trigger delays are shown.

[0018] Figure 7 An example of a user interface menu for a loop control block is shown.

[0019] Figure 8 An embodiment of a system for generating PAM4 cyclic loop images and data is shown.

[0020] Figure 9 A graphical representation of the generation of the ramp signal, which occurs only during the transition, is shown.

[0021] Figure 10 An embodiment of a horizontal ramp scan signal generation circuit is shown.

[0022] Figure 11A more detailed embodiment of the horizontal ramp scan generation circuit, including the PAM4 limiter circuit, is shown.

[0023] Figure 12 A graphical representation of the output signal from the PAM4 limiter block is shown.

[0024] Figure 13 A graphical representation of an example of a tensor input to a machine learning system is shown.

[0025] Figure 14 An example of a configuration for incorporating cyclic loop images into machine learning is shown. Detailed Implementation

[0026] The embodiments address the problem of isolating the edges of multi-level signals, such as pulse amplitude modulated signals like PAM4, making system characteristics such as inter-symbol interference (ISI) and reflections more readily available for human observation, measurement, and use in machine learning waveform classification systems. The embodiments describe a unique cyclic loop representation to create images for identifying signals and facilitating certain measurements.

[0027] Cyclic loops are sparser XY image plots compared to typical eye diagrams. The cyclic loops in these embodiments are concentrated on the edges containing most of the information characterizing the system response. For non-return-to-zero (NRZ) signals, there is one closed-loop path. PAM4 signals have three closed-loop paths covering single-level transitions under three vertical offsets, two closed-loop paths covering double-level transitions under two vertical offsets, and one closed-loop path covering three-level transitions without vertical offset. The embodiments provide a means for observing these paths overlapping in a single image, or for separating any of the individual closed-loop paths into separate images. These cyclic loop images are well-suited for input into existing pre-trained neural networks that can adapt to new images, processing and classifying waveforms based on these images.

[0028] For the purposes of this discussion, deep learning is often considered a subset of machine learning (ML), and machine learning is often considered a subset of artificial intelligence (AI). Deep learning neural networks can process images based on system transfer functions for waveform classification. However, these networks require images that are better than traditional eye diagrams. For example, one application using NRZ signals identifies and separates read and write bursts. These bursts have different transfer functions for each operation, including different gains, transmission losses as seen by probes and inserters at memory package locations, and different reflection delays and reflection coefficients. The cyclic loop embodiment here allows for a better view and classification of these properties.

[0029] In other types of serial links used in the electronics industry, there exists a problem of having two different transfer functions depending on the direction of the data flow. The observed difference in transfer functions is partly due to the placement of the oscilloscope probe at one end of the line. At high frequencies, the signal transmitted from the other end experiences high loss through the transmission line. When transmitted by a device at the probe end, the signal does not attenuate with the transmission loss observed by the probe.

[0030] The examples can also be useful in unidirectional signal analysis, especially when performing measurements on waveforms such as reflection delay, reflection coefficient, and waveform linearity. For the latter, the system may be non-stationary and therefore non-linear because the rise time and edge shape of the rising edge compared to the falling edge may differ. Symmetry may also differ. The loop circuitry of the examples provides views that help visualize and analyze various waveform parameters. While the discussion here focuses on PAM4 signals, the examples can be applied to other types of signals.

[0031] The embodiments described here can generate an XY loop plot or image of a PAM4 signal. The vertical Y-axis is the signal itself. The horizontal X-axis consists of a set of linear ramps with positive and negative slopes that appear only at the edge transitions of the input signal. Figure 3 An example of loop 18 is shown. The embodiment here uses a novel processing technique to create a linear or slightly linear ramp scan signal on the X-axis only at all edge transitions in the input data pattern.

[0032] The embodiment here is positioned to trigger these ramps such that the XY signal paths consist of a closed loop containing all rising edges above the upper edge of the loop shown in Figure 3 and all negative edges below the loop. This configuration is used when the clock trigger ramp delay for the PRBS signal is greater than zero. For cases where the delay is less than zero, the negative edges are on the upper path of the loop, and the positive edges are on the lower path. When the clock delay is equal to zero, the positive edges overlap the negative edges, and there is no intermediate region in the loop.

[0033] For machine learning applications and for symmetry observation, the menu system controls allow users to offset the clock to trigger a ramp delay, ensuring that positive and negative edges do not overlap while maintaining repeating cyclic path.

[0034] Since the edges of the system contain much of the information defining the system's transfer function, this simpler plot produces a cyclic loop display that captures all cycles of the waveform in a single plot, while simultaneously eliminating the large number of extraneous data points that would be included in a traditional eye diagram. Depending on the waveform characteristics, the resulting plot may appear similar to a hysteresis BH plot; however, the specific details of the horizontal ramp creation involve unique generation methods and how it is applied to PRBS data patterns.

[0035] Machine learning systems perform better with smaller datasets, a phenomenon sometimes referred to as dimensionality reduction or data shrinking. Figure 4 The resulting simplified loop diagram is shown, which can be used to determine signal properties, among other things, particularly such as system response, nonlinearity of rising edge versus falling edge, ISI, signal-to-noise ratio (SNR), amplitude, reflection delay, reflection coefficient, and rise and fall times.

[0036] As discussed above, the loops used for PAM4 signals are more complex than those used for two-level signals because multiple loops exist for multi-level signals such as PAM4. This is due to the fact that the four signal levels and their edges may only cover single-level, two-level, or three-level transitions, as... Figure 4 As shown in the diagram. Compared to two-level signals like NRZ, multi-level signals like PAM4 may require individually demonstrating the capabilities of various loops, such as... Figure 5 As shown in the illustration. In the context of this disclosure, a "multi-level" signal means a signal that uses more than two levels to encode symbols.

[0037] Figure 5 Any of the six loops shown can be selected and overlaid on a single drawing. This includes all six loops contained on a single drawing, or any combination of some of the loops, for example, as can be selected from the menu settings. This is discussed below. Figure 7 An example of a menu is shown.

[0038] If the ramp clock delay is less than zero, the sorting direction around the loop is counterclockwise, with the falling edge at the top left corner of the loop and the rising edge at the bottom right corner. Those skilled in the art will recognize that, in alternative embodiments, the sorting direction around the loop can be reversed.

[0039] If the clock delay is zero, the positive and negative edges overlap, as in... Figure 6 As shown in the left-hand diagram. As the ramp-triggered clock delay increases, the distance between the rising and falling edges increases with the positive edge on the left and the negative edge on the right. As the ramp delay becomes negative, the distance between the two edges increases again, but the negative edge is on the left and the positive edge is on the right.

[0040] As previously mentioned, user controls can be used to change the clock ramp trigger delay to manually separate the edges for observation, measurement, and symmetry comparison, etc.

[0041] The cyclic loop collects data from the gating point to the display for the full long record length. All samples within this interval are plotted on the display. The XYZ version of the acquired data can be saved and retained for use with the cursor and measurements. It can be rendered as a standard YT plot or as a cyclic loop image.

[0042] For PAM4 signals, the vertical amplitude transitions between different levels from one UI interval to the next. There are four levels. The ramp used for scanning is generated only during the edge transitions of the PAM4 input signal. When there is no edge transition, no ramp is generated from one UI to the next. This means that all data points drawn during UI intervals without edges will appear around two localized locations on the left or right side of the display and will be at one of the four vertical levels in the PAM4 signal.

[0043] During the UI intervals where edge transitions occur, a ramp for the horizontal axis will be generated, and the edge will be drawn on the display from left to right or from right to left, depending on whether the edge is positive or negative.

[0044] The examples here allow users to make selections from menus or other user interfaces. Figure 7 An example of such a user interface is shown. As discussed below, this embodiment serves as an example of a user interface. It is not intended to, and should not, imply any limitation on this configuration, as the user interface may include additional controls and options, or contain fewer controls and options than shown herein. Furthermore, while the user interface provides one option, other implementations may involve a cyclic loop generated by a system without menus or user interaction. The system may automatically select the portion of the incoming waveform to use. In either case, the user-made or automatically selected input will be referred to herein as “input” to identify the portion of the waveform used to generate the cyclic loop image.

[0045] like Figure 7 As shown, the user interface contains a menu control structure with a PAM4 loop. This menu can be embedded into the oscilloscope application, or it can be implemented as a software application running independently of the oscilloscope (such as on a connected computing device). The application can control and interact with the oscilloscope. It can run on the oscilloscope processor's operating system, it can run on separate computing devices distributed between two systems (each of which may have several processors), or it can run as a web-based cloud application, and so on.

[0046] The top of the user interface can display a YT plot, which graphically shows the input PAM4 waveform as amplitude relative to time, as in a standard oscilloscope display. This plot can be an oscilloscope display, or it can be a separate plot controlled by the application. The plot can have all types of controls and settings, such as grids, zoom, colors, labels, etc., as expected in standard waveform plots.

[0047] The user interface can display a minimum single-loop plot. However, any number of plots can exist simultaneously, each with different selections of the included loops or from different acquisitions. These plots can have all the standard parameter controls typically associated with plotting. The Y-axis consists of the input signal from a gated input waveform, discussed in more detail below. The X-axis consists of a waveform containing a linear ramp at the UI (unit interval) position, where the input signal is located. y (n) It has edge conversion.

[0048] On the YT display, the gate controls for G1 and G2 can have cursors associated with them. These controls and associated cursors specify the input waveform segments to be plotted into the loop. They allow the user to manually specify the gating interval to be included in the loop. A second tab for "Trigger Options" allows any type of algorithm or measurement to be used to position G1 and G2. This allows for the incorporation of automated methods to determine the YT waveform segments to be gated into the loop. For example, it can allow the system to detect active data bursts in one direction and detect active data bursts in the opposite direction. The trigger can have the ability to indicate which direction, or it can have the ability to identify different data bursts. In the latter case, a neural network can be used to analyze the loop and determine what type of burst it is.

[0049] The user interface may include X, Y, and T cursors, with appropriate data values ​​read out at positions marked by the three cursor positions in the waveform sample space. The X and Y cursors will be present on the XY loop plot, and the T cursor will mark the time position on the YT plot. Cursor position readouts are located in a menu marked with appropriate units. Users can control the cursors in a manner typical of oscilloscopes, using a mouse or touchscreen, a knob, an edit box, a PI (programmable interface), commands, etc.

[0050] As discussed above, PAM4 signals or other multilevel signals have multiple loops. Figure 7 The example user interface contains a set of six checkboxes for selecting which of the six possible cyclic loops appears on the cyclic loop image. Any combination can be examined, and thus selected to be included in the drawing.

[0051] Such as about Figure 8 , Figure 10 and Figure 11 The system discussed generates a horizontal ramp to be applied to the input waveform. The horizontal ramp control section can include delay and duration settings. The delay allows the user to adjust the amount of time relative to the recovery ramp trigger that determines when the ramp begins. Adjusting this control will increase or decrease the horizontal distance between the rising and falling edges in the cyclic loop image, allowing for separate analysis of them, such as... Figure 6 As shown in the image.

[0052] Ramp duration control adjusts the ramp duration by changing the slope. The default ramp duration is equal to one UI, i.e., one symbol interval. However, for signals with very fast rise times relative to the width of the UI interval, it may be desirable to reduce the ramp time to exclude the loop trace extending to the high level. For machine learning and human observation purposes, this allows edge transitions to become the main focus of the cyclic loop. All waveform samples are still included in the cyclic loop image, but more of them now remain at the edges of the displayed image.

[0053] File export control allows users to export files, such as saving loop images, XYT files, or YT files.

[0054] Figure 7 Examples of other controls not shown may include XY and YT image scaling and panning, as well as interpolation sampling rates. XY plotting may also have typical scaling and panning adjustments, allowing for image management for better human observation and better machine learning resolution for waveform edge characteristics. The interpolation control will allow the user to select either the interpolation or decimation rate. This control will adjust the sampling rate of the stored waveform.

[0055] Partly based on user selection, the system can generate loop images and associated data. Figure 8 An embodiment of a system is illustrated, which can generate a cyclic loop image for display and / or make the cyclic loop image data available to a machine learning system to allow determination of the nature or properties of a signal associated with the cyclic loop image. At 20, an analog signal is received at the input circuitry. The analog signal can come from a probe attached to the device under test (DUT). The input circuitry can take various forms, but will include an analog-to-digital (A / D) converter, such as 20, which receives the input signal. y(t) Converted into sampled digital waveform signals y(n)In an alternative embodiment, the analog-to-digital converter stage 20 may be optional, and the input digital waveform signal y(n) may be received directly at 27, such as from a stored waveform file. This signal may undergo further processing at the input circuitry, including removing the DC offset from the signal. Typically, this can be achieved by removing the average value of the signal at 22. Furthermore, as previously mentioned, the signal may undergo interpolation or decimation at 24 to adjust the sampling rate, either to fill the path or to reduce the amount of data to be processed.

[0056] Then, the horizontal ramp generator 25 receives the digital waveform to generate a ramp for use as X-axis data in the loop. This can consist of a set of operations executed by a processor that can recover the clock from the digital waveform and / or limit and shape the data, and use appropriate logic and gating to trigger a linear ramp that appears during each transition in the waveform. For unit intervals in the waveform without edge transitions, no generated ramp will exist. The ramp can have a constant amplitude and a constant slope. The slope controls the duration, which defaults to one UI. The user can have control to adjust this duration. This is good for waveforms with fast rise times relative to the UI duration, as it eliminates long high levels from the loop. This optimizes the view of the edges, which are the central regions of focus in the loop, compared to a conventional eye diagram. The user can adjust the time offset of the ramp relative to the recovered clock edge, such as... Figure 7 As shown in the menu. This allows users to isolate the edges in the loop so that the rising edge does not overlap the top of the falling edge, and optimizes the view of the edges in the loop for measurement and symmetry comparison purposes. It is also helpful when using loop images in deep learning neural networks or other machine learning systems for waveform image classification or determining waveform properties. Figure 6 The effect of adjusting this delay is shown.

[0057] Trigger / gated mode detector 26 also from Figure 7 The user interface discussed in section 38 receives signals and user input. The trigger / gating block allows the user to set a gating cursor on the incoming digital waveform to specify the amount and position of data that should be incorporated into the loop for displaying the image. Other methods, such as searching and marking, or automated algorithms, can be used to determine which portion of the waveform enters the loop.

[0058] Pulse gate 30 determines which data enters the cyclic database via XYZ memory 32. In this embodiment, gating / trigger block 26 supplies 1 or 0 to a multiplier that controls when data begins and stops flowing to memory 32 and / or display 46. This is represented in the block diagram as a multiplier to determine what data enters the cyclic database. The gating / trigger block supplies one or zero to the multiplier, which controls when data begins and stops flowing to memory 32 and / or display 46. The resulting data portion may be referred to as a gated waveform, consisting of Y-axis data and X-axis data.

[0059] Figure 9 An example of the operation of the PAM4 waveform 52 and the ramp signal generator 25 is shown. The ramp signal generator 25 generates a ramp scan signal 50 based on triggers 54 and 56. Triggers 54 and 56 are derived from a combination of clock edges and digital waveform data 52. This will be referred to as a ramp scan signal in the discussion here because it comprises multiple ramps that scan across a specified time interval for data capture. The trigger pulse is either positive at 54 or negative at 56. The polarity of the pulse determines the ramp slope of the X-axis data to be generated for loop plotting.

[0060] The XYZ memory 32 stores gated waveform data as an XYZ dataset. The X data consists of a ramp set generated as a function of time. The Y dataset consists of input data waveform samples as a function of time. The Z data consists of time axis increments between samples. The dataset is maintained for use with cursor and measurement and waveform export functions. It also serves as a data source for rendering to a cyclic loop image database. The Z data vector can be simply stored as a single time and a starting value time for each sampling interval. An array index of the other data multiplied by the time (that sampling interval plus the starting value) provides the time position value for each sample in the YT waveform.

[0061] Image rendering block 34 may involve processing performed by a processor represented by system processor 48. The system processor may include one or more processors located on a test and measurement device such as an oscilloscope, on a separate computing device, or distributed among two or more processors. The processor executes code that causes it to map XYZ data into a cyclic loop image, which may be displayed on display 46 and / or stored in memory 36. The cyclic loop image may consist of XY data. The number of loops can be determined based on user input 38. The cyclic loop image can also be exported to a file for use in a deep learning waveform classification algorithm or other machine learning system input at 44. Image rendering block 34 receives user input from menu system 38 to specify which of six loop paths is included in the cyclic loop image. Any combination of loops can be specified.

[0062] In addition to generating the cyclic loop image, the system can perform measurements on XYZ memory data or cyclic loop image data at 40 points. Examples of measurements include rise time, fall time, reflection coefficient, reflection delay, amplitude, SNR, ISI signal due to signal loss, symmetry and nonlinearity, BER (bit error rate), loop width, loop height, jitter, TDECQ (transmitter dispersive eye closure, four-phase), and more. The system can combine measurements with the cyclic loop image provided to the machine learning system at 42 points, such as by associating (one or more) measurements with the cyclic loop image as metadata.

[0063] The machine learning system 44 may be capable of receiving cyclic loop image files and then, for example, classifying the waveforms. An example use case could be identifying read cycles versus write cycles during transmission, where the system transfer function differs between the two operations. For example, based on read versus write operations, a probe point at one end of the system might see different reflection delays and different loss shapes. Furthermore, it may be possible to classify the waveforms based on other measurements—such as BER or SNR or other possible measurements. The display 46 may display a plot of the waveform in a standard YT view and one or more XY plots of the cyclic loop image data. The plots will have standard plotting capabilities such as zoom, cursor, markers, color, grid control, etc.

[0064] All parts of the system can be controlled by the system controller 48. This can be the system's main processor. It can be a processor array or a processor network. Alternatively, it can consist of multiple processors of potentially different forms, such as FPGAs, GPUs, discrete circuits, or cloud-based processors.

[0065] Figure 10 and Figure 11 Different embodiments of the horizontal ramp generator 25 are shown. For the purpose of simplifying the illustrations, Figure 10 and Figure 11 Only the components of the embodiment and how they are connected to the rest of the overall system are shown.

[0066] Figure 10A second analog-to-digital converter 62 is shown that receives an external explicit clock input, and the digitized clock input can be stored in memory 64. This clock edge changes on each UI. However, any ramp trigger pulse position based on this clock must be gated by logic based on PAM4 levels and symbol sequences. A standard PAM4 clock recovery 60 represents the clock recovery system. The recovered clock edge appears within each UI. However, any ramp trigger pulse position based on this clock must be gated by logic based on PAM4 levels and symbol sequences. A clock multiplexer 66 selects between the explicit clock and the recovered clock. A limiter or gate 68 creates the ramp trigger position. However, inputting either the explicit clock or the PAM4 recovered clock will result in triggering on all clock transitions. This block 68 can take the form of logic circuitry or can be implemented in code executed by a processor.

[0067] Check block 68 for the passed-in data. y(n) The signal is processed to determine whether the clock edge should pass. The resulting output signal will then have a positive trigger pulse to trigger a positive ramp from low to high. If the pulse is negative, a negative ramp from high to low should be generated. y(n) If there is no edge transition within the UI in the signal, no trigger pulse will appear.

[0068] Derivative block 70 ensures that the clock edges and levels gated as true are transformed into trigger pulses for each clock edge. The derivative signal generated by block 70 returns to zero after each clock edge. This creates a stream of trigger pulses, thus marking the reference position for each ramp to be generated. The polarity of the pulse indicates the slope of the ramp. Figure 9 As shown, a positive pulse results in a positive slope, and a negative pulse results in a negative slope.

[0069] For this system, ramp generator 72 receives a stream of trigger pulses. When the trigger pulse is positive, it generates a positive ramp from low to high. When the trigger pulse is negative, it generates a negative ramp from high to low. When there is no edge transition in the UI, the ramp output remains high or low, depending on what it was like for the previous UI. This is because no trigger pulse is created during these intervals. If it is high, the output remains high. If it is low, the output remains low. The signal obtained from 72 then enters... Figure 8 The pulse gate 30 shown.

[0070] Figure 11An alternative embodiment of the horizontal ramp generator 25 is shown. An optional multiplexer 80 indicates that the input signal y(n) can be a continuous real-time stream from the output of the analog-to-digital converter 20, or it can originate from an acquisition memory such as 82. Memory 82 represents a storage device for intermediate waveform results. Memory 82 can be a centralized memory, or it can represent several different memories distributed throughout the system. If the system is designed for real-time streaming, waveform memory will not be used, and all processes will occur within the time interval between samples. Real-time streaming will only be practical for lower sampling rates relative to processor speed.

[0071] Another multiplexer 83 can be used to select whether the ramp trigger is directly from the input signal. y(n) Exporting from the source, or whether a restored clock should be used. For Figure 11 In this system implementation, the restored clock switches within each UI and will only be used for NRZ type input signals. Another multiplexer 92 selects whether to use the output of the NRZ limiter or whether to use the output of the PAM4 limiter when determining the ramp trigger position. The embodiments described here can be extended to more or fewer levels and thresholds, even though the example discussed is for a PAM4 with four levels and three thresholds.

[0072] Block 90 illustrates an embodiment, which will be referred to here as a PAM4 limiter. The limiter converts an incoming waveform with ISI and noise into a clean, square-looking PAM4 signal. The output signal of the PAM4 limiter still contains four PAM4 levels and transitions. This is crucial because it's a mechanism that allows a ramp to be triggered only during the UI interval where an edge transition is present, and not during intervals without transitions. Figure 12 As shown, the PAM4 limiter receives input parameters from the PAM4 control block 86 in the level and threshold controller 84. These input parameters are typically voltage levels representing the four levels L1-L4 and three threshold levels th1, th2, and th3 of the PAM4 signal, where level-to-level transitions occur. The PAM4 limiter also receives input parameters from the output of the mux 83. y(n) The input signal is used as input. The PAM4 limiter can also receive the NRZ signal 88 from the level and threshold controller 84. The input signal y(n) is then processed according to comparators and logic, which are shown as a combination of comparators, inverters, multipliers, and adders. The output of the adder is an ideal clean version of the PAM4 signal. The logical formula for the PAM4 limiter output signal cc(n) in Mathcad format is expressed as:

[0073] .

[0074] Figure 12 As shown cc The derivative of the waveform is then calculated as shown in 94. This creates a positive pulse wherever a positive transition occurs in cc. It creates a negative transition wherever a negative transition occurs in cc. The derivative waveform is zero everywhere else. This creates a trigger spike for ramp generator 96. No trigger spikes occur in UI intervals where no transitions occur.

[0075] Cyclic loop images provide useful input for machine learning systems. Cyclic loop images can be organized or formed into individual elements of a tensor. Figure 13 A graphical representation of a cyclic loop image tensor is shown, comprising six XY cyclic loop images organized along the tensor's index i. Each of the six images can be, for example, one of the six possible cyclic loops of a PAM4 signal. Alternatively, in another example, each of the six images can be the same one of the six possible cyclic loops of a PAM4 signal, but each is obtained from six different DUTs. The shape of the edges in each cyclic loop image represents the system's transfer function, thus isolating them makes the transfer function more distinguishable for machine learning systems than a classic eye diagram. Each cyclic loop image of each PAM4 cyclic loop resides in its own layer to isolate the data in each image from the others. All edges of a traditional eye diagram overlap and interfere with each other.

[0076] Figure 14 An alternative configuration for inputting multiple cyclic loop images into a machine learning system is shown. Figure 14 From Figure 13 Each recurrent loop image 1-6 serves as input to a separate first-level neural network that acts as a feature extractor. The second-level neural network then combines the output of the first-level neural network with the output of the second-level neural network for further processing and analysis.

[0077] In this way, data combined with horizontal slope data is used. y(n) Using sample data, a circular loop diagram of XY data is created. Compared to a traditional eye diagram, this diagram contains less data but may contain more information. The system can then provide these diagrams and their associated data to a machine learning system.

[0078] Various aspects of this disclosure can operate on specially created hardware, firmware, digital signal processors, or specially programmed general-purpose computers including processors that operate according to programmed instructions. As used herein, the terms controller or processor are intended to include microprocessors, microcomputers, application-specific integrated circuits (ASICs), and special-purpose hardware controllers. One or more aspects of this disclosure can be embodied in computer-usable data and computer-executable instructions, such as one or more program modules executed by one or more computers (including monitoring modules) or other devices. Typically, program modules include routines, programs, objects, components, data structures, etc., which perform specific tasks or implement specific abstract data types when executed by a processor in a computer or other device. Computer-executable instructions can be stored on a non-transitory computer-readable medium, such as a hard disk, optical disk, removable storage medium, solid-state memory, random access memory (RAM), etc. As those skilled in the art will appreciate, the functionality of program modules can be combined or distributed in various ways as desired. Furthermore, this functionality can be wholly or partially embodied in firmware or hardware equivalents, such as integrated circuits, FPGAs, etc. Specific data structures can be used to more efficiently implement one or more aspects of this disclosure, and such data structures are envisioned within the scope of the computer-executable instructions and computer-available data described herein.

[0079] In some cases, the disclosed aspects may be implemented using hardware, firmware, software, or any combination thereof. The disclosed aspects may also be implemented as instructions carried or stored thereon on one or more non-transitory computer-readable media, which may be read and executed by one or more processors. Such instructions may be referred to as a computer program product. As discussed herein, a computer-readable medium means any medium that can be accessed by a computing device. By way of example and not limitation, a computer-readable medium may include computer storage media and communication media.

[0080] Computer storage media means any medium that can be used to store computer-readable information. By way of example and not limitation, computer storage media may include RAM, ROM, electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, compact disc read-only memory (CD-ROM), digital video disc (DVD) or other optical disc storage devices, cassette tape, magnetic tape, disk storage devices or other magnetic storage devices, and any other volatile or non-volatile, removable or non-removable medium implemented in any technology. Computer storage media does not include the signal itself or the temporary form of signal transmission.

[0081] Communication medium means any medium that can be used for communication of computer-readable information. By way of example and not limitation, communication medium may include coaxial cable, fiber optic cable, air, or any other medium suitable for communication of electrical, optical, radio frequency (RF), infrared, acoustic, or other types of signals.

[0082] Additionally, this written description refers to a specific feature. It should be understood that the disclosure in this specification includes all possible combinations of those specific features. For example, where a specific feature is disclosed in the context of a particular aspect, that feature can also be used in the context of other aspects to the greatest extent possible.

[0083] Furthermore, when a method having two or more defined steps or operations is referenced in this application, the defined steps or operations may be performed in any order or simultaneously, unless the context precludes those possibilities.

[0084] Example

[0085] Illustrative examples of the disclosed technology are provided below. Embodiments of the technology may include one or more of the examples below, as well as any combination thereof.

[0086] Example 1 is a system including an input for receiving a digital waveform signal, a memory, and one or more processors configured to execute code such that the one or more processors: generate a horizontal ramp scan signal based on the digital waveform signal; receive a selection input to identify segments of the digital waveform signal; gate the horizontal ramp scan signal and the digital waveform signal based on the selection input to generate cyclic loop image data of the digital waveform segments; store the cyclic loop image data in the memory; and provide the cyclic loop image data as one or more inputs to a machine learning system.

[0087] Example 2 is the system of Example 1, wherein the memory includes an XYZ memory for storing a horizontal ramp scan signal as a function of time as X-axis data, a digital waveform signal as a function of time as Y-axis data, and time axis time increments between data samples as Z-axis data.

[0088] Example 3 is a system of either Example 1 or 2, wherein the digital waveform signal comprises a digital representation of a signal modulated according to a multilevel modulation scheme acquired from the device under test.

[0089] Example 4 is a system of any one of Examples 1 to 3, wherein one or more processors reside on a single computing device or are distributed between the computing device and test and measurement instruments.

[0090] Example 5 is a system of any one of Examples 1 to 4, wherein the input includes input circuitry that includes an analog-to-digital converter for receiving analog input signals from the device under test and generating digital waveform signals.

[0091] Example 6 is a system of any one of Examples 1 to 5, for a subtraction block to remove DC offset from a digital waveform signal, and an interpolator to adjust the sampling rate of the digital waveform signal.

[0092] Example 7 is a system of any one of Examples 1 to 6, wherein the one or more processors are further configured to execute code that causes the one or more processors to perform measurements on the cyclic loop image data.

[0093] Example 8 is the system of claim 7, wherein the one or more processors are further configured to execute code that causes the one or more processors to combine the cyclic loop image data with measurements before providing the cyclic loop image data to the machine learning system.

[0094] Example 9 is a system of any one of Examples 1-7, further including an external clock input for receiving an external clock; a clock analog-to-digital converter for generating a digital external clock; a clock recovery circuit for generating a recovered clock; and a multiplexer for selecting between the digital external clock and the recovered clock.

[0095] Example 10 is any one of Examples 1-9, wherein the code that causes the one or more processors to provide cyclic loop image data to the machine learning system includes code that causes the one or more processors to form tensors of a plurality of cyclic loop images and provide the tensors as input to the machine learning system.

[0096] Example 11 is any one of Examples 1-10, wherein the one or more processors are further configured to execute code that causes the one or more processors to render cyclic loop image data as one or more cyclic loop images on a display.

[0097] Example 12 is a waveform classification method using a cyclic loop image, comprising: receiving an input waveform; receiving a selection of an input waveform segment; transforming the input waveform segment into cyclic loop image data, the transformation comprising generating a horizontal ramp scan signal based on edge transitions in the input waveform; storing the cyclic loop image data in a memory; and sending the cyclic loop image data to a machine learning system to determine the properties of the input waveform.

[0098] Example 13 is a method of Example 12, which further includes rendering cyclic loop image data as one or more cyclic loop images on a display.

[0099] Example 14 is a method of Example 13, wherein the input waveform includes a digital representation of a signal modulated according to a multilevel modulation scheme acquired from the device under test, and the method further includes: receiving a selection of one or more cyclic loops of the multilevel modulation scheme; and rendering only the selected cyclic loops as a cyclic loop image on a display.

[0100] Example 15 is a method of any of Examples 11-14, further including performing measurements on the cyclic loop image data.

[0101] Example 16 is a method of any of Examples 11-15, further including combining the measurement and the cyclic loop image data before sending the cyclic loop image data to the machine learning system.

[0102] Example 17 is a method of any one of Examples 11-16, further comprising at least one of the following: receiving an analog input signal from the device under test and converting the analog input signal into a digital signal as an input waveform using an analog-to-digital converter; subtracting the average value of the input waveform to produce an input waveform without DC offset; and interpolating the input waveform to adjust the sampling rate of the input waveform.

[0103] Example 18 is a method of any of Examples 11-17, wherein generating a horizontal ramp scan signal based on edge transitions in the input waveform includes selectively sending a trigger signal based on edge transitions.

[0104] Example 19 is a method of any of Examples 11-18, wherein transforming the input waveform segment into cyclic loop image data further includes receiving a horizontal ramp clock delay.

[0105] Example 20 is a system comprising: input circuitry for receiving an input waveform signal from a device under test, the input circuitry including an analog-to-digital converter for generating a digital waveform signal; a selection input for identifying a segment of the digital waveform signal; a ramp signal generator for generating a horizontal ramp signal based on data in the digital waveform signal segment; a trigger for triggering the capture of data samples in the digital waveform signal segment associated with the horizontal ramp scan signal as gated waveform signal data; a display for displaying the gated waveform signal data as one or more cyclic loop images; and a machine learning system using one or more cyclic loop images as input.

[0106] All features disclosed in the specification—including the claims, abstract, and drawings, and all steps in any disclosed method or process—may be combined in any combination, except for at least some mutually exclusive combinations of such features and / or steps. Unless otherwise expressly stated, each feature disclosed in the specification (including the claims, abstract, and drawings) may be replaced by an alternative feature for the same, equivalent, or similar purpose.

[0107] While specific aspects of this disclosure have been illustrated and described for illustrative purposes, it should be understood that various modifications may be made without departing from the spirit and scope of this disclosure. Therefore, this disclosure should not be limited except as defined by the appended claims.

Claims

1. A system for cyclic loop images, comprising: Receives input digital waveform signals; Memory; and One or more processors are configured to execute code such that the one or more processors: Horizontal ramp scanning signal is generated based on digital waveform signal; Receive selection input to identify digital waveform signal segments; Based on the selected input, the horizontal ramp scan signal and the digital waveform signal are gated to generate cyclic loop image data of digital waveform segments; The cyclic loop image data is stored in a memory; as well as The cyclic loop image data is provided as one or more inputs to the machine learning system.

2. The system according to claim 1, wherein, The memory includes an XYZ memory for storing horizontal ramp scan signals as a function of time as X-axis data, digital waveform signals as a function of time as Y-axis data, and time increments between data samples as Z-axis data.

3. The system according to claim 1, wherein, The digital waveform signal includes a digital representation of a signal modulated according to a multi-level modulation scheme and acquired from the device under test.

4. The system according to claim 1, wherein, The one or more processors reside on a single computing device or are distributed between the computing device and test and measurement instruments.

5. The system according to claim 1, wherein, The input includes an input circuit, which includes an analog-to-digital converter for receiving analog input signals from the device under test and generating digital waveform signals.

6. The system according to claim 1, wherein, The input includes at least one of the following: The subtraction block is used to remove the DC offset from the digital waveform signal; and Interpolators are used to adjust the sampling rate of digital waveform signals.

7. The system according to claim 1, wherein, The one or more processors are further configured to execute code that causes the one or more processors to perform measurements on the cyclic loop image data.

8. The system according to claim 7, wherein, The one or more processors are further configured to execute code that causes the one or more processors to combine the cyclic loop image data with measurements before providing the cyclic loop image data to the machine learning system.

9. The system according to claim 1, further comprising: External clock input, used to receive an external clock; A clock analog-to-digital converter (ADC) is used to generate a digital external clock. Clock recovery circuit, used to generate a recovered clock; and A multiplexer is used to select between a digital external clock and a recovery clock.

10. The system according to claim 1, wherein, The code that causes the one or more processors to provide cyclic loop image data to the machine learning system includes code that causes the one or more processors to form tensors of multiple cyclic loop images and to provide the tensors as input to the machine learning system.

11. The system of claim 1, further comprising a display, wherein, The one or more processors are further configured to execute code that causes the one or more processors to render cyclic loop image data as one or more cyclic loop images on a display.

12. A waveform classification method using cyclic loop images, comprising: Receive input waveform; Receive the selection of the input waveform segment; The input waveform segment is transformed into cyclic loop image data, and the transformation includes generating a horizontal ramp scan signal based on edge transitions in the input waveform. Store the cyclic loop image data in memory; and The cyclic loop image data is sent to a machine learning system to determine the properties of the input waveform.

13. The method of claim 12, further comprising rendering the loop image data as one or more loop images on a display.

14. The method according to claim 13, wherein, The input waveform includes a digital representation of a signal modulated according to a multi-level modulation scheme and acquired from the device under test. The method further includes: Receive selection of one or more cyclic loops for a multilevel modulation scheme; and Only the selected loop is rendered as a loop image on the monitor.

15. The method of claim 12, further comprising performing measurements on the cyclic loop image data.

16. The method of claim 15, further comprising combining the measurement and the cyclic loop image data before sending the cyclic loop image data to the machine learning system.

17. The method of claim 12, further comprising at least one of the following: Receive analog input signals from the device under test and use an analog-to-digital converter to convert the analog input signals into digital signals as input waveforms; Subtract the average value of the input waveform to produce an input waveform without DC offset; and Interpolate the input waveform to adjust its sampling rate.

18. The method according to claim 12, wherein, Generating a horizontal ramp scan signal based on edge transitions in the input waveform includes selectively sending trigger signals based on edge transitions.

19. The method according to claim 12, wherein, The input waveform segment is transformed into cyclic loop image data, which further includes a received horizontal ramp clock delay.

20. A system for cyclic loop images, comprising: An input circuit is used to receive an input waveform signal from the device under test, the input circuit including an analog-to-digital converter for generating a digital waveform signal; Select input to identify digital waveform signal segments; A ramp signal generator for generating horizontal ramp signals based on data in a digital waveform signal segment; A trigger is used to capture data samples from a digital waveform signal segment associated with a horizontal ramp scan signal as gated waveform signal data. A display used to show gated waveform signal data as one or more cyclic loop images; as well as A machine learning system that uses one or more cyclic loop images as input.

Images