Display panel, manufacturing method thereof, and display device
By setting up isolation components and encapsulation layers around the display panel, the problem of moisture and oxygen entering the display area is solved, thereby improving the display effect and reliability of the display panel.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- BOE TECHNOLOGY GROUP CO LTD
- Filing Date
- 2021-04-29
- Publication Date
- 2026-06-19
Smart Images

Figure CN115669271B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of display technology, and in particular to a display panel, a method for manufacturing the same, and a display device. Background Technology
[0002] OLED (Organic Light-Emitting Diode) features active light emission, high brightness, high resolution, wide viewing angle, fast response speed, low energy consumption, and flexibility. Therefore, OLED-based display technology has the potential to replace LCD technology as the next generation of display technology. Summary of the Invention
[0003] According to one aspect of the present disclosure, a display panel is provided, comprising: a substrate including a display area and a peripheral area surrounding the display area; an isolator located in the peripheral area, the isolator including at least one isolating portion at least partially surrounding the display area, each isolating portion including a first isolating layer and a second isolating layer sequentially stacked on the substrate, a first orthographic projection of the first isolating layer on the substrate being located within a second orthographic projection of the second isolating layer on the substrate; a cathode including: a first cathode portion located on the side of the isolator close to the display area, and a second cathode portion located on the side of the isolator away from the display area and spaced apart from the first cathode portion; and an encapsulation layer located on the side of the cathode away from the substrate, including a first inorganic layer, a second inorganic layer, and an organic layer located between the first inorganic layer and the second inorganic layer, wherein the edges of the orthographic projections of the first inorganic layer on the substrate, the edges of the orthographic projections of the organic layer on the substrate, and the edges of the orthographic projections of the second inorganic layer on the substrate overlap.
[0004] In some embodiments, the peripheral area includes a binding area and an unbinding area other than the binding area, the binding area surrounding a first edge of the edge of the display area, and the unbinding area surrounding a second edge of the edge other than the first edge; and each isolation portion includes a first isolation portion located in the unbinding area and surrounding the second edge.
[0005] In some embodiments, each isolation portion further includes: a second isolation portion located in the binding area and connected to one end of the first isolation portion; and a third isolation portion located in the binding area and connected to the other end of the first isolation portion, wherein both the third isolation portion and the second isolation portion extend in a direction away from the display area.
[0006] In some embodiments, the display panel further includes: pads located in the bonding area; and at least one dike located in the bonding area and between the first edge and the pads, the at least one dike extending in a direction from the second isolation portion to the third isolation portion. The encapsulation layer is located on a side away from the substrate, the orthographic projection of the pads on the substrate is outside the orthographic projection of the encapsulation layer on the substrate, and the orthographic projection of the at least one dike on the substrate is inside the orthographic projection of the encapsulation layer on the substrate.
[0007] In some embodiments, the at least one dike is located between the cathode and the pad.
[0008] In some embodiments, the at least one cofferdam includes a plurality of cofferdams arranged in a direction from the first edge to the pad.
[0009] In some embodiments, the display panel further includes: an colloid portion located in the bonding area and between the at least one dam and the pad; an colloid layer located on the side of the encapsulation layer away from the substrate; and a cover plate located on the side of the colloid layer away from the substrate.
[0010] In some embodiments, each isolation portion further includes: a third isolation layer located between the first isolation layer and the substrate, wherein the first orthographic projection is located within the third orthographic projection of the third isolation layer on the substrate.
[0011] In some embodiments, each isolation portion further includes a support layer located between the third isolation layer and the substrate, wherein the first orthographic projection, the second orthographic projection, and the third orthographic projection are located within the orthographic projection of the support layer on the substrate.
[0012] In some embodiments, each isolation portion further includes: a first conductive portion located on the side of the second isolation layer away from the substrate, wherein the orthographic projection of the first conductive portion on the substrate is within the second orthographic projection.
[0013] In some embodiments, the display panel further includes: a power line located in the peripheral area, the power line being located between the support layer and the substrate and connected to each isolation portion; and a second conductive portion located between the isolation member and the display area, and between the first cathode portion and the power line, the second conductive portion contacting the first cathode portion and connected to the power line.
[0014] In some embodiments, the display panel further includes: a first insulating layer including a first insulating portion located in the peripheral area, the first insulating portion being located between the support layer and the power line; a second insulating layer including a second insulating portion located in the peripheral area, the second insulating portion being located between the support layer and the first insulating portion; a third insulating layer including a third insulating portion located in the peripheral area, the third insulating portion being located between the support layer and the third isolation layer; and a fourth insulating layer including a fourth insulating portion located in the peripheral area, the fourth insulating portion being located between the second isolation layer and the first conductive portion; wherein each isolation portion further includes: a first connecting portion penetrating the second insulating portion and the first insulating portion and connected to the support layer and the power line; a second connecting portion penetrating the third insulating portion and connected to the third isolation layer and the support layer; and a third connecting portion penetrating the fourth insulating portion and connected to the first conductive portion and the second isolation layer.
[0015] In some embodiments, the display panel further includes: a connection layer located between the second conductive portion and the power line, and between the isolator and the display area; the connection layer includes: a first connection layer located between the second conductive portion and the power line; a second connection layer located between the second conductive portion and the first connection layer; at least one fourth connection portion penetrating the second insulating portion and the first insulating portion, and connected to the first connection layer and the power line; at least one fifth connection portion penetrating the third insulating portion, and connected to the second connection layer and the first connection layer; and at least one sixth connection portion penetrating the fourth insulating portion, and connected to the second conductive portion and the second connection layer.
[0016] In some embodiments, the orthographic projection of the first connecting layer on the substrate lies within the orthographic projection of the second connecting layer on the substrate.
[0017] In some embodiments, the first connecting portion and the support layer are integrally disposed; the second connecting portion and the third isolation layer are integrally disposed; the third connecting portion and the first conductive portion are integrally disposed; the at least one fourth connecting portion and the first connecting layer are integrally disposed; the at least one fifth connecting portion and the second connecting layer are integrally disposed; and the at least one sixth connecting portion and the second conductive portion are integrally disposed.
[0018] In some embodiments, the cathode further includes a third cathode portion located on the side of each isolation portion away from the substrate and spaced apart from the first cathode portion and the second cathode portion.
[0019] In some embodiments, the at least one isolation portion includes a plurality of isolation portions, and the cathode further includes a fourth cathode portion located between two adjacent isolation portions among the plurality of isolation portions and spaced apart from the third cathode portion.
[0020] In some embodiments, the display panel further includes a functional layer located between the cathode and the substrate, the functional layer including at least one of an electron transport layer and an electron injection layer, the functional layer including: a first functional portion located on the side of the isolator close to the display area; and a second functional portion located on the side of the isolator away from the display area and spaced apart from the first functional portion.
[0021] In some embodiments, the edge of the first orthographic projection near the display area does not overlap with the edge of the second orthographic projection near the display area; and the edge of the first orthographic projection away from the display area does not overlap with the edge of the second orthographic projection away from the display area.
[0022] In some embodiments, the minimum distance between the edge of the first orthographic projection and the edge of the second orthographic projection is 1 micrometer to 3 micrometers.
[0023] In some embodiments, the second and third isolation layers are made of titanium, and the first isolation layer is made of aluminum.
[0024] According to another aspect of the present disclosure, a method for manufacturing a display panel is provided, comprising: providing a substrate, the substrate including a display area and a peripheral area surrounding the display area; forming an isolation member located in the peripheral area, the isolation member including at least one isolation portion at least partially surrounding the display area, each isolation portion including a first isolation layer and a second isolation layer sequentially stacked on the substrate, a first orthographic projection of the first isolation layer on the substrate being located within a second orthographic projection of the second isolation layer on the substrate; forming a cathode, the cathode including: a first cathode portion located on the side of the isolation member close to the display area, and a second cathode portion located on the side of the isolation member away from the display area and spaced apart from the first cathode portion; and forming an encapsulation layer on the side of the cathode away from the substrate, the encapsulation layer including a first inorganic layer, a second inorganic layer, and an organic layer located between the first inorganic layer and the second inorganic layer, the edges of the orthographic projections of the first inorganic layer on the substrate, the edges of the orthographic projections of the organic layer on the substrate, and the edges of the orthographic projections of the second inorganic layer on the substrate overlapping.
[0025] In some embodiments, each isolation portion further includes: a third isolation layer located between the first isolation layer and the substrate, wherein the first orthographic projection is located within the third orthographic projection of the third isolation layer on the substrate; a support layer located between the third isolation layer and the substrate, wherein the first, second, and third orthographic projections are located within the orthographic projection of the support layer on the substrate; and a first conductive portion located on the side of the second isolation layer away from the substrate, wherein the orthographic projection of the first conductive portion on the substrate is located within the second orthographic projection.
[0026] In some embodiments, forming the isolation member includes: forming at least one initial isolation member on the substrate, each initial isolation member including the support layer, the third isolation layer, the first initial isolation layer, and the second isolation layer sequentially stacked on the substrate, wherein the orthographic projection of the first initial isolation layer on the substrate is close to the edge of the display area, the orthographic projection of the second isolation layer on the substrate is close to the edge of the display area, and the orthographic projection of the third isolation layer on the substrate is close to the edge of the display area, and the orthographic projection of the first initial isolation layer on the substrate is far from the edge of the display area, and the orthographic projection of the second isolation layer on the substrate is far from the edge of the display area, and the orthographic projection of the third isolation layer on the substrate is far from the edge of the display area; and forming the first conductive portion, and etching at least one of the first side surface of the first initial isolation layer close to the display area and the second side surface far from the display area to form the first isolation layer.
[0027] In some embodiments, forming the first conductive portion and etching at least one of a first side of the first initial isolation layer near the display area and a second side away from the display area includes: forming a fourth insulating portion on the side of the second isolation layer away from the substrate, the fourth insulating portion having an opening that exposes a portion of the side of the second isolation layer away from the substrate, and the fourth insulating portion exposing the first side and the second side; forming a conductive material layer partially located in the opening and covering the first side and the second side; and performing wet etching on the conductive material layer to obtain the first conductive portion partially located in the opening, wherein the wet etching etches at least one of the first side and the second side to obtain the first isolation layer.
[0028] In some embodiments, forming the first conductive portion and etching at least one of a first side of the first initial isolation layer near the display area and a second side away from the display area includes: forming a fourth insulating material layer covering the first side and the second side, the fourth insulating material layer having an opening that exposes a portion of the side of the second isolation layer away from the substrate; forming a conductive material layer partially located in the opening and covering the fourth insulating material layer; performing a first wet etching on the conductive material layer to obtain the first conductive portion partially located in the opening; performing a dry etching on the fourth insulating material layer to expose the first side and the second side; and performing a second wet etching on at least one of the first side and the second side to obtain the first isolation layer.
[0029] In some embodiments, the substrate further includes a sacrificial region, and the method further includes: forming an initial colloid portion on the sacrificial region and the peripheral region, the display area being located within a space defined by the initial colloid portion, the orthographic projection of the initial colloid portion on the substrate being a regular pattern; filling the space with an initial colloid layer after forming the encapsulation layer; forming a cover plate on the side of the initial colloid layer away from the substrate; and performing a cutting process to remove the sacrificial region, the portion of the initial colloid portion located on the sacrificial region, the portion of the initial colloid layer located on the sacrificial region, and the portion of the cover plate located on the sacrificial region, the portion of the initial colloid portion located in the peripheral region being the colloid portion, and the remaining portion of the initial colloid layer being the colloid layer.
[0030] According to another aspect of the present disclosure, a display device is provided, comprising: the display panel described in any of the above embodiments. Attached Figure Description
[0031] The accompanying drawings, which form part of this specification, illustrate embodiments of this disclosure and, together with the specification, serve to explain the principles of this disclosure.
[0032] This disclosure will become clearer with reference to the accompanying drawings and the following detailed description, wherein:
[0033] Figure 1A This is a top view schematic diagram illustrating a display panel according to some embodiments of the present disclosure;
[0034] Figure 1B It shows along Figure 1A The diagram shows the cross-section cut by B-B'.
[0035] Figure 1C This is a schematic diagram illustrating a first orthographic projection and a second orthographic projection according to some embodiments of the present disclosure;
[0036] Figure 1D This is a cross-sectional schematic diagram showing an encapsulation layer according to some embodiments of the present disclosure;
[0037] Figure 2 This is a cross-sectional schematic diagram showing a sub-pixel in a display panel according to some embodiments of the present disclosure;
[0038] Figure 3 This is a top view schematic diagram illustrating a display panel according to other embodiments of the present disclosure;
[0039] Figure 4A yes Figure 3 A magnified view of a portion of the binding area shown;
[0040] Figure 4B It is along Figure 4A A schematic diagram of the cross-section taken at C-C';
[0041] Figure 5 This is a schematic flowchart illustrating a method for manufacturing a display panel according to some embodiments of the present disclosure;
[0042] Figures 6A-6C This is a cross-sectional schematic diagram showing the structure obtained at different stages of forming the isolator according to some implementations of this disclosure;
[0043] Figures 7A-7D This is a cross-sectional schematic diagram showing the structure obtained at different stages of forming the isolator according to some other implementations of this disclosure;
[0044] Figure 8 This is a schematic flowchart illustrating a method for manufacturing a display panel according to other embodiments of the present disclosure;
[0045] Figure 9A and Figure 9B This is a top view schematic diagram illustrating a display panel according to some embodiments of the present disclosure.
[0046] It should be understood that the dimensions of the various parts shown in the accompanying drawings are not necessarily drawn to actual scale. Furthermore, the same or similar reference numerals denote the same or similar components. Detailed Implementation
[0047] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. The descriptions of the exemplary embodiments are merely illustrative and are in no way intended to limit the present disclosure or its application or use. The present disclosure may be implemented in many different forms and is not limited to the embodiments described herein. These embodiments are provided so that the present disclosure will be thorough and complete, and will fully express the scope of the disclosure to those skilled in the art. It should be noted that, unless specifically stated otherwise, the relative arrangement of components and steps, the composition of materials, numerical expressions, and values set forth in these embodiments should be interpreted as exemplary only and not as limiting.
[0048] The terms "first," "second," and similar words used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different parts. Words such as "including" or "containing" mean that the element preceding the word encompasses the element listed after the word, and do not exclude the possibility of encompassing other elements as well. Terms such as "above" and "below" are used only to indicate relative positional relationships, and these relative positional relationships may also change accordingly when the absolute position of the described object changes.
[0049] In this disclosure, when a specific component is described as being located between a first component and a second component, an intermediary component may or may not be present between the specific component and the first or second component. When a specific component is described as connecting to other components, the specific component may be directly connected to the other components without having an intermediary component, or it may not be directly connected to the other components but may have an intermediary component.
[0050] All terms used in this disclosure (including technical or scientific terms) have the same meaning as understood by one of ordinary skill in the art to which this disclosure pertains, unless otherwise specifically defined. It should also be understood that terms defined in a general dictionary, such as a dictionary, should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and not as having an idealized or highly formalized meaning, unless expressly defined herein.
[0051] Techniques, methods, and equipment known to those skilled in the art may not be discussed in detail, but where appropriate, such techniques, methods, and equipment should be considered part of the specification.
[0052] The inventors noted that in related technologies, other layers such as the cathode extend from the display area to the surrounding area, making it easy for water vapor and oxygen to enter the display area through these layers, thereby affecting the display effect of the display panel.
[0053] In view of the above, the present disclosure proposes the following technical solutions.
[0054] Figure 1AThis is a top view schematic diagram illustrating a display panel according to some embodiments of the present disclosure. Figure 1B It shows along Figure 1A The diagram shows a cross-section cut by line B-B'. Figure 1C This is a schematic diagram illustrating a first orthographic projection and a second orthographic projection according to some embodiments of the present disclosure. Figure 1D This is a cross-sectional schematic diagram showing an encapsulation layer according to some embodiments of the present disclosure.
[0055] The following is combined with Figures 1A to 1D A display panel according to some embodiments of the present disclosure will be described.
[0056] like Figure 1A and Figure 1B As shown, the display panel includes a substrate 11, an insulating member 12, a cathode 13, and an encapsulation layer 16.
[0057] See Figure 1A The substrate 11 includes a display area 111 and a peripheral area 112 surrounding the display area 111. Here, the display area 111 is schematically shown as generally circular, and the peripheral area 112 is schematically shown as generally annular. It should be understood that the embodiments disclosed herein are not limited thereto. For example, the display area 111 may be generally heart-shaped or other irregular shapes. For example, the display area 111 may be generally rectangular, and the peripheral area 112 may be generally a rectangular ring. In some embodiments, the substrate 11 may include a flexible substrate, such as a polyimide (PI) substrate.
[0058] Multiple subpixels P of the display panel are located in display area 111. For example, the multiple subpixels P include red subpixels, green subpixels, and blue subpixels.
[0059] The isolation element 12 is located in the peripheral area 112. Here, the isolation element 12 includes at least one isolation portion 121 that at least partially surrounds the display area 111. Figure 1A The diagram shows the case where the isolator 12 completely surrounds the display area 111. It should be understood that when the isolator 12 includes a plurality of isolators 121, the plurality of isolators 121 are spaced apart from each other in the direction from the display area 111 to the peripheral area 112.
[0060] See Figure 1B Each isolation portion 121 includes a first isolation layer 1211 and a second isolation layer 1212 sequentially stacked on the substrate 11. The first orthographic projection 1211' of the first isolation layer 1211 on the substrate 11 is located within the second orthographic projection 1212' of the second isolation layer 1212 on the substrate 11. (See [reference]) Figure 1C In some embodiments, the first insulating layer 1211 is made of aluminum, and the second insulating layer 1212 is made of titanium.
[0061] See also Figure 1B The cathode 13 includes a first cathode portion 131 and a second cathode portion 132 spaced apart from the first cathode portion 131. Here, the first cathode portion 131 is located on the side of the isolator 12 closer to the display area 111, and the second cathode portion 132 is located on the side of the isolator 12 away from the display area 111. In other words, the two portions of the cathode 13 on both sides of the isolator 12 are spaced apart. In some embodiments, the first cathode portion 131 extends from the display area 111 to the peripheral area 112, and multiple sub-pixels P share the first cathode portion 131.
[0062] See Figure 1B The encapsulation layer 16 is located on the side of the cathode 13 away from the substrate 11. See also Figure 1D The encapsulation layer 16 includes a first inorganic layer 161, a second inorganic layer 162, and an organic layer 163 located between the first inorganic layer 161 and the second inorganic layer 162. The edges of the orthographic projections of the first inorganic layer 161, the organic layer 163, and the second inorganic layer 162 onto the substrate 11 overlap. It should be understood that this overlap refers to complete overlap. In other words, the orthographic projections of the first inorganic layer 161, the second inorganic layer 162, and the organic layer 163 onto the substrate 11 are identical.
[0063] In the above embodiment, the peripheral area 112 is provided with an isolation member 12 including at least one isolation portion 121. Each isolation portion 121 includes a first isolation layer 1211 and a second isolation layer 1212. Furthermore, the first cathode portion 131 and the second cathode portion 132 located on both sides of the isolation member 12 are spaced apart. This structure helps to prevent water vapor and oxygen from entering the display area 111 through the cathode 13, thereby reducing the adverse effects of water vapor and oxygen on the display panel and improving the display effect of the display panel.
[0064] In some embodiments, the number of isolation portions 121 in the isolation member 12 is greater than or equal to 7, for example, 15, 20, 25, etc. This more effectively prevents moisture and oxygen from entering the display area 111 through the cathode 13, further improving the display effect of the display panel. In some embodiments, the number of isolation portions 121 in the isolation member 12 is greater than or equal to 30, for example, 35, 40, 50, etc. This more effectively prevents moisture and oxygen from entering the display area 111 through the cathode 13, further improving the display effect of the display panel.
[0065] In some embodiments, the minimum distance between two adjacent isolation portions 121 in the isolation member 12 is greater than or equal to 10 micrometers and less than or equal to 15 micrometers, for example, 12 micrometers, 14 micrometers, etc. In this way, the cathode 13 can be more effectively disconnected into different parts.
[0066] In some embodiments, such as Figure 1C As shown, the edges of the first orthographic projection 1211' and the second orthographic projection 1212' do not overlap. In other words, the side of the first insulating layer 1211 closest to the display area 111 is further away from the display area 111 than the side of the second insulating layer 1212 closest to the display area 111, while the side of the first insulating layer 1211 furthest from the display area 111 is closer to the display area 111 than the side of the second insulating layer 1212 furthest from the display area 111. This is more conducive to isolating the cathode 13.
[0067] As some implementations, the minimum distance between the edge of the first orthographic projection 1211' away from the display area 111 and the edge of the second orthographic projection 1212' away from the display area 111 is 1 micrometer to 3 micrometers, such as 1.5 micrometers, 2 micrometers, 2.5 micrometers, etc. Within this range, the portion of the second isolation layer 1212 not covering the first isolation layer 1211 is less likely to collapse, thereby ensuring that the cathode 13 can be divided into different parts, which can further improve the display effect of the display panel.
[0068] In addition to the first cathode portion 131 and the second cathode portion 132, the cathode 13 can be divided into more portions, which will be described below with reference to different embodiments.
[0069] In some embodiments, see Figure 1B In addition to the first cathode portion 131 and the second cathode portion 132, the cathode 13 also includes a third cathode portion 133. The third cathode portion 133 is located on the side of each isolation portion 121 away from the substrate 11 and is spaced apart from the first cathode portion 131 and the second cathode portion 132. This structure helps to prevent moisture and oxygen from entering the display area 111 through the cathode 13, thereby further reducing the adverse effects of moisture and oxygen on the display panel and further improving the display effect of the display panel.
[0070] In other embodiments, the spacer 12 includes a plurality of spacer portions 121. See also Figure 1B In addition to the first cathode portion 131, the second cathode portion 132, and the third cathode portion 133, the cathode 13 also includes a fourth cathode portion 134. The fourth cathode portion 134 is located between two adjacent isolation portions 121 and is spaced apart from the third cathode portion 133. This structure helps to prevent moisture and oxygen from entering the display area 111 through the cathode 13, thereby further reducing the adverse effects of moisture and oxygen on the display panel and further improving the display effect of the display panel.
[0071] In addition to the cathode 13, one or more layers between the cathode 13 and the substrate 11 can also be separated into different parts.
[0072] In some embodiments, see Figure 1BThe display panel also includes a functional layer 23 located between the cathode 13 and the substrate 11. Here, the functional layer 23 includes at least one of an electron transport layer and an electron injection layer. The functional layer 23 includes a first functional portion 231 and a second functional portion 232 spaced apart from the first functional portion 231. The first functional portion 231 is located on the side of the isolator 12 closer to the display area 111, and the second functional portion 232 is located on the side of the isolator 12 away from the display area 111. Similar to the cathode 13, the two portions of the functional layer 23 on both sides of the isolator 12 are also spaced apart. This structure helps to prevent moisture and oxygen from entering the display area 111 through the functional layer 23, thereby reducing the adverse effects of moisture and oxygen on the display panel and improving the display effect of the display panel.
[0073] It should be understood that when the functional layer 23 includes both an electron transport layer and an electron injection layer located between the cathode 13 and the electron transport layer, both the first functional unit 131 and the second functional unit 132 include two layers, one of which is part of the electron transport layer and the other of the electron transport layer.
[0074] In other embodiments, see Figure 1B The functional layer 23 further includes at least one of a third functional portion 233 and a fourth functional portion 234. The third functional portion 233 is located between the insulating member 121 and the third cathode portion 133, and the fourth functional portion 234 is located between two adjacent insulating portions 121 and between the fourth cathode portion 134 and the substrate 11. This structure helps to prevent moisture and oxygen from entering the display area 111 through the functional layer 23, thereby further reducing the adverse effects of moisture and oxygen on the display panel and further improving the display effect of the display panel.
[0075] In addition, if the display panel also includes other layers (such as an organic cover layer) located between the cathode 13 and the encapsulation layer 16, the other layers can also be separated by the separator 12, thereby further improving the display effect of the display panel.
[0076] In addition to the first isolation layer 1211 and the second isolation layer 1212, each isolation section 121 may also include other layers, which will be described below in conjunction with different embodiments.
[0077] In some embodiments, see Figure 1B Each isolation portion 121 further includes a third isolation layer 1213 located between the first isolation layer 1211 and the substrate 11. The first orthographic projection 1211' lies within the third orthographic projection of the third isolation layer 1213 onto the substrate 11. The third orthographic projection can, for example, be... Figure 1C The second orthographic projection 1212' shown is completely superimposed. In some embodiments, the material of the third insulating layer 1213 may include titanium.
[0078] In other embodiments, see Figure 1B Each isolation section 121 further includes a support layer 1214 located between the third isolation layer 1213 and the substrate 11. Here, the first orthographic projection 1211', the second orthographic projection 1212', and the third orthographic projection are located within the orthographic projection of the support layer 1214 on the substrate 11. In this manner, the possibility of collapse of the first isolation layer 1211, the second isolation layer 1212, and the third isolation layer 1213 can be reduced, improving the reliability of the isolation section 121, thereby further improving the display effect of the display panel.
[0079] In some other embodiments, see Figure 1B Each isolation portion 121 further includes a first conductive portion 1215 located on the side of the second isolation layer 1212 away from the substrate 11. Here, the orthographic projection of the first conductive portion 1215 on the substrate 11 lies within the second orthographic projection 1212'. For example, the material of the first conductive portion 1215 includes a transparent material, such as indium tin oxide (ITO). It should be understood that when the isolation portion 121 includes the first conductive portion 1215, the third cathode portion 133 of the cathode 13 and the third functional portion 233 of the functional layer 23 are located on the side of the first conductive portion 1215 away from the substrate 11.
[0080] In some embodiments, the display panel further includes a power line 20 and a second conductive portion 21 located in the peripheral region 112. The power line 20 is located between the support layer 1214 and the substrate 11, and is connected to each isolation portion 121. The second conductive portion 21 is located between the isolation member 12 and the display area 111, and between the first cathode portion 131 and the power line 20. Here, the second conductive portion 21 is in contact with the first cathode portion 131 and connected to the power line 20. In other words, the first cathode portion 131 is connected to the power line 20 via the second conductive portion 21. For example, the material of the second conductive portion 21 includes a transparent material, such as ITO.
[0081] In this structure, each isolation section 121 is connected to the power line 20 connected to the first cathode section 131, which helps to release static electricity, thereby reducing the adverse effects of static electricity on the display panel and further improving the display effect of the display panel.
[0082] The following describes some implementation methods for connecting the isolation section 121 to the power line 20.
[0083] In some implementations, see Figure 1B The display panel also includes a first insulating layer IL1, a second insulating layer IL2, a third insulating layer IL3, and a fourth insulating layer IL4. Each isolation section 121 also includes a first connecting section CP1, a second connecting section CP2, and a third connecting section CP3.
[0084] The first insulating layer IL1 includes a first insulating portion IL11 located in the peripheral region 112, the second insulating layer IL2 includes a second insulating portion IL21 located in the peripheral region 112, the third insulating layer IL3 includes a third insulating portion IL31 located in the peripheral region 112, and the fourth insulating layer IL4 includes a fourth insulating portion IL41 located in the peripheral region 112.
[0085] The first insulating part IL11 is located between the support layer 1214 and the power line 20, the second insulating part IL21 is located between the support layer 1214 and the first insulating part IL11, the third insulating part IL31 is located between the support layer 1214 and the third insulating layer 1213, and the fourth insulating part IL41 is located between the second insulating layer 1212 and the first conductive part 1215.
[0086] The first connecting portion CP1 passes through the second insulating portion IL21 and the first insulating portion IL11, and is connected to the support layer 1214 and the power line 20. In some embodiments, the first connecting portion CP1 and the support layer 1214 are integrally formed.
[0087] The second connecting portion CP2 penetrates the third insulating portion IL31 and is connected to the third insulating layer 1213 and the support layer 1214. In some embodiments, the second connecting portion CP2 and the third insulating layer 1213 are integrally disposed.
[0088] The third connecting portion CP3 penetrates the fourth insulating portion IL41 and is connected to the first conductive portion 1215 and the second insulating layer 1213. In some embodiments, the third connecting portion CP3 and the first conductive portion 1215 are integrally disposed. It should be understood that when the display panel also includes a third functional portion 233, the third connecting portion CP3 also penetrates the third functional portion 233.
[0089] In the above implementation, the isolation section 121 is connected to the power line 20 via the first connection section CP1, and the layers in the isolation section 121 are connected to each other via the second connection section CP2 and the third connection section CP3, so that static electricity can be conducted to the power line 20 more effectively.
[0090] The following describes some implementation methods for connecting the second conductive part 21 to the power line 20.
[0091] In some implementations, see Figure 1B The display panel further includes a connection layer 22, at least one fourth connection portion CP4, at least one fifth connection portion CP5, and at least one sixth connection portion CP6. In some embodiments, the display panel includes a plurality of fourth connection portions CP4, a plurality of fifth connection portions CP5, and a plurality of sixth connection portions CP6.
[0092] The connection layer 22 is located between the second conductive portion 21 and the power line 20, and between the isolator 12 and the display area 111. The connection layer 22 includes a first connection layer 221 located between the second conductive portion 21 and the power line 20, and a second connection layer 222 located between the second conductive portion 21 and the first connection layer 221. In some embodiments, both the first connection layer 221 and the second connection layer 222 include a stack, such as Ti / Al / Ti.
[0093] The fourth connecting portion CP4 passes through the second insulating portion IL21 and the first insulating portion IL11, and is connected to the first connecting layer 221 and the power line 20. In some embodiments, the fourth connecting portion CP4 and the first connecting layer 221 are integrally formed.
[0094] The fifth connecting portion CP5 penetrates the third insulating portion IL31 and is connected to the second connecting layer 222 and the first connecting layer 221. In some embodiments, the fifth connecting portion CP5 and the second connecting layer 222 are integrally disposed.
[0095] The sixth connecting portion CP6 penetrates the fourth insulating portion IL41 and is connected to the second conductive portion 21 and the second connecting layer 222. In some embodiments, the sixth connecting portion CP6 and the second conductive portion 21 are integrally disposed. It should be understood that, in the case where the display panel also includes a first functional portion 231, the sixth connecting portion CP6 also penetrates the first functional portion 231.
[0096] In the above implementation, the second conductive part 21 is connected to the power line 20 via the first connection layer 221 and the second connection layer 222, which helps to reduce the resistance of the connection layer 22 and improve the uniformity of the power signal applied via the power line 20.
[0097] It is understood that the power signal applied via the power line 20 can be transmitted to the first cathode portion 131 via the connection layer 22 and the second conductive portion 21, and then applied to the sub-pixel P located in the display area 111.
[0098] In some embodiments, the orthographic projection of the first connection layer 221 on the substrate 11 lies within the orthographic projection of the second connection layer 222 on the substrate 11. This ensures that the second connection layer 222 can be connected to the first connection layer 221 via the fifth connection portion CP5, thereby ensuring that the second conductive portion 21 is connected to the power line 20.
[0099] It should be understood that certain layers located in the peripheral area 112 and certain layers located in the sub-pixels of the display area 111 may be located on the same layer. It should also be understood that certain layers located in the peripheral area 112 may extend from the display area 111 to the peripheral area 112. The following will combine... Figure 2 Please provide an explanation.
[0100] Figure 2This is a cross-sectional schematic diagram showing a sub-pixel in a display panel according to some embodiments of the present disclosure.
[0101] like Figure 2 As shown, sub-pixel P includes a pixel driving circuit, which may include a thin-film transistor T and a capacitor C. It should be understood that the pixel driving circuit may also include other thin-film transistors. For example, the pixel driving circuit may include six thin-film transistors and a capacitor C (6T1C); or, for another example, the pixel driving circuit may include seven thin-film transistors and a capacitor C (7T1C).
[0102] The thin-film transistor T includes an active layer AT located on one side of the substrate 11, a fifth insulating layer IL5 located on the side of the active layer AT away from the substrate 11, a gate GT located on the side of the fifth insulating layer IL5 away from the substrate 11, and a first electrode ED1 and a second electrode ED2 penetrating the first insulating layer IL1 and the second insulating layer IL2. Here, the first insulating layer IL1 is located on the side of the gate GT away from the substrate 11, and the second insulating layer IL2 is located on the side of the first insulating layer IL1 away from the substrate 11.
[0103] The capacitor C includes a first electrode plate C1 located between a fifth insulating layer IL5 and a first insulating layer IL1, and a second electrode plate C2 located between the first insulating layer IL1 and a second insulating layer IL2. It should be understood that the capacitor C also includes a first insulating layer IL1 located between the first electrode plate C1 and the second electrode plate C2. For example, the first electrode plate C1 and the gate GT may be located in the same layer, i.e., formed by patterning the same material layer. As some implementations, the material of at least one of the first electrode plate C1 and the second electrode plate C2 may include a metal or an alloy.
[0104] Sub-pixel P also includes an anode AND, which is connected to the second electrode ED2 of the thin-film transistor T via a connector CM. The connector CM is connected to the second electrode ED2 via a via penetrating the third insulating layer IL3 and the first planarization layer PLN1, and the anode AND is connected to the connector CM via a via penetrating the fourth insulating layer IL4 and the second planarization layer PLN2. Here, the third insulating layer IL3 covers the first electrode ED1 and the second electrode ED2 and is located on the side of the second insulating layer IL2 away from the substrate 11. The first planarization layer PLN1 is located on the side of the third insulating layer IL3 away from the substrate 11, the fourth insulating layer IL4 is located on the side of the first planarization layer PLN1 away from the substrate 11, the connector CM is located between the first planarization layer PLN1 and the fourth insulating layer IL4, the second planarization layer PLN2 is located on the side of the fourth insulating layer IL4 away from the substrate 11, and the anode AND is located on the side of the second planarization layer PLN2 away from the substrate 11.
[0105] It should be understood that the sub-pixel P also includes a light-emitting layer located on the side of the anode AND away from the substrate 11. Figure 2 (not shown) and Figure 1B The cathode 13 is shown. For example, multiple sub-pixels P can share the cathode 13.
[0106] In some implementations, the active layer AT may be made of one or more of amorphous indium gallium zinc oxide (a-IGZO), zinc oxynitride (ZnON), indium zinc tin oxide (IZTO), amorphous silicon (a-Si), polycrystalline silicon (p-Si), hexathiophene, and polythiophene. In some implementations, the materials of the first insulating layer IL1, the second insulating layer IL2, the third insulating layer IL3, the fourth insulating layer IL4, and the fifth insulating layer IL5 may be inorganic materials such as silicon oxides, silicon nitrides, or silicon oxide nitrides. In some implementations, the materials of the first planarization layer PLN1 and the second planarization layer PLN2 may be organic materials such as polyimide. In some implementations, the material of at least one of the first electrode ED1 and the second electrode ED2 may be a metal or alloy. For example, the first electrode ED1 and the second electrode ED2 may be a stack, such as Ti / Al / Ti.
[0107] Figure 2 The pixel delimiting layer (PDL) and buffer layer (BF) in the display panel are also shown. The PDL defines the sub-pixels (P). The BF is located between the substrate 11 and the active layer AT and prevents moisture and oxygen from entering the active layer AT.
[0108] In some embodiments, Figure 1B The power cord 20 shown can be used with Figure 2 The gate GT shown is located on the same layer. In some embodiments, Figure 1B The support layer 1214 and the first connecting layer 221 shown can be connected with Figure 2 The first electrode ED1 and the second electrode ED2 shown are located in the same layer.
[0109] In some embodiments, Figure 1B The second connection layer 221 shown can be connected with Figure 2 The connectors CM shown are located on the same layer. In cases where the connectors CM include multiple layers, Figure 1B The first isolation layer 1211, the second isolation layer 1212 and the third isolation layer 1213 shown can be located on the same layer as one of the layers in the stack of the connector CM.
[0110] In some embodiments, Figure 1B The first conductive part 1215 and the second conductive part 21 shown can be connected with Figure 2 The anode AND shown is located in the same layer.
[0111] Figure 3 This is a top view schematic diagram illustrating a display panel according to other embodiments of the present disclosure. It should be noted that, along... Figure 3 The schematic diagram of the cross-section cut by B-B' shown is still as follows Figure 1B As shown.
[0112] like Figure 3 As shown, the peripheral area 112 includes a binding area 1121 and a non-binding area 1122 excluding the binding area 1121. Here, the binding area 1121 surrounds a first edge E1 of the display area 111, and the non-binding area 1122 surrounds a second edge E2 of the display area 111 excluding the first edge E1. Each isolation portion 121 includes a first isolation portion 121A located in the non-binding area 1122 and surrounding the second edge E2. It should be noted that... Figure 3 Only one isolation section 121 is shown schematically; the structures of other isolation sections 121 can be referred to. Figure 3 As shown.
[0113] It should be understood that the bonding area 1121 is used to establish an electrical connection with external circuits (such as circuit boards, integrated circuit chips, etc.) through bonding. The bonding area 1121 may be provided with pads 14 and other signal lines. External circuits can provide signals to the display panel via the pads 114.
[0114] It should also be understood that Figure 3 The boundaries between the bounding area 1121 and the unbound area 1122 shown are merely illustrative. Those skilled in the art will understand that the border size of the bounding area 1121 is typically larger than the border size of the unbound area 1122; that is, the minimum distance between the edge of the bounding area 1121 furthest from the display area 111 and the edge of the display area 111 is greater than the minimum distance between the edge of the unbound area 1122 furthest from the display area 111 and the edge of the display area 111. Therefore, based on the border size, a portion of the peripheral area 112 can be determined as the bounding area 1121, and the remaining portion as the unbound area 1122.
[0115] In the above embodiment, the first isolation portion 121A provided around the second edge E2 can block water vapor and oxygen from entering the display area 111 through the cathode 13, thereby improving the display effect of the display panel.
[0116] In some embodiments, see Figure 3 Each isolation section 121 further includes a second isolation section 121B and a third isolation section 121C, both located in the bonding area 1121. The second isolation section 121B is connected to one end of the first isolation section 121A, and the third isolation section 121C is connected to the other end of the first isolation section 121A. Here, both the third isolation section 121C and the second isolation section 121B extend away from the display area 111.
[0117] It is understandable that the starting point and ending point of the first isolation portion 121A extending around the second edge E2 are the two ends of the first isolation portion 121A, that is, Figure 3 The position where the first isolation section 121A intersects with the two dashed lines.
[0118] In addition, although Figure 3 The second isolation section 121B and the third isolation section 121C shown extend in the same direction, but this is not limiting.
[0119] In the above embodiments, each isolation section 121 further includes a second isolation section 121B and a third isolation section 121C located in the peripheral area, which can more effectively block water vapor and oxygen from entering the display area 111 through the cathode 13, thereby further improving the display effect of the display panel.
[0120] Figure 4A yes Figure 3 A magnified view of a portion of the binding area shown. Figure 4B It is along Figure 4A The diagram shows a cross-section cut from C-C'.
[0121] In some embodiments, see Figure 4A , Figure 3 and Figure 1B The display panel also includes pads 14 and at least one dike 15.
[0122] In some embodiments, the display panel includes a plurality of dikes 15, which are spaced apart in a direction from the first edge E1 to the pad 14. Figure 4B As shown, for example, the cofferdam 15 may include a first layer 151, a second layer 152, and a third layer 153 sequentially located on the third insulating layer IL3. For example, the first layer 151 may be located on the same layer as the first planarization layer PLN1, the second layer 152 may be located on the same layer as the second planarization layer PLN2, and the third layer 153 may be located on the same layer as the pixel delimitation layer PDL.
[0123] Both pad 14 and dike 15 are located in bonding area 1121. Dike 15 is located between first edge E1 and pad 14, and dike 15 extends in the direction from second isolation portion 121B to third isolation portion 121C.
[0124] The encapsulation layer 16 is located on the side of the cathode 13 and at least one dam 15 away from the substrate 11. Here, the orthographic projection of the pad 14 on the substrate 11 is outside the orthographic projection of the encapsulation layer 16 on the substrate 11, while the orthographic projection of the dam 15 on the substrate 11 is inside the orthographic projection of the encapsulation layer 16 on the substrate 11. In other words, the pad 14 is not covered by the encapsulation layer 16, while each dam 15 is covered by the encapsulation layer.
[0125] In the above embodiment, the dike 15 extends the path of the encapsulation layer 16. This more effectively prevents water vapor and oxygen from entering the display area 111 through the encapsulation layer 16, improving the encapsulation effect of the encapsulation layer and thus further improving the display effect of the display panel.
[0126] In some embodiments, see Figure 4A The cofferdam 15 is located between the cathode 13 and the pad 14, which can further reduce the possibility of water vapor and oxygen entering the cathode 13, thereby further improving the display effect of the display panel.
[0127] In some embodiments, see Figure 3 and Figure 1B The display panel also includes an adhesive portion 17, an adhesive layer 18, and a cover plate 19. For example... Figure 3 As shown, the colloid portion 17 is located in the bonding area 1121 and between the cofferdam 15 and the pad 14. Figure 1B As shown, the colloid layer 18 is located on the side of the encapsulation layer 16 away from the substrate 11, and the cover plate 19 is located on the side of the colloid layer 18 away from the substrate 11. The colloid portion 17 can reduce the impact on the pads 14 when filling the colloid material to form the colloid layer 18, thereby improving the reliability of the display panel.
[0128] It should be understood that the display panels provided in different embodiments of this disclosure can be combined.
[0129] Figure 5 This is a schematic flowchart illustrating a method for manufacturing a display panel according to an embodiment of the present disclosure.
[0130] In step 502, a substrate is provided, the substrate including a display area and a peripheral area surrounding the display area.
[0131] In step 504, an isolation element located in the peripheral area is formed.
[0132] Here, the isolation member includes at least one isolation portion that at least partially surrounds the display area, and each isolation portion includes a first isolation layer and a second isolation layer sequentially stacked on the substrate. A first orthographic projection of the first isolation layer on the substrate lies within a second orthographic projection of the second isolation layer on the substrate.
[0133] In step 506, a cathode is formed.
[0134] Here, the cathode includes a first cathode portion located on the side of the isolator closer to the display area and a second cathode portion located on the side of the isolator farther from the display area, with the second cathode portion spaced apart from the first cathode portion.
[0135] In step 508, an encapsulation layer is formed on the side of the cathode away from the substrate.
[0136] Here, the encapsulation layer includes a first inorganic layer, a second inorganic layer, and an organic layer located between the first inorganic layer and the second inorganic layer. The edges of the orthographic projections of the first inorganic layer onto the substrate, the edges of the orthographic projections of the organic layer onto the substrate, and the edges of the orthographic projections of the second inorganic layer onto the substrate overlap.
[0137] The following is combined with Figures 6A-6C ,as well as Figures 7A-7D Some implementations of forming the isolation element are introduced. In these implementations, each isolation element also includes a third isolation layer 1213, a support layer 1214, and a first conductive part 1215 as described above.
[0138] like Figure 6A and Figure 7A As shown, at least one initial isolation member 12A is formed on the substrate 11. Each initial isolation member 12A includes a support layer 1214, a third isolation layer 1213, a first initial isolation layer 1211A, and a second isolation layer 1212, which are sequentially stacked on the substrate 11. The orthographic projection of the first initial isolation layer 1211A on the substrate 11 is close to the edge of the display area 111, the orthographic projection of the second isolation layer 1212 on the substrate 11 is close to the edge of the display area 111, and the orthographic projection of the third isolation layer 1213 on the substrate 11 coincides with the edge of the display area 111. The orthographic projection of the first initial isolation layer 1211A on the substrate 11 is far from the edge of the display area 111, the orthographic projection of the second isolation layer 1212 on the substrate 11 is far from the edge of the display area 111, and the orthographic projection of the third isolation layer 1213 on the substrate 11 coincides with the edge of the display area 111.
[0139] Next, a first conductive portion 1215 is formed, and at least one of the first side surface S1 near the display area 111 and the second side surface S2 away from the display area 111 of the first initial isolation layer 1211A is etched to form the first isolation layer 1211.
[0140] First, combine Figures 6B-6C Some implementation methods for forming the first conductive part 1215 and forming the first insulating layer 1211 are introduced.
[0141] like Figure 6B As shown, a fourth insulating portion IL41 is formed on the side of the second insulating layer 1212 away from the substrate 11. The fourth insulating portion IL41 has an opening V that exposes a portion of the side of the second insulating layer 1212 away from the substrate 11. In addition, the fourth insulating portion IL41 exposes the first side surface S1 and the second side surface S2.
[0142] like Figure 6CAs shown, a conductive material layer 1215A is formed, partially located in the opening V and covering the first side surface S1 and the second side surface S2. Then, the conductive material layer 1215A is wet-etched to obtain a first conductive portion 1215 partially located in the opening V. Here, the wet etching simultaneously etches at least one of the first side surface S1 and the second side surface S2 to obtain a first isolation layer 1211.
[0143] In other words, the first conductive portion 1215 is formed using the same wet etching process as the one used to form the first side surface S1 and the second side surface S2.
[0144] The following is combined with Figures 7B-7C Some other implementations of forming the first conductive part 1215 and forming the first insulating layer 1211 are introduced.
[0145] like Figure 7B As shown, a fourth insulating material layer IL4A is formed covering the first side S1 and the second side S2. The fourth insulating material layer IL4A has an opening V that exposes a portion of the side of the second insulating layer 1212 away from the substrate 11.
[0146] like Figure 7C As shown, a conductive material layer 1215A is formed, which is partially located in the opening V and covers the fourth insulating material layer IL4A. Then, the conductive material layer 1215A is subjected to a first wet etching process to obtain a first conductive portion 1215 partially located in the opening V.
[0147] like Figure 7D As shown, the fourth insulating material layer IL4A is dry-etched to expose the first side surface S1 and the second side surface S2. Then, at least one of the first side surface S1 and the second side surface S2 is wet-etched to obtain the first insulating layer 1211.
[0148] In other words, the first conductive portion 1215 is formed by a different wet etching process than the wet etching process used to form the first side surface S1 and the second side surface S2.
[0149] Figure 8 This is a schematic flowchart illustrating a method for manufacturing a display panel according to other embodiments of the present disclosure. Figure 9A and Figure 9B This is a top view schematic diagram illustrating a display panel according to some embodiments of the present disclosure.
[0150] In some embodiments, Figure 5 The method shown also includes Figure 8 Steps 802-808 are shown. Additionally, the substrate 11 also includes a sacrificial region 113, such as... Figure 9A and Figure 9B As shown.
[0151] The following is combined with Figure 8 , Figure 9A and Figure 9B The manufacturing method of the display panel is explained.
[0152] In step 802, an initial colloidal portion 17A is formed on the sacrificial region 113 and the peripheral region 112. The display region 111 is located within the space SPE defined by the initial colloidal portion 17A. The orthographic projection of the initial colloidal portion 17A onto the substrate 11 is a regular pattern. Here, the regular pattern can be, for example, as shown in the figure below. Figure 9A The square shown, or it could be like... Figure 9B The rectangle shown.
[0153] In step 804, after forming the encapsulation layer 16, the initial colloidal layer 18A is filled within the spatial SPE, see [link to previous step]. Figure 9B .
[0154] In step 806, a cover plate 19 is formed on the side of the initial colloidal layer 18A away from the substrate 11. The cover plate 19 can be seen, for example, in [reference needed]. Figure 1B .
[0155] In step 808, a cutting process is performed to remove the sacrificial region 113, the portion of the initial colloidal portion 17A located on the sacrificial region 113, the portion of the initial colloidal layer 18A located on the sacrificial region 113, and the portion of the cover plate 19 located on the sacrificial region 113, thereby forming Figure 3 and Figure 1B The display panel shown. Here, the portion of the initial colloid portion 17A located in the peripheral region 112 is called colloid portion 17, and the remaining portion of the initial colloid layer 18A is called colloid layer 18.
[0156] In the above embodiments, since the initial colloidal portion 17A is formed, the initial colloidal layer 18 can be filled more uniformly, reducing air bubbles in the colloidal layer 18 and improving the encapsulation effect of the display panel.
[0157] This disclosure also provides a display device, which may include the display panel of any of the embodiments described above. In some embodiments, the display device may be, for example, any product or component with display function, such as a smart wearable device (e.g., a smartwatch), a mobile terminal, a television, a monitor, a laptop computer, a digital photo frame, a navigator, or electronic paper.
[0158] The embodiments of this disclosure have now been described in detail. To avoid obscuring the concept of this disclosure, some details known in the art have not been described. Those skilled in the art can fully understand how to implement the technical solutions disclosed herein based on the above description.
[0159] While specific embodiments of this disclosure have been described in detail by way of examples, those skilled in the art should understand that the examples are for illustrative purposes only and not intended to limit the scope of this disclosure. Those skilled in the art should understand that modifications can be made to the above embodiments or equivalent substitutions can be made to some technical features without departing from the scope and spirit of this disclosure. The scope of this disclosure is defined by the appended claims.
Claims
1. A display panel, comprising: A substrate includes a display area and a peripheral area surrounding the display area, the peripheral area including a bonding area and a non-bonding area other than the bonding area, the bonding area surrounding a first edge of the edge of the display area; An isolation member is located in the peripheral area. The isolation member includes at least one isolation portion that at least partially surrounds the display area. Each isolation portion includes a first isolation layer and a second isolation layer that are sequentially stacked on the substrate. A first orthographic projection of the first isolation layer on the substrate is located within a second orthographic projection of the second isolation layer on the substrate. Cathode, comprising: The first cathode portion is located on the side of the insulating member closest to the display area, and The second cathode portion is located on the side of the insulating member away from the display area and is spaced apart from the first cathode portion; An encapsulation layer, located on the side of the cathode away from the substrate, includes a first inorganic layer, a second inorganic layer, and an organic layer located between the first inorganic layer and the second inorganic layer, wherein the edges of the orthographic projections of the first inorganic layer on the substrate, the edges of the orthographic projections of the organic layer on the substrate, and the edges of the orthographic projections of the second inorganic layer on the substrate overlap. The pads are located in the bonding area; At least one cofferdam is located in the bonding area and between the first edge and the pad; The colloidal portion is located in the bonding area and between the at least one cofferdam and the pad; A colloidal layer, located on the side of the encapsulation layer away from the substrate; and A cover plate is located on the side of the colloidal layer away from the substrate.
2. The display panel according to claim 1, wherein: The unbound area surrounds the second edge of the edge, excluding the first edge; and Each isolation section includes a first isolation section located in the unbound area and surrounding the second edge.
3. The display panel of claim 2, wherein, Each isolation unit also includes: The second isolation section is located in the binding area and is connected to one end of the first isolation section; and The third isolation section is located in the binding area and is connected to the other end of the first isolation section. Both the third isolation section and the second isolation section extend away from the display area.
4. The display panel according to claim 3, wherein: The at least one cofferdam extends along the direction from the second isolation section to the third isolation section, wherein: The encapsulation layer is located on the side of the at least one dike away from the substrate. The orthogonal projection of the pads on the substrate is located outside the orthogonal projection of the encapsulation layer on the substrate, and The orthographic projection of the at least one dike on the substrate lies within the orthographic projection of the encapsulation layer on the substrate.
5. The display panel of claim 4, wherein, The at least one cofferdam is located between the cathode and the pad.
6. The display panel of claim 4, wherein, The at least one cofferdam includes a plurality of cofferdams, which are spaced apart in the direction from the first edge to the pad.
7. The display panel according to any one of claims 1-6, wherein, Each isolation unit also includes: A third isolation layer is located between the first isolation layer and the substrate, and the first orthographic projection is located within the third orthographic projection of the third isolation layer on the substrate.
8. The display panel of claim 7, wherein, Each isolation unit also includes: A support layer is located between the third isolation layer and the substrate, and the first orthographic projection, the second orthographic projection and the third orthographic projection are located within the orthographic projection of the support layer on the substrate.
9. The display panel of claim 8, wherein, Each isolation unit also includes: A first conductive portion is located on the side of the second insulating layer away from the substrate, and the orthographic projection of the first conductive portion on the substrate is located within the second orthographic projection.
10. The display panel according to claim 9, further comprising: A power line located in the peripheral area, the power line being situated between the support layer and the substrate, and connected to each isolation portion; and The second conductive part is located between the isolator and the display area, and between the first cathode and the power line. The second conductive part is in contact with the first cathode and connected to the power line.
11. The display panel according to claim 10, further comprising: The first insulating layer includes a first insulating portion located in the peripheral area, the first insulating portion being located between the support layer and the power line; The second insulating layer includes a second insulating portion located in the peripheral area, the second insulating portion being located between the support layer and the first insulating portion; The third insulating layer includes a third insulating portion located in the peripheral area, the third insulating portion being located between the support layer and the third insulating layer; and The fourth insulating layer includes a fourth insulating portion located in the peripheral area, the fourth insulating portion being located between the second insulating layer and the first conductive portion; Each isolation unit also includes: The first connecting portion penetrates through the second insulating portion and the first insulating portion, and is connected to the support layer and the power line. The second connecting portion penetrates the third insulating portion and is connected to the third insulating layer and the support layer. The third connecting portion penetrates the fourth insulating portion and is connected to the first conductive portion and the second insulating layer.
12. The display panel according to claim 11, further comprising: A connection layer, located between the second conductive portion and the power line, and between the insulating member and the display area, the connection layer comprising: A first connecting layer is located between the second conductive part and the power line, and The second connecting layer is located between the second conductive portion and the first connecting layer; At least one fourth connection portion extends through the second insulation portion and the first insulation portion, and is connected to the first connection layer and the power line; At least one fifth connecting portion penetrates the third insulating portion and is connected to the second connecting layer and the first connecting layer; and At least one sixth connecting portion extends through the fourth insulating portion and is connected to the second conductive portion and the second connecting layer.
13. The display panel according to claim 12, wherein, The orthographic projection of the first connecting layer on the substrate lies within the orthographic projection of the second connecting layer on the substrate.
14. The display panel according to claim 12, wherein: The first connecting part and the supporting layer are integrally formed; The second connecting part and the third isolation layer are integrally formed; The third connecting part and the first conductive part are integrally formed; The at least one fourth connecting part and the first connecting layer are integrally formed; The at least one fifth connecting portion and the second connecting layer are integrally formed; and The at least one sixth connecting portion and the second conductive portion are integrally formed.
15. The display panel according to any one of claims 1-6, wherein, The cathode further includes: The third cathode portion is located on the side of each isolation portion away from the substrate and is spaced apart from the first cathode portion and the second cathode portion.
16. The display panel according to claim 15, wherein, The at least one isolation section includes multiple isolation sections, and the cathode further includes: The fourth cathode portion is located between two adjacent isolation portions among the plurality of isolation portions and is spaced apart from the third cathode portion.
17. The display panel according to any one of claims 1-6, further comprising a functional layer located between the cathode and the substrate, the functional layer comprising at least one of an electron transport layer and an electron injection layer, the functional layer comprising: The first functional unit is located on the side of the isolation member closer to the display area; and The second functional unit is located on the side of the isolation member away from the display area and is spaced apart from the first functional unit.
18. The display panel according to any one of claims 1-6, wherein: The edge of the first orthographic projection near the display area does not overlap with the edge of the second orthographic projection near the display area; and The edge of the first orthographic projection away from the display area does not overlap with the edge of the second orthographic projection away from the display area.
19. The display panel according to claim 18, wherein, The minimum distance between the edge of the first orthographic projection and the edge of the second orthographic projection is 1 micrometer to 3 micrometers.
20. The display panel according to claim 7, wherein, The second and third isolation layers are made of titanium, and the first isolation layer is made of aluminum.
21. A display device, comprising: The display panel as described in any one of claims 1-20.
22. A method for manufacturing a display panel, comprising: A substrate is provided, the substrate including a display area and a peripheral area surrounding the display area, the peripheral area including a bonding area and a non-bonding area other than the bonding area, the bonding area surrounding a first edge of the edge of the display area; An isolation member is formed in the peripheral area. The isolation member includes at least one isolation portion that at least partially surrounds the display area. Each isolation portion includes a first isolation layer and a second isolation layer that are sequentially stacked on the substrate. A first orthographic projection of the first isolation layer on the substrate is located within a second orthographic projection of the second isolation layer on the substrate. Form pads located in the bonding area; At least one cofferdam is formed, the at least one cofferdam being located in the bonding area and between the first edge and the pad; A cathode is formed, the cathode comprising: The first cathode portion is located on the side of the insulating member closest to the display area, and The second cathode portion is located on the side of the insulating member away from the display area and is spaced apart from the first cathode portion; An encapsulation layer is formed on the side of the cathode away from the substrate. The encapsulation layer includes a first inorganic layer, a second inorganic layer, and an organic layer located between the first inorganic layer and the second inorganic layer. The edges of the orthographic projections of the first inorganic layer on the substrate, the edges of the orthographic projections of the organic layer on the substrate, and the edges of the orthographic projections of the second inorganic layer on the substrate overlap. and A colloid portion, a colloid layer, and a cover plate are formed, wherein the colloid portion is located in the bonding area and between the at least one dike and the pad, the colloid layer is located on the side of the encapsulation layer away from the substrate, and the cover plate is located on the side of the colloid layer away from the substrate.
23. The method according to claim 22, wherein, Each isolation unit also includes: A third isolation layer is located between the first isolation layer and the substrate, and the first orthographic projection is located within the third orthographic projection of the third isolation layer on the substrate. A support layer, located between the third isolation layer and the substrate, wherein the first, second, and third orthographic projections are within the orthographic projection of the support layer on the substrate; and A first conductive portion is located on the side of the second insulating layer away from the substrate, and the orthographic projection of the first conductive portion on the substrate is located within the second orthographic projection.
24. The method according to claim 23, wherein, The insulating element comprises: At least one initial isolation member is formed on the substrate. Each initial isolation member includes a support layer, a third isolation layer, a first initial isolation layer, and a second isolation layer sequentially stacked on the substrate. The orthographic projection of the first initial isolation layer on the substrate is near the edge of the display area, the orthographic projection of the second isolation layer on the substrate is near the edge of the display area, and the orthographic projection of the third isolation layer on the substrate is near the edge of the display area. Conversely, the orthographic projection of the first initial isolation layer on the substrate is far from the edge of the display area, and the orthographic projection of the second isolation layer on the substrate is far from the edge of the display area, and the orthographic projection of the third isolation layer on the substrate is far from the edge of the display area. The first conductive portion is formed, and at least one of the first side of the first initial isolation layer near the display area and the second side away from the display area is etched to form the first isolation layer.
25. The method according to claim 24, wherein, The process of forming the first conductive portion and etching at least one of the first side of the first initial isolation layer near the display area and the second side away from the display area includes: A fourth insulating portion is formed on the side of the second insulating layer away from the substrate, the fourth insulating portion having an opening that exposes a portion of the side of the second insulating layer away from the substrate, and the fourth insulating portion exposing the first side and the second side. A conductive material layer is formed, partially located in the opening and covering the first and second sides; and The conductive material layer is wet-etched to obtain the first conductive portion partially located in the opening, wherein the wet etching causes at least one of the first side and the second side to be etched to obtain the first isolation layer.
26. The method according to claim 24, wherein, The process of forming the first conductive portion and etching at least one of the first side of the first initial isolation layer near the display area and the second side away from the display area includes: A fourth insulating material layer is formed covering the first side and the second side, the fourth insulating material layer having an opening that exposes a portion of the side of the second insulating layer away from the substrate. A conductive material layer is formed, partially located in the opening and covering the fourth insulating material layer; and The conductive material layer is subjected to a first wet etching process to obtain the first conductive portion located in the opening; The fourth insulating material layer is dry etched to expose the first side and the second side; and At least one of the first side and the second side is subjected to a second wet etching process to obtain the first isolation layer.
27. The method according to any one of claims 22-26, wherein, The substrate further includes a sacrificial region, and the method further includes: An initial colloidal portion is formed on the sacrificial region and the peripheral region, the display region is located within the space defined by the initial colloidal portion, and the orthographic projection of the initial colloidal portion on the substrate is a regular pattern; The formation of the colloidal portion, colloidal layer, and cover plate includes: After the encapsulation layer is formed, the space is filled with an initial colloidal layer; The cover plate is formed on the side of the initial colloidal layer away from the substrate; and A cutting process is performed to remove the sacrificial region, the portion of the initial colloid portion located on the sacrificial region, the portion of the initial colloid layer located on the sacrificial region, and the portion of the cover plate located on the sacrificial region. The portion of the initial colloid portion located in the peripheral region is designated as the colloid portion, and the remaining portion of the initial colloid layer is designated as the colloid layer.