Chip running method and device, SOC chip and storage medium

Abstract

The application discloses a kind of chip operation method, device, SOC chip and computer readable storage medium, it is related to computer algorithm technical field, wherein method includes: obtaining the real-time temperature value of the SOC chip;According to the real-time temperature value and different temperature threshold range, determine the current operating state of the SOC chip;According to the current operating state, determine target operating mode;According to the target operating mode, run the SOC chip;By the method of the application, the operation of SOC chip is differentially managed, different operating modes are implemented in different stages, ensure that SOC chip can intelligently control operating mode during working process, maximum limit reduce the high temperature high heat situation of chip, chip control efficiency is higher and the influence to SOC chip performance is lower.

Description

Technical Field

[0001] This invention relates to the field of computer algorithm technology, and in particular to chip operation methods, apparatus, SOC chips, and computer-readable storage media. Background Technology

[0002] As mobile devices demand increasingly higher performance, module complexity and the number of modules also rise, inevitably leading to higher power consumption alongside higher performance. From the perspective of SOC chips, excluding other bottlenecks, performance is primarily related to the operating frequency and the number of modules running in parallel. For a single module, a higher frequency results in faster execution and higher performance. However, higher frequencies also consume more power and require higher voltages. Secondly, SOC chips are limited by manufacturing processes, resulting in performance differences among transistors in different locations. This manifests as varying computation times for the same logic block and differences in system power consumption. This leads to variations in the speed and power consumption of different modules within the same chip, with some modules significantly impacting overall power consumption while others have a smaller impact. Furthermore, differences in module usage also affect system performance and power consumption. Finally, once the temperature of a chip exceeds a certain threshold, system power consumption increases exponentially with rising temperature. When the chip reaches its temperature limit, it will malfunction or burn out.

[0003] Currently, the main operating method for system-on-a-chip (SoC) systems is a one-size-fits-all approach, which involves forced protection measures, such as a system restart, when the temperature reaches a certain value. Software solutions typically provide alarm services, prompting the operator to manually shut down or cool the system when a certain temperature is reached. However, these SoC operating methods result in a poor user experience, unsatisfactory energy-saving effects, and reduced chip lifespan. Summary of the Invention

[0004] The purpose of this invention is to provide a chip operation method, apparatus, SOC chip, and computer-readable storage medium. This invention determines the operating state of the SOC chip based on real-time temperature values ​​and different temperature threshold ranges, and determines the target operating mode of the SOC chip based on the operating state. This ensures that the SOC chip can intelligently adjust its operating mode during operation, minimizing the occurrence of high temperature and high heat in the chip, and enabling differentiated management of the SOC chip operation. This allows for the execution of different operating modes at different stages, resulting in higher management efficiency and lower impact on the performance of the SOC chip.

[0005] According to one aspect of the present invention, a chip operation method is provided, applied to a System-on-a-Chip (SOC) chip, the SOC chip including multiple operating states, wherein the multiple operating states are divided according to different temperature threshold ranges, and corresponding to the multiple operating states, the SOC chip includes multiple operating modes, including:

[0006] Obtain the real-time temperature value of the SOC chip;

[0007] The current operating state of the SOC chip is determined based on the real-time temperature value and different temperature threshold ranges.

[0008] Based on the current operating status, determine the target operating mode;

[0009] The SOC chip is operated according to the target operating mode.

[0010] Optionally, determining the current operating state of the SOC chip based on the real-time temperature value and the different temperature threshold ranges includes:

[0011] If the real-time temperature value is less than the first threshold, then the current operating state of the SOC chip is determined to be a low-temperature state, wherein the first threshold is a value determined based on the IDDQ value of the SOC chip.

[0012] Accordingly, determining the target operating mode based on the current operating state includes:

[0013] Based on the low temperature condition, the target operating mode is determined to be a high-power operating mode, wherein the high-power operating mode is the operating mode in which the SOC chip operates at the maximum voltage, maximum frequency, and maximum number of cores.

[0014] Optionally, determining the current operating state of the chip based on the real-time temperature value and the different temperature threshold ranges includes:

[0015] If the real-time temperature value is greater than the second threshold and less than the third threshold, then the current operating state of the chip is determined to be the normal temperature state, wherein the third threshold is the jump value at the moment of sudden temperature rise of the SOC chip obtained under normal temperature environment, and the second threshold is a value determined according to the IDDQ value of the SOC chip.

[0016] Accordingly, determining the target operating mode based on the current operating state includes:

[0017] Based on the ambient temperature condition, the target operating mode is determined to be a high-performance operating mode, wherein the high-performance operating mode is the operating mode in which the SOC chip maintains voltage, frequency, and number of cores to perform high-performance operation.

[0018] Optionally, determining the current operating state of the chip based on the real-time temperature value and the different temperature threshold ranges includes:

[0019] If the real-time temperature value is greater than the fourth threshold and less than the fifth threshold, then the current operating state of the chip is determined to be a high-temperature state. The fifth threshold is calculated based on the extreme temperature value and fixed value of the SOC chip.

[0020] Accordingly, determining the target operating mode based on the current operating state includes:

[0021] Based on the high temperature condition, the target operating mode is determined to be the cooling operating mode, wherein the cooling operating mode is the operating mode in which the SOC chip performs voltage reduction and core reduction.

[0022] Optionally, operating the SOC chip according to the target operating mode includes:

[0023] If the cooling operation mode is selected, the real-time power consumption value is calculated based on the real-time temperature value.

[0024] Determine whether the real-time power consumption value exceeds the power consumption assessment value;

[0025] If the power consumption exceeds the estimated value, the SOC chip will undergo a buck-down and core reduction operation, and the real-time temperature value and the real-time power consumption value will be received at a preset period until the real-time temperature value drops to the temperature threshold range of the normal temperature state.

[0026] Optionally, determining the current operating state of the chip based on the real-time temperature value and the different temperature threshold ranges includes:

[0027] If the real-time temperature value is greater than the sixth threshold and less than the seventh threshold, then the current operating state of the chip is determined to be an over-temperature state, wherein the seventh threshold is the extreme temperature value of the SOC chip obtained by testing.

[0028] Accordingly, determining the target operating mode based on the current operating state includes:

[0029] Based on the over-temperature state, the target operating mode is determined to be a low-power operating mode, wherein the low-power operating mode is an operating mode that reduces the voltage, frequency, and number of cores of the SOC chip to the lowest possible value.

[0030] Optionally, determining the current operating state of the chip based on the real-time temperature value and the different temperature threshold ranges includes:

[0031] If the real-time temperature value is greater than the eighth threshold, then the current operating state of the chip is determined to be overheating.

[0032] Accordingly, determining the target operating mode based on the current operating state includes:

[0033] Based on the overheating state, the target operating mode is determined to be a hibernation mode, which is an operating mode that shuts down the working modules of the SOC chip.

[0034] Optionally, the multiple operating modes include corresponding switching buffers, and determining the target operating mode based on the current operating state includes:

[0035] Determine whether the real-time temperature value is within the switching buffer corresponding to the current operating mode;

[0036] If the real-time temperature value is within the switching buffer, then the target operating mode of the chip is determined to remain unchanged from the current operating mode;

[0037] If the real-time temperature value is not within the switching buffer, the corresponding target operating mode is determined based on the current operating status.

[0038] This invention provides a chip running device, comprising:

[0039] A temperature monitoring module is used to obtain the real-time temperature value of the SOC chip;

[0040] The status determination module is used to determine the current operating status of the SOC chip based on the real-time temperature value and different temperature threshold ranges.

[0041] The mode determination module is used to determine the target operating mode based on the current operating state;

[0042] The operation module is used to run the SOC chip according to the target operation mode.

[0043] This invention provides a SOC chip, comprising:

[0044] Memory, used to store computer programs;

[0045] A processor is used to implement the chip operation method described above when executing the computer program.

[0046] The present invention provides a computer-readable storage medium storing computer-executable instructions, which, when loaded and executed by a processor, implement the steps of the chip operation method described above.

[0047] As can be seen, this invention determines the operating state of the SOC chip based on real-time temperature values ​​and different temperature threshold ranges, and then determines the target operating mode of the SOC chip based on the operating state. This ensures that the SOC chip can intelligently adjust its operating mode during operation, minimizing the occurrence of high temperature and heat in the chip, and enabling differentiated management of SOC chip operation. Different operating modes are executed at different stages, resulting in higher management efficiency and lower impact on SOC chip performance. This application also provides a chip operating device, an SOC chip, and a computer-readable storage medium, which have the above-mentioned beneficial effects. Attached Figure Description

[0048] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0049] Figure 1 A flowchart of the chip operation method provided in an embodiment of the present invention;

[0050] Figure 2 A flowchart illustrating a method for operating a chip at low temperatures, provided in an embodiment of the present invention;

[0051] Figure 3 A flowchart illustrating a method for operating a chip at room temperature, as provided in an embodiment of the present invention;

[0052] Figure 4 A flowchart illustrating a method for operating a chip at high temperatures, provided in an embodiment of the present invention;

[0053] Figure 5 A flowchart illustrating a chip over-temperature operation method provided in an embodiment of the present invention;

[0054] Figure 6 A flowchart illustrating a chip overheating operation method provided in an embodiment of the present invention;

[0055] Figure 7 This is a schematic diagram of a chip operation mode switching provided in an embodiment of the present invention;

[0056] Figure 8 This is a structural block diagram of a chip running device provided in an embodiment of the present invention;

[0057] Figure 9 This is a structural block diagram of a SOC chip provided in an embodiment of the present invention. Detailed Implementation

[0058] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0059] To address the problems existing in the prior art, this invention provides a chip operation method. Based on real-time temperature values ​​and different temperature threshold ranges, the operating state of the SOC chip is determined, and based on the operating state, a target operating mode is determined to run the SOC chip. This ensures that the SOC chip can intelligently adjust its operating mode during operation, minimizing the occurrence of high temperature and high heat in the chip. It also enables differentiated management of the SOC chip operation, allowing different operating modes to be executed at different stages, resulting in higher management efficiency and lower impact on the performance of the SOC chip.

[0060] The following is a detailed introduction; please refer to it. Figure 1 , Figure 1 This is a flowchart of a chip operation method provided in an embodiment of the present invention. The chip operation method in this embodiment of the present invention may include:

[0061] Step S101: Obtain the real-time temperature value of the SOC chip.

[0062] In this embodiment of the invention, the SOC (System on Chip) chip is an integrated circuit chip, generally referring to a system-on-a-chip, which is an integrated circuit with a specific purpose, containing a complete system and all embedded software. It is also a technology used to realize the entire process from determining system functions to software / hardware partitioning and completing the design.

[0063] In this embodiment of the invention, there are no restrictions on the method of obtaining real-time temperature values; real-time temperature values ​​can be obtained using temperature sensors inside the chip.

[0064] Step S102: Determine the current operating status of the SOC chip based on the real-time temperature value and different temperature threshold ranges.

[0065] In this embodiment of the invention, the operating states of the SOC chip can include low temperature state, normal temperature state, high temperature state, over-temperature state, and overheating state. It should be noted that in the low temperature state, the diode characteristics of the chip exhibit decreased conductivity, which is detrimental to chip operation. The normal temperature state represents the optimal operating state for the chip, where the chip's heat generation is within a reasonable range. The high temperature state indicates that the chip temperature has reached a relatively dangerous threshold range, at which point the chip power consumption increases exponentially, requiring effective power consumption control. The over-temperature state indicates that the chip temperature has reached the boundary of its extreme operating temperature. The overheating state indicates that the chip temperature has exceeded the extreme temperature boundary for the chip to operate normally.

[0066] In this embodiment of the invention, the temperature threshold range can be divided according to multiple set thresholds. For example, five intervals can be determined by four thresholds, and each interval corresponds to an operating state range. Specifically, the temperature range below the first threshold corresponds to a low temperature state, the temperature range above the first threshold and below the second threshold corresponds to a normal temperature state, the temperature range above the second threshold and below the third threshold corresponds to a high temperature state, the temperature range above the third threshold and below the fourth threshold corresponds to an overheated state, and the temperature range above the fourth threshold corresponds to an overheated state. In practical applications, the setting of thresholds and the division of intervals can be determined according to the actual situation, and are not limited here.

[0067] Step S103: Determine the target operating mode based on the current operating status.

[0068] In this embodiment of the invention, the current operating state of the SOC chip can be determined based on the real-time temperature value and different temperature threshold ranges, and then the target operating mode corresponding to the current operating state can be determined based on the current operating state.

[0069] Corresponding to the five operating states in the above embodiments, the target operating mode in this embodiment of the invention may include high power consumption operating mode, high performance operating mode, cooling operating mode, low power consumption operating mode, and sleep mode. It should be noted that the high power consumption operating mode is the operating mode in which the SOC chip operates at the maximum voltage, maximum frequency, and maximum number of cores; the high performance operating mode is the operating mode in which the SOC chip maintains the voltage, frequency, and number of cores for high performance; the cooling operating mode is the operating mode in which the SOC chip reduces voltage and cores; the low power consumption operating mode is the operating mode in which the voltage, frequency, and number of cores of the SOC chip are reduced to the lowest possible value; and the sleep mode is the operating mode in which the working module of the SOC chip is turned off.

[0070] Furthermore, multiple operating modes include corresponding switching buffers. The step of determining the target operating mode based on the current operating state includes determining whether the real-time temperature value is within the switching buffer corresponding to the current operating mode. If the real-time temperature value is within the switching buffer, the target operating mode of the chip is determined to remain unchanged as the current operating mode. If the real-time temperature value is not within the switching buffer, the corresponding target operating mode is determined based on the current operating state. It should be noted that the switching buffer can be set with a corresponding buffer temperature range according to various temperature threshold ranges. The setting of the buffer temperature range can be set according to actual needs, for example, it can be set to 5 degrees, without specific limitation here.

[0071] Furthermore, such as Figure 7 The diagram illustrates a chip operation mode switching method according to an embodiment of the present invention. T represents the monitored real-time temperature value; T2, T4, and T6 correspond to the maximum temperatures of the first, second, and third switching buffers, respectively; T1, T3, and T5 correspond to the minimum temperatures of the first, second, and third switching buffers, respectively; and T7 represents the extreme temperature. It should be noted that the switching buffer can be set based on the threshold and buffer temperature range of the operating state interval. The maximum value of the buffer is the sum of the threshold and buffer temperature range of the current operating state interval, and the minimum value is the difference between the threshold and buffer temperature range of the current operating state interval. When the real-time temperature value is within the switching buffer, the current operating mode remains unchanged. When the real-time temperature value exceeds the maximum value of the switching buffer, or is less than the minimum value of the switching buffer, the corresponding operating mode is determined based on the operating state corresponding to the current real-time temperature value.

[0072] For example, if the current operating mode is the high-power operating mode corresponding to the low-temperature state, the minimum value of the first switching buffer is the value obtained by subtracting the first threshold from the buffer temperature range, and the maximum value is the value obtained by adding the first threshold to the buffer temperature range. When the real-time temperature value is within the first switching buffer, the current high-power operating mode is maintained. When the real-time temperature value exceeds the maximum value of the first switching buffer, or when the real-time temperature value is less than the minimum value of the first switching buffer, the corresponding operating mode is determined according to the operating state corresponding to the real-time temperature value at this time.

[0073] For example, if the first threshold is set to 60 degrees Celsius and the buffer temperature range is 5 degrees Celsius, then the temperature range of the first switching buffer is 55 to 65 degrees Celsius. If the current operating mode is the high-power operating mode corresponding to the low-temperature state, the current high-power operating mode is maintained when the real-time temperature is 9 degrees Celsius. When the acquired real-time temperature is 68 degrees Celsius, it is determined that the current operating state is the normal temperature state, and the target operating mode is switched from the current high-power operating mode to the high-performance operating mode corresponding to the normal temperature state. If the current operating mode is the high-performance operating mode corresponding to the normal temperature state, and the real-time temperature is 54 degrees Celsius, then the target operating mode is switched from the current high-performance operating mode to the high-power operating mode corresponding to the low-temperature state.

[0074] For example, if the second threshold is set to 110 degrees Celsius and the buffer temperature range is 5 degrees Celsius, then the temperature range of the second switching buffer is 105 to 115 degrees Celsius. If the current operating mode is the high-performance operating mode corresponding to the normal temperature state, the current high-performance operating mode will be maintained when the real-time temperature is 110 degrees Celsius. When the real-time temperature reaches 116 degrees Celsius, the operating state is determined to be a high-temperature state based on the real-time temperature, and the target operating mode will be switched from the current high-performance operating mode to the cooling operating mode corresponding to the high-temperature state. If the current operating mode is the cooling operating mode corresponding to the high-temperature state, when the real-time temperature is 104 degrees Celsius, the target operating mode will be switched from the current cooling operating mode to the high-performance operating mode corresponding to the normal temperature state.

[0075] The mode switching rules for other switching buffers are the same as those in the examples above, and will not be elaborated on here.

[0076] The switching buffer proposed in this embodiment of the invention reduces the negative impact of repeated transitions between different states and can effectively eliminate power consumption caused by frequent transitions.

[0077] In some embodiments, in order to reduce the power consumption caused by repeated transitions between different states, a detection count buffer can also be set. Specifically, the step of determining the target operating mode based on the current operating state includes determining whether the number of times the detected real-time temperature exceeds the temperature threshold range of the current operating state exceeds a preset value. When the number of times the detected real-time temperature exceeds the temperature threshold range of the current operating state exceeds the preset value, the current operating mode is switched to the target operating mode corresponding to the real-time temperature based on the real-time temperature value.

[0078] For example, if the SOC chip is currently operating in an over-temperature state, in order to avoid prematurely entering the overheating mode due to frequent temperature fluctuations, the SOC chip will only switch from the low-performance, low-power mode corresponding to the over-temperature state to the sleep mode when the number of times the detected real-time temperature exceeds the maximum value of the over-temperature state temperature threshold range exceeds a preset value.

[0079] Step S104: Run the SOC chip according to the target operating mode.

[0080] Specifically, after determining the target operating mode based on the current operating status, the SOC chip can be operated according to the target operating mode, so that the SOC chip can intelligently adjust according to temperature changes, thereby achieving efficient management of chip power consumption.

[0081] In this embodiment of the invention, the power balancing unit can manage the operation of each working module in the SOC chip according to the target operating mode. The working modules may include CPU, GPU, DMA channel count, etc. It should be noted that the power balancing unit can divide the working modules into basic modules and optional modules. The basic modules will directly result in the loss of function if they are turned off. The adjustment method for them is mainly to reduce the frequency or reduce the number of cores, such as CPU, GPU, etc. Optional modules are generally only used to improve system performance or user experience. Turning them off will not affect the normal operation of the system. The adjustment method for such modules can be to directly select to turn them off.

[0082] As can be seen, in this embodiment of the invention, different operating states are determined based on real-time temperature values ​​and different temperature threshold ranges, thereby enabling differentiated management of the SOC chip operation. This allows for the execution of different operating modes under different operating states, ensuring that the SOC chip can intelligently adjust its operating mode during operation, minimizing the occurrence of high temperature and heat in the chip, resulting in higher chip management efficiency and lower impact on SOC chip performance.

[0083] Please refer to Figure 2 The present invention provides a method for operating a chip at low temperatures, which, compared with the previous embodiment, provides a more detailed explanation of the technical solution.

[0084] Step 201: Obtain the real-time temperature value of the SOC chip.

[0085] Step 202: If the real-time temperature value is less than the first threshold, then the current operating state of the SOC chip is determined to be a low-temperature state.

[0086] In this embodiment of the invention, the first threshold is a value determined based on the IDDQ value of the SOC chip. The IDDQ value is used for static leakage current testing, and it represents the test value as high or low. The value is stored in a fixed memory device. A higher IDDQ value indicates a faster operating speed and higher power consumption for the target module at the same frequency. For example, the first threshold can be obtained by testing the IDDQ value using the following formula:

[0087]

[0088] Among them, iddq min To test the chip with the smallest IDDQ value, T 1maxTo obtain the maximum first threshold by testing the chip with the smallest IDDQ value, iddq max The chip with the highest IDDQ value was tested. 1min To obtain the minimum first threshold by testing the chip with the largest IDDQ value, iddq is the IDDQ value of the desired chip, and T1 is the calculated first threshold.

[0089] Step 203: Based on the low temperature condition, determine the target operating mode as the high power consumption operating mode.

[0090] In this embodiment of the invention, the high-power operation mode is the operating mode in which the SOC chip operates at maximum voltage, maximum frequency, and maximum number of cores. For example, if the SOC chip has a quad-core CPU and a quad-core GPU, and the SOC chip is determined to be in a high-power, high-performance operation mode based on the low-temperature condition, then all four cores of the CPU and the four cores of the GPU are activated, and the voltage and operating frequency of the CPU and GPU are increased to run the chip.

[0091] Step S204: Run the SOC chip according to the high power consumption operation mode.

[0092] In this embodiment of the invention, according to the high-power operation mode, all working modules of the SOC chip run simultaneously, and the voltage, number of cores, and frequency of each module are maximized. For example, if a quad-core CPU has some CPU cores that are not in use, all of these inactive CPU cores are activated and run at maximum voltage and maximum frequency. This allows the chip temperature to rise rapidly, which is more conducive to chip operation.

[0093] Please refer to Figure 3 The present invention provides a method for operating a chip at room temperature. The chip operation method of the present invention may include:

[0094] Step 301: Obtain the real-time temperature value of the SOC chip.

[0095] Step 302: If the real-time temperature value is greater than the second threshold and less than the third threshold, then the current operating state of the chip is determined to be the normal temperature state.

[0096] In this embodiment of the invention, the third threshold is the temperature value at the moment when the power consumption of the SOC chip suddenly increases, obtained under normal temperature conditions. The second threshold can be the same as the first threshold, i.e., the value determined based on the IDDQ value of the SOC chip. It should be noted that in this embodiment, the jump value is the real-time temperature value corresponding to the moment when the real-time power consumption of the SOC chip suddenly increases exponentially under normal temperature conditions. For example, during testing, three groups of chips are selected, with their IDDQ values ​​distributed in three intervals from large to small. In a scenario with a fixed operating environment and relatively stable power consumption, the main points of the jump can be determined by monitoring the chip current module. An average value is measured for each interval as the third threshold for the chip in that IDDQ value interval.

[0097] Step 303: Based on the ambient temperature, determine the target operating mode as the high-performance operating mode.

[0098] In this embodiment of the invention, the high-performance operation mode is a mode in which the SOC chip maintains high voltage, frequency, and number of cores for high-performance operation. That is, the SOC chip can maintain a high voltage, frequency, and number of cores according to actual needs to achieve the fastest and most efficient response to received requests. For example, if the SOC chip has a quad-core CPU and a quad-core GPU, and the SOC chip is determined to be in high-performance operation mode based on normal temperature conditions, then all four CPU cores and three GPU cores can be activated according to actual needs. When a user initiates a request, the CPU quickly and efficiently fulfills the user's request.

[0099] Step S304: Run the SOC chip according to the high-performance operation mode.

[0100] In this embodiment of the invention, room temperature is the optimal operating state for the chip, and the chip's heat generation is within a reasonable range. Therefore, at room temperature, the system performance can be adjusted according to the actual application requirements of the system to respond to user needs in the fastest and most efficient way, achieving high-performance requirements. Based on the high-performance operating mode, the power balancing unit can determine the working modules that need to run in the SOC chip and adjust the voltage, number of cores, and frequency of each module to the optimal state to achieve high-performance operation of the SOC chip.

[0101] Please refer to Figure 4 The present invention provides a chip operation method under high temperature conditions, which may include:

[0102] Step 401: Obtain the real-time temperature value of the SOC chip.

[0103] Step 402: If the real-time temperature value is greater than the fourth threshold and less than the fifth threshold, then the current operating state of the chip is determined to be a high temperature state.

[0104] In this embodiment of the invention, the fourth threshold can be the same as the third threshold, which is the jump value at the moment of sudden temperature rise of the SOC chip obtained under normal temperature conditions. The fifth threshold is calculated by combining the extreme temperature value and a fixed value of the SOC chip. The extreme value can be obtained through theoretical values ​​of chip design and actual measurements. For example, the fifth threshold can be calculated based on the extreme value using the following formula:

[0105] T5 = T7 - ​​β

[0106] Among them, T7 is the limit temperature at which the chip can operate, β can be a fixed value between 10 and 20 degrees, and T5 is the fifth threshold.

[0107] Step 403: Based on the high temperature condition, determine the target operating mode as the cooling operating mode.

[0108] In this embodiment of the invention, the cooling operation mode is the operation mode in which the SOC chip performs voltage reduction and core reduction. For example, at this time, all four cores of the CPU and the four cores of the GPU in the SOC chip are turned on. Based on the high temperature state, it is determined that the SOC chip is in cooling operation mode. That is, according to the actual situation, two cores of the CPU and three cores of the GPU can be turned off, leaving only two CPUs and one GPU to work.

[0109] Step S404: Run the SOC chip according to the cooling operation mode.

[0110] In this embodiment of the invention, the power balancing unit can be used to run various working modules in the SOC chip according to the cooling operation mode. It should be noted that the real-time power consumption value can be calculated based on the real-time temperature value. It is determined whether the real-time power consumption value exceeds the power consumption assessment value. The setting of the power consumption assessment value is not limited. It can be set in advance by the designer according to the requirements, or it can be set according to the actual usage. If it exceeds the power consumption assessment value, the SOC chip is subjected to voltage reduction and core reduction operation, and the real-time temperature value and real-time power consumption value are received according to a preset period. The value of the preset period is not limited and can be determined according to the actual situation. If the real-time temperature value and real-time power consumption value decrease within the period, the power consumption of the SOC chip is maintained until the real-time temperature value of the SOC chip drops to the temperature threshold range of the room temperature state. In practical applications, the voltage reduction and core reduction operation of the SOC chip can be to implement a stepped core reduction and frequency reduction operation on the main modules, and to shut down the optional modules in stages, or to shut down the relevant performance of the working modules. The specific performance can be determined according to the actual situation and is not limited here.

[0111] It should be noted that, in this embodiment of the invention, a relevant power consumption coefficient can be obtained based on the real-time temperature value, and the real-time power consumption value can be calculated by combining the power consumption coefficient with the power consumption reference value. For example, the real-time power consumption value can be calculated using the following formula:

[0112] P′ cur =(N 1cur P 1cur +N 2cur P 2cur +…+N ncur P ncur )*δ

[0113] Where δ is the coefficient related to power consumption and temperature and IDDQ value, denoted as the power consumption coefficient, N ncur P represents the actual number of module cores or modules in the nth module. ncur P′ represents the base power consumption value calculated after frequency and voltage adjustment of the nth module. cur To calculate the theoretical total power consumption of all monitoring modules, it should be noted that in this embodiment of the invention, it is the sum of the real-time power consumption values ​​of n modules. The individual real-time power consumption value can be obtained using the following formula:

[0114] P cur =P base *δ

[0115] Among them, P cur For a single real-time power consumption value, P base Using the IDDQ value as a baseline, the module power consumption at room temperature is tested by selecting a chip with an intermediate IDDQ value. It should be noted that in this embodiment of the invention, δ can be obtained according to the following formula:

[0116]

[0117] The following mapping relationship can be established based on temperature and IDDQ value:

[0118] f(iddq,T)→δ

[0119] In this embodiment of the invention, the corresponding power consumption coefficient can be obtained based on the real-time temperature value. It should be noted that, in this embodiment of the invention, P base With P cur It can be calculated using a unified formula based on the benchmark value, as follows:

[0120] P = CV 2 f

[0121] Where C is the system load capacitance, V is the supply voltage, f is the operating frequency, and P is the power consumption value, which can be calculated based on the formula and the voltage and frequency measured at room temperature. base Furthermore, the measured power consumption P can be calculated based on the formula and the detected real-time voltage and frequency. cur .

[0122] The method for calculating real-time power consumption based on temperature in this embodiment of the invention employs parameter differentiation processing, which can effectively assess the target power consumption trend. It fully considers the high-temperature exponential effect of chip temperature on the module's basic power consumption and the differentiated characteristics of the chip itself. The parameters are closer to the actual engineering situation, which can effectively control the probability of the chip entering a low-power mode and better achieve the goal of timely power consumption convergence when the power consumption is too high.

[0123] Please refer to Figure 5 The present invention provides a chip over-temperature operation method, which may include:

[0124] Step 501: Obtain the real-time temperature value of the SOC chip.

[0125] Step 502: If the real-time temperature value is greater than the sixth threshold and less than the seventh threshold, then the current operating state of the chip is determined to be an over-temperature state.

[0126] In this embodiment of the invention, the sixth threshold can be calculated by combining the extreme temperature value and fixed value of the SOC chip, and can be the same as the value of the fifth threshold. The seventh threshold is the extreme temperature value of the SOC chip, that is, the extreme temperature at which the chip can work normally. The extreme temperature value of the SOC chip can be obtained through the theoretical value of the chip design and actual testing.

[0127] Step 503: Based on the over-temperature condition, determine the target operating mode as the low-power operating mode.

[0128] In this embodiment of the invention, the low-power operation mode is an operation mode that reduces the voltage, frequency, and number of cores of the SOC chip to the lowest possible level. For example, if the current state is determined to be over-temperature based on the real-time temperature, the SOC chip is determined to be in low-power operation mode, that is, the number of CPU and GPU cores is turned off to the maximum extent, and the operating frequency and voltage of both are reduced to maintain the low-performance, low-power operation mode of the SOC chip.

[0129] Step S504: Run the SOC chip according to the low-power operation mode.

[0130] In this embodiment of the invention, the over-temperature state indicates that the chip temperature has reached the boundary of its extreme operating temperature. Power consumption must be reduced to the maximum extent possible to lower the chip temperature. Therefore, the over-temperature state corresponds to a low-power operation mode, where all modules that can be shut down must be turned off, and the performance of all working modules is reduced to a minimum, employing a low-performance, low-power configuration. Therefore, according to the low-power operation mode, the power balancing unit operates the various working modules in the SOC chip. Optional modules can be directly shut down, and the frequency or core count of basic modules can be reduced. For example, in this case, a dual-core CPU with two cores and two application modules enabled can have its two CPU cores reduced to one and one enabled application module disabled, allowing the SOC chip to operate in a low-performance, low-power manner.

[0131] Please refer to Figure 6 The present invention provides a chip overheating operation method, which may include:

[0132] Step 601: Obtain the real-time temperature value of the SOC chip.

[0133] Step 602: If the real-time temperature value is greater than the eighth threshold, then the chip's current operating state is determined to be overheated.

[0134] In this embodiment of the invention, the eighth threshold can be the extreme temperature value of the SOC chip, which can be the same as the value of the seventh threshold, that is, the extreme temperature value of the SOC chip is obtained through the theoretical value of chip design and actual testing.

[0135] Step 603: Based on the overheating status, determine the target operating mode as hibernation mode.

[0136] In this embodiment of the invention, the hibernation mode is the operating mode that shuts down the working modules of the SOC chip. For example, if the dual-core CPU and quad-core GPU in the SOC chip are both turned on at this time, and the SOC chip is determined to be in hibernation mode based on the overheating status, then the quad-core CPU and quad-core GPU can be completely stopped from working.

[0137] Step S604: Run the SOC chip according to the sleep mode.

[0138] In this embodiment of the invention, all working modules can be directly shut down according to the hibernation mode, and the SOC chip stops working.

[0139] Based on any of the above embodiments, this invention provides a chip operation method. By determining the operating state of the SOC chip according to real-time temperature values ​​and different temperature threshold ranges, and determining the target operating mode of the SOC chip according to the operating state, this method ensures that the SOC chip can intelligently adjust its operating mode during operation, minimizing the occurrence of high temperature and high heat in the chip, and enabling differentiated management of the SOC chip operation. This allows for the execution of different operating modes at different stages, resulting in higher management efficiency and lower impact on the performance of the SOC chip.

[0140] The following describes a chip running device and a SOC chip provided by an embodiment of the present invention. The chip running device and SOC chip described below can be referred to in correspondence with the chip running method described above.

[0141] Please refer to Figure 8 , Figure 8 This is a structural block diagram of a chip running device provided in an embodiment of the present invention. The device may include:

[0142] Temperature monitoring module 10 is used to acquire the real-time temperature value of the SOC chip;

[0143] The power balancing module 30 is used to determine the current operating state of the SOC chip based on the real-time temperature value and different temperature threshold ranges; determine the target operating mode based on the current operating state; and run the SOC chip according to the target operating mode.

[0144] Based on the above embodiments, the power consumption balancing module 30 may include:

[0145] The status determination unit is used to determine the current operating status of the SOC chip based on the real-time temperature value and different temperature threshold ranges.

[0146] The mode determination unit is used to determine the target operating mode based on the current operating state;

[0147] The operation unit is used to run the SOC chip according to the target operation mode.

[0148] Based on any of the above embodiments, the state determination unit includes:

[0149] The first judgment subunit is used to determine that the current operating state of the SOC chip is a low temperature state if the real-time temperature value is less than a first threshold, wherein the first threshold is a value determined based on the IDDQ value of the SOC chip.

[0150] The second judgment subunit is used to determine that the current operating state of the chip is normal temperature state if the real-time temperature value is greater than the second threshold and less than the third threshold. The third threshold is the jump value at the moment when the temperature of the SOC chip suddenly rises under normal temperature environment, and the second threshold is a value determined according to the IDDQ value of the SOC chip.

[0151] The third judgment subunit is used to determine that the current operating state of the chip is a high temperature state if the real-time temperature value is greater than the fourth threshold and less than the fifth threshold. The fifth threshold is calculated by the extreme temperature value and fixed value of the SOC chip.

[0152] The fourth judgment subunit is used to determine that the current operating state of the chip is an over-temperature state if the real-time temperature value is greater than the sixth threshold and less than the seventh threshold, wherein the seventh threshold is the extreme temperature value of the SOC chip obtained by testing.

[0153] The fifth judgment subunit is used to determine that the current operating state of the chip is overheated if the real-time temperature value is greater than the eighth threshold.

[0154] Based on any of the above embodiments, the pattern determination unit may include:

[0155] The first mode determination subunit is used to determine the target operating mode as a high-power operating mode based on the low temperature state, wherein the high-power operating mode is the operating mode in which the SOC chip operates at the maximum voltage, maximum frequency, and maximum number of cores;

[0156] The second mode determination subunit is used to determine the target operating mode as a high-performance operating mode based on the ambient temperature state, wherein the high-performance operating mode is the operating mode in which the SOC chip maintains voltage, frequency, and number of cores to perform high-performance operation.

[0157] The third mode determination subunit is used to determine the target operating mode as a cooling operating mode based on the high temperature state, wherein the cooling operating mode is the operating mode in which the SOC chip performs buck-voltage and core reduction operations;

[0158] The fourth mode determination subunit is used to determine the target operating mode as a low-power operating mode based on the over-temperature state, wherein the low-power operating mode is an operating mode that reduces the voltage, frequency and number of cores of the SOC chip to the lowest value.

[0159] The fifth mode determination subunit is used to determine the target operating mode as a hibernation mode based on the overheating state. The hibernation mode is the operating mode that shuts down the working modules of the SOC chip.

[0160] Based on any of the above embodiments, it may further include:

[0161] The power consumption calculation module 20 is used to calculate the real-time power consumption value based on the real-time temperature value.

[0162] In the embodiments of the present invention, as follows Figure 8 The device can receive the power supply voltage (V), operating frequency (f), and number of modules or cores (n) of various working modules such as module 1, module 2, and module 3. Based on the received real-time temperature and the V, f, and n of each module, it calculates the real-time power consumption value and determines whether the real-time power consumption value exceeds the power consumption assessment value. If it exceeds the power consumption assessment value, the power balancing module 30 operates on the V, f, and n of each working module. For example, in the cooling operation mode, the real-time power consumption value is calculated based on the real-time temperature value; it is determined whether the real-time power consumption value exceeds the power consumption assessment value; if it exceeds the power consumption assessment value, the SOC chip is subjected to voltage and core reduction operation, and the real-time temperature value and the real-time power consumption value are received according to a preset cycle until the real-time temperature value drops to the temperature threshold range of the normal temperature state.

[0163] Based on any of the above embodiments, the multiple operating modes include corresponding switching buffers, and the power balancing module 30 may further include:

[0164] A buffer unit is used to determine whether the real-time temperature value is within the switching buffer corresponding to the current operating mode;

[0165] The determining unit is configured to determine the target operating mode of the chip as unchanged from the current operating mode if the real-time temperature value is within the switching buffer; and to determine the corresponding target operating mode based on the current operating state if the real-time temperature value is not within the switching buffer.

[0166] In this embodiment of the invention, the status judgment module 20 determines the operating status of the SOC chip based on the real-time temperature value and different temperature threshold ranges. After the mode judgment module 30 determines the target operating mode, the operating module 40 runs the SOC chip to ensure that the SOC chip can intelligently adjust the operating mode during operation, minimize the occurrence of high temperature and high heat in the chip, and perform differentiated management of the SOC chip operation, so as to execute different operating modes at different stages, resulting in higher management efficiency and lower impact on the performance of the SOC chip.

[0167] Please refer to Figure 9 , Figure 9 This is a structural block diagram of a SOC chip provided in an embodiment of the present invention. The SOC chip includes:

[0168] Memory 10 is used to store computer programs;

[0169] The processor 20 is used to execute the computer program to implement the chip operation method described above.

[0170] like Figure 9 The diagram shown is a schematic of the structure of a SOC chip, which may include: a memory 10, a processor 20, a communication interface 31, an input / output interface 32, and a communication bus 33.

[0171] In this embodiment of the invention, the memory 10 is used to store one or more programs. The programs may include program code, which includes computer operation instructions. In this embodiment, the memory 10 may store programs for implementing the following functions:

[0172] Obtain the real-time temperature value of the SOC chip;

[0173] The current operating state of the SOC chip is determined based on the real-time temperature value and different temperature threshold ranges.

[0174] Based on the current operating status, determine the target operating mode;

[0175] The SOC chip is operated according to the target operating mode.

[0176] In one possible implementation, the memory 10 may include a program storage area and a data storage area, wherein the program storage area may store the operating system and applications required for at least one function; and the data storage area may store data created during use.

[0177] Furthermore, memory 10 may include read-only memory and random access memory, providing instructions and data to the processor. A portion of the memory may also include NVRAM. The memory stores operating systems and operating instructions, executable modules, or data structures, or subsets thereof, or extended sets thereof, wherein the operating instructions may include various operating instructions for implementing various operations. The operating system may include various system programs for implementing various basic tasks and handling hardware-based tasks.

[0178] Processor 20 can be a central processing unit (CPU), an application-specific integrated circuit, a digital signal processor, a field-programmable gate array, or other programmable logic device. Processor 20 can be a microprocessor or any conventional processor. Processor 20 can call programs stored in memory 10.

[0179] The communication interface 31 can be an interface for connecting with other devices or systems.

[0180] The input / output interface 32 can be an interface used to acquire external input data or output data to the outside world.

[0181] Of course, it should be noted that, Figure 9 The structure shown does not constitute a limitation on the SOC chip in the embodiments of this application. In practical applications, the SOC chip may include more than Figure 9 More or fewer components as shown, or combinations of certain components.

[0182] In this embodiment of the invention, the operating status of the SOC chip is determined based on real-time temperature values ​​and different temperature threshold ranges. Based on the operating status, the target operating mode of the SOC chip is determined to ensure that the SOC chip can intelligently adjust its operating mode during operation, minimizing the occurrence of high temperature and high heat in the chip. It also enables differentiated management of the SOC chip operation, allowing different operating modes to be executed at different stages, resulting in higher management efficiency and lower impact on the performance of the SOC chip.

[0183] This invention also provides a computer-readable storage medium storing computer-executable instructions. When these instructions are loaded and executed by a processor, they enable the following actions: acquiring the real-time temperature value of the SOC chip; determining the current operating state of the SOC chip based on the real-time temperature value and different temperature threshold ranges; determining a target operating mode based on the current operating state; and operating the SOC chip according to the target operating mode. This invention ensures that the SOC chip can intelligently adjust its operating mode during operation by determining the operating state of the SOC chip based on the real-time temperature value and different temperature threshold ranges, minimizing the occurrence of high temperatures and overheating, and enabling differentiated management of the SOC chip's operation. This allows for the execution of different operating modes at different stages, resulting in higher management efficiency and lower impact on SOC chip performance.

[0184] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to the method section.

[0185] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of all three. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0186] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of the three. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0187] The chip operation method, apparatus, SOC chip, and storage medium provided by this invention have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this invention. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this invention. It should be noted that those skilled in the art can make various improvements and modifications to this invention without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this invention.

Claims

1. A chip operation method, characterized by, Applied to a System-on-a-Chip (SOC) chip, the SOC chip includes multiple operating states, which are divided according to different temperature threshold ranges. Corresponding to the multiple operating states, the SOC chip includes multiple operating modes. The method includes: Obtain the real-time temperature value of the SOC chip; The current operating state of the SOC chip is determined based on the real-time temperature value and different temperature threshold ranges; the operating state includes low temperature state, normal temperature state, high temperature state, over-temperature state, and overheating state. The temperature threshold range is divided according to multiple thresholds, including a first threshold, a second threshold, a third threshold, and a fourth threshold. The temperature range below the first threshold corresponds to a low temperature state, the temperature range above the first threshold and below the second threshold corresponds to a normal temperature state, the temperature range above the second threshold and below the third threshold corresponds to a high temperature state, the temperature range above the third threshold and below the fourth threshold corresponds to an over-temperature state, and the temperature range above the fourth threshold corresponds to an overheated state. Wherein, the first threshold is a value determined based on the IDDQ value of the SOC chip; the second threshold is a value determined based on the IDDQ value of the SOC chip; the third threshold is the jump value at the moment of sudden temperature rise of the SOC chip obtained under normal temperature conditions; and the fourth threshold is the jump value at the moment of sudden temperature rise of the SOC chip obtained under normal temperature conditions. Based on the current operating status, determine the target operating mode; The SOC chip is operated according to the target operating mode; Operating the SOC chip according to the target operating mode includes: According to the target operating mode, the operation of each working module in the SOC chip is managed by the power balancing unit. The power balancing unit manages the operation of each working module in the SOC chip, specifically by operating the power supply voltage, operating frequency, and number of modules or cores of each working module. The target operating modes include high-power operating mode, high-performance operating mode, cooling operating mode, low-power operating mode, and sleep mode; Among them, the target operating mode corresponding to the low temperature state is the high power consumption operating mode, which is the operating mode in which the SOC chip operates at the maximum voltage, maximum frequency, and maximum number of cores. The target operating mode corresponding to the room temperature state is the high-performance operating mode, which is the operating mode in which the SOC chip maintains voltage, frequency, and number of cores to perform high-performance work. The target operating mode corresponding to the high temperature state is the cooling operating mode, which is the operating mode in which the SOC chip performs voltage reduction and core reduction. The target operating mode corresponding to the over-temperature state is the low-power operating mode, which is the operating mode that reduces the voltage, frequency, and number of cores of the SOC chip to the lowest possible level. The target operating mode corresponding to the overheating state is the hibernation mode, which is the operating mode that shuts down the working modules of the SOC chip.

2. The chip operation method of claim 1, wherein, The step of operating the SOC chip according to the target operating mode includes: If the cooling operation mode is selected, the real-time power consumption value is calculated based on the real-time temperature value. Determine whether the real-time power consumption value exceeds the power consumption assessment value; If the power consumption exceeds the power consumption assessment value, the SOC chip will be subjected to a buck-down and core reduction operation, and the real-time temperature value and the real-time power consumption value will be received according to a preset cycle until the real-time temperature value drops to the temperature threshold range of normal temperature.

3. The chip operation method according to any one of claims 1 to 2, wherein The multiple operating modes include corresponding switching buffers, and determining the target operating mode based on the current operating state includes: Determine whether the real-time temperature value is within the switching buffer corresponding to the current operating mode; If the real-time temperature value is within the switching buffer, then the target operating mode of the chip is determined to remain unchanged from the current operating mode; If the real-time temperature value is not within the switching buffer, the corresponding target operating mode is determined based on the current operating status.

4. A chip operation device, characterized by comprising: include: Temperature monitoring module, used to obtain the real-time temperature value of SOC chip; The status determination module is used to determine the current operating status of the SOC chip based on the real-time temperature value and different temperature threshold ranges. The operating status includes low temperature state, normal temperature state, high temperature state, over-temperature state, and overheating state. The temperature threshold range is divided according to multiple set thresholds, including a first threshold, a second threshold, a third threshold, and a fourth threshold. The temperature range below the first threshold corresponds to the low temperature state, the temperature range above the first threshold and below the second threshold corresponds to the normal temperature state, the temperature range above the second threshold and below the third threshold corresponds to the high temperature state, the temperature range above the third threshold and below the fourth threshold corresponds to the over-temperature state, and the temperature range above the fourth threshold corresponds to the overheating state. Wherein, the first threshold is a value determined based on the IDDQ value of the SOC chip; the second threshold is a value determined based on the IDDQ value of the SOC chip; the third threshold is the jump value at the moment of sudden temperature rise of the SOC chip obtained under normal temperature conditions; and the fourth threshold is the jump value at the moment of sudden temperature rise of the SOC chip obtained under normal temperature conditions. The mode determination module is used to determine the target operating mode based on the current operating state; The operation module is used to run the SOC chip according to the target operation mode; The operation module is specifically used to manage the operation of each working module in the SOC chip according to the target operation mode using the power balancing unit; the power balancing unit manages the operation of each working module in the SOC chip specifically includes operating on the power supply voltage, operating frequency, and number of modules or cores of each working module; The target operating modes include high-power operating mode, high-performance operating mode, cooling operating mode, low-power operating mode, and sleep mode; Among them, the target operating mode corresponding to the low temperature state is the high power consumption operating mode, which is the operating mode in which the SOC chip operates at the maximum voltage, maximum frequency, and maximum number of cores. The target operating mode corresponding to the room temperature state is the high-performance operating mode, which is the operating mode in which the SOC chip maintains voltage, frequency, and number of cores to perform high-performance work. The target operating mode corresponding to the high temperature state is the cooling operating mode, which is the operating mode in which the SOC chip performs voltage reduction and core reduction. The target operating mode corresponding to the over-temperature state is the low-power operating mode, which is the operating mode that reduces the voltage, frequency, and number of cores of the SOC chip to the lowest possible level. The target operating mode corresponding to the overheating state is the hibernation mode, which is the operating mode that shuts down the working modules of the SOC chip.

5. A SOC chip, characterized by, include: Memory, used to store computer programs; A processor for executing the computer program to implement the chip operation method according to any one of claims 1 to 3.

Images