A method, device, apparatus and storage medium for power-on / off control of a machine

Abstract

This application discloses a method, apparatus, device, and storage medium for controlling the power-on / off of a machine, relating to the field of computer technology. It is applied to a power management board integrating an FPGA, wherein the power management board is connected to a power module with an integrated power switch unit and a motherboard module with an integrated substrate management controller. The method includes: acquiring test progress information of machine aging tests currently being performed within the machine system; controlling the opening and closing of a target signal corresponding to the power switch unit in the power module based on the test progress information; and controlling the current machine system to perform corresponding power-on / off operations according to the opening and closing state of the target signal. This application acquires the test progress information of the machine aging test through the power management board, and then the FPGA, acting as an analog switch, dynamically opens and closes the target signal of the power switch unit according to the test progress information, thereby controlling the power-on / off operations of the current machine system. This enables intelligent dynamic control of power disconnection, reducing power consumption during server idle standby.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a method, apparatus, device, and storage medium for controlling the power-on and power-off of a machine. Background Technology

[0002] With the advancement of technology, servers are no longer commonly seen in people's lives, yet they support the operation of the entire society. Mobile payment, mobile and computer communication, map navigation, and many other applications all rely on the powerful computing capabilities of servers, which play a crucial role in people's lives. The launch of a mature server product requires repeated testing and verification by engineers. Aging tests in production lines, as the final step in product quality inspection, play a vital and irreplaceable role. The energy consumption of testing a large number of machines is enormous. In addition to the normal testing power consumption, a significant amount of energy is also wasted when machines are in standby mode after testing or when testing is paused. This meaningless energy consumption is a huge waste, increasing product costs, imposing additional burdens on enterprises, and also damaging the environment and wasting social resources. In existing technologies, the motherboard is directly powered by a power module that integrates a PSU (Power Switching Unit). The system can only be remotely shut down via software and cannot be completely powered off. Therefore, the power cord must be manually unplugged to disconnect the power. However, this method of manually unplugging the power cord is too labor-intensive for the production line, not intelligent enough, and cannot intuitively show the current test status.

[0003] In summary, during the aging test of server functions in production line manufacturing, how to avoid increasing power consumption by keeping the server in standby mode after the test is completed or due to the test being paused is a problem that needs to be solved in this field. Summary of the Invention

[0004] In view of this, the purpose of this invention is to provide a method, apparatus, device, and storage medium for controlling the power-on and power-off of a machine, which can intelligently and dynamically control the disconnection of the power supply, thereby reducing the power consumption of the server during idle standby, saving a significant amount of energy, avoiding resource waste, and improving productivity to increase efficiency. The specific solution is as follows:

[0005] In a first aspect, this application discloses a machine power-on / off control method applied to a power management board integrating an FPGA, wherein the power management board is connected to a power module integrating a power switching unit and a motherboard module integrating a substrate management controller, and the machine power-on / off control method includes:

[0006] Obtain the test progress information of the machine aging test currently being performed within the machine system;

[0007] The opening and closing of the target signal corresponding to the power switch unit in the power module is controlled based on the test progress information;

[0008] The machine system is controlled to perform corresponding power-on and power-off operations based on the opening and closing state of the target signal.

[0009] Optionally, obtaining the test progress information for machine aging tests currently being performed within the machine system includes:

[0010] The test progress information of the machine aging test in the current machine system is obtained in real time and dynamically through the integrated circuit bus.

[0011] Optionally, controlling the opening and closing of the target signal corresponding to the power switch unit in the power module based on the test progress information includes:

[0012] If the test progress information indicates that the machine aging test has been completed, the target signal in the power switch unit is disconnected by the analog switch of the FPGA.

[0013] Optionally, controlling the current machine system to perform corresponding power-on / off operations based on the opening / closing state of the target signal includes:

[0014] When the target signal in the power switch unit is in the off state, the machine system is controlled by the preset ipmitool to perform the corresponding power-down operation.

[0015] Optionally, the step of disconnecting the target signal in the power switching unit via the analog switch of the FPGA includes:

[0016] The enable signal and status signal in the power switch unit are disconnected by the analog switch of the FPGA.

[0017] Optionally, controlling the opening and closing of the target signal corresponding to the power switch unit in the power module based on the test progress information includes:

[0018] If the test progress information indicates that the machine aging test has not been completed, then determine whether there is a FAIL item in the machine aging test and obtain the corresponding judgment result;

[0019] Based on the judgment result, it is determined whether the test state of the machine aging test is in a normal test state, and the opening and closing of the target signal corresponding to the power switch unit in the power module is controlled according to the test state.

[0020] Optionally, determining whether the machine aging test is in a normal test state based on the judgment result, and controlling the opening and closing of the target signal corresponding to the power switch unit in the power module according to the test state includes:

[0021] If the determination result indicates that the FAIL item does not exist in the machine aging test, then the test status of the machine aging test currently being performed in the machine system is determined to be in the normal test status, and disconnection of the target signal corresponding to the power switch unit in the power module is prohibited.

[0022] If the FAIL item exists in the machine aging test, the test status of the machine aging test currently being performed in the machine system is determined to be an abnormal test status, and a prompt message to restart the machine aging test is returned.

[0023] Secondly, this application discloses a machine power-on / off control device applied to a power management board integrating an FPGA, wherein the power management board is connected to a power module integrating a power switching unit and a motherboard module integrating a substrate management controller, and the machine power-on / off control device includes:

[0024] The progress information acquisition module is used to acquire the test progress information of the machine aging test in the current machine system;

[0025] A signal switching control module is used to control the opening and closing of the target signal corresponding to the power switch unit in the power module based on the test progress information;

[0026] The system power-on / off control module is used to control the current machine system to perform corresponding power-on / off operations based on the opening / closing state of the target signal.

[0027] Thirdly, this application discloses an electronic device, including:

[0028] Memory, used to store computer programs;

[0029] A processor is used to execute the computer program to implement the steps of the aforementioned disclosed machine power-on / off control method.

[0030] Fourthly, this application discloses a computer-readable storage medium for storing a computer program; wherein, when the computer program is executed by a processor, it implements the steps of the aforementioned disclosed machine power-on / off control method.

[0031] As can be seen, this application provides a machine power-on / off control method applied to a power management board with an integrated FPGA. The power management board is connected to a power module with an integrated power switch unit and a motherboard module with an integrated substrate management controller. The machine power-on / off control method includes: acquiring test progress information of the machine aging test currently being performed within the machine system; controlling the opening and closing of a target signal corresponding to the power switch unit in the power module based on the test progress information; and controlling the current machine system to perform corresponding power-on / off operations according to the opening and closing state of the target signal. Therefore, this application acquires the test progress information of the machine aging test currently being performed within the machine system through the FPGA in the power management board, then controls the opening and closing of the target signal corresponding to the power switch unit in the power module based on the test progress information, and further controls the power-on / off operations of the current machine system according to the opening and closing state of the target signal. In other words, the technical solution of this application can intelligently and dynamically control the disconnection of the power supply, thereby reducing the power consumption of the server during idle standby, saving a large amount of power, avoiding resource waste, and improving productivity to increase efficiency. Attached Figure Description

[0032] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0033] Figure 1 This is a schematic diagram of a power module with an integrated PSU that directly supplies power to the motherboard, as disclosed in this application.

[0034] Figure 2 This is a flowchart of a machine power-on / off control method disclosed in this application;

[0035] Figure 3 This is a schematic diagram of the power-on / off control system framework for a machine disclosed in this application;

[0036] Figure 4 This is a partial circuit diagram of a machine power-on / off control system disclosed in this application;

[0037] Figure 5 This application discloses a specific flowchart of a machine power-on / off control method.

[0038] Figure 6 This application discloses a specific flowchart of a machine power-on / off control method.

[0039] Figure 7 This application discloses a specific flowchart of a machine power-on / off control method.

[0040] Figure 8 This is a flowchart of another specific machine power-on / off control method disclosed in this application;

[0041] Figure 9 This is a schematic diagram of the structure of a machine power-on / off control device disclosed in this application;

[0042] Figure 10 This is a structural diagram of an electronic device disclosed in this application. Detailed Implementation

[0043] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0044] Currently, the launch of a mature server product requires repeated testing and verification by engineers. Aging tests during production line manufacturing, as the final step in product quality inspection, play a crucial and irreplaceable role. The energy consumption of testing a large number of machines is enormous. Besides the normal testing power consumption, a significant amount of energy is also wasted when machines are in standby mode after testing or when testing is paused. This meaningless energy consumption is a huge waste, increasing product costs and imposing additional burdens on enterprises. Furthermore, this waste of resources also damages the environment and wastes social resources. In existing technologies, such as... Figure 1 As shown, the motherboard is directly powered by a power module integrated with a PSU, providing 12V. However, it can only be remotely shut down via software, not completely disconnected. Therefore, the power cord must be manually unplugged. This manual power-off method is labor-intensive, lacks intelligence, and doesn't provide a clear view of the current testing status. To address this, this application provides a machine power-on / off control scheme that intelligently and dynamically controls power disconnection, thereby reducing energy consumption during server idle standby, saving significant energy, avoiding resource waste, and improving productivity to increase efficiency.

[0045] See Figure 2 As shown, this embodiment of the invention discloses a machine power-on / off control method applied to a power management board integrating an FPGA (Field Programmable Gate Array). The power management board is connected to a power module integrating a power switching unit and a motherboard module integrating a substrate management controller. The machine power-on / off control method includes:

[0046] It should be noted that the motherboard module of the integrated baseboard management controller has a reserved connection interface for connecting the power management board with the integrated FPGA, such as... Figure 3 As shown, the power management board is connected in series between the motherboard module of the integrated baseboard management controller and the power module of the integrated power switching unit; that is, the FPGA is connected in series between the BMC (Baseboard Management Controller) and the PSU. Figure 4 As shown, the enable signal and status of the PSU, namely PSU_PWROK and PSU_PWR_EN, can be transmitted through the FPGA on the power management board. Therefore, the FPGA can act as an analog electronic switch. A dedicated IIC (Inter-Integrated Circuit) bus needs to be reserved on the power management board to communicate with the BMC on the motherboard module via ipmitool. This allows the power management board to obtain the test progress and status of the machine system. Furthermore, a presence signal needs to be reserved on the power management board to notify the BMC on the motherboard module whether the power management board has been successfully connected. In other words, the FPGA will control a pin to pull the presence signal high, thereby informing the BMC that the power management board has been connected. The reserved three-color indicator light can indicate the current test status of the machine aging test. In other words, the FPGA can control the three-color indicator light to display the corresponding information based on the obtained test progress information, so as to intuitively inform the operator of the test progress status of the machine aging test in the current machine system. For example, green can indicate that the test is in progress, red can indicate that there is a FAIL item in the test, and yellow can indicate that the test is completed.

[0047] Step S11: Obtain the test progress information of the machine aging test in the current machine system.

[0048] In this embodiment, the FPGA integrated on the power management board can obtain the test progress information of the current machine system undergoing machine aging test.

[0049] Step S12: Based on the test progress information, control the opening and closing of the target signal corresponding to the power switch unit in the power module.

[0050] In this embodiment, after the FPGA obtains the test progress information of the machine aging test in the current machine system, it can control the opening and closing of the target signal corresponding to the power switch unit in the power module based on the test progress information. It can be understood that the FPGA can act as an analog electronic switch to control the opening and closing of the target signal corresponding to the power switch unit. The target signal can be an enable signal and a status signal, namely PSU_PWROK and PSU_PWR_EN.

[0051] Step S13: Control the current machine system to perform corresponding power-on / off operations according to the opening / closing state of the target signal.

[0052] In this embodiment, the test progress information of the machine aging test in the machine system is obtained. Then, according to the test progress information, the FPGA controls the opening and closing of the target signal corresponding to the PSU in the power module, and then controls the current machine system to perform corresponding power-on and power-off operations according to the opening and closing state of the target signal. In other words, the power supply of the machine system is controlled to be turned on and off through the analog electronic switch of the FPGA.

[0053] As can be seen, in this embodiment, the test progress information of the machine aging test in the current machine system is obtained by the FPGA in the power management board. Then, based on the test progress information, the opening and closing of the target signal corresponding to the power switch unit in the power module is controlled. In turn, the power-on and power-off operation of the current machine system is controlled according to the opening and closing state of the target signal. That is, the technical solution of this application can intelligently and dynamically control the disconnection of the power supply, thereby reducing the power consumption of the server when it is idle and in standby mode, saving a lot of power, avoiding resource waste, and improving the productivity ratio to increase efficiency.

[0054] See Figure 5 As shown, this embodiment of the invention discloses a specific method for controlling the power-on and power-off of a machine. Compared with the previous embodiment, this embodiment further explains and optimizes the technical solution.

[0055] Step S21: Obtain the test progress information of the machine aging test in the current machine system in real time through the integrated circuit bus.

[0056] In this embodiment, the FPGA integrated on the power management board can dynamically acquire the test progress information of the machine aging test within the current machine system in real time via the integrated circuit bus. In other words, the FPGA uses ipmitool via IIC to obtain the test progress information of the machine aging test within the machine system. ipmitool is a command-line IPMI platform management tool available under Linux, which can be used to acquire sensor information, display system log content, and remotely power on / off over the network.

[0057] Step S22: Based on the test progress information, control the opening and closing of the target signal corresponding to the power switch unit in the power module.

[0058] Step S23: Control the current machine system to perform corresponding power-on / off operations according to the opening / closing state of the target signal.

[0059] For details regarding steps S22 to S23, please refer to the corresponding content disclosed in the foregoing embodiments, which will not be repeated here.

[0060] As can be seen, in this embodiment, the test progress information of the machine aging test in the current machine system is obtained by the FPGA in the power management board. Then, based on the test progress information, the opening and closing of the target signal corresponding to the power switch unit in the power module is controlled. In turn, the power-on and power-off operation of the current machine system is controlled according to the opening and closing state of the target signal. That is, the technical solution of this application can intelligently and dynamically control the disconnection of the power supply, thereby reducing the power consumption of the server when it is idle and in standby mode, saving a lot of power, avoiding resource waste, and improving the productivity ratio to increase efficiency.

[0061] See Figure 6 As shown, this embodiment of the invention discloses a specific method for controlling the power-on and power-off of a machine. Compared with the previous embodiment, this embodiment further explains and optimizes the technical solution.

[0062] Step S31: Obtain the test progress information of the machine aging test in the current machine system.

[0063] Step S32: If the test progress information indicates that the machine aging test has been completed, the target signal in the power switch unit is disconnected through the analog switch of the FPGA.

[0064] In this embodiment, after obtaining the test progress information of the machine aging test in the current machine system, if the test progress information indicates that the machine aging test has been completed, the target signal in the power switch unit is disconnected through the analog switch of the FPGA. It can be understood that after the machine aging test is completed, the target signal in the PSU is disconnected to power off the machine system.

[0065] Step S33: When the target signal in the power switch unit is in the off state, the machine system is controlled by the preset ipmitool to perform the corresponding power-down operation.

[0066] In this embodiment, when the obtained test progress information indicates that the machine aging test has been completed, the target signal in the power switch unit is disconnected, indicating that the target signal is in an off state. Then, the preset ipmitool controls the current machine system to perform the corresponding power-down operation. That is, after the machine aging test in the current machine system has been completed, the preset ipmitool notifies the current machine system to shut down and disconnects the target signal in the PSU, thereby realizing the power-down of the current machine system.

[0067] For details regarding step S31, please refer to the corresponding content disclosed in the foregoing embodiments, which will not be repeated here.

[0068] As can be seen, in this embodiment, the test progress information of the machine aging test in the current machine system is obtained through the FPGA in the power management board. If the test progress information indicates that the machine aging test has been completed, the target signal in the power switch unit is disconnected through the analog switch of the FPGA. When the target signal in the power switch unit is in the disconnected state, the current machine system is controlled to perform the corresponding power-down operation through the preset ipmitool. That is, the technical solution of this application can intelligently and dynamically control the disconnection of the power supply, thereby reducing the power consumption of the server when it is idle and in standby mode, saving a lot of power, avoiding resource waste, and improving the productivity ratio to increase efficiency.

[0069] See Figure 7 As shown, this embodiment of the invention discloses a specific method for controlling the power-on and power-off of a machine. Compared with the previous embodiment, this embodiment further explains and optimizes the technical solution.

[0070] Step S41: Obtain the test progress information of the machine aging test in the current machine system.

[0071] Step S42: If the test progress information indicates that the machine aging test has not been completed, then determine whether there is a FAIL item in the machine aging test and obtain the corresponding judgment result.

[0072] In this embodiment, after obtaining the test progress information of the machine aging test in the current machine system, if the test progress information indicates that the machine aging test is not completed, then it is determined whether there is a FAIL item in the machine aging test to obtain the corresponding judgment result. It can be understood that if the machine aging test is not currently completed, then it is determined whether there is a FAIL item in the machine aging test.

[0073] Step S43: Based on the judgment result, determine whether the test state of the machine aging test is in a normal test state, and control the opening and closing of the target signal corresponding to the power switch unit in the power module according to the test state.

[0074] In this embodiment, when the machine aging test is not completed, it is determined whether the machine aging test has a FAIL item. Then, based on the determination result, it can be determined whether the test status of the machine aging test is in a normal test state. Then, the opening and closing of the target signal corresponding to the power switch unit in the power module can be controlled according to the test status. It can be understood that the presence or absence of a FAIL item in the machine aging test can determine whether the machine aging test is normal.

[0075] Step S44: If the judgment result indicates that the FAIL item does not exist in the machine aging test, then the test state of the machine aging test currently being performed in the machine system is determined to be in the normal test state, and the target signal corresponding to the power switch unit in the power module is prohibited from being disconnected.

[0076] In this embodiment, when the machine aging test is not completed and a FAIL item is determined, if the determination result indicates that the FAIL item does not exist in the machine aging test, then the test state of the machine aging test currently being performed in the machine system is determined to be in the normal test state, and disconnecting the target signal corresponding to the power switch unit in the power module is prohibited. It can be understood that if the machine aging test is not completed and the test state of the machine aging test is in the normal test state, then it is not necessary to disconnect the target signal in the PSU, that is, it is not necessary to power down the machine system.

[0077] Step S45: If the FAIL item exists in the machine aging test, it is determined that the test status of the machine aging test currently being performed in the machine system is in an abnormal test state, and a prompt message to restart the machine aging test is returned.

[0078] In this embodiment, when the machine aging test is not completed and a FAIL item is determined to exist in the machine aging test, if the FAIL item exists in the machine aging test, the test status of the machine aging test currently being performed in the machine system is determined to be an abnormal test status, and a prompt message to restart the machine aging test is returned. It is understood that if the machine aging test is not completed and the test status of the machine aging test is in an abnormal test status, a prompt message to restart the machine aging test needs to be returned so that the operator can restart the machine aging test according to the prompt message.

[0079] For details regarding step S41, please refer to the corresponding content disclosed in the foregoing embodiments, which will not be repeated here.

[0080] As can be seen, in this embodiment, the test progress information of the machine aging test in the current machine system is obtained through the FPGA in the power management board. If the test progress information indicates that the machine aging test is not completed, it is determined whether there is a FAIL item in the machine aging test and obtains the corresponding judgment result. If the judgment result indicates that there is no FAIL item in the machine aging test, it is determined that the test status of the machine aging test in the current machine system is in the normal test state, and the disconnection of the target signal corresponding to the power switch unit in the power module is prohibited. If there is a FAIL item in the machine aging test, it is determined that the test status of the machine aging test in the current machine system is in the abnormal test state, and a prompt message to restart the machine aging test is returned. That is, the technical solution of this application can intelligently and dynamically control the disconnection of the power supply, thereby reducing the power consumption of the server when it is idle and in standby mode, saving a lot of power, avoiding resource waste, and improving the productivity ratio to increase efficiency.

[0081] For example, such as Figure 8As shown, after the current machine system is powered on, the FPGA pulls the corresponding presence signal high to notify the BMC on the motherboard module that the power management board has been connected. It then dynamically acquires the test progress information of the machine aging test within the machine system in real time via IIC. If the test progress information indicates that the machine aging test is complete, a yellow light illuminates, and the machine system is notified to shut down via ipmitool. Simultaneously, the PSU's PSU_PWROK and PSU_PWR_EN signals are disconnected via the FPGA's analog electronic switch. If the test progress information indicates that the machine aging test is not complete, it checks whether there is a FAIL item in the machine aging test. If there is no FAIL item, a green light illuminates, indicating that the test is proceeding normally. If there is a FAIL item, a red light illuminates, indicating the presence of a FAIL item, and a corresponding prompt message is returned to remind the operator to restart the machine aging test. In other words, the technical solution of this application can dynamically acquire the test progress information of the machine aging test in real time, and control the power supply of the machine system by dynamically opening and closing the PSU_PWROK and PSU_PWR_EN signals of the PSU through the analog electronic switch of the FPGA, based on the test progress information. It can also send corresponding information to instruct the machine system to shut down first, and then control the machine system to power off. The indicator lights are controlled by the real-time dynamic monitoring of the test progress information of the machine aging test, and the current test status of the machine aging test can be clearly identified by the color of the indicator lights.

[0082] Accordingly, see Figure 9 As shown in the illustration, this application also discloses a machine power-on / off control device applied to a power management board integrating an FPGA. The power management board is connected to a power module integrating a power switching unit and a motherboard module integrating a substrate management controller. The machine power-on / off control device includes:

[0083] The progress information acquisition module 11 is used to acquire the test progress information of the machine aging test in the current machine system;

[0084] The signal opening and closing control module 12 is used to control the opening and closing of the target signal corresponding to the power switch unit in the power module based on the test progress information;

[0085] The system power-on / off control module 13 is used to control the current machine system to perform corresponding power-on / off operations according to the opening and closing state of the target signal.

[0086] As can be seen from the above, in this embodiment, the test progress information of the machine aging test in the current machine system is obtained by the FPGA in the power management board. Then, based on the test progress information, the opening and closing of the target signal corresponding to the power switch unit in the power module is controlled. In turn, the power-on and power-off operation of the current machine system is controlled according to the opening and closing state of the target signal. That is, the technical solution of this application can intelligently and dynamically control the disconnection of the power supply, thereby reducing the power consumption of the server when it is idle and in standby mode, saving a lot of power, avoiding resource waste, and improving the productivity ratio to increase efficiency.

[0087] In some specific embodiments, the progress information acquisition module 11 may specifically include:

[0088] The progress information acquisition unit is used to dynamically acquire the test progress information of the machine aging test in the current machine system in real time through the integrated circuit bus.

[0089] In some specific embodiments, the signal opening and closing control module 12 may specifically include:

[0090] The signal disconnection module is used to disconnect the target signal in the power switch unit through the analog switch of the FPGA when the test progress information indicates that the machine aging test has been completed.

[0091] In some specific embodiments, the signal opening and closing control module 12 may specifically include:

[0092] The first control module is used to control the current machine system to perform a corresponding power-down operation by means of a preset ipmitool when the target signal in the power switch unit is in the off state.

[0093] In some specific embodiments, the signal disconnection module may specifically include:

[0094] The signal disconnection unit is used to disconnect the enable signal and status signal in the power switch unit through the analog switch of the FPGA.

[0095] In some specific embodiments, the signal opening and closing control module 12 may specifically include:

[0096] The judgment module is used to determine whether there is a FAIL item in the machine aging test and obtain the corresponding judgment result when the test progress information indicates that the machine aging test has not been completed.

[0097] The status determination module is used to determine whether the test status of the machine aging test is in a normal test state based on the judgment result, and to control the opening and closing of the target signal corresponding to the power switch unit in the power module according to the test status.

[0098] In some specific embodiments, the state determination module may specifically include:

[0099] The first determination module is used to determine that the test status of the machine aging test currently being performed in the machine system is in the normal test status when the determination result shows that the FAIL item does not exist in the machine aging test, and to prohibit disconnecting the target signal corresponding to the power switch unit in the power module.

[0100] The second determination module is used to determine that the test status of the machine aging test currently being performed in the machine system is in an abnormal test state when the FAIL item exists in the machine aging test, and to return a prompt message to restart the machine aging test.

[0101] Furthermore, embodiments of this application also provide an electronic device. Figure 10 This is a structural diagram of an electronic device 20 according to an exemplary embodiment. The content of the diagram should not be construed as limiting the scope of this application.

[0102] Figure 10 This is a schematic diagram of the structure of an electronic device 20 provided in an embodiment of this application. Specifically, the electronic device 20 may include: at least one processor 21, at least one memory 22, a power supply 23, a communication interface 24, an input / output interface 25, and a communication bus 26. The memory 22 stores a computer program, which is loaded and executed by the processor 21 to implement the relevant steps in the machine testing method disclosed in any of the foregoing embodiments. Furthermore, the electronic device 20 in this embodiment may specifically be an electronic computer.

[0103] In this embodiment, the power supply 23 is used to provide operating voltage for each hardware device on the electronic device 20; the communication interface 24 can create a data transmission channel between the electronic device 20 and external devices, and the communication protocol it follows can be any communication protocol applicable to the technical solution of this application, and is not specifically limited here; the input / output interface 25 is used to acquire external input data or output data to the outside world, and its specific interface type can be selected according to specific application needs, and is not specifically limited here.

[0104] In addition, the memory 22, as a carrier for resource storage, can be a read-only memory, random access memory, disk or optical disk, etc. The resources stored thereon can include operating system 221, computer program 222, etc., and the storage method can be temporary storage or permanent storage.

[0105] The operating system 221 is used to manage and control the various hardware devices on the electronic device 20 and the computer program 222, which may be Windows Server, Netware, Unix, Linux, etc. In addition to including computer programs capable of performing the machine testing methods executed by the electronic device 20 as disclosed in any of the foregoing embodiments, the computer program 222 may further include computer programs capable of performing other specific tasks.

[0106] Furthermore, embodiments of this application also disclose a computer-readable storage medium storing a computer program, which, when loaded and executed by a processor, implements the machine testing method steps disclosed in any of the foregoing embodiments.

[0107] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0108] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0109] The present invention has provided a detailed description of a machine testing method, apparatus, device, and storage medium. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, those skilled in the art will recognize that there will be changes in the specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A method for controlling the power-on and power-off of a machine, characterized in that, A power management board for integrated FPGAs, wherein the power management board is connected to a power module with an integrated power switching unit and a motherboard module with an integrated substrate management controller, and the machine power-on / off control method includes: Obtain the test progress information of the machine aging test currently being performed within the machine system; The opening and closing of the target signal corresponding to the power switch unit in the power module is controlled based on the test progress information; The machine system is controlled to perform corresponding power-on / off operations based on the opening / closing state of the target signal. The step of controlling the opening and closing of the target signal corresponding to the power switch unit in the power module based on the test progress information includes: if the test progress information indicates that the machine aging test is not completed, then determining whether there is a FAIL item in the machine aging test and obtaining a judgment result; determining whether the test status of the machine aging test is in a normal test status based on the judgment result, and controlling the opening and closing of the target signal corresponding to the power switch unit according to the test status, including: if the judgment result indicates that there is no FAIL item in the machine aging test, then determining that the test status of the machine aging test is in a normal test status, and prohibiting the disconnection of the target signal corresponding to the power switch unit in the power module; if there is a FAIL item, then determining that the test status of the machine aging test is in an abnormal test status, and returning a prompt message to restart the machine aging test; The method further includes: after the machine system is powered on, the FPGA pulls up the corresponding presence signal to notify the baseboard management controller on the motherboard module that the power management board has been connected; If the test progress information indicates that the machine aging test has been completed, a yellow light will illuminate; if the test progress information indicates that the machine aging test has not been completed and there are no FAIL items in the machine aging test, a green light will illuminate, indicating that the test is proceeding normally; if there are FAIL items, a red light will illuminate, indicating that there are FAIL items.

2. The machine power-on / off control method according to claim 1, characterized in that, The step of obtaining the test progress information for machine aging tests within the current machine system includes: The test progress information of the machine aging test in the current machine system is obtained in real time and dynamically through the integrated circuit bus.

3. The machine power-on / off control method according to claim 1, characterized in that, The step of controlling the opening and closing of the target signal corresponding to the power switch unit in the power module based on the test progress information includes: If the test progress information indicates that the machine aging test has been completed, the target signal in the power switch unit is disconnected by the analog switch of the FPGA.

4. The machine power-on / off control method according to claim 3, characterized in that, The step of controlling the current machine system to perform corresponding power-on / off operations based on the opening / closing state of the target signal includes: When the target signal in the power switch unit is in the off state, the machine system is controlled by the preset ipmitool to perform the corresponding power-down operation.

5. The machine power-on / off control method according to claim 3, characterized in that, The operation of disconnecting the target signal in the power switching unit via the analog switch of the FPGA includes: The enable signal and status signal in the power switch unit are disconnected by the analog switch of the FPGA.

6. A machine power-on / off control device, characterized in that, A power management board for integrated FPGAs, wherein the power management board is connected to a power module with an integrated power switching unit and a motherboard module with an integrated substrate management controller, and the machine power-on / off control device includes: The progress information acquisition module is used to acquire the test progress information of the machine aging test in the current machine system; A signal switching control module is used to control the opening and closing of the target signal corresponding to the power switch unit in the power module based on the test progress information; The system power-on / off control module is used to control the current machine system to perform corresponding power-on / off operations according to the opening and closing state of the target signal; The signal on / off control module is specifically used to determine whether there is a FAIL item in the machine aging test if the test progress information indicates that the machine aging test is not completed; based on the determination result, determine whether the test status of the machine aging test is in a normal test status, and control the on / off of the target signal corresponding to the power switch unit according to the test status, including: if the determination result indicates that there is no FAIL item in the machine aging test, then determine that the test status of the machine aging test is in a normal test status, and prohibit disconnecting the target signal corresponding to the power switch unit in the power module; if there is a FAIL item, then determine that the test status of the machine aging test is in an abnormal test status, and return a prompt message to restart the machine aging test; The device is also used to, after the machine system is powered on, have the FPGA pull up a corresponding presence signal to notify the baseboard management controller on the motherboard module that the power management board has been connected. If the test progress information indicates that the machine aging test has been completed, a yellow light will illuminate; if the test progress information indicates that the machine aging test has not been completed and there are no FAIL items in the machine aging test, a green light will illuminate, indicating that the test is proceeding normally; if there are FAIL items, a red light will illuminate, indicating that there are FAIL items.

7. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the steps of the machine power-on / off control method as described in any one of claims 1 to 5.

8. A computer-readable storage medium, characterized in that, Used to store a computer program; wherein, when the computer program is executed by a processor, it implements the steps of the machine power-on / off control method as described in any one of claims 1 to 5.

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