Communication system between crystal grains and method of operation thereof

CN115686431BActive Publication Date: 2026-08-28GLOBAL UNICHIP CORPORATION +1
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Patent Information

Application Number
CN202111039915.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2021-07-30
Filing Date
2021-09-06
Publication Date
2026-08-28
Estimated Expiration
2041-09-06

AI Technical Summary

Technical Problem

传送装置将目前数据单元与传送数据校验信息传送至通讯接口

Benefits of technology

[0008]基于上述,本发明诸实施例所述接收装置自行计数接收数据识别值。因此在正常传输期间,接收装置与传送装置之间不需要传输目前数据单元的识别值。当接收装置接收到的目前数据单元为错误时,由接收装置回传错误旗标给传送装置,以通知传送装置将被记录在先进先出缓冲器的经缓冲数据单元再一次传送至接收装置。

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Abstract

The present invention provides a communication system between dies and an operating method thereof. A transmitting device transmits a current data unit and a transmitting data check information to a receiving device through a communication interface, and records the current data unit in a FIFO buffer. The receiving device counts a receiving data identification value by itself based on the current data unit received from the communication interface. The receiving device uses the receiving data identification value and the transmitting data check information to check whether the current data unit received from the communication interface is erroneous. When the current data unit is erroneous, the receiving device returns an error flag to the transmitting device, so that the transmitting device suspends transmission of a new data unit, and transmits buffered data units recorded in the FIFO buffer to the receiving device through the communication interface.
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Description

Technical Field

[0001] This invention relates to a communication system, and more particularly to a communication system between chips and its operation method. Background Technology

[0002] Digital electronic devices based on semiconductor integrated circuits, such as mobile phones, digital cameras, and personal digital assistants (PDAs), are designed to have more powerful functions to adapt to various applications in the modern digital world. However, with the trends in semiconductor manufacturing, digital electronic devices are becoming smaller and lighter, with improved functionality and higher performance. Semiconductor devices can be packaged into 2.5D semiconductor devices, where several dies can be integrated into a larger integrated circuit. Contact components, interposer layers, or redistribution layers (RDLs) are used for connections between different dies. Integrated fan-out (InFO) and chip-on-wafer-on-substrate (CoWoS) packaging technologies can be used to package multiple chips / dies assembled side-by-side.

[0003] In the overall electronic circuitry, one die may need to be electrically connected to one or more dies. Communication occurs between these different dies. A transmitting device (one die) sends data to a receiving device (another die) via a communication interface. However, due to noise interference or other factors, the data received by the receiving device from the communication interface may be erroneous. Ensuring the accuracy of the data received by the receiving device remains one of the many technical challenges.

[0004] It should be noted that the content of the "Background Art" paragraph is used to help understand the present invention. Some (or all) of the content disclosed in the "Background Art" paragraph may not be prior art known to those skilled in the art. The content disclosed in the "Background Art" paragraph does not imply that such content was known to those skilled in the art prior to this application. Summary of the Invention

[0005] This invention provides a communication system and its operating method to ensure the correctness of data received by the receiving device.

[0006] In an embodiment of the present invention, the communication system includes a transmitting device and a receiving device. The transmitting device calculates transmission data verification information for the current data unit among a plurality of data units. The transmitting device transmits the current data unit and the transmission data verification information to a communication interface. The transmitting device records the current data unit in a First-In-First-Out (FIFO) buffer. The receiving device receives the current data unit and the transmission data verification information from the communication interface. The receiving device counts a received data identification value based on the current data unit received from the communication interface. The receiving device uses the received data identification value and the transmission data verification information received from the communication interface to check for errors in the current data unit received from the communication interface. When the current data unit received from the communication interface is incorrect, the receiving device sends an error flag back to the transmitting device. The transmitting device suspends the transmission of new data units based on the error flag and transmits at least one buffered data unit recorded in the FIFO buffer to the receiving device through the communication interface.

[0007] In an embodiment of the present invention, the above-described operation method includes: the transmitting device calculating transmission data verification information for the current data unit among a plurality of data units; the transmitting device transmitting the current data unit and the transmission data verification information to a communication interface, and recording the current data unit in a first-in-first-out buffer; the receiving device receiving the current data unit and the transmission data verification information from the communication interface; the receiving device counting a received data identification value based on the current data unit received from the communication interface; the receiving device using the received data identification value and the transmission data verification information received from the communication interface to check whether there is an error in the current data unit received from the communication interface; when the current data unit received from the communication interface is erroneous, the receiving device sending an error flag back to the transmitting device; and the transmitting device suspending the transmission of new data units based on the error flag, and transmitting at least one buffered data unit recorded in the first-in-first-out buffer to the receiving device through the communication interface.

[0008] Based on the above, the receiving device described in the embodiments of the present invention counts the received data identification value itself. Therefore, during normal transmission, there is no need to transmit the identification value of the current data unit between the receiving device and the transmitting device. When the current data unit received by the receiving device is incorrect, the receiving device sends an error flag back to the transmitting device to notify the transmitting device to retransmit the buffered data unit recorded in the first-in-first-out buffer to the receiving device. Attached Figure Description

[0009] Figure 1 This is a schematic diagram of a cross-sectional stacked structure of a 2.5D semiconductor device having a communication interface, as shown in an embodiment of the present invention.

[0010] Figure 2 This is a top view schematic diagram illustrating an embodiment of the present invention, showing a die connected to multiple other dies via a communication interface.

[0011] Figure 3 This is a top view schematic diagram showing multiple chips interconnected via a communication interface, according to another embodiment of the present invention.

[0012] Figure 4 This is a schematic diagram of communication between two dies based on an interface having an intermediary layer or a redistribution layer, as shown in an embodiment of the present invention.

[0013] Figure 5 This is a schematic diagram of the structure of the contact component pattern according to an embodiment of the present invention;

[0014] Figure 6 This is a schematic diagram of a circuit block of a communication system according to an embodiment of the present invention;

[0015] Figure 7 This is a flowchart illustrating an operation method of a communication system according to an embodiment of the present invention;

[0016] Figure 8 This is described according to an embodiment of the present invention. Figure 6 The circuit block diagram of the transmitting and receiving devices is shown.

[0017] Explanation of reference numerals in the attached figures

[0018] 50: Platform

[0019] 100: Packaging substrate

[0020] 102: Through hole

[0021] 104: Welding ball

[0022] 106: Contactor assembly

[0023] 110: Intermediate layer or redistribution layer

[0024] 112: Through Silicon Via (TSV)

[0025] 114: Interconnect cabling

[0026] 116: Contact component

[0027] 120:SerDes grains

[0028] 130: ASIC die

[0029] 140: Routing Structure

[0030] 200, 202: Grain size

[0031] 200': Processor die

[0032] 204, INF: Communication interface

[0033] 300: Contact component pattern

[0034] 600: Communication System

[0035] 610: Conveying device

[0036] 611, 623: Encoding layer circuits

[0037] 612: FIFO Buffer

[0038] 613, 614, 615: Switching circuits

[0039] 616, 622a: Verification circuit

[0040] 617, 621: Physical layer circuits

[0041] 620: Receiving device

[0042] 622: Check the circuit

[0043] 622b: Comparison Circuit

[0044] C[n:0], rx_C[n:0], tx_C[n:0]: Transmit data verification information

[0045] D[m:0], rx_D[m:0], tx_D[m:0]: Current data unit

[0046] ERR, rx_ERR, tx_ERR: Error flags

[0047] F[i:0], rx_F[i:0], tx_F[i:0]: Frame information

[0048] RXC[n:0]: Currently receiving data verification information

[0049] RXID[k:0]: Received data identification value

[0050] S710, S720, S730, S740, S750, S760, S770: Steps

[0051] TXID[k:0]: Current data transmission identification value Detailed Implementation

[0052] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.

[0053] The term "coupled (or connected)" as used throughout this specification (including the claims) may refer to any direct or indirect means of connection. For example, if the text describes a first device coupled (or connected) to a second device, it should be interpreted as the first device being directly connected to the second device, or the first device being indirectly connected to the second device through other devices or some means of connection. The terms "first," "second," etc., used throughout this specification (including the claims) are used to name components or distinguish different embodiments or scopes, and are not intended to limit the upper or lower limit of the number of components, nor to limit the order of components. Furthermore, wherever possible, components / components / steps using the same reference numerals in the drawings and embodiments represent the same or similar parts. Components / components / steps using the same reference numerals or the same terms in different embodiments may be referred to mutually in the relevant descriptions.

[0054] This invention relates to data transmission between two devices (e.g., two dies). Several embodiments are provided below to describe the invention, but the invention is not limited to these embodiments.

[0055] The entire integrated circuit can be fabricated into a semiconductor device using semiconductor manufacturing processes, and the semiconductor device can be fabricated based on a stacked structure of 2.5D semiconductor devices. The interface of the die (receiving device) for receiving data may include a frame decoding circuit associated with a deserialized circuit. In one embodiment, the interface in the semiconductor structure is integrated into the entire integrated circuit.

[0056] First, let's describe semiconductor manufacturing. Figure 1 This is a schematic diagram of a cross-sectional stacked structure of a 2.5D semiconductor device with a communication interface, as shown in an embodiment of the present invention. Please refer to... Figure 1A chip-on-wafer-on-substrate (CoWoS) or integrated fan-out (InFO) platform 50 with a desired integrated circuit structure is formed based on 2.5D packaging technology. The CoWoS or InFO platform 50 may include a packaging substrate 100 with bottom solder balls 104 and top contactor assemblies 106. Through-holes 102 can be used to connect from the bottom solder balls 104 to the top contactor assemblies 106. Furthermore, an interposer layer or redistribution layer (RDL) 110 may be formed on the substrate 100, which is connected to the contact assembly 106. The interposer layer or redistribution layer 110 embeds a routing structure 140, wherein the routing structure 140 has routing paths for connection purposes. The interposer layer or redistribution layer 110 may also include through-silicon-vias (TSVs) 112, interconnect wiring 114, and contact assemblies 116. Here, depending on the manufacturing process used, contact assembly 116 may be a through hole or contact assembly or any suitable connection structure for terminal-to-terminal contact. This embodiment does not limit contact assemblies 106, 116 to a particular type.

[0057] In practical applications, additional chips, such as Application-Specific Integrated Circuit (ASIC) chip 130 and Serializer-Deserializer (SerDes) chip 120, can also be used to implement the CoWoS or InFO platform 50. The ASIC chip 130 and SerDes chip 120 are connected via routing structure 140 (wiring 114 and contact assembly 116). One ASIC chip 130 can be connected to multiple SerDes chips 120 for various peripheral communications.

[0058] Figure 2 This is a top view schematic diagram illustrating, according to an embodiment of the present invention, that a die is connected to multiple other dies via a communication interface. Please refer to... Figure 2 A die 200 (e.g., a processor or ASIC die) can be connected to multiple dies 202 via a communication interface 204, thus enabling data transfer between dies 200 and dies 202. The communication interface 204 may include contact components in a wiring and contact component pattern, allowing die 200 to connect to die 202.

[0059] Figure 3 This is a top view schematic diagram illustrating the interconnection of multiple dies via a communication interface, according to another embodiment of the present invention. Please refer to... Figure 3Multiple processor chips 200' can be connected together to form a larger processor with more powerful functions. In this case, these processor chips 200' are also connected via communication interface 204.

[0060] As described above, 2.5D packaging technology can be applied to stack various dies side-by-side without significantly increasing device area. However, to allow for more flexible die interconnection, the contact components in communication interface 204 need to be appropriately arranged in a compact manner and further symmetrical for receiving and transmitting signals. Communication between the two dies 200 and 202 can be easily located in the peripheral area. Here, communication interface 204 can also refer to commercially available Glink interfaces.

[0061] Figure 4 This is a schematic diagram illustrating communication between two dies based on an interface having an interposer layer or redistribution layer, according to an embodiment of the present invention. Please refer to... Figure 4 In one example, ASIC die 130 and SerDes die 120 communicate via an interposer or redistribution layer 110. Contact components for contacting the ASIC die 130 and SerDes die 120 with the interposer or redistribution layer 110 are appropriately arranged. Each contact component can transmit a specific signal simultaneously. Therefore, a parallel bus is established based on the contact components. The signal at each contact component is in a serial format, such as a bit string.

[0062] Figure 5 This is a schematic diagram of the contact component pattern according to an embodiment of the present invention. Please refer to... Figure 5The total number of contact components involved in the communication interface can be a single number, and signals are transmitted in parallel within the communication interface. The total number of contact components involved in the communication interface can be a large number. Signals are transmitted in parallel between the dies. Based on the data size in a bus, a 32-bit data size with operating voltages and other functional signals is set as a slice (refer to contact component pattern 300). Contact component pattern 300 can be replicated in a certain number (e.g., 8) to accommodate the total data size in parallel communication. In one embodiment, the data corresponds to 32 bits having a sequence of R_D0 to R_D31 and T_D0 to T_D31. In this sequence, T represents a contact component for transmission and R represents a contact component for reception. Additionally, contact component pattern 300 also includes multiple low-voltage signals VSS and multiple high-voltage signals VDDP. In addition, various functional signals are included, such as FRAM T / R_FR, clock T / R_DCK_P / N, flow control T / R_FC[1:0], DBI T / R_DBI[3:0], co-location T / R_PAR, and lane repair T / R_LR[1:0]. However, the contact components used for the functional signals are not limited to the embodiments described above.

[0063] Table 1 provides examples of contact components that define a transmit (T) group or a receive (R) group. Transmit and receive groups have the same number of contact components.

[0064] Table 1

[0065]

[0066] Based on the interposer or redistribution layer 110 described above, various signals communicate between the two dies. However, in one example, a set of parallel signals in the communication can be converted into a serial format for transmission / reception via a single trace with a contact component. Once the serial format data signal is received by the die, the die deserializes the data signal and converts it back into a parallel format.

[0067] Figure 6 This is a schematic diagram of a circuit block of a communication system 600 according to an embodiment of the present invention. Figure 6 The communication system 600 shown includes a transmitting device 610 and a receiving device 620. The transmitting device 610 can transmit a data stream to the receiving device 620 via a communication interface INF. The data stream contains multiple data units, for example... Figure 6 The current data unit is shown as D[m:0]. Each data unit consists of m+1 bits of data, where m is an integer determined according to the actual design.

[0068] This embodiment does not limit the product categories of the transmitting device 610 and the receiving device 620. For example, depending on the actual design, the transmitting device 610 and / or the receiving device 620 can be a die, an integrated circuit, an electronic device, or other device / component. In an embodiment where the transmitting device 610 and the receiving device 620 are two dies, the description of the SerDes die 120 and / or the ASIC die 130 can be considered as one of many embodiments of the transmitting device 610 and / or the receiving device 620. Alternatively, the transmitting device 610 and / or the receiving device 620 can be deduced by analogy with the description of die 200, die 202, and / or processor die 200', and the communication interface INF can be deduced by analogy with the description of the communication interface 204.

[0069] Figure 7 This is a flowchart illustrating an operation method of a communication system according to an embodiment of the present invention. Please refer to... Figure 6 and Figure 7 In step S710, the transmission device 610 can calculate the transmission data verification information C[n:0] of the current data unit D[m:0] among multiple data units. The transmission data verification information C[n:0] is n+1 bits of data, where n is an integer determined according to the actual design. In step S720, the transmission device 610 can transmit the current data unit D[m:0] and the transmission data verification information C[n:0] to the communication interface INF, and record the current data unit D[m:0] in a First-in-First-out (FIFO) buffer (not shown). Figure 6 )middle.

[0070] In step S730, the receiving device 620 can receive the current data unit D[m:0] and the transmission data verification information C[n:0] from the communication interface INF. In step S740, the receiving device 620 can count the received data identification value based on the current data unit D[m:0] received from the communication interface INF. In step S750, the receiving device 620 can use the received data identification value and the transmission data verification information C[n:0] received from the communication interface INF to check whether there are any errors in the current data unit D[m:0] received from the communication interface INF.

[0071] When the current data unit D[m:0] received from the communication interface INF is incorrect (the judgment result of step S750 is "yes"), the receiving device 620 can proceed to step S760. In step S760, the receiving device 620 can send an error flag ERR back to the transmitting device 610. In step S770, the transmitting device 610 can suspend the transmission of new data units based on the error flag ERR, and record the error in the FIFO buffer (not shown). Figure 6 At least one buffered data unit is transmitted to the receiving device 620 via the communication interface INF.

[0072] In some embodiments, in the FIFO buffer (not shown) Figure 6 After at least one buffered data unit is transmitted to the communication interface INF, the transmission device 610 can resume the transmission of new data units. In other embodiments, in the FIFO buffer (not shown) Figure 6 After all buffered data units are transmitted to the receiving device 620 via the communication interface INF, the transmitting device 610 can resume the transmission of new data units. For some practical application scenarios, it is assumed that in the FIFO buffer (not shown in...) Figure 6 If, during the transmission of all buffered data units to the receiving device 620, the transmitting device 610 receives an error flag ERR again, then the transmitting device 610 can once again re-encode the FIFO buffer (not shown in the diagram). Figure 6 All buffered data units are transmitted to the receiving device 620 via the communication interface INF.

[0073] According to the actual design, in some embodiments, the transmission device 610 can also count the current transmission data identification value based on the current data unit D[m:0]. The transmission device 610 can use the current transmission data identification value to calculate the transmission data verification information C[n:0] of the current data unit D[m:0], and record the current transmission data identification value in a FIFO buffer (not shown). Figure 6 The number of bits in the currently transmitted data identification value of the transmitting device 610 (i.e., the counting period of the currently transmitted data identification value) can be determined according to the actual design, and the number of bits in the received data identification value of the receiving device 620 (i.e., the counting period of the received data identification value) can also be determined according to the actual design. For example, in some embodiments, the transmitting device 610 may use a first counter to generate the currently transmitted data identification value, and the receiving device 620 may use a second counter to generate the received data identification value. The counting period of either the first counter or the second counter is equal to or greater than the depth of the FIFO buffer.

[0074] During the initialization period before multiple data units (current data unit D[m:0]) are transmitted (i.e., before the start of normal transmission), the transmitting device 610 may transmit a synchronization signal to the receiving device 620 so that the received data identification value of the receiving device 620 can be synchronized with the currently transmitted data identification value of the transmitting device 610. During normal transmission, the currently transmitted data identification value of the transmitting device 610 is not transmitted to the receiving device 620 to save transmission bandwidth between the transmitting device 610 and the receiving device 620.

[0075] In some embodiments, when the receiving device 620 sends back an error flag ERR to the transmitting device 610, the transmitting device 610 can send a synchronization signal to the receiving device 620 based on the error flag ERR, so that the received data identification value of the receiving device 620 can be synchronized with the current transmitted data identification value corresponding to the buffered data unit output by the transmitting device 610. In other embodiments, once the receiving device 620 detects that the current data unit D[m:0] is an error, the receiving device 620 can send back the received data identification value corresponding to the current data unit D[m:0] to the transmitting device 610 through the return channel, and then the FIFO buffer of the transmitting device 610 (not shown) will be used to send the data identification value back to the transmitting device 610. Figure 6 Starting from a buffered data unit corresponding to the received data identification value, the buffered data unit is transmitted to the receiving device 620.

[0076] Figure 8 This is described according to an embodiment of the present invention. Figure 6 The circuit block diagram of the transmitting device 610 and the receiving device 620 is shown. Figure 8 In the illustrated embodiment, the transmitting device 610 includes an encoding layer circuit 611, a FIFO buffer 612, a switching circuit 613, a switching circuit 614, a switching circuit 615, a verification circuit 616, and a physical layer circuit 617, while the receiving device 620 includes a physical layer circuit 621, a checking circuit 622, and an encoding layer circuit 623. The routing structure between physical layer circuits 617, 621, and 617 can be considered as a communication interface INF.

[0077] According to actual design, in some embodiments, the coding layer circuit 611 may include a physical coding sublayer (PCS) circuit and / or other coding layers. The coding layer circuit 611 may generate a data stream (multiple data units, including the current data unit tx_D[m:0]) and automatically count the currently transmitted data identification value TXID[k:0] based on the current data unit tx_D[m:0]. The currently transmitted data identification value TXID[k:0] is k+1 bits of data, where k is an integer determined according to the actual design. For example (but not limited to), m may be 511 or other integers, and k may be 4 or other integers. In some embodiments, the coding layer circuit 611 may use a counter to generate the currently transmitted data identification value TXID[k:0]. For example, when the encoding layer circuit 611 generates the first data unit, the current transmitted data identification value TXID[k:0] is "1". When the encoding layer circuit 611 generates the second data unit, the current transmitted data identification value TXID[k:0] increments to "2", and so on. Therefore, the current transmitted data identification value TXID[k:0] can be used as the index (or identification code) of the current data unit tx_D[m:0]. The counting period of the counter in the encoding layer circuit 611 is equal to or greater than the depth of the FIFO buffer 612.

[0078] Furthermore, the encoding layer circuit 611 can generate frame information tx_F[i:0]. Here, frame information tx_F[i:0] consists of i+1 bits of data, where i is an integer determined according to the actual design. For example (but not limited to), i can be 7 or other integers. Each bit of frame information tx_F[i:0] can represent the validity of a corresponding character in the current data unit tx_D[m:0]. When frame information tx_F[i:0] indicates that one (or some) characters in the current data unit tx_D[m:0] are invalid, the transmission device 610 will not transmit this (or these) invalid characters to the communication interface INF to save transmission bandwidth.

[0079] FIFO buffer 612 is coupled to encoding layer circuit 611 to receive and record frame information tx_F[i:0], current data unit tx_D[m:0], and current transmitted data identification value TXID[k:0]. The first input of switching circuit 613 is coupled to encoding layer circuit 611 to receive frame information tx_F[i:0]. The second input of switching circuit 613 is coupled to frame information output of FIFO buffer 612. The output of switching circuit 613 is coupled to physical layer circuit 617 (communication interface INF). Depending on the actual design, in some embodiments, physical layer circuit 617 may include Physical Medium Attachment (PMA) circuitry and / or other physical layers. Based on the frame information output by switching circuit 613, physical layer circuit 617 can transmit frame information F[i:0] to physical layer circuit 621 of receiving device 620 via a routing structure.

[0080] The first input of switching circuit 614 is coupled to encoding layer circuit 611 to receive the current data unit tx_D[m:0]. The second input of switching circuit 614 is coupled to the data output of FIFO buffer 612. The output of switching circuit 614 is coupled to physical layer circuit 617 (communication interface INF). Based on the data unit output by switching circuit 614, physical layer circuit 617 can transmit the current data unit D[m:0] to physical layer circuit 621 of receiving device 620 through a routing structure. The first input of switching circuit 615 is coupled to encoding layer circuit 611 to receive the currently transmitted data identification value TXID[k:0]. The second input of switching circuit 615 is coupled to the identification value output of FIFO buffer 612.

[0081] During normal transmission, switching circuit 613 selects to transmit frame information tx_F[i:0] to physical layer circuit 617 and verification circuit 616, switching circuit 614 selects to transmit current data unit tx_D[m:0] to physical layer circuit 617 and verification circuit 616, and switching circuit 615 selects to transmit current transmitted data identification value TXID[k:0] to verification circuit 616. Verification circuit 616 is coupled to the outputs of switching circuit 613, switching circuit 614, and switching circuit 615. Verification circuit 616 can use the frame information output by switching circuit 613, the data unit output by switching circuit 614, and the identification value output by switching circuit 615 to calculate transmitted data verification information tx_C[n:0]. Depending on the actual design, in some embodiments, verification circuit 616 may include a Cyclic Redundancy Check (CRC) circuit, a parity check circuit, or other verification / check calculation circuits. The verification circuit 616 can output the transmission data verification information tx_C[n:0] to the physical layer circuit 617 (communication interface INF). Based on the transmission data verification information tx_C[n:0], the physical layer circuit 617 can transmit the transmission data verification information C[n:0] to the physical layer circuit 621 of the receiving device 620 through the routing structure. Therefore, the verification circuit 616 can transmit the transmission data verification information tx_C[n:0] to the receiving device 620 through the communication interface INF.

[0082] Physical layer circuit 621 can receive frame information F[i:0], current data unit D[m:0], and transmission data verification information C[n:0] from communication interface INF. Depending on the actual design, in some embodiments, physical layer circuit 621 may include PMA circuitry and / or other physical layers. Based on frame information F[i:0], physical layer circuit 621 can transmit frame information rx_F[i:0] to encoding layer circuit 623 and checking circuit 622. Based on current data unit D[m:0], physical layer circuit 621 can transmit current data unit rx_D[m:0] to encoding layer circuit 623 and checking circuit 622. Based on transmission data verification information C[n:0], physical layer circuit 621 can transmit transmission data verification information rx_C[n:0] to checking circuit 622.

[0083] Encoding layer circuit 623 is coupled to physical layer circuit 621 to receive frame information rx_F[i:0] and current data unit rx_D[m:0]. Depending on the design, in some embodiments, encoding layer circuit 623 may include PCS circuitry and / or other encoding layers. Encoding layer circuit 623 may count a received data identification value RXID[k:0] based on the current data unit rx_D[m:0] received from physical layer circuit 621 (communication interface INF). The received data identification value RXID[k:0] is k+1 bits of data, where k is an integer determined according to the design. In some embodiments, encoding layer circuit 623 may use a counter to generate the received data identification value RXID[k:0]. For example, when encoding layer circuit 623 receives the first data unit, the received data identification value RXID[k:0] is "1", when encoding layer circuit 623 receives the second data unit, the received data identification value RXID[k:0] increments to "2", and so on. Therefore, the received data identification value RXID[k:0] can be used as the index (or identification code) of the current data unit rx_D[m:0]. The counting period of the counter in the coding layer circuit 623 is equal to or greater than the depth of the FIFO buffer 612.

[0084] During the initialization period before multiple data units (current data unit D[m:0]) are transmitted (i.e., before the start of normal transmission), the encoding layer circuit 611 of the transmitting device 610 can transmit a synchronization signal to the encoding layer circuit 623 of the receiving device 620 via frame information F[i:0], so that the received data identification value RXID[k:0] of the receiving device 620 can be synchronized with the current transmitted data identification value TXID[k:0] of the transmitting device 610. During normal transmission, the current transmitted data identification value TXID[k:0] of the transmitting device 610 is not transmitted to the receiving device 620 to save transmission bandwidth between the transmitting device 610 and the receiving device 620.

[0085] The check circuit 622 is coupled to the physical layer circuit 621 to receive frame information rx_F[i:0], current data unit rx_D[m:0], and transmission data check information rx_C[n:0]. The check circuit 622 is also coupled to the coding layer circuit 623 to receive the received data identification value RXID[k:0]. The check circuit 622 can use the received data identification value RXID[k:0] and the transmission data check information rx_C[n:0] to check for errors in the current data unit rx_D[m:0]. When the current data unit rx_D[m:0] is faulty, the check circuit 622 can generate an error flag rx_ERR for the physical layer circuit 621.

[0086] exist Figure 8In the illustrated embodiment, the checking circuit 622 includes a verification circuit 622a and a comparison circuit 622b. The verification circuit 622a is coupled to the physical layer circuit 621 to receive frame information rx_F[i:0] and the current data unit rx_D[m:0]. The verification circuit 622a is coupled to the coding layer circuit 623 to receive the received data identification value RXID[k:0]. The verification circuit 622a can use the frame information rx_F[i:0], the current data unit rx_D[m:0], and the received data identification value RXID[k:0] to calculate the currently received data verification information RXC[n:0].

[0087] The comparison circuit 622b is coupled to the physical layer circuit 621 to receive the transmitted data verification information rx_C[n:0]. The comparison circuit 622b is also coupled to the verification circuit 622a to receive the currently received data verification information RXC[n:0]. The comparison circuit 622b can compare the transmitted data verification information rx_C[n:0] with the currently received data verification information RXC[n:0]. When the currently received data verification information RXC[n:0] does not match the transmitted data verification information rx_C[n:0], the comparison circuit 622b can generate an error flag rx_ERR for the physical layer circuit 621.

[0088] Based on the error flag rx_ERR output by the comparison circuit 622b, the physical layer circuit 621 can transmit the error flag ERR to the physical layer circuit 617 of the transmission device 610 through the routing structure. Based on the error flag ERR from the receiving device 620, the physical layer circuit 617 can transmit the error flag tx_ERR to the coding layer circuit 611. When the receiving device 620 sends back the error flag ERR to the transmission device 610, the transmission device 610 can transmit a synchronization signal to the receiving device 620 via the frame information F[i:0], so that the received data identification value RXID[k:0] of the receiving device 620 can be synchronized with the currently transmitted data identification value corresponding to the buffered data unit output by the FIFO buffer 612 of the transmission device 610.

[0089] When the transmitting device 610 receives an error flag (ERR), the encoding layer circuit 611 can pause the output of the new data unit tx_D[m:0]. The output of the switching circuit 613 is coupled to the second input of the switching circuit 613, the output of the switching circuit 614 is coupled to the second input of the switching circuit 614, and the output of the switching circuit 615 is coupled to the second input of the switching circuit 615. That is, the switching circuit 613 selects to couple the frame information output of the FIFO buffer 612 to the physical layer circuit 617 and the verification circuit 616, the switching circuit 614 selects to couple the data output of the FIFO buffer 612 to the physical layer circuit 617 and the verification circuit 616, and the switching circuit 615 selects to couple the identification value output of the FIFO buffer 612 to the verification circuit 616. Therefore, at least one buffered data unit recorded in the FIFO buffer 612 can be transmitted to the receiving device 620 through the communication interface INF.

[0090] The buffered data units recorded in the FIFO buffer 612 include the original data unit corresponding to the erroneous current data unit rx_D[m:0]. Therefore, when the receiving device 620 detects an error in the current data unit rx_D[m:0], the transmitting device 610 can retrieve the original data unit corresponding to the current data unit rx_D[m:0] from the FIFO buffer 612 and transmit this original data unit to the receiving device 620 again. Thus, once the receiving device 620 detects an error, it can identify the data identification value of the corrupted data unit, and then wait for a data unit with the same data identification value to be retransmitted from the FIFO buffer 612. Once a correct data unit with the same data identification value is found, the encoding layer circuit 623 can send the correct data unit to the user interface (application layer).

[0091] After all buffered data units in the FIFO buffer 612 are transmitted to the receiving device 620 via the communication interface INF, the output of the switching circuit 613 is coupled to the first input of the switching circuit 613, the output of the switching circuit 614 is coupled to the first input of the switching circuit 614, the output of the switching circuit 615 is coupled to the first input of the switching circuit 615, and the coding layer circuit 611 resumes the output of the new data unit tx_D[m:0]. That is, during the normal transmission period when the transmitting device 610 resumes, the switching circuit 613 selects to transmit the frame information tx_F[i:0] to the physical layer circuit 617 and the verification circuit 616, the switching circuit 614 selects to transmit the current data unit tx_D[m:0] to the physical layer circuit 617 and the verification circuit 616, and the switching circuit 615 selects to transmit the current transmitted data identification value TXID[k:0] to the verification circuit 616.

[0092] For some practical application scenarios, assuming that during the transmission of all buffered data units from the FIFO buffer 612 to the receiving device 620, the transmitting device 610 receives an error flag (ERR) again, then the transmitting device 610 can once again transmit all buffered data units from the FIFO buffer 612 to the receiving device 620 through the communication interface INF. Therefore, when the receiving device 620 detects that the current data unit rx_D[m:0] is incorrect, the transmitting device 610 can transmit the original data unit corresponding to the current data unit rx_D[m:0] to the receiving device 620 again until the current data unit rx_D[m:0] is correct.

[0093] In other embodiments, once the receiving device 620 detects that the current data unit rx_D[m:0] is erroneous, the receiving device 620 can send the received data identification value RXID[k:0] corresponding to the current data unit rx_D[m:0] back to the transmitting device 610 via the return channel. Then, the FIFO buffer 612 of the transmitting device 610 transmits the buffered data units to the receiving device 620, starting from the buffered data unit corresponding to the received data identification value RXID[k:0].

[0094] In summary, the receiving device 620 described in the above embodiments can count the received data identification value RXID[k:0] itself. Therefore, during normal transmission, there is no need to transmit the identification value of the current data unit D[m:0] between the receiving device 620 and the transmitting device 610. When the current data unit rx_D[m:0] received by the receiving device 620 is incorrect, the receiving device 620 can send back an error flag ERR to the transmitting device 610 to notify the transmitting device 610 to retransmit the buffered data unit recorded in the FIFO buffer 612 to the receiving device 620.

[0095] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A communication system, characterized in that, The communication system includes: A transmission device is configured to calculate transmission data verification information for the current data unit among a plurality of data units, transmit the current data unit and the transmission data verification information to a communication interface, and record the current data unit in a first-in-first-out buffer; and A receiving device is configured to receive the current data unit and the transmitted data verification information from the communication interface, count a received data identification value based on the current data unit received from the communication interface, and use the received data identification value and the transmitted data verification information received from the communication interface to check whether there are any errors in the current data unit received from the communication interface. When the current data unit received from the communication interface is incorrect, the receiving device sends an error flag back to the transmitting device. The transmitting device suspends the transmission of new data units based on the error flag, and transmits at least one buffered data unit recorded in the first-in-first-out buffer to the receiving device via the communication interface; and The transmission device counts the current transmission data identification value based on the current data unit, uses the current transmission data identification value to calculate the transmission data verification information of the current data unit, and records the current transmission data identification value in the first-in-first-out buffer.

2. The communication system according to claim 1, characterized in that, After all buffered data units in the first-in-first-out buffer are transmitted to the receiving device through the communication interface, the transmitting device resumes the transmission of the new data units.

3. The communication system according to claim 1, characterized in that, If the transmitting device receives the error flag again during the transmission of all buffered data units of the first-in-first-out buffer to the receiving device, then all buffered data units of the first-in-first-out buffer are once again transmitted to the receiving device through the communication interface.

4. The communication system according to claim 1, characterized in that, The transmitting device uses a first counter to generate the currently transmitted data identification value, the receiving device uses a second counter to generate the received data identification value, and the counting period of either the first counter or the second counter is equal to or greater than the depth of the first-in-first-out buffer.

5. The communication system according to claim 1, characterized in that, The currently transmitted data identification value is not transmitted to the receiving device, and during the initialization period before the plurality of data units are transmitted, the transmitting device transmits a synchronization signal to the receiving device so that the receiving device's received data identification value is synchronized with the transmitting device's currently transmitted data identification value.

6. The communication system according to claim 1, characterized in that, The transmitting device transmits a synchronization signal to the receiving device based on the error flag, so that the received data identification value of the receiving device is synchronized with the currently transmitted data identification value corresponding to the buffered data unit.

7. The communication system according to claim 1, characterized in that, Once the receiving device detects that the current data unit is incorrect, the receiving device sends the received data identification value corresponding to the current data unit back to the transmitting device through the return channel, and the first-in-first-out buffer of the transmitting device transmits at least one buffered data unit to the receiving device starting from the buffered data unit corresponding to the received data identification value.

8. The communication system according to claim 1, characterized in that, The conveying device includes: The coding layer circuit is used to generate the plurality of data units and to count the current transmitted data identification value based on the current data unit. The first-in-first-out buffer is coupled to the coding layer circuit to receive and record the current data unit and the current transmitted data identification value; A first switching circuit has a first input terminal coupled to the coding layer circuit to receive the current data unit, wherein a second input terminal of the first switching circuit is coupled to the data output terminal of the first-in-first-out buffer, and the output terminal of the first switching circuit is coupled to the communication interface. A second switching circuit has a first input terminal coupled to the coding layer circuit to receive the currently transmitted data identification value, wherein a second input terminal of the second switching circuit is coupled to the identification value output terminal of the first-in-first-out buffer; and A verification circuit is coupled to the output terminal of the first switching circuit and to the output terminal of the second switching circuit. The verification circuit uses the identification value output by the second switching circuit and the data unit output by the first switching circuit to calculate the transmission data verification information, and the verification circuit transmits the transmission data verification information to the receiving device through the communication interface.

9. The communication system according to claim 8, characterized in that, When the transmitting device receives the error flag, the coding layer circuit suspends the output of new data units, the output terminal of the first switching circuit is coupled to the second input terminal of the first switching circuit, and the output terminal of the second switching circuit is coupled to the second input terminal of the second switching circuit. as well as After all buffered data units of the first-in-first-out buffer are transmitted to the receiving device through the communication interface, the output of the first switching circuit is coupled to the first input of the first switching circuit, the output of the second switching circuit is coupled to the first input of the second switching circuit, and the coding layer circuit restores the output of the new data unit.

10. The communication system according to claim 8, characterized in that, The verification circuit includes a cyclic redundancy check circuit or a same position check circuit.

11. The communication system according to claim 1, characterized in that, The receiving device includes: Physical layer circuitry for receiving the current data unit and the transmitted data verification information from the communication interface; A coding layer circuit, coupled to the physical layer circuit to receive the current data unit, wherein the coding layer circuit counts the received data identification value itself based on the current data unit received from the physical layer circuit; and A checking circuit is coupled to the physical layer circuit to receive the current data unit and the transmitted data verification information, and coupled to the coding layer circuit to receive the received data identification value, wherein the checking circuit uses the received data identification value and the transmitted data verification information to check whether the current data unit has an error, and when the current data unit has an error, the checking circuit generates the error flag to the physical layer circuit.

12. The communication system according to claim 11, characterized in that, The inspection circuit includes: A verification circuit, coupled to the physical layer circuit to receive the current data unit, and coupled to the coding layer circuit to receive the received data identification value, wherein the verification circuit uses the current data unit and the received data identification value to calculate current received data verification information; and A comparison circuit is coupled to the physical layer circuit to receive the transmitted data verification information, and coupled to the verification circuit to receive the currently received data verification information, wherein the comparison circuit compares the transmitted data verification information with the currently received data verification information, and when the currently received data verification information does not match the transmitted data verification information, the comparison circuit generates the error flag to the physical layer circuit.

13. A method for operating a communication system, characterized in that, The operation method includes: The transmission device calculates the transmission data verification information of the current data unit among multiple data units; The transmission device transmits the current data unit and the transmission data verification information to the communication interface, and records the current data unit in the first-in-first-out buffer. The receiving device receives the current data unit and the transmitted data verification information from the communication interface; The receiving device counts the received data identification value based on the current data unit received from the communication interface. The receiving device uses the received data identification value and the transmitted data verification information received from the communication interface to check whether there are any errors in the current data unit received from the communication interface; When the current data unit received from the communication interface is incorrect, the receiving device sends an error flag back to the transmitting device. The transmitting device suspends the transmission of new data units based on the error flag, and at least one buffered data unit recorded in the first-in-first-out buffer is transmitted to the receiving device through the communication interface; The transmitting device automatically counts the currently transmitted data identification value based on the current data unit; The transmitting device uses the current transmitted data identification value to calculate the transmission data verification information of the current data unit; and The transmission device records the current transmission data identification value in the first-in-first-out buffer.

14. The operating method according to claim 13, characterized in that, The operation method further includes: After all buffered data units in the first-in-first-out buffer are transmitted to the receiving device through the communication interface, the transmitting device resumes the transmission of the new data units.

15. The operating method according to claim 13, characterized in that, The operation method further includes: If the transmitting device receives the error flag again during the transmission of all buffered data units of the first-in-first-out buffer to the receiving device, it will once again transmit all buffered data units of the first-in-first-out buffer to the receiving device through the communication interface.

16. The operating method according to claim 13, characterized in that, The operation method further includes: The current data transmission identification value is generated by the transmission device using a first counter; and The receiving device generates the received data identification value using a second counter; The counting period of either the first counter or the second counter is equal to or greater than the depth of the first-in-first-out buffer.

17. The operating method according to claim 13, characterized in that, The currently transmitted data identification value has not been transmitted to the receiving device, and the operation method further includes: During the initialization period before the plurality of data units are transmitted, the transmitting device transmits a synchronization signal to the receiving device so that the received data identification value of the receiving device is synchronized with the currently transmitted data identification value of the transmitting device.

18. The operating method according to claim 13, characterized in that, The operation method further includes: The transmitting device transmits a synchronization signal to the receiving device based on the error flag, so that the received data identification value of the receiving device is synchronized with the currently transmitted data identification value corresponding to the buffered data unit.

19. The operating method according to claim 13, characterized in that, The operation method further includes: Once the receiving device detects that the current data unit is incorrect, it sends the received data identification value corresponding to the current data unit back to the transmitting device via the return channel; and The first-in-first-out buffer of the transmission device transmits at least one buffered data unit to the receiving device, starting from the buffered data unit corresponding to the received data identification value.

Citation Information

Patent Citations

  • Transmission device, receiving device and information communication method

    CN101223759A