A uvm-based multi-slot pcie device hot plug process verification platform and method

Abstract

The application discloses a UVM-based multi-slot PCIE device hot plug process verification platform and method, and the verification platform comprises a UVM verification environment module, a DUT module, a hot plug control module HP_CTRL, a hot plug arbitration module HP_ARB and an I2C_MASTER module HP_I2C_MST. The DUT module is used for outputting an I2C bus to a serial-to-parallel chip PCA9554, and the serial-to-parallel chip PCA9554 is used for outputting a reset signal of a PCIE card to a PCIE model EP_VIP.

Description

Technical Field

[0001] This invention relates to a UVM-based verification platform and method for hot-swappable multi-slot PCIe devices, belonging to the field of chip verification technology. Background Technology

[0002] Currently, building a verification environment based on UVM (Universal Verification Methodology) is a mainstream verification method for chip verification. UVM is a verification methodology for SystemVerilog, and using UVM can improve code reusability and verification efficiency.

[0003] Hot-swapping of PCIe devices is a technique for replacing PCIe cards without shutting down the power. Verification of PCIe hot-swapping typically employs a combination of hardware and software methods, using real test cards and dedicated test benches.

[0004] Currently, verification of PCIe hot-swapping devices mostly uses actual PCIe cards on test benches. However, due to cost constraints and the time-consuming setup of verification environments, it's difficult to comprehensively verify the hot-swapping process for multiple PCIe slots. Therefore, software is often used to simulate multi-slot hot-swapping scenarios. However, traditional simulation verification methods result in verification environments with low reusability, poor scalability, inconvenience for verification personnel to manage and maintain, and low verification efficiency. Summary of the Invention

[0005] To address the shortcomings of existing technologies, the present invention aims to provide a UVM-based verification platform and method for hot-swapping multi-slot PCIe devices, which solves the problems of low reusability, inconvenient management and maintenance, and low verification efficiency in existing technologies.

[0006] To achieve the above objectives, the present invention adopts the following technical solution: A UVM-based verification platform for hot-plugging processes of multi-slot PCIe devices includes: The UVM verification environment module is used to generate stimuli and input them into the DUT module, and to perform environmental detection based on the feedback from the DUT module. The DUT module includes the hot-plug control module HP_CTRL, the hot-plug arbitration module HP_ARB, and the I2C_MASTER module HP_I2C_MST. The DUT module is used to output the I2C bus to the serial-to-parallel converter chip PCA9554. The serial-to-parallel converter chip PCA9554 is used to output the reset signal of the PCIe card to the PCIe model EP_VIP.

[0007] Furthermore, the aforementioned UVM verification environment module includes an env, which comprises: sequence, used to generate test sequences in a format recognizable by the DUT module; The agent is used for information exchange between the UVM verification environment module and the DUT module. The scoreboard is used to receive feedback from the agent and compare it with the reference model.

[0008] Furthermore, the aforementioned agent includes the sequencer, driver module, and monitor; The sequencer is used to request the generated test sequence from the sequence; The driver module is used to transmit the obtained test sequence to the input port of the DUT module; The monitor is used to monitor and collect information from the DUT module and send it to the scoreboard.

[0009] A UVM-based method for verifying the hot-swapping process of multi-slot PCIe devices, using any of the aforementioned verification platforms, includes full hardware hot-swapping process verification, interrupt-interactive hot-swapping process verification, and software polling hot-swapping process verification.

[0010] Furthermore, the aforementioned full hardware plug-in / plug-out process verification steps include: Send IO requests to write to the DUT register via sequence, enable MSI interrupt, enable hot-plug interrupt, configure slot control status register to enable PWR_FAULT and link status change interrupt; Write to the hot-plug control register to indicate that the slot needs to be hot-plugged.

[0011] If the UVM environment detection interrupt is caused by PWR_FAULT, the slot status register is written to clear the PWR_FAULT bit, the slot is powered on again, and if the interrupt is entered again in subsequent operations, a reset operation is performed. If the interrupt is caused by a change in link status, an IO read request is sent to read the link status register to determine the link status. If the link can be used normally, the hot-plug control register is written to end the insertion operation.

[0012] Furthermore, the aforementioned interruption interaction insertion process steps include: Send IO requests to write to registers via sequence, enable MSI interrupt, enable hot-plug interrupt, configure slot control status register to enable PWR_FAULT interrupt, link status change interrupt, slot in-position status change interrupt, and command completion interrupt; Write the hot-plug control register insert bit to indicate that the slot needs to be inserted; UVM environmental monitoring interruption: If a change in slot presence is detected, the flashing light will turn off, and power will be applied to the slot. If a power supply failure occurs, a flashing light will illuminate to indicate the fault; otherwise, the power indicator will illuminate. If a command completion indicator change occurs, write the slot control status register to clear the command completion indicator. If the link status changes, send an IO read request to read the link status register to determine the link status. Write the hot-plug control register insertion bit to indicate the end of hot-plugging PCIe card insertion.

[0013] Furthermore, the aforementioned steps of the interrupted interaction unplugging process include: Send IO requests to write to registers via sequence, enable MSI interrupt, enable hot-plug interrupt, configure slot control status register to enable PWR_FAULT interrupt, link status change interrupt, slot in-position status change interrupt, and command completion interrupt; Write the slot control status register to make the flashing light flash, write the link control register to disable the link, and then write the hot-plug control register to indicate that the slot needs to be removed. UVM environmental monitoring interrupted: If the link status changes, clear the link status change bit in the slot control status register and power off the slot. If the power indicator light turns off due to hardware intervention, write the power indicator light status register of the slot control to turn it off. If the slot status changes, write the slot control status register to clear the status change bit, and turn off the flashing light to indicate that the PCIe card has been removed. Write to the link control register to disable, and restore the link; Write the hot-plug control register to the remove bit to indicate the end of hot-plugging and the removal of the PCIe card.

[0014] Furthermore, the aforementioned software query and insertion process includes the following steps: Send IO requests to write to registers via sequence, enable MSI interrupts, disable hot-plug interrupts, and use default values ​​for slot control status registers; Write the hot-plug control register insert bit to indicate that a PCIe card needs to be inserted into the slot; Read the link status register to determine the link status: If the link status is unavailable, read the slot control status register, power on the slot again. If the link status is still unavailable after the above operations, perform a reset operation; if the link status is available, write the hot-plug control register to indicate the end of hot-plugging, and insert the PCIe card.

[0015] Furthermore, the aforementioned software query and unplugging process steps include: Send IO requests to write to registers via sequence, enable MSI interrupts, disable hot-plug interrupts, and use default values ​​for slot control status registers; Write to the link control register to disable the link until the link is disconnected; Write the hot-plug control register to the remove bit, indicating that the PCIe card in this slot needs to be removed; Remove the card and wait for the flashing light to go out; Write to the link control register to disable the link, then restore the link. Write to the hot-plug control register to indicate the end of hot-plugging and remove the PCIe card.

[0016] The beneficial effects achieved by this invention are as follows: 1. By adopting the above-mentioned UVM-based hot-swap verification environment, the relevant logic of hot-swap can be verified without using real PCIe test cards and test benches, so as to discover problems in the early stage of verification and facilitate debugging.

[0017] 2. Secondly, this verification environment supports simultaneous insertion and removal testing of multiple slots. Without using multiple real PCIe test cards, it can easily verify all the relevant logic of hot-swapping of multiple slots on the entire chip, which can save costs and improve verification efficiency.

[0018] 3. Finally, the flexibility and high reusability of UVM facilitate the expansion and maintenance of the environment by verification personnel, and enable early verification of the entire software and hardware process. Attached Figure Description

[0019] Figure 1 This is an overall structural diagram of the UVM-based multi-slot PCIe device hot-swapping process verification platform of the present invention; Figure 2 This is a detailed structural diagram of the UVM environment of this invention; Figure 3 This is a flowchart of the hot-swappable full hardware plug-in / plug-out process of the present invention; Figure 4 This is a flowchart of the hot-plug interruption interactive plugging and unplugging process of the present invention; Figure 5 This is a flowchart of the hot-swap software query for plugging and unplugging in this invention. Detailed Implementation

[0020] The technical solution of the present invention will be described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the embodiments and specific features in the embodiments are detailed descriptions of the technical solution of the present application, rather than limitations thereof. In the absence of conflict, the embodiments and technical features in the embodiments can be combined with each other.

[0021] This embodiment discloses a UVM-based verification platform for the hot-plugging process of multi-slot PCIe devices, such as... Figure 1 As shown, it includes a UVM verification environment module, a DUT module, and a serial-to-parallel converter chip PCA9554. This UVM environment is scalable. First, the UVM environment (env) generates stimulus inputs to the DUT through the UVM sequence mechanism. The DUT can control the hot-plugging of up to 6 slots, so the hot-plugging process test of up to 6 slots can be implemented in this environment.

[0022] Among them, combined Figure 2 As can be seen, the UVM verification environment module includes an `env`, which is a model of the CPU core. It can replace the actual CPU to initiate I / O requests and configure the corresponding registers in the DUT for hot-plugging process testing. The `env` includes a sequence, an agent, and a scoreboard. The sequence generates test sequences according to a format recognizable by the DUT. The agent, as a packaged unit, integrates a sequencer, a driver module, and a monitor. The sequencer requests the generated test sequences from the sequencer, the driver module sends the obtained test sequences to the DUT's input ports, and the monitor monitors and collects DUT information and sends it to the scoreboard. The scoreboard compares the information transmitted by the monitor with the reference model. When multi-slot expansion is required, multiple agents can be instantiated to simulate multi-slot hot-plugging process testing.

[0023] Specifically, during implementation, the read and write of registers in the process is handled by UVM's sequence mechanism. A transaction-level TLP packet, i.e., a read / write request, is generated in the environment. Then, the request is passed to the interface between the environment and the DUT through the driver module, thereby enabling the read and write of registers in the DUT.

[0024] UVM sets up a reference model for these registers. When reading or writing registers in the DUT, the requested data is updated in the reference model. UVM's monitor module continuously collects the values ​​of these registers in the DUT from the start of the simulation until its end, and passes these values ​​to the scoreboard module. UVM's scoreboard module compares the reference model with the data collected by the monitor to ensure the correctness of register read / write requests. If it finds a discrepancy between the values ​​of the reference model and the actual registers in the DUT, the environment will report an error.

[0025] The DUT module is used to output the I2C bus to the serial-to-parallel converter chip PCA9554. The DUT includes the hot-plug control module HP_CTRL, the hot-plug arbitration module HP_ARB, and the I2C_MASTER module HP_I2C_MST.

[0026] The PCA9554 is used to output the PERST_N reset signal from the PCIe card to the PCIe model EP_VIP. One PCA9554 chip corresponds to one slot. In the UVM environment, the PCIe EP_VIP model is used to replace the actual PCIe test card.

[0027] By applying the aforementioned UVM-based multi-slot PCIe device hot-plugging process verification platform, it is possible to implement full hardware plugging / plugging processes, interrupt-interactive plugging / plugging processes, and software polling plugging / plugging processes.

[0028] Figure 3 This is a flowchart of the entire hardware plug-in / plug-out process, including the following steps: Step 1: In the environment, send an IO request to the register via a sequence, enable MSI interrupts, enable hot-plug interrupts, configure the slot control status register to enable PWR_FAULT and link status change interrupts, and disable all others. PWR_FAULT indicates a power failure, link status change indicates a change in the link from normal data transmission / reception to a state where data transmission / reception is impossible, or vice versa, and hot-plugging refers to inserting or removing the PCIe card without powering it off. Specifically, PWR_FAULT and link status change interrupts are both hot-plug interrupts, which can only be sent from the DUT if hot-plug interrupts are enabled. Since hot-plug interrupts are sent in the form of MSI interrupts, MSI interrupts must be enabled.

[0029] Step 2: Write the HOT_INSERT bit of the hot-plug control register to 1 to indicate that the slot needs to perform a hot-plug insertion action.

[0030] Step 3: If the UVM environment detects an interrupt caused by PWR_FAULT, clear the PWR_FAULT bit in the slot status register, power on the slot again. If the interrupt still occurs, perform a reset operation and return to Step 1 (corresponding to...). Figure 3 (3.1). If the UVM environment detects an interruption and finds that it is caused by a change in link status, it sends an IO read request to read the link status register to determine if the PCIe card is usable. When the link status is normal data transmission and reception, it indicates that it can be used normally (corresponding to...). Figure 3 3.2).

[0031] Step 4: After confirming that the link can be used normally in Step 3, write the hot-plug control register insertion bit HOT_INSERT to 0 to end the insertion action.

[0032] Figure 4 This is a flowchart of the interrupted interactive plugging and unplugging process, including the following steps: 1. Interruption of interactive insertion process: Step 1: In the UVM environment, send an I / O request to write to the register via a sequence, enable MSI interrupts, enable hot-plug interrupts, and configure the slot control status register to enable PWR_FAULT interrupts, link status change interrupts, slot in-place status change interrupts, and command completion interrupts. Slot in-place status change refers to the change caused by card insertion or removal. Command completion interrupt occurs when the verification environment sends an I / O request to write to the slot control status register; a command completion interrupt is generated upon completion of the write. Both slot in-place status change interrupts and command completion interrupts are hot-plug interrupts.

[0033] Step 2: Write the hot-plug control register's insert bit (HOT_INSERT) to 1, indicating that the slot needs to be inserted (corresponding to...). Figure 4 2.1).

[0034] Step 3: The UVM environment detects an interrupt and finds a change in the slot's presence status. At this point, the PCIe card is inserted into the slot. The slot control status register is cleared of the presence status change bit, the flashing LED is turned off, and the power control bit is set to PWR_ON to power on the slot (corresponding to...). Figure 4 3.1).

[0035] Step 4: If the UVM environment detects an interrupt and a power failure is found, the write slot control status register indicator light will illuminate to indicate the fault (corresponding to...). Figure 4 (4.1). If the UVM environment detects an interrupt and finds that the power supply is normal, write to the slot control status register to illuminate the power indicator light (corresponding to...). Figure 4 4.2).

[0036] Step 5: An interrupt is detected by the UVM environment, generated by a change in the command completion indicator bit. Write to the slot control status register to clear the command completion indicator bit (corresponding to...). Figure 4 (5.1).

[0037] Step 6: The UVM environment detects an interrupt and identifies a change in link status. An IO read request is sent to read the link status register to determine if the PCIe card is usable. A link status of 1 indicates normal operation (corresponding to...). Figure 4 (6.1).

[0038] Step 7: Write the hot-swap control register insert bit HOT_INSERT to 0 to indicate the end of hot-swap PCIe card insertion (corresponding to...). Figure 4 7.1).

[0039] 2. Interruption of interaction and unplugging process: Step 1: In the UVM environment, send an IO request to write to the register via a sequence, enable the MSI interrupt, enable the hot-plug interrupt, configure the slot control status register to enable the PWR_FAULT interrupt, link status change interrupt, slot in-position status change interrupt, and command completion interrupt.

[0040] Step 2: Write the slot control status register so that the flashing light is flashing. Write the link control register to disable the link, and then write the hot-plug control register so that the HOT_REMOVE bit is 1 to indicate that the slot needs to be removed (corresponding to...). Figure 4 2.2).

[0041] Step 3: The UVM environment detects an interrupt and identifies a link status change. At this point, the PCIe link is disconnected. The slot control status register is cleared of the link status change bit, and the power control bit is set to PWR_OFF to power off the slot (corresponding to...). Figure 4 3.2).

[0042] Step 4: An interrupt is detected in the UVM environment, triggered by writing to the PWRLED (power indicator light) in hardware to turn it off. This is done by writing to the power indicator light in the slot control status register, which turns off the power indicator light (corresponding to...). Figure 4 (4.3).

[0043] Step 5: The UVM environment detects an interrupt and identifies a change in the in-situ status. It clears the in-situ status change bit in the slot control status register and simultaneously sets the flashing LED to off to indicate that the PCIe card has been removed (corresponding to...). Figure 4 (5.2).

[0044] Step 6: Write the link control register to disable the link (set to 0) to restore the link. Then read the link status register; a value of 0 indicates the link has returned to its initial state (corresponding to...). Figure 4 (6.2).

[0045] Step 7: Write the hot-swap control register's HOT_REMOVE bit to 0 to indicate the end of hot-swapping the PCIe card (corresponding to...). Figure 4 7.2).

[0046] Figure 5 This is a flowchart of the software query and plug-in / plug-out process, including the following steps: 1. Software query and insertion process: Step 1: In the UVM environment, send an IO request to write to the register via a sequence, enable MSI interrupts, disable hot-plug interrupts, and use the default value for the slot control status register.

[0047] Step 2: Set the HOT_INSERT bit in the hot-plug control register to 1, indicating that a PCIe card needs to be inserted into this slot (corresponding to...). Figure 5 2.1).

[0048] Step 3: Read the link status register to determine if the PCIe card is usable. A link status of 1 indicates that it can be used normally (corresponding to...). Figure 5 3.1).

[0049] Step 4: If the link status is not read to be 1 (a time interval can be set in the software program during actual use), read the slot control status register. Upon finding PWR_FAULT, clear the PWR_FAULT bit in the slot status register and simultaneously write the power control bit to re-power the slot. If the link status is still not 1, perform a reset operation (corresponding to...). Figure 5 (4.1). Alternatively, after reading the link status as 1 to confirm that the PCIe card can be used normally, write the hot-swap control register HOT_INSERT to 0 to indicate the end of hot-swap PCIe card insertion (corresponding to...). Figure 5 4.2).

[0050] 2. Software query and extraction process: Step 1: In the UVM environment, send an IO request to write to the register via a sequence, enable MSI interrupts, disable hot-plug interrupts, and use the default value for the slot control status register.

[0051] Step 2: Write to the link control register to disable the link. Then continuously read the link status register until the link is disconnected (corresponding to...). Figure 5 2.2).

[0052] Step 3: Write the hot-swap control register's HOT_REMOVE bit to 1, indicating that the PCIe card in this slot needs to be removed (corresponding to...). Figure 5 3.2).

[0053] Step 4: Remove the card directly and wait for the flashing light to turn off (corresponding to...) Figure 5 (4.3).

[0054] Step 5: Write the link control register to disable the link (set to 0) to restore the link. Then read the link status register; a value of 0 indicates the link has returned to its initial state (corresponding to...). Figure 5 5).

[0055] Step 6: Write the hot-swap control register HOT_REMOVE to 0 to indicate the end of hot-swapping the PCIe card removal (corresponding to...). Figure 5 (6).

[0056] The above hot-swapping process is all completed in the UVM environment. Instead of using a real PCIe card, the PWR_GOOD and PWR_FAULT power signals of the PCIe VIP are directly assigned values ​​in the sequence to simulate the real card insertion and removal actions.

[0057] Because this UVM environment is scalable, by instantiating multiple agents in the environment, register read and write operations can be performed on multiple hot-plug control modules of the DUT simultaneously, enabling different slots to test any of the three processes mentioned above at the same time. For example, one slot can be used to test the full hardware insertion process, while another slot can be used to test the software polling removal process. The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A UVM-based verification platform for hot-swapping processes of multi-slot PCIe devices, characterized in that, include: The UVM verification environment module is used to generate stimuli and input them into the DUT module, and to perform environmental detection based on the feedback from the DUT module. The DUT module includes a hot-plug control module HP_CTRL, a hot-plug arbitration module HP_ARB, and an I2C_MASTER module HP_I2C_MST. The DUT module is used to output the I2C bus to the serial-to-parallel converter chip PCA9554. The serial-to-parallel converter chip PCA9554 is used to output the reset signal of the PCIe card to the PCIe model EP_VIP; The UVM verification environment module includes an environment variable (env), which comprises: sequence, used to generate test sequences in a format recognizable by the DUT module; The agent is used for information exchange between the UVM verification environment module and the DUT module. The scoreboard is used to receive feedback information from the agent and compare it with the reference model. The agent includes a sequencer, a driver module, and a monitor; The sequencer is used to request the generated test sequence from the sequence; The driver module is used to transmit the obtained test sequence to the input port of the DUT module; The monitor is used to monitor and collect information from the DUT module and send it to the scoreboard.

2. A method for verifying the hot-swapping process of a multi-slot PCIe device based on UVM, using the verification platform as described in claim 1, characterized in that... The method includes full hardware plug-in / plug-out process verification, interrupt interactive plug-in / plug-out process verification, and software query plug-in / plug-out process verification.

3. The method for verifying the hot-swapping process of a multi-slot PCIe device based on UVM according to claim 2, characterized in that, The full hardware plug-in / plug-out process verification steps include: Send IO requests to write to the DUT register via sequence, enable MSI interrupt, enable hot-plug interrupt, configure slot control status register to enable PWR_FAULT and link status change interrupt; Write to the hot-plug control register to indicate that the slot needs to perform a hot-plug insertion action; If the UVM environment detection interrupt is caused by PWR_FAULT, the slot status register is written to clear the PWR_FAULT bit, the slot is powered on again, and if the interrupt is entered again in subsequent operations, a reset operation is performed. If the interrupt is caused by a change in link status, an IO read request is sent to read the link status register to determine the link status. If the link can be used normally, the hot-plug control register is written to end the insertion operation.

4. The method for verifying the hot-swapping process of a multi-slot PCIe device based on UVM according to claim 2, characterized in that, The verification steps for interrupted interactive insertion process include: Send IO requests to write to registers via sequence, enable MSI interrupt, enable hot-plug interrupt, configure slot control status register to enable PWR_FAULT interrupt, link status change interrupt, slot in-position status change interrupt, and command completion interrupt; Write the hot-plug control register insert bit to indicate that the slot needs to be inserted; UVM environmental monitoring interruption: If a change in slot presence is detected, the flashing light will turn off, and power will be applied to the slot. If a power supply failure occurs, a flashing light will illuminate to indicate the fault; otherwise, the power indicator will illuminate. If a command completion indicator change occurs, write the slot control status register to clear the command completion indicator. If the link status changes, send an IO read request to read the link status register to determine the link status. Write the hot-plug control register insertion bit to indicate the end of hot-plugging PCIe card insertion.

5. The method for verifying the hot-swapping process of a multi-slot PCIe device based on UVM according to claim 2, characterized in that, The verification steps for the interrupted interaction unplugging process include: Send IO requests to write to registers via sequence, enable MSI interrupt, enable hot-plug interrupt, configure slot control status register to enable PWR_FAULT interrupt, link status change interrupt, slot in-position status change interrupt, and command completion interrupt; Write the slot control status register to make the flashing light flash, write the link control register to disable the link, and then write the hot-plug control register to indicate that the slot needs to be removed. UVM environmental monitoring interrupted: If the link status changes, clear the link status change bit in the slot control status register and power off the slot. If the power indicator light turns off due to hardware intervention, write the power indicator light status register of the slot control to turn it off. If the slot status changes, write the slot control status register to clear the status change bit, and turn off the flashing light to indicate that the PCIe card has been removed. Write to the link control register to disable, and restore the link; Write the hot-plug control register to the remove bit to indicate the end of hot-plugging and the removal of the PCIe card.

6. The method for verifying the hot-swapping process of a multi-slot PCIe device based on UVM according to claim 2, characterized in that, The software query and insertion process verification steps include: Send IO requests to write to registers via sequence, enable MSI interrupts, disable hot-plug interrupts, and use default values ​​for slot control status registers; Write the hot-plug control register insert bit to indicate that a PCIe card needs to be inserted into the slot; Read the link status register to determine the link status: If the link status is unavailable, read the slot control status register, power on the slot again. If the link status is still unavailable after the above operations, perform a reset operation; if the link status is available, write the hot-plug control register to indicate the end of hot-plugging, and insert the PCIe card.

7. The method for verifying the hot-swapping process of a multi-slot PCIe device based on UVM according to claim 2, characterized in that, The software query and unplug process verification steps include: Send IO requests to write to registers via sequence, enable MSI interrupts, disable hot-plug interrupts, and use default values ​​for slot control status registers; Write to the link control register to disable the link until the link is disconnected; Write the hot-plug control register to the remove bit, indicating that the PCIe card in this slot needs to be removed; Remove the card and wait for the flashing light to go out; Write to the link control register to disable the link, then restore the link. Write to the hot-plug control register to indicate the end of hot-plugging and remove the PCIe card.

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