Misoperation prevention checking method and system for power system and non-transitory computer readable medium

Abstract

The application relates to a mistake-proof checking method and system of a power system, a non-transient computer readable medium, and a computer device. The method comprises: acquiring a dispatching topology graph of the power system; matching preset ontologies in a preset ontology library on the dispatching topology graph, wherein the preset ontologies comprise device structures and wiring modes, and each preset ontology corresponds to a preset mistake-proof rule; fusing the device structures, the wiring modes and the preset mistake-proof rules corresponding to the matched preset ontologies to the dispatching topology graph to obtain a mistake-proof knowledge graph; and performing mistake-proof checking on an operation order of the power system according to the mistake-proof knowledge graph. Through the application, the problem that a mistake-proof checking system of related technologies needs a large amount of manual work for operation and maintenance is solved, the manual work amount for operation and maintenance of the mistake-proof checking system is reduced, and the problem that checking of complex logic such as DC state determination is difficult to be realized by writing dead rules is solved.

Description

Technical Field

[0001] This application relates to the field of power dispatching technology, and in particular to methods, systems, computer equipment, and non-transient computer-readable media for preventing errors in power systems. Background Technology

[0002] In the field of power dispatching, operation tickets are used for power dispatching. The review and issuance of operation tickets must be verified according to specific rules to ensure that the operation does not violate relevant power regulations. These rules are derived from relevant dispatching procedures and specifications, and are known as error prevention rules. Verifying the correctness and accuracy of operation tickets is called error prevention verification.

[0003] Verification of operation tickets is one of the core tasks of dispatching departments at all levels of the power grid. The correctness of the operation orders in the operation tickets directly affects whether power grid maintenance work can be carried out normally, and may even affect the safety of power grid operation and the personal safety of operators. Therefore, operation tickets need to be reviewed in dispatching operations at all levels of the power grid.

[0004] Related technologies employ a relational database to construct basic information and rules for each device, enabling error prevention and verification of operation tickets. The rules for each device are verified through individual configuration and real-time status. However, this approach involves a significant workload in customizing and maintaining the relational database, lacks replicability, and is difficult to scale. Summary of the Invention

[0005] This embodiment provides a method, system, computer equipment, and non-transient computer-readable medium for preventing errors in power systems, in order to solve the problem that prevention verification systems in related technologies require a large amount of manual work for operation and maintenance.

[0006] A method for preventing errors in power system verification includes:

[0007] Obtain a scheduling topology diagram of the power system, wherein the scheduling topology diagram includes an abstract model of the equipment and real-time data of the equipment;

[0008] Match the preset entities in the preset entity library on the scheduling topology graph, wherein the preset entities include the device structure and wiring method, and each preset entity corresponds to a preset anti-misoperation rule;

[0009] The device structure, wiring method, and preset anti-misoperation rules corresponding to the matched preset entities are integrated into the scheduling topology graph to obtain an anti-misoperation knowledge graph;

[0010] The operation tickets of the power system are checked for error prevention based on the error prevention knowledge graph.

[0011] In some embodiments, obtaining the power system dispatch topology includes:

[0012] Obtain the general power information model of the power system, and simplify and reduce the general power information model to obtain a simplified general power information model, wherein the simplified general power information model includes an abstract model of the equipment;

[0013] Acquire remote signaling data and telemetry data of each device in the power system;

[0014] The remote signaling data and the telemetry data are fused with the equipment in the simplified general power information model to obtain the scheduling topology.

[0015] In some embodiments, matching a preset ontology in a preset ontology library on the scheduling topology graph includes:

[0016] Search and match subgraphs that are isomorphic to the preset ontology in the preset ontology library on the scheduling topology graph, and establish a correspondence between the successfully matched preset ontology and the subgraphs of the scheduling topology graph.

[0017] In some embodiments, the error prevention verification of the power system's operation tickets based on the error prevention knowledge graph includes:

[0018] Obtain the operation ticket of the power system, and parse the operation ticket to obtain the equipment to be operated and the target action;

[0019] Link the device to be operated in the anti-misoperation knowledge graph, and obtain the target preset anti-misoperation rules and target real-time data of the device to be operated;

[0020] Based on the target's real-time data and the target's actions, determine the target operation result of the device to be operated;

[0021] The target's preset anti-misconception rules are used to perform rule reasoning to obtain the judgment conditions;

[0022] Based on the target operation result and the judgment condition, the operation ticket is checked for error prevention.

[0023] In some embodiments, rule reasoning for the target preset error prevention rules further includes:

[0024] Visualize the process of rule-based reasoning.

[0025] In some embodiments, the language representation of the preset anti-misoperation rule includes logical elements, device elements, and state elements. The logical elements include the hierarchical logic of the entity device object and the hierarchical logic of the rule. The state elements include the switch state of the root device and the intermediate state of the leaf device.

[0026] In some embodiments, the error prevention verification of the power system's operation tickets based on the error prevention knowledge graph includes:

[0027] Based on the hierarchical topology of the devices in the anti-misoperation knowledge graph, the language representation of the preset anti-misoperation rule is recursively parsed to obtain the judgment conditions corresponding to the preset anti-misoperation rule.

[0028] In some embodiments, the language representation of the preset error prevention rule is recursively parsed based on the hierarchical topology of the devices in the error prevention knowledge graph to obtain the judgment conditions corresponding to the preset error prevention rule, including:

[0029] Analyze the device to be operated corresponding to the operation ticket;

[0030] Determine whether the device to be operated is a root device;

[0031] If the device to be operated is a root device, the preset anti-misoperation rule of the upper-level leaf device of the device to be operated is obtained from the anti-misoperation knowledge graph as the target preset anti-misoperation rule; otherwise, the preset anti-misoperation rule of the device to be operated is obtained as the target preset anti-misoperation rule.

[0032] Based on the language representation of the target preset error prevention rules, each judgment condition in the target preset error prevention rules is parsed one by one, and the device to be judged corresponding to each judgment condition is determined;

[0033] When the state element in the language representation of the determination condition is an intermediate state, the device to be determined is treated as the device to be operated and recursively parsed.

[0034] A power system error prevention verification system, comprising:

[0035] A graph database is used to obtain the scheduling topology diagram of a power system, wherein the scheduling topology diagram includes an abstract model of the equipment and real-time data of the equipment;

[0036] A preset entity library is used to store preset entities and preset error prevention rules. The preset entities include the device structure and wiring method, and each preset entity corresponds to a preset error prevention rule.

[0037] The graph fusion module is used to match preset entities in the preset entity library on the scheduling topology graph, and to fuse the device structure, wiring method and preset anti-misoperation rules corresponding to the matched preset entities into the scheduling topology graph to obtain an anti-misoperation knowledge graph.

[0038] The error prevention verification module is used to perform error prevention verification on the operation tickets of the power system based on the error prevention knowledge graph.

[0039] In some embodiments, the error prevention verification module includes:

[0040] The parsing unit is used to obtain the operation ticket of the power system and parse the operation ticket to obtain the equipment to be operated and the target action;

[0041] The linking unit is used to link with the device to be operated in the anti-misoperation knowledge graph, and to obtain the target preset anti-misoperation rules and target real-time data of the device to be operated;

[0042] The determining unit is used to determine the target operation result of the device to be operated based on the target real-time data and the target action;

[0043] The reasoning unit is used to perform rule reasoning on the preset anti-mistake rules of the target to obtain the judgment conditions;

[0044] The verification unit is used to perform error prevention verification on the operation ticket based on the target operation result and the judgment condition.

[0045] In some embodiments, the operation result of the operation ticket and the preset error prevention rule are represented by the same language, which includes logical elements, device elements and state elements. The logical elements include the hierarchical logic of the entity device object and the hierarchical logic of the rule. The state elements include the switch status of the root device and the intermediate status of the leaf device.

[0046] A computer device includes a memory and a processor, the memory storing a computer program and the processor being configured to run the computer program to perform the power system error prevention verification method.

[0047] A non-transient computer-readable medium storing a computer program, wherein the computer program is configured to execute the power system's error prevention verification method at runtime.

[0048] Compared with related technologies, the power system error prevention verification method, system, computer equipment, and non-transient computer-readable medium provided in this embodiment obtain the power system's scheduling topology diagram, which includes abstract models of equipment and real-time data of the equipment; match preset entities from a preset entity library on the scheduling topology diagram, where preset entities include equipment structure and wiring methods, and each preset entity corresponds to a preset error prevention rule; integrate the equipment structure, wiring method, and preset error prevention rule corresponding to the matched preset entities into the scheduling topology diagram to obtain an error prevention knowledge graph; and perform error prevention verification on the power system's operation tickets based on the error prevention knowledge graph. This solves the problem that related error prevention verification systems require a large amount of manual work for operation and maintenance, and reduces the manual workload of the error prevention verification system's operation and maintenance.

[0049] Details of one or more embodiments of this application are set forth in the following drawings and description to make other features, objects and advantages of this application more readily apparent. Attached Figure Description

[0050] The accompanying drawings, which form part of this application, are used to provide a further understanding of this application. The illustrative embodiments and descriptions of this application are used to explain this application and do not constitute an undue limitation of this application. In the drawings:

[0051] Figure 1 This is a flowchart of the power system error prevention verification method in this embodiment.

[0052] Figure 2 This is a schematic diagram of a visual image illustrating the rule-based reasoning process in this embodiment.

[0053] Figure 3 This is a flowchart of the generation and verification of the anti-error rule base in this embodiment.

[0054] Figure 4 This is a flowchart of the recursive parsing process in this embodiment.

[0055] Figure 5 This is a schematic diagram of the structure of the power system's error prevention verification system in this embodiment.

[0056] Figure 6 This is a system block diagram of an optional structure of the power system's anti-misoperation verification system in this embodiment.

[0057] Figure 7 This is a system block diagram of another optional structure of the power system's anti-misoperation verification system in this embodiment.

[0058] Figure 8 This is a schematic diagram of the hardware structure of the computer device in this embodiment.

[0059] Figure 9 This is a schematic diagram of the running status rules in this embodiment. Detailed Implementation

[0060] To better understand the purpose, technical solution, and advantages of this application, the application is described and illustrated below in conjunction with the accompanying drawings and embodiments.

[0061] This embodiment provides a method for preventing errors in power system verification, applicable to power systems. This method can be executed on the server side of the power system. The server side can be implemented as a distributed server cluster consisting of multiple servers, or as a single server. The server can be a server in a distributed system, or a server integrated with blockchain. The server can also be a cloud server or intelligent cloud host providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, content delivery networks (CDNs), and big data and artificial intelligence platforms.

[0062] Figure 1 This is a flowchart of the power system error prevention verification method in this embodiment, as follows: Figure 1 As shown, the process includes the following steps:

[0063] Step S101: Obtain the dispatch topology diagram of the power system, wherein the dispatch topology diagram includes the abstract model of the equipment and the real-time data of the equipment.

[0064] Step S102: Match the preset entities in the preset entity library on the scheduling topology diagram. The preset entities include the device structure and wiring method, and each preset entity corresponds to a preset anti-misoperation rule.

[0065] Step S103: The device structure, wiring method and preset anti-misoperation rules corresponding to the matched preset subject are integrated into the scheduling topology graph to obtain the anti-misoperation knowledge graph.

[0066] Step S104: Perform error prevention verification on the operation tickets of the power system based on the error prevention knowledge graph.

[0067] Unlike related technologies that use relational databases, the above steps integrate pre-defined error prevention rules onto the scheduling topology graph by matching pre-defined ontologies, thereby forming an error prevention knowledge graph. Compared to the significant manual workload required to generate a relational database for a new power system in related technologies, the above steps, by pre-setting an ontology library, can quickly and easily automate the generation of an error prevention knowledge graph based on the scheduling topology graph, reducing manual workload. Furthermore, the resulting pre-defined ontology library can be used to generate error prevention knowledge graphs for future power systems. In addition, when information such as the power system's topology changes, or when new ontologies emerge, the above steps can also enable the rapid evolution of the error prevention knowledge graph.

[0068] In addition, the above-mentioned error prevention verification method is based on the scheduling topology graph and error prevention ontology. It uses a matching algorithm to decouple the knowledge data and calculations of the power system, and loads the knowledge into the graph through offline matching to form an error prevention knowledge graph, thereby improving the efficiency of real-time verification.

[0069] The aforementioned scheduling topology diagram includes a topology diagram composed of abstract models of equipment, as well as real-time data of each equipment in the topology diagram. In power systems, the Common Information Model (CIM) is typically used to represent the power system topology. The power CIM is an object-oriented data model that includes common classes, attributes, relationships, etc., and is an abstract model representing all the major equipment of a power company. This power CIM represents the common classes and attributes of equipment, as well as the relationships between them. The CIM model is described using the Universal Modeling Language (UML), mapping the traditional Entity-Relationship Diagram (ER Diagram) to a fully object-oriented expression, thus ensuring the uniformity of the data model and improving its openness. The CIM model describes the static relationships between equipment and does not include dynamic information such as the real-time status of the equipment.

[0070] The aforementioned equipment refers to all participants in the power system, including but not limited to various conductive devices such as reactors, capacitors, switches, loads, lines, busbars, transformers, and generators. Furthermore, CIM equipment may also include objects used to describe companies, regions, transactions, sections, and tie lines.

[0071] Real-time data of equipment refers to data used to represent the real-time status of an entity. For example, real-time data can include remote signaling data and telemetry data. Remote signaling data refers to the switching quantities of remote communication data, such as the open / closed status of circuit breakers or disconnectors, the action / reset status of protection signals, and the on / off status of Automatic Generation Control (AGC) / Automatic Voltage Control (AVC) functions, typically represented by one or two binary bits. Telemetry data refers to real-time data received by a telemetry terminal through sensors. Telemetry data originates from the telemetry object and reflects its digital characteristics or status.

[0072] A dispatch topology diagram includes the static relationships between devices in a power system, as well as the topology of real-time data for each device. In some embodiments, this dispatch topology diagram can be obtained by combining a power CIM model with remote signaling and telemetry data. For example, a general power information model of the power system is obtained, and then simplified and reduced to obtain a simplified general power information model, which includes abstract models of devices; remote signaling and telemetry data of each device in the power system are obtained; and the remote signaling and telemetry data are fused with the devices in the simplified general power information model to obtain the dispatch topology diagram.

[0073] The scheduling topology can be obtained automatically using the methods described above. In the above implementation, simplifying and reducing the general power information model refers to performing topology calculations on the general power information model and removing devices that are not related to error prevention and verification (such as objects describing companies, regions, transactions, etc.), thereby reducing the size of the scheduling topology and shortening the time required for subsequent matching processes.

[0074] The matching process in step S102 above can employ algorithms such as graph simulation and subgraph isomorphism. For example, the subgraph isomorphism algorithm could be the UIImann algorithm. For the graph isomorphism problem, the UIImann algorithm uses enumeration to find subgraph isomorphisms. Its purpose is to find all subgraphs in the original graph that are isomorphic to the preset graph, given a preset graph. In this embodiment, the preset graph is each preset ontology in the preset ontology library, and the original graph is the scheduling topology graph. In some embodiments, matching preset ontology in the preset ontology library on the scheduling topology graph includes: searching and matching subgraphs isomorphic to preset ontology in the preset ontology library on the scheduling topology graph, and establishing a correspondence between the successfully matched preset ontology and the subgraphs of the scheduling topology graph.

[0075] The preset ontology library consists of pre-set ontology and preset error prevention rules specified for each ontology. In this embodiment, the ontology includes device structure and wiring methods. The device structure is also composed of multiple devices and their static relationships; therefore, like the power CIM, the device structure is also a topology diagram. Pre-set ontology is typically composed of typical device structures, and the actual power CIM of a power system can be considered as a combination of typical device structures as constituent units.

[0076] In some embodiments, step S104, which involves verifying the operation ticket of the power system based on the anti-misoperation knowledge graph, includes: obtaining the operation ticket of the power system; parsing the operation ticket to obtain the equipment to be operated and the target action; linking the equipment to be operated in the anti-misoperation knowledge graph and obtaining the target preset anti-misoperation rules and target real-time data of the equipment to be operated; determining the target operation result of the equipment to be operated based on the target real-time data and target action; performing rule reasoning on the target preset anti-misoperation rules to obtain the judgment conditions; and verifying the operation ticket based on the target operation result and the judgment conditions.

[0077] In parsing operation tickets, this embodiment utilizes a Natural Language Processing (NLP) algorithm to train a model, combined with known rules, and integrates relation extraction and event extraction algorithms to achieve accurate parsing and representation of the operation tickets. The parsing model is trained by collecting historical operation ticket texts and then calibrated using known parsing rules. This approach, while accurately parsing operation tickets, offers better generalization and versatility compared to general regular expression and rule extraction methods, and can accurately parse even variable text.

[0078] In the above embodiments, the operation ticket includes the device to be operated and the target action for that device. The device to be operated and its target action can be obtained by parsing the operation ticket. After the device to be operated is obtained, the corresponding device to be operated is linked in the anti-misoperation knowledge graph generated in step S103 according to the identification information of the device to be operated, and the preset anti-misoperation rule corresponding to the device to be operated is read as the target preset anti-misoperation rule. At the same time, the target real-time data of the device to be operated is read from the anti-misoperation knowledge graph. Then, by combining the target real-time data and the target action, the new real-time state of the power system after the operation ticket is applied can be obtained, which is called the target operation result. This target operation result is not actually executed at this time, but is only calculated by the system. Then, for the target preset anti-misoperation rule, the reasoning unit can perform rule reasoning to obtain the judgment condition. This judgment condition is the judgment condition for the device to be judged. The device to be judged may be the device to be operated, or it may be a device related to the device to be operated. Finally, the various judgment conditions and the target operation result are logically operated to obtain the final anti-misoperation verification result, thereby realizing the anti-misoperation verification of the operation ticket.

[0079] In some embodiments, the rule reasoning process can be visualized when performing rule reasoning on the target's preset anti-misconception rules. For example, Figure 2 This is a schematic diagram of the rule-based reasoning process in this embodiment, such as... Figure 2 As shown, the rule-based reasoning process is displayed using a node-edge approach, illustrating the entire verification process. Figure 2 In the code, device number 20 is the device to be operated, and its target action is closing. The preset anti-misoperation rule for device number 20 is "do not open or close the disconnect switch under load". After rule reasoning, three devices numbered 21, 22, and 23 are obtained, and their judgment condition should be opening. If the target operation result of the operation ticket is that device number 20 is directly closed, and devices numbered 21, 22, and 23 are all closed, then the anti-misoperation verification result of the operation ticket will be output as "failed".

[0080] Verification of operation tickets relies on a series of error prevention rules, which are related to the wiring method and topology of the power grid. Related technologies typically set the error prevention rules for each device by hard-coding them. This approach suffers from problems such as being difficult to replicate and promote, requiring a large configuration workload, rules not being automatically updated as business evolves, and difficulty adapting to complex rule scenarios. The error prevention verification method for power systems provided in the above embodiments can solve these problems. However, the current language representation of error prevention rules cannot represent complex rules involving multiple devices, multiple rules, and multiple levels, and therefore cannot represent complex AC operation tickets or the rules of current DC operation tickets.

[0081] For example, related technologies provide a language representation of interval-based error prevention rules, based on information design for typical intervals. In a power system, an interval refers to a series of closely connected parts in a substation that share certain common functions. Identifying and distinguishing these parts is crucial for maintenance (which parts, when disconnected, have the least impact on the rest of the substation) or expansion plans (which parts need to be added if a new line is constructed). These parts are called intervals and are managed by devices collectively known as "interval controllers," equipped with a complete set of protection called "interval protection." An electrical interval in a substation refers to a complete circuit, including circuit breakers, disconnectors, transformers, surge arresters, etc. Any fully functional electrical unit is called an interval, such as incoming / outgoing line intervals or busbar equipment intervals. For a 3 / 2 connection, a complete string contains three electrical intervals.

[0082] In the language representation of the aforementioned related technologies, the general equipment number "0" indicates a separate operating condition, the general equipment number "1" indicates a combined operating condition, ":" represents a separator, "," represents an AND operation, "+" represents an OR operation, "=" represents an equality comparison operation, and "!" indicates the end of the statement. The above-mentioned solutions of the related technologies are not applicable to structures with atypical intervals but containing error prevention rules, such as the states of both sides of a line, the state of one side of a line, or the state of DC equipment. Furthermore, the language representation of error prevention rules in the related technologies only includes conditional AND and OR operations, which can only be used to represent simple rules and cannot handle AND, OR, and NOT operations under multiple rules and conditions.

[0083] In this embodiment, a language representation of error prevention rules is provided to implement the multi-device, multi-rule, and multi-level representation of the aforementioned preset error prevention rules. The language representation of these preset error prevention rules includes logical elements, device elements, and state elements. The logical elements include the hierarchical logic of entity device objects and the hierarchical logic of rules. The state elements include the switch status of the root device and the intermediate status of the leaf devices. The language representation provided in this embodiment can be used for the general representation of device status rules and device operation rules.

[0084] For example, the logical elements, device elements, and state elements of the language representation of the error prevention rules provided in this embodiment can be:

[0085] Logical elements:

[0086] "{}": The logic and relationship between different rules.

[0087] ";": The logical OR relationship between different subrules within the same rule.

[0088] “:”: Hierarchical device relationship.

[0089] “,”: Different decision conditions and relationships within the same sub-rule.

[0090] "|": Different decision conditions or relationships within the same sub-rule.

[0091] “=”: equal to.

[0092] “!”: Not equal to.

[0093] Equipment elements: Name codes of equipment in the structure.

[0094] State elements:

[0095] “1”: Close.

[0096] “0”: Pull open.

[0097] “running”: running status.

[0098] "hot": in hot standby mode.

[0099] “cold”: in a cold standby state.

[0100] “repair”: Under maintenance status.

[0101] “ac_hot”: AC side hot standby status.

[0102] “isolate”: Bypass mode.

[0103] “ground”: Grounded state.

[0104] The differences between the language representations mentioned above and those of related technologies include: defining representation symbols between different rules and between devices at different levels, and also defining intermediate states such as running and hot.

[0105] Based on the above elements, accurate descriptions of operational error prevention rules, AC status verification rules, and DC status verification rules in the scheduling field can be achieved. Figure 9 Taking the running status rule shown as an example, the running status rule is represented as follows:

[0106] [{'KG1=1;KG2=hot'},{'DZ1=1,DZ2=1|DZ3=1'},{'DD1=0,DD2=0'}]

[0107] In this rule, “KG1”, “KG2”, “DZ1”, “DZ2”, “DD1”, “DD2”, and “DZ3” are device elements, representing a specific device under this structure; “1”, “0”, and “hot” are state elements, representing the constraint state of a device.

[0108] This rule can be interpreted as: all three rules must be satisfied simultaneously:

[0109] (1) KG1 is closed or KG2 is in hot standby state;

[0110] (2) DZ1 is closed, and either DZ2 or DZ3 is closed;

[0111] (3) DD1 is pulled apart and DD2 is pulled apart.

[0112] It should be noted that the symbols used in the above language representation are merely illustrative and can be replaced by other symbols or forms to represent the logical elements, device elements, and state elements in the rule language. For example, “()” can represent rules and relationships, “or” can represent conditions or relationships, and “100” can represent the running state.

[0113] Figure 3 This is a flowchart illustrating the generation and verification of the error prevention rule base in this embodiment. This error prevention rule base may, for example, be part of the preset ontology library described in the above embodiments. Figure 3 As shown, a fault-prevention rule language is designed based on the device structure. This language can support various rule representations in scheduling fault-prevention scenarios. Then, based on the designed rule language, relevant rules in scheduling are represented to build a fault-prevention rule library. In online verification scenarios, the corresponding fault-prevention verification rules are obtained according to the input operation and device. The rules are recursively parsed based on the hierarchical topology information. Finally, the verification judgment is performed by combining the real-time device status and the parsed rules, and the result is output.

[0114] Among them, the corresponding anti-misoperation rule library for typical equipment in AC and DC includes: basic switch rules, series compensation rules, double bus switch rules, 3 / 2 series rules, 4 / 3 series rules, outgoing disconnector rules, special 6 disconnector rules, high-resistance disconnector rules, single-sided line status rules, double-sided line status rules, pole rules, converter rules, pole bus rules, DC line rules, DC neutral bus rules, grounding electrode bus rules, grounding electrode line rules, metallic return line switch rules, DC operation mode rules, etc.

[0115] In the above linguistic representation, "1" and "0" represent the root state of the device, while all others are intermediate states. Determining an intermediate state requires further conversion to a root state using a recursive tree structure. In this embodiment, by applying the above linguistic representation, the linguistic representation of the preset anti-misoperation rules can be recursively parsed based on the hierarchical topology of the devices in the anti-misoperation knowledge graph, yielding the corresponding judgment conditions for the preset anti-misoperation rules.

[0116] For example, the process involves parsing the device to be operated corresponding to the operation ticket; determining whether the device to be operated is a root device; if the device to be operated is a root device, obtaining the preset anti-misoperation rules of the leaf devices above the device to be operated from the anti-misoperation knowledge graph as the target preset anti-misoperation rule; otherwise, obtaining the preset anti-misoperation rule of the device to be operated as the target preset anti-misoperation rule; based on the linguistic representation of the target preset anti-misoperation rule, parsing each judgment condition in the target preset anti-misoperation rule one by one, and determining the device to be judged corresponding to each judgment condition; if the state element in the linguistic representation of the judgment condition is an intermediate state, recursively parsing the device to be judged as the device to be operated.

[0117] Figure 4 This is a flowchart of the recursive parsing process in this embodiment, as follows: Figure 4 As shown, the process includes: first, determining whether the device to be operated is a root device; if it is, obtaining its upper-level leaf devices; then, retrieving rules from the rule base based on the leaf device's identification information; parsing each judgment condition of the rule, obtaining the corresponding device to be judged based on the device element of the condition; if the state element in the condition is not 0 or 1, then using the device to be judged and the state element as the new device to be operated and the target action, and recursively parsing; if the state element in the condition is 0 or 1, then combining the real-time state of the device to be judged for judgment. Finally, performing logical operations on the results of each condition judgment based on the rule logic elements, and outputting the final verification result.

[0118] The recursive parsing method described above can not only automatically determine various rules composed of general AND, OR, and NOT logic, but also flexibly combine and determine devices at different levels in the topology by combining topology information. This makes the rules and parsing applicable to various complex determination scenarios, such as single-sided AC line status determination, double-sided AC line status determination, DC pole status determination, and DC operation mode determination.

[0119] Through the language representation of the anti-mistake rules in the above embodiments, based on the anti-mistake knowledge graph, hierarchical topology information is used and the rules are automatically parsed and judged based on recursive algorithms, so that the rules and parsing can be applied to various complex judgment scenarios, such as single-sided AC line status judgment, double-sided AC line status judgment, DC pole status judgment, DC operation mode judgment, etc.

[0120] This embodiment also provides a power system for preventing misverification. Figure 5 This is a schematic diagram of the power system's error prevention and verification system in this embodiment, as shown below. Figure 5 As shown, the system includes:

[0121] Graph database 51 is used to obtain the dispatch topology diagram of the power system, wherein the dispatch topology diagram includes the abstract model of the equipment and the real-time data of the equipment.

[0122] The preset body library 52 is used to store preset bodies and preset error prevention rules. The preset bodies include the device structure and wiring method, and each preset body corresponds to a preset error prevention rule.

[0123] The graph fusion module 53 is used to match preset entities in the preset entity library on the scheduling topology graph, and to fuse the device structure, wiring method and preset anti-misoperation rules corresponding to the matched preset entities into the scheduling topology graph to obtain an anti-misoperation knowledge graph.

[0124] The error prevention verification module 54 is used to perform error prevention verification on the operation tickets of the power system based on the error prevention knowledge graph.

[0125] Figure 6 This is a system block diagram of an optional structure of the power system's error prevention verification system in this embodiment, such as... Figure 6 As shown, the system comprises five parts: data access, ontology design, graph construction, graph fusion, and error prevention verification.

[0126] The data access section primarily provides data to the aforementioned graph database 51. The data intervention section accesses and parses data related to the operation ticket error prevention and verification into the system, including power CIM models, remote signaling data, and telemetry data.

[0127] The graph construction section is used to build the data in the graph database 51 mentioned above. The graph construction section parses the power CIM model into the graph database to build the basic dispatching equipment topology base (i.e., dispatching topology map), and at the same time parses remote signaling and telemetry data in real time to ensure the real-time performance of the topology base.

[0128] The ontology design section generates the aforementioned preset ontology library 52 and associates each preset ontology in the preset ontology library 52 with preset anti-misoperation rules from the anti-misoperation rule library. The anti-misoperation ontology designed in the ontology design section abstracts and integrates topology structures and rules. Anti-misoperation ontology is created for typical equipment structures and wiring methods in power systems, constructing an anti-misoperation ontology library. This anti-misoperation ontology library does not contain any specific equipment information; it only contains general topology structures and rules.

[0129] The graph fusion part is implemented by the graph fusion module 53 mentioned above. The graph fusion part is based on algorithms such as graph simulation and subgraph isomorphism. It matches and instantiates the anti-misoperation ontology library in the current actual scheduling topology, updates the knowledge and information of the matched devices on the topology base, and attaches the rules to the specific devices to form the fused anti-misoperation knowledge graph base.

[0130] The graph fusion and error prevention / verification sections each include corresponding algorithm engines. The algorithm engine layer primarily consists of general-purpose algorithms used in the system, such as Named Entity Recognition (NER), relation extraction, event extraction, entity linking, deep recursive traversal, rule reasoning, and Depth-First Search (DFS). These algorithms support operations such as operation ticket parsing, paradigmatic text parsing, graph entity linking, rule parsing, and verification within the application.

[0131] The error prevention verification section is implemented by the aforementioned error prevention verification module 54, which resides in the upper application layer. This module first parses the input operation ticket, and based on the parsed results, establishes entity links and obtains error prevention rules on the error prevention knowledge graph base. Then, it verifies the AC and DC operation tickets through rule reasoning, and finally visualizes the reasoning process based on the graph. It also supports user-defined input logic operation rules, which are automatically parsed and represented using NLP algorithms, and then automatically verified using the error prevention graph base and rule reasoning.

[0132] In some embodiments, graph database 51 is used to obtain a general power information model of the power system, and to simplify and reduce the general power information model to obtain a simplified general power information model, wherein the simplified general power information model includes an abstract model of the equipment; to obtain remote signaling data and telemetry data of each equipment in the power system; and to fuse the remote signaling data and telemetry data with the equipment in the simplified general power information model to obtain a scheduling topology diagram.

[0133] In some embodiments, the graph fusion module 53 is used to search and match subgraphs that are isomorphic to preset ontologies in a preset ontology library on the scheduling topology graph, and establish a correspondence between the successfully matched preset ontologies and the subgraphs of the scheduling topology graph.

[0134] Figure 7 This is a system block diagram of another optional structure of the power system's error prevention verification system in this embodiment. For example... Figure 7As shown, in some embodiments, the error prevention verification module 54 includes: a parsing unit 541, used to obtain the operation ticket of the power system, and parse the operation ticket to obtain the equipment to be operated and the target action; a linking unit 542, used to link with the equipment to be operated in the error prevention knowledge graph, and obtain the target preset error prevention rules and target real-time data of the equipment to be operated; a determining unit 543, used to determine the target operation result of the equipment to be operated based on the target real-time data and target action; a reasoning unit 544, used to perform rule reasoning on the target preset error prevention rules to obtain the judgment conditions; and a verification unit 545, used to perform error prevention verification on the operation ticket based on the target operation result and the judgment conditions.

[0135] In some embodiments, the error prevention verification module 54 also includes a visualization unit for visualizing the rule reasoning process.

[0136] In some of these embodiments, the language representation of the preset anti-misoperation rules includes logical elements, device elements, and state elements. The logical elements include the hierarchical logic of the entity device object and the hierarchical logic of the rule. The state elements include the switch status of the root device and the intermediate status of the leaf device.

[0137] In some embodiments, the error prevention verification module 54 is used to recursively parse the language representation of the preset error prevention rule according to the hierarchical topology of the device in the error prevention knowledge graph, so as to obtain the judgment conditions corresponding to the preset error prevention rule.

[0138] In some embodiments, the error prevention verification module 54 is used to parse the device to be operated corresponding to the operation ticket; determine whether the device to be operated is a root device; if the device to be operated is a root device, obtain the preset error prevention rules of the leaf devices above the device to be operated from the error prevention knowledge graph as the target preset error prevention rule; otherwise, obtain the preset error prevention rules of the device to be operated as the target preset error prevention rule; according to the language representation of the target preset error prevention rule, parse each judgment condition in the target preset error prevention rule one by one, and determine the device to be judged corresponding to each judgment condition; if the state element in the language representation of the judgment condition is an intermediate state, recursively parse the device to be judged as the device to be operated.

[0139] This embodiment also provides a computer device. Figure 8 This is a schematic diagram of the hardware structure of the computer device in this embodiment, as shown below. Figure 8 As shown, the computer device may include a processor 81 and a memory 82 storing computer program instructions.

[0140] Specifically, the processor 81 may include a central processing unit (CPU), an application specific integrated circuit (ASIC), or one or more integrated circuits that can be configured to implement the embodiments of this application.

[0141] The memory 82 may include a mass storage device for data or instructions. For example, and not limitingly, the memory 82 may include a hard disk drive (HDD), a floppy disk drive, a solid-state drive (SSD), flash memory, an optical disk drive, a magneto-optical disk drive, magnetic tape, or a Universal Serial Bus (USB) drive, or a combination of two or more of these. Where appropriate, the memory 82 may include removable or non-removable (or fixed) media. Where appropriate, the memory 82 may be internal or external to a data processing device. In a particular embodiment, the memory 82 is non-volatile memory. In a particular embodiment, the memory 82 includes read-only memory (ROM) and random access memory (RAM). Where appropriate, the ROM may be a mask-programmed ROM, a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), an electrically alterable read-only memory (EAROM), or flash memory, or a combination of two or more of these. Where appropriate, the RAM can be Static Random-Access Memory (SRAM) or Dynamic Random-Access Memory (DRAM). DRAM can be Fast Page Mode Dynamic Random-Access Memory (FPMDRAM), Extended Data Out Dynamic Random-Access Memory (EDODRAM), Synchronous Dynamic Random-Access Memory (SDRAM), etc.

[0142] The memory 82 can be used to store or cache various data files that need to be processed and / or communicated, as well as possible computer program instructions executed by the processor 82.

[0143] In some embodiments, the computer device may further include a communication interface 83 and a bus 80. For example, Figure 8 As shown, the processor 81, memory 82, and communication interface 83 are connected through bus 80 and complete communication with each other.

[0144] The communication interface 83 is used to enable communication between the various modules, devices, units, and / or equipment in the embodiments of this application. The communication interface 83 can also enable data communication with other components such as external devices, image / data acquisition devices, databases, external storage, and image / data processing workstations.

[0145] Bus 80 includes hardware, software, or both, that couples components of a computer device together. Bus 80 includes, but is not limited to, at least one of the following: data bus, address bus, control bus, expansion bus, and local bus. For example, and not as a limitation, bus 80 may include an Accelerated Graphics Port (AGP) or other graphics bus, an Extended Industry Standard Architecture (EISA) bus, a Front Side Bus (FSB), a Hyper Transport (HT) interconnect, an Industry Standard Architecture (ISA) bus, an InfiniBand interconnect, a Low Pin Count (LPC) bus, a memory bus, a Micro Channel Architecture (MCA) bus, a Peripheral Component Interconnect (PCI) bus, a PCI-Express (PCI-X) bus, a Serial Advanced Technology Attachment (SATA) bus, a Video Electronics Standards Association Local Bus (VLB) bus, or other suitable buses, or a combination of two or more of these. Where appropriate, bus 80 may include one or more buses. Although specific buses are described and illustrated in the embodiments of this application, this application considers any suitable bus or interconnection.

[0146] The computer device uses processor 81 to run computer programs to implement the power system anti-misoperation verification method described in the above embodiment.

[0147] It should be noted that the specific examples in this embodiment can refer to the examples described in the above embodiments and optional implementations, and will not be repeated in this embodiment.

[0148] Furthermore, in conjunction with the power system error prevention verification method provided in the above embodiments, this embodiment can also provide a non-transient computer-readable medium for implementation. This medium stores a computer program; when executed by a processor, the computer program implements any of the power system error prevention verification methods described in the above embodiments.

[0149] It should be understood that the specific embodiments described herein are merely illustrative of the application and not intended to limit it. All other embodiments derived by those skilled in the art based on the embodiments provided in this application without inventive effort are within the scope of protection of this application.

[0150] Obviously, the accompanying drawings are merely some examples or embodiments of this application. Those skilled in the art can apply this application to other similar situations based on these drawings without any creative effort. Furthermore, it is understood that although the work done in this development process may be complex and lengthy, for those skilled in the art, certain design, manufacturing, or production modifications made based on the technical content disclosed in this application are merely conventional technical means and should not be considered as insufficient disclosure of this application.

[0151] The term "embodiment" in this application refers to a specific feature, structure, or characteristic described in connection with an embodiment that may be included in at least one embodiment of this application. The appearance of this phrase in various places in the specification does not necessarily imply the same embodiment, nor does it imply that it is mutually exclusive with or independent of other embodiments. It will be clearly or implicitly understood by those skilled in the art that the embodiments described in this application may be combined with other embodiments without conflict.

[0152] Unless otherwise defined, the technical or scientific terms used in this application shall have the general meaning as understood by one of ordinary skill in the art to which this application pertains. Words such as “a,” “an,” “an,” “the,” “the,” and “these,” used in this application, do not indicate quantitative limitation and may be singular or plural. The terms “comprising,” “including,” “having,” and any variations thereof used in this application are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or device that comprises a series of steps or modules (units) is not limited to the listed steps or modules (units) but may include steps or modules (units) not listed, or may include other steps or modules (units) inherent to such processes, methods, products, or devices. The terms “connected,” “linked,” and “coupled,” used in this application, are not limited to physical or mechanical connections but may include electrical connections, whether direct or indirect. The term “multiple” used in this application refers to two or more. The "and / or" operator describes the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: A alone, A and B simultaneously, and B alone. Typically, the character " / " indicates that the objects before and after it are in an "or" relationship. The terms "first," "second," and "third," etc., used in this application are merely for distinguishing similar objects and do not represent a specific ordering of the objects.

[0153] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of patent protection. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the appended claims.

Claims

1. A method for preventing errors in power system verification, characterized in that, include: Obtain a dispatch topology diagram of the power system, wherein the dispatch topology diagram includes an abstract model of the equipment and real-time data of the equipment; the real-time data of the equipment includes remote signaling data and telemetry data; Match the preset entities in the preset entity library on the scheduling topology graph. The preset entity library consists of pre-set entities and preset anti-misoperation rules specified for each entity. The preset entities include equipment structure and wiring method, and each preset entity corresponds to a preset anti-misoperation rule. The device structure, wiring method, and preset anti-misoperation rules corresponding to the matched preset entities are integrated into the scheduling topology graph to obtain an anti-misoperation knowledge graph; The operation tickets of the power system are checked for error prevention based on the aforementioned error prevention knowledge graph. The obtained power system dispatch topology includes: Obtain the general power information model of the power system, and simplify and reduce the general power information model to obtain a simplified general power information model, wherein the simplified general power information model includes an abstract model of the equipment; Acquire remote signaling data and telemetry data of each device in the power system; The remote signaling data and the telemetry data are fused with the equipment in the simplified general power information model to obtain the scheduling topology.

2. The method according to claim 1, characterized in that, Matching preset ontologies in the preset ontology library on the scheduling topology graph includes: Search and match subgraphs that are isomorphic to the preset ontology in the preset ontology library on the scheduling topology graph, and establish a correspondence between the successfully matched preset ontology and the subgraphs of the scheduling topology graph.

3. The method according to claim 1, characterized in that, The error prevention verification of the operation tickets of the power system based on the aforementioned error prevention knowledge graph includes: Obtain the operation ticket of the power system, and parse the operation ticket to obtain the equipment to be operated and the target action; The device to be operated is linked in the anti-misoperation knowledge graph, and the target preset anti-misoperation rules and target real-time data of the device to be operated are obtained. Based on the target's real-time data and the target's actions, determine the target operation result of the device to be operated; The target's preset anti-misconception rules are used to perform rule reasoning to obtain the judgment conditions; Based on the target operation result and the judgment condition, the operation ticket is checked for error prevention.

4. The method according to claim 3, characterized in that, The rule reasoning for the preset anti-misconception rules of the target also includes: Visualize the process of rule-based reasoning.

5. The method according to any one of claims 1 to 4, characterized in that, The language representation of the preset error prevention rules includes logical elements, device elements, and state elements. The logical elements include the hierarchical logic of the entity device object and the hierarchical logic of the rule. The state elements include the switch status of the root device and the intermediate status of the leaf device.

6. The method according to claim 5, characterized in that, The error prevention verification of the operation tickets of the power system based on the aforementioned error prevention knowledge graph includes: Based on the hierarchical topology of the devices in the anti-misoperation knowledge graph, the language representation of the preset anti-misoperation rule is recursively parsed to obtain the judgment conditions corresponding to the preset anti-misoperation rule.

7. The method according to claim 6, characterized in that, Based on the hierarchical topology of devices in the error prevention knowledge graph, the language representation of the preset error prevention rule is recursively parsed to obtain the judgment conditions corresponding to the preset error prevention rule, including: Analyze the device to be operated corresponding to the operation ticket; Determine whether the device to be operated is a root device; If the device to be operated is a root device, the preset anti-misoperation rule of the upper-level leaf device of the device to be operated is obtained from the anti-misoperation knowledge graph as the target preset anti-misoperation rule; otherwise, the preset anti-misoperation rule of the device to be operated is obtained as the target preset anti-misoperation rule. Based on the language representation of the target preset error prevention rules, each judgment condition in the target preset error prevention rules is parsed one by one, and the device to be judged corresponding to each judgment condition is determined; When the state element in the language representation of the determination condition is an intermediate state, the device to be determined is treated as the device to be operated and recursively parsed.

8. A power system error prevention verification system, characterized in that... include: A graph database is used to obtain the dispatch topology diagram of a power system, wherein the dispatch topology diagram includes abstract models of equipment and real-time data of the equipment; the real-time data of the equipment includes remote signaling data and telemetry data; A preset ontology library is used to store preset ontology and preset error prevention rules. The preset ontology library consists of pre-set ontology and preset error prevention rules specified for each ontology. The preset ontology includes the device structure and wiring method, and each preset ontology corresponds to a preset error prevention rule. The graph fusion module is used to match preset entities in the preset entity library on the scheduling topology graph, and to fuse the device structure, wiring method and preset anti-misoperation rules corresponding to the matched preset entities into the scheduling topology graph to obtain an anti-misoperation knowledge graph. The error prevention verification module is used to perform error prevention verification on the operation tickets of the power system based on the error prevention knowledge graph. The graph database is specifically used to obtain the general power information model of the power system, and to simplify and reduce the general power information model to obtain a simplified general power information model, wherein the simplified general power information model includes an abstract model of the equipment. Acquire remote signaling data and telemetry data of each device in the power system; The remote signaling data and the telemetry data are fused with the equipment in the simplified general power information model to obtain the scheduling topology.

9. The system according to claim 8, characterized in that, The error prevention and verification module includes: The parsing unit is used to obtain the operation ticket of the power system and parse the operation ticket to obtain the equipment to be operated and the target action; The linking unit is used to link the device to be operated in the anti-misoperation knowledge graph and to obtain the target preset anti-misoperation rules and target real-time data of the device to be operated. The determining unit is used to determine the target operation result of the device to be operated based on the target real-time data and the target action; The reasoning unit is used to perform rule reasoning on the preset anti-mistake rules of the target to obtain the judgment conditions; The verification unit is used to perform error prevention verification on the operation ticket based on the target operation result and the judgment condition.

10. The system according to claim 8, characterized in that, The operation result of the operation ticket and the preset error prevention rule are represented in the same language. The language representation includes logical elements, device elements and status elements. The logical elements include the hierarchical logic of the entity device object and the hierarchical logic of the rule. The status elements include the switch status of the root device and the intermediate status of the leaf device.

11. A computer device, comprising a memory and a processor, characterized in that, The memory stores a computer program, and the processor is configured to run the computer program to perform the power system anti-misoperation verification method according to any one of claims 1 to 7.

12. A non-transient computer-readable medium, characterized in that, The non-transient computer-readable medium stores a computer program, wherein the computer program is configured to execute the power system anti-misoperation verification method according to any one of claims 1 to 7 when it is run.

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