A solid state disk testing method, device, apparatus and storage medium

Abstract

The application relates to a solid state disk testing method, device, equipment and storage medium. The solid state disk testing method comprises the following steps: determining a first host write amount in a unit time period according to a preset test period; determining a second host write amount in the unit time period according to a host read-write speed; making the first host write amount equal to the second host write amount to determine a target capacity; and performing a write-erase cycle test on a target solid state disk based on the target capacity, so that the time length of completing the write-erase cycle test is less than or equal to the preset test period. The solid state disk testing method provided by the application can solve the problem that the test period is uncontrollable in the prior art.

Description

Technical Field

[0001] This application relates to the field of solid-state drive (SSD) testing, and in particular to a SSD testing method, apparatus, device, and storage medium. Background Technology

[0002] Mainstream solid-state drives (SSDs) use semiconductor flash NAND as their storage medium. The basic storage unit of flash NAND is a floating-gate transistor. SSDs write and erase data by charging and discharging electrons through the floating gate of the floating-gate transistor. However, the repeated passage of electrons causes irreversible wear on the tunnel oxide layer of the floating gate, resulting in a shorter lifespan and reduced durability of the SSD as the amount of data written increases.

[0003] In existing technologies, the durability of SSDs can be tested by performing erase-write cycle tests on randomly selected SSDs to determine whether the SSDs meet quality standards. However, current erase-write cycle tests often take a relatively long time.

[0004] If the test cycle of the erase / write cycle test is not controlled, the upper limit of the time spent cannot be estimated. Therefore, the existing technology still has the problem of uncontrollable test cycle. Summary of the Invention

[0005] Based on this, this application provides a solid-state drive testing method, apparatus, device, and storage medium, which can improve the problem of uncontrollable testing cycle in the existing technology.

[0006] In a first aspect, this application provides a solid-state drive (SSD) testing method, which includes: determining a first host write volume within a unit time period according to a preset test cycle; determining a second host write volume within a unit time period according to host read / write speed; setting the first host write volume equal to the second host write volume to determine a target capacity; and performing an erase / write cycle test on the target SSD based on the target capacity, such that the time to complete the erase / write cycle test is less than or equal to the preset test cycle.

[0007] In conjunction with the first aspect, in the first possible implementation of the first aspect, the step of determining the first host write volume within a unit time period according to a preset test cycle includes: determining the actual write volume within a unit time period according to the preset test cycle and the actual total write volume; and determining the first host write volume within a unit time period according to the actual write volume within a unit time period and the write amplification parameter.

[0008] In conjunction with the first possible implementation of the first aspect, in the second possible implementation of the first aspect, the mathematical expression for determining the actual write volume per unit time based on the preset test period and the actual total write volume includes: ;in, , This represents the actual total amount written. This represents the total number of erase / write cycles. For the target capacity, This represents the actual amount of data written within a unit of time. This is the preset test cycle.

[0009] In conjunction with the first possible implementation of the first aspect, in the third possible implementation of the first aspect, the mathematical expression for determining the first host write volume within a unit time period based on the actual write volume within a unit time period and the write amplification parameter includes: ;in, , This represents the actual amount written. The number of erase / write cycles per unit of time. For the target capacity, To write the amplification parameters, This represents the first host write volume within a unit of time.

[0010] In conjunction with the first aspect, in the fourth possible implementation of the first aspect, the mathematical expression for determining the amount of second host writes per unit time based on the host read / write speed includes: ;in, For host read and write speed, For unit duration, This represents the amount of data written to the second host within a unit of time.

[0011] In conjunction with the first aspect, in the fifth possible implementation of the first aspect, the mathematical expression for determining the target capacity by setting the write volume of the first host equal to the write volume of the second host includes: ,in, , The number of erase / write cycles per unit of time. For the target capacity, To write the amplification parameters, This represents the write volume to the first host. This represents the amount written to the second host.

[0012] In conjunction with the first aspect, in the sixth possible implementation of the first aspect, before determining the first host write volume within a unit time period according to the preset test cycle, the method further includes: receiving an erase / write cycle test instruction and extracting the cycle parameter in the erase / write cycle test instruction as the preset test cycle; responding to the erase / write cycle test instruction to perform the step of determining the first host write volume within a unit time period according to the preset test cycle.

[0013] Secondly, this application provides a solid-state drive (SSD) testing device, comprising: a first determining unit for determining a first host write volume within a unit time period according to a preset test cycle; a second determining unit for determining a second host write volume within a unit time period according to host read / write speed; a third determining unit for setting the first host write volume equal to the second host write volume to determine a target capacity; and a testing unit for performing an erase / write cycle test on the target SSD based on the target capacity, such that the time to complete the erase / write cycle test is less than or equal to the preset test cycle period.

[0014] In conjunction with the second aspect, in the first possible implementation of the second aspect, the first determining unit is specifically used for: determining the actual write volume within a unit duration based on a preset test cycle and the actual total write volume; and determining the first host write volume within a unit duration based on the actual write volume within a unit duration and the write amplification parameter.

[0015] In conjunction with the first possible implementation of the second aspect, in the second possible implementation of the second aspect, the mathematical expression for determining the actual write volume per unit time based on the test cycle and the actual total write volume includes: ;in, , This represents the actual total amount written. This represents the total number of erase / write cycles. For the target capacity, This represents the actual amount of data written within a unit of time. This is the preset test cycle.

[0016] In conjunction with the first possible implementation of the second aspect, in the third possible implementation of the second aspect, the mathematical expression for determining the first host write volume within a unit time period based on the actual write volume within a unit time period and the write amplification parameter includes: ;in, , This represents the actual amount written. The number of erase / write cycles per unit of time. For the target capacity, To write the amplification parameters, This represents the first host write volume within a unit of time.

[0017] In conjunction with the second aspect, in the fourth possible implementation of the second aspect, the mathematical expression for determining the second host write volume per unit time based on the host read / write speed includes: ;in, For host read and write speed, For unit duration, This represents the amount of data written to the second host within a unit of time.

[0018] In conjunction with the second aspect, in the fifth possible implementation of the second aspect, the mathematical expression for determining the target capacity by setting the write volume of the first host equal to the write volume of the second host includes: ,in, , The number of erase / write cycles per unit of time. For the target capacity, To write the amplification parameters, This represents the write volume to the first host. This represents the amount written to the second host.

[0019] In conjunction with the second aspect, in the sixth possible implementation of the second aspect, the above-mentioned solid-state drive testing device further includes a receiving unit, which is further configured to receive an erase / write cycle test command and extract the cycle parameter in the erase / write cycle test command as a preset test cycle; the above-mentioned first determining unit is further configured to respond to the erase / write cycle test command to perform the step of determining the first host write volume within a unit time according to the preset test cycle.

[0020] Thirdly, this application also provides a solid-state drive (SSD) testing device, which includes a processor, a transceiver, and a memory, the processor, transceiver, and memory being connected via a bus; the processor is used to execute multiple instructions; the transceiver is used to exchange data with other modules; and the memory is used to store multiple instructions, the instructions being adapted to be loaded by the processor and executed as a SSD testing method as described in the first aspect or any embodiment of the first aspect.

[0021] Fourthly, this application also provides a computer-readable storage medium storing a plurality of instructions adapted for loading by a processor and executing a solid-state drive testing method as described in the first aspect or any embodiment of the first aspect.

[0022] In summary, this application provides a solid-state drive (SSD) testing method, apparatus, device, and storage medium. The method includes: firstly, determining a first host write volume and a second host write volume per unit time based on a preset test cycle and host read / write speed; then, equivalencing the first and second host write volumes to determine a target capacity; finally, performing an erase / write cycle test on the target SSD based on the target capacity, ensuring that the completion time of the erase / write cycle test is less than or equal to the preset test cycle. It should be noted that the first host write volume is an ideal host write volume determined based on the preset test cycle, while the second host write volume is the actual host write volume determined based on the host read / write speed. Therefore, by equalizing the first host write volume with the second host write volume, the completion time of the erase / write cycle test can be controlled within the preset test cycle. Thus, the SSD testing method provided by this application can improve the problem of uncontrollable test cycles in existing technologies. Attached Figure Description

[0023] Figure 1 This is an application scenario diagram of a solid-state drive testing method in one embodiment;

[0024] Figure 2 This is a flowchart illustrating a solid-state drive testing method in one embodiment;

[0025] Figure 3 This is a flowchart illustrating a solid-state drive testing method in another embodiment;

[0026] Figure 4 A schematic block diagram of a solid-state drive testing device provided in this application;

[0027] Figure 5 This application provides a structural block diagram of a solid-state drive testing device. Detailed Implementation

[0028] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0029] Since the embodiments of this application involve a large number of technical terms, for ease of understanding, the relevant terms and concepts that may be involved in the embodiments of this application will be introduced below.

[0030] 1. Program Erase (PE) Cycle

[0031] The PE cycle refers to the total number of erase cycles a solid-state drive (SSD) can undergo. The PE cycle can be used to measure the lifespan of an SSD. One erase cycle on an SSD is called a PE cycle, and the actual amount of data written in one PE cycle is equal to the SSD's capacity. Since SSDs cannot be written to indefinitely and have a limited number of write cycles, the PE cycle of an SSD is generally relatively fixed. Therefore, the test cycle of an SSD erase cycle test is mainly affected by the duration of one PE cycle.

[0032] 2. Host write volume and actual write volume

[0033] Host write volume refers to the amount of data written by the host during the SSD erase cycle test performed by the test device. Actual write volume refers to the amount of data written by the SSD during the SSD erase cycle test performed by the test device. It should be noted that due to write amplification (WA), host write volume and actual write volume are often not equal. The relationship between host write volume and actual write volume can be expressed mathematically. To indicate, among which, This refers to the write amplification parameter, which can be obtained through actual measurement. Additionally, the actual total write volume is the sum of all actual write volumes throughout the entire PE cycle.

[0034] It should be noted that the solid-state drive (SSD) testing apparatus and equipment mentioned below in this application may include, but are not limited to, computers, servers, terminal devices, or central processing units (CPUs), general-purpose processors, coprocessors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The SSD testing apparatus can implement the methods described in this application, such as determining the first host write volume within a unit time period based on a preset test cycle, and determining the second host write volume within a unit time period based on the host read / write speed, etc., which will not be elaborated further in this application.

[0035] It should also be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show components related to the present invention and are not drawn according to the actual number, shape, and size of the components in implementation. In actual implementation, the form, quantity, and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex. The structures, proportions, sizes, etc., shown in the accompanying drawings of this specification are only used to complement the content disclosed in the specification for those skilled in the art to understand and read, and are not intended to limit the conditions under which the present invention can be implemented. Therefore, they have no substantial technical significance. Any modification to the structure, change in the proportional relationship, or adjustment of the size, without affecting the effects and objectives that the present invention can produce, should still fall within the scope of the technical content disclosed in the present invention. Furthermore, the orientations or positional relationships indicated by terms such as "upper," "lower," "left," "right," "middle," "longitudinal," "lateral," "horizontal," "inner," "outer," "radial," and "circumferential" used in this specification are based on the orientations or positional relationships shown in the accompanying drawings and are only for the purpose of simplifying the description. They do not indicate or imply that the modules or elements referred to must have a specific orientation, or be constructed and operated in a specific orientation. Changes or adjustments to their relative relationships, without substantially altering the technical content, should also be considered within the scope of the present invention. Therefore, they should not be construed as limitations on the present invention. In addition, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0036] Currently, existing technologies often take a long time to perform erase / write cycle tests on SSDs. If the test cycle is not controlled, the maximum time required is immeasurable, thus existing technologies suffer from an uncontrollable test cycle.

[0037] To address the issue of uncontrollable testing cycles in existing technologies, this application provides a solid-state drive (SSD) testing method, which can improve upon the problem of uncontrollable testing cycles in existing technologies. This application can be applied to, for example... Figure 1 The application scenarios shown. Specifically, such as... Figure 1 As shown, terminal device 102 and server 104 communicate via a network. The solid-state drive testing device provided in this application can be server 104. Terminal device 102 can send erase / write cycle test commands to server 104 to instruct server 104 to perform erase / write cycle tests, that is, to execute the solid-state drive testing method provided in this application. Terminal 102 can be, but is not limited to, various personal computers, laptops, smartphones, tablets, and portable wearable devices. Server 104 can be implemented using a standalone server or a server cluster consisting of multiple servers.

[0038] Next, this application will combine Figure 2The flowchart shown illustrates the solid-state drive (SSD) testing method provided in this application in detail. Taking the SSD testing device as the executing entity of the method as an example, the method includes the following steps:

[0039] 201: Determine the first host write volume within a unit of time according to the preset test cycle.

[0040] The preset test cycle refers to the time required to complete the erase cycle test. This preset test cycle can be obtained directly from local data or extracted from received erase cycle commands; this application does not impose any restrictions on this. After obtaining the preset test cycle, the solid-state drive testing device can divide the total host write volume by the preset test cycle to obtain the ideal host write volume per unit time, and use this ideal host write volume as the first host write volume. Alternatively, the solid-state drive testing device can also determine the first host write volume based on the actual total write volume and write amplification parameters. Here, the total host write volume and the actual total write volume represent a multiple of the target capacity.

[0041] It should be noted that the first host write volume is a parameterized unknown, and this parameter is the target capacity. For example, the mathematical expression for determining the first host write volume based on the actual total write volume and write amplification parameters can be: c, where , This represents the actual total amount written. This represents the total number of erase / write cycles. The target capacity is the test target capacity that needs to be solved. To write the amplification parameters, For the preset test cycle, This refers to the first host write volume within a unit of time. (Except for the target capacity.) outside, , , These are all known constants, which can be obtained through measurement or direct acquisition. Given the value, the amount written by the first host. It is an unknown with parameters, and the parameters included are the target capacity. .

[0042] 202: Determine the amount of the second host written per unit time based on the host's read and write speed.

[0043] Here, host read / write speed refers to the amount of data read and written by the testing device per unit time. This host read / write speed limits the upper speed limit of the solid-state drive (SSD) during testing. Multiplying the host read / write speed by the unit time yields the maximum amount of data the testing device can write to the SSD per unit time. Therefore, the value of host read / write speed multiplied by the unit time is the actual host write volume, and this actual host write volume is used as the second host write volume. Specifically, the mathematical expression for determining the second host write volume per unit time based on the host read / write speed can be as follows: ,in, For host read and write speed, For unit duration, This represents the amount of data written to the second host within a unit of time.

[0044] It should be noted that the amount of data written to the second host is a parameterless constant. For example, the mathematical expression above, which determines the amount of data written to the second host per unit time based on the host's read / write speed, is... , , It is a known constant, therefore the amount written by the second host is A constant without parameters.

[0045] 203: Set the write volume of the first host to equal the write volume of the second host to determine the target capacity.

[0046] Here, setting the write volume of the first host equal to the write volume of the second host means establishing an equation between the write volumes of the first host and the write volume of the second host. Specifically, the mathematical expression for setting the write volume of the first host equal to the write volume of the second host to determine the target capacity includes: ,in, , The number of erase / write cycles per unit of time. For the target capacity, To write the amplification parameters, This represents the write volume to the first host. This represents the amount written to the second host.

[0047] It should be noted that, due to the write volume of the first host... It is an unknown quantity containing parameters, namely the target capacity c and the amount of data written to the second host. It is a parameterless constant. Therefore, by setting the write volume of the first host to be equal to the write volume of the second host, the solid-state drive testing device can solve for the parameter in the write volume of the first host, which is the target capacity c.

[0048] 204: Perform an erase / write cycle test on the target solid-state drive based on the target capacity, so that the time to complete the erase / write cycle test is less than or equal to the preset test cycle.

[0049] Wherein, C_device can be equal to or less than the target capacity, or it can be greater than the target capacity; this application does not impose any restrictions on this. Performing an erase / write cycle test on the target solid-state drive based on the target capacity refers to performing an erase / write cycle test on a region of the target solid-state drive with a capacity equal to the target capacity. By controlling C_device to be at or less than the target capacity, the time required to complete the erase / write cycle test can be less than or equal to the preset test cycle. This is because the first host write volume is the ideal host write volume determined according to the preset test cycle, and the second host write volume is the actual host write volume determined according to the host read / write speed. By equalizing the first host write volume with the second host write volume, the actual test speed can be matched with the ideal test speed, that is, the completion time of the erase / write cycle test is controlled within the range not exceeding the preset test cycle.

[0050] It should be noted that, depending on the size of C_device, the actual process of performing erase-write cycle tests on the target solid-state drive based on the target capacity can be divided into two types. The following will describe these two methods in detail:

[0051] The first method involves the solid-state drive testing device performing a cycle of erasing and writing on the entire area of ​​the target solid-state drive when C_device is equal to or less than the target capacity.

[0052] The second method involves testing a portion of the target SSD by an erase / write cycle test on a section of the target SSD, where the capacity of that section is less than or equal to the target capacity, provided that C_device is greater than the target capacity.

[0053] In one feasible approach, when determining the first host write volume within a unit time period based on a preset test cycle in step 201 above, the solid-state drive testing device can determine the ideal host write volume based on the actual total write volume and write amplification parameters, which means: determining the actual write volume within a unit time period based on the preset test cycle and the actual total write volume; and determining the first host write volume within a unit time period based on the actual write volume within a unit time period and write amplification parameters.

[0054] The mathematical expression for determining the actual write volume per unit time period based on the preset test cycle and the actual total write volume is as follows: . , This represents the actual total amount written. This represents the total number of erase / write cycles. For the target capacity, This represents the actual amount of data written within a unit of time. This is the testing cycle.

[0055] The mathematical expression for determining the first host write volume per unit time based on the actual write volume and write amplification parameters per unit time is as follows: ;in, , This represents the actual amount written. The number of erase / write cycles per unit of time. For the target capacity, To write the amplification parameters, This represents the first host write volume within a unit of time.

[0056] In summary, this application, by performing erase / write cycle tests on the target solid-state drive based on the target capacity, ensures that the completion time of the erase / write cycle test is equal to or less than the preset test cycle. Therefore, the solid-state drive testing method provided by this application can improve upon the problem of uncontrollable test cycles in existing technologies.

[0057] In addition, this application also provides another possible implementation method, which can further improve the problem of uncontrollable testing cycle in the prior art, such as... Figure 3 As shown, taking a solid-state drive testing device as the execution subject of this method as an example, the method includes the following steps:

[0058] 301: Receive the erase / write cycle test command and extract the cycle parameter from the erase / write cycle test command as the preset test cycle.

[0059] The erase / write cycle test command is used to instruct the solid-state drive device to perform an erase / write cycle test. The erase / write cycle test command records the cycle parameter. The erase / write cycle test command can be triggered by the tester, and the cycle parameter can be input by the tester. Therefore, when the solid-state drive device receives the erase / write cycle test command, it can extract the cycle parameter in the erase / write cycle test command as the preset test cycle, which can further control the test cycle.

[0060] 302: Determine the first host write volume within a unit of time according to the preset test cycle.

[0061] Upon receiving the erase / write cycle test command, the solid-state drive device responds to the command by performing a step of determining the first host write volume within a unit of time according to a preset test cycle.

[0062] 303: Determine the amount of the second host written per unit time based on the host read / write speed.

[0063] 304: Set the write volume of the first host to equal the write volume of the second host to determine the target capacity.

[0064] 305: Perform an erase / write cycle test on the target solid-state drive based on the target capacity, so that the time to complete the erase / write cycle test is less than or equal to the preset test cycle.

[0065] It should be noted that the specific implementation process of steps 302 to 305 above can refer to steps 201 to 204 in the previous embodiment, and will not be repeated here.

[0066] In summary, this application, by receiving and responding to the erase / write cycle test command from the tester, allows the solid-state drive testing method to be triggered at any time. Furthermore, since the erase / write cycle test command includes a cycle parameter set by the tester, the preset test cycle can be set to any value by using this cycle parameter as the preset test cycle. Therefore, this application further improves upon the problem of uncontrollable test cycles in existing technologies.

[0067] See Figure 4 This invention also provides a solid-state drive testing device. Embodiments of this invention can divide the device into functional units according to the above method examples. For example, each function can be divided into separate functional units, or two or more functions can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. It should be noted that the unit division in this embodiment is illustrative and only represents one logical functional division; in actual implementation, other division methods may be used. Figure 4 As shown, the solid-state drive testing device includes a first determining unit 410, a second determining unit 420, a third determining unit 430, and a testing unit 440, specifically:

[0068] The first determining unit 410 is used to determine the first host write volume within a unit time period according to a preset test cycle; the second determining unit 420 is used to determine the second host write volume within a unit time period according to the host read and write speed; the third determining unit 430 is used to set the first host write volume equal to the second host write volume to determine the target capacity; the testing unit 440 is used to perform an erase and write cycle test on the target solid-state drive based on the target capacity, such that the time to complete the erase and write cycle test is less than or equal to the preset test cycle period.

[0069] Optionally, the first determining unit 410 is specifically used to: determine the actual write volume within a unit time period based on the preset test cycle and the actual total write volume; and determine the first host write volume within a unit time period based on the actual write volume within a unit time period and the write amplification parameter.

[0070] Optionally, the mathematical expression for determining the actual write volume per unit time based on the test period and the actual total write volume includes: ;in, , This represents the actual total amount written. This represents the total number of erase / write cycles. For the target capacity, This represents the actual amount of data written within a unit of time. This is the preset test cycle.

[0071] Optionally, the mathematical expression for determining the first host write volume within a unit time period based on the actual write volume and write amplification parameters within a unit time period includes: ;in, , This represents the actual amount written. The number of erase / write cycles per unit of time. For the target capacity, To write the amplification parameters, This represents the first host write volume within a unit of time.

[0072] Optionally, the mathematical expression for determining the second host write volume per unit time based on the host read / write speed includes: ;in, For host read and write speed, For unit duration, This represents the amount of data written to the second host within a unit of time.

[0073] Optionally, the mathematical expression for determining the target capacity by setting the write volume of the first host equal to the write volume of the second host includes: ,in, , The number of erase / write cycles per unit of time. For the target capacity, To write the amplification parameters, This represents the write volume to the first host. This represents the amount written to the second host.

[0074] Optionally, the above-mentioned solid-state drive testing device further includes a receiving unit 450, which is also used to receive an erase / write cycle test command and extract the cycle parameter in the erase / write cycle test command as a preset test cycle; the above-mentioned first determining unit is also used to respond to the erase / write cycle test command to perform the step of determining the first host write volume within a unit time according to the preset test cycle.

[0075] See Figure 5This is a structural block diagram of a solid-state drive (SSD) testing device according to another embodiment of this application. As shown in the figure, the SSD testing device in this embodiment may include: a processor 510, a transceiver 530, and a memory 520. The processor 510, transceiver 530, and memory 520 are connected via a bus 540. The processor 510 is used to execute multiple instructions; the transceiver 530 is used to exchange data with other modules; and the memory 520 is used to store multiple instructions adapted to be loaded by the processor 510 and executed as in the SSD testing method described in the above embodiment.

[0076] The processor 510 can be an Electronic Control Unit (ECU), a Central Processing Unit (CPU), a general-purpose processor, a coprocessor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. The processor 510 can also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc. In this embodiment, the processor 510 can be a microcontroller. By programming the microcontroller, various control functions can be implemented. For example, in this embodiment, the processor can acquire, process, and demodulate the battery cell capacity and total accumulated charge. The processor has the advantages of powerful computing capabilities and fast processing speed. Specifically:

[0077] The processor 510 is used to execute the function of the first determining unit 410, which is used to determine the first host write volume within a unit time according to a preset test cycle; it is also used to execute the function of the second determining unit 420, which is used to determine the second host write volume within a unit time according to the host read and write speed; it is also used to execute the function of the third determining unit 430, which is used to set the first host write volume equal to the second host write volume to determine the target capacity; and it is also used to execute the function of the test unit 440, which is used to perform an erase and write cycle test on the target solid-state drive based on the target capacity, such that the time to complete the erase and write cycle test is less than or equal to the preset test cycle.

[0078] Optionally, the processor 510 is specifically used to: determine the actual write volume within a unit of time based on the preset test cycle and the actual total write volume; and determine the first host write volume within a unit of time based on the actual write volume within a unit of time and the write amplification parameter.

[0079] Optionally, the mathematical expression for determining the actual write volume per unit time based on the test period and the actual total write volume includes: ;in, , This represents the actual total amount written. This represents the total number of erase / write cycles. For the target capacity, This represents the actual amount of data written within a unit of time. This is the preset test cycle.

[0080] Optionally, the mathematical expression for determining the first host write volume within a unit time period based on the actual write volume and write amplification parameters within a unit time period includes: ;in, , This represents the actual amount written. The number of erase / write cycles per unit of time. For the target capacity, To write the amplification parameters, This represents the first host write volume within a unit of time.

[0081] Optionally, the mathematical expression for determining the second host write volume per unit time based on the host read / write speed includes: ;in, For host read and write speed, For unit duration, This represents the amount of data written to the second host within a unit of time.

[0082] Optionally, the mathematical expression for determining the target capacity by setting the write volume of the first host equal to the write volume of the second host includes: ,in, , The number of erase / write cycles per unit of time. For the target capacity, To write the amplification parameters, This represents the write volume to the first host. This represents the amount written to the second host.

[0083] Optionally, the transceiver 530 is used to perform the function of the receiving unit 450, to receive the erase / write cycle test command, and to extract the cycle parameter in the erase / write cycle test command as a preset test cycle; the processor 510 is also used to respond to the erase / write cycle test command to perform the step of determining the first host write amount within a unit time according to the preset test cycle.

[0084] This application also provides a computer-readable storage medium storing a plurality of instructions adapted for loading by a processor and executing the methods in any of the foregoing embodiments. A processor 510 is configured to execute the plurality of instructions; a memory 520 is configured to store the plurality of instructions adapted for loading by the processor 510 and executing the solid-state drive testing method as described in the foregoing embodiments.

[0085] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0086] The above embodiments merely illustrate several implementation methods of this application, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this patent application should be determined by the appended claims.

Claims

1. A solid-state drive testing method, characterized in that, include: The first host write volume within a unit of time is determined according to a preset test period, which includes: The actual write volume within a unit of time is determined based on the preset test cycle and the actual total write volume; the first host write volume within a unit of time is determined based on the actual write volume within the unit of time and the write amplification parameter. The mathematical expression for determining the amount of data written by the second host per unit time based on the host's read and write speed includes: ;in, For host read and write speed, For unit duration, The amount of data written to the second host within a unit of time; Set the write volume of the first host to be equal to the write volume of the second host to determine the target capacity; Based on the target capacity, perform an erase / write cycle test on the target solid-state drive, such that the time to complete the erase / write cycle test is less than or equal to the preset test period.

2. The method according to claim 1, characterized in that, The mathematical expression for determining the actual write volume per unit time based on the preset test period and the actual total write volume includes: ； in, , This represents the actual total amount written. This represents the total number of erase / write cycles. For the target capacity, This represents the actual amount of data written within a unit of time. The preset test cycle is defined as follows.

3. The method according to claim 1, characterized in that, The mathematical expression for determining the first host write volume within a unit time period based on the actual write volume and write amplification parameters within the unit time period includes: ； in, , This represents the actual amount written. The number of erase / write cycles per unit of time. For the target capacity, To write the amplification parameters, This represents the first host write volume within a unit of time.

4. The method according to claim 1, characterized in that, The mathematical expression for determining the target capacity by setting the write volume of the first host equal to the write volume of the second host includes: ； in, , The number of erase / write cycles per unit of time. For the target capacity, To write the amplification parameters, This represents the write volume to the first host. This represents the amount written to the second host.

5. The method according to claim 1, characterized in that, Before determining the first host write volume within a unit time period according to a preset test cycle, the method further includes: Receive the erase / write cycle test command and extract the cycle parameter in the erase / write cycle test command as the preset test cycle; In response to the erase / write cycle test command, the step of determining the first host write volume within a unit time period according to the preset test cycle is executed.

6. A solid-state drive testing device, characterized in that, include: The first determining unit is used to determine the first host write volume within a unit time period according to a preset test cycle, and includes: The actual write volume within a unit of time is determined based on the preset test cycle and the actual total write volume; the first host write volume within a unit of time is determined based on the actual write volume within the unit of time and the write amplification parameter. The second determining unit is used to determine the amount of second host writes per unit time based on the host read / write speed, and its mathematical expression includes: ;in, For host read and write speed, For unit duration, The amount of data written to the second host within a unit of time; The third determining unit is used to set the write amount of the first host to be equal to the write amount of the second host in order to determine the target capacity; The test unit is used to perform an erase / write cycle test on the target solid-state drive based on the target capacity, such that the time to complete the erase / write cycle test is less than or equal to the preset test cycle.

7. A solid-state drive testing device, characterized in that, The device includes a processor, a transceiver, and a memory, which are connected via a bus; the processor is used to execute multiple instructions; the transceiver is used to exchange data with other modules; and the memory is used to store the multiple instructions, which are adapted to be loaded by the processor and executed as described in any one of claims 1-5.

8. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a plurality of instructions adapted for loading by a processor and executing the solid-state drive testing method as described in any one of claims 1-5.

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