A floating gate field effect transistor device and a method of manufacturing the same

Abstract

The application relates to a molybdenum ditelluride flake / copper indium thiophosphate flake / dual-gold gate electrode laminated structure floating gate field effect transistor device and a preparation method thereof, in particular to a vertical laminated structure formed by sequentially contacting an n-type molybdenum ditelluride (MoTe2) flake, an insulating copper indium thiophosphate (CuInP2S6) flake and a dual-gold (Au) gate electrode. The MoTe2 flake is a transistor channel layer, the CuInP2S6 flake is a transistor dielectric layer, and the dual-Au gate electrode is a transistor floating gate layer. By utilizing the relatively close electron affinity of the MoTe2 flake and the CuInP2S6 flake, photo-generated electrons of the light-excited MoTe2 flake can be effectively injected into the Au gate electrode through the CuInP2S6 flake, a local negative gate voltage is formed to modulate the conductance of the MoTe2 flake, and a light-excited floating gate field effect transistor device is realized.

Description

Technical Field

[0001] This application relates to the technical field of nanomaterial phototransistors, and in particular to a floating gate field-effect transistor device and its fabrication method. Background Technology

[0002] Optoelectronic logic devices have important applications in computing and are key to future on-chip optical interconnects. Traditional silicon-based devices require complex electronic circuits to implement logic functions, hindering further miniaturization and integration. Recent research has shown that semiconductor homojunctions based on two-dimensional materials possess excellent optoelectronic properties and electrostatic tunability, making them promising candidate materials for optoelectronic logic devices. Currently, methods such as using semi-floating gates, ferroelectric polarization, and localized electrostatic doping of bimetallic gates are used to obtain homojunctions with switchable built-in electric field polarities, but their operation requires coordinated control between multiple voltage and optical inputs. This functional diversity comes at the cost of operational complexity. Summary of the Invention

[0003] This application provides a floating-gate field-effect transistor device and its fabrication method. This transistor device is a photoexcited field-effect transistor, a novel optoelectronic logic device with all-optical-driven sensing capability. This solves the complex problem of coordinating voltage and optical input control during the operation of optoelectronic logic devices.

[0004] In a first aspect, a floating gate field-effect transistor device is provided, comprising a MoTe2 thin film, a CuInP2S6 thin film, a dual Au gate electrode, a Si substrate, a source electrode, and a drain electrode;

[0005] The Si substrate has a SiO2 layer, the dual Au gate electrodes are spaced apart on the SiO2 layer, the Au gate electrodes are sandwiched between the SiO2 layer and the CuInP2S6 thin film, the MoTe2 thin film is disposed above the CuInP2S6 thin film, one end of the MoTe2 thin film is connected to the source electrode, and the other end of the MoTe2 thin film is connected to the drain electrode.

[0006] Compared with the prior art, the solution provided in this application has at least the following beneficial technical effects:

[0007] This invention utilizes the similar electron affinity between MoTe2 and CuInP2S6 thin films. Illumination allows photogenerated electrons from the MoTe2 film to pass through the CuInP2S6 film and be excited into the dual Au gate electrodes, forming a localized negative gate voltage, thereby modulating the channel conductance of the MoTe2 film. By changing the state of the photogenerated electrons stored in the dual Au gate electrodes—one Au gate electrode is grounded, causing the stored photogenerated electrons to disappear, while the other Au gate electrode is not subjected to any bias voltage—the negative gate voltage formed by the stored photogenerated electrons induces a planar homojunction in the MoTe2 film. Illumination causes this homojunction to output photovoltaic current at its source and drain terminals. Therefore, the device simultaneously achieves homojunction construction and signal output under photoexcitation without applying any bias voltage. This transistor device is a photoexcited field-effect transistor (FET), a novel optoelectronic logic device with all-optical-driven sensing capabilities. This solves the complex problem of voltage and optical input coordination control during the operation of optoelectronic logic devices.

[0008] In conjunction with the first aspect, in some implementations of the first aspect, the MoTe2 sheet is a photosensitive material and a conductive channel material, the CuInP2S6 sheet is a dielectric material, the dual Au gate electrode is a floating gate layer, and the source electrode and drain electrode are used to collect electrical signals from the MoTe2 sheet.

[0009] In conjunction with the first aspect, in some implementations of the first aspect, the thickness of the SiO2 layer is 285 nm.

[0010] The SiO2 layer is relatively suitable, which helps to reduce the space occupied by the floating gate field effect transistor device and helps to stably disconnect the conductive part of the double Au gate electrode and the Si substrate.

[0011] In conjunction with the first aspect, in some implementations of the first aspect, the Au gate electrode includes a titanium layer and a gold layer, wherein the titanium layer is sandwiched between the gold layer and the SiO2 layer.

[0012] This is beneficial for improving the performance of the Au gate electrode.

[0013] In conjunction with the first aspect, in some implementations of the first aspect, the lead of the Au gate electrode extends from between the SiO2 layer and the CuInP2S6 sheet.

[0014] The Au gate electrode leads extend outside the floating gate field-effect transistor device, which facilitates flexible wiring of the Au gate electrode.

[0015] In conjunction with the first aspect, in some implementations of the first aspect, the source electrode is grounded, and the bias voltage between the source electrode and the drain electrode is 0V.

[0016] The floating gate field-effect transistor device can be made to function properly by controlling the bias voltage of the source and drain electrodes.

[0017] In conjunction with the first aspect, in some implementations of the first aspect, a current detection unit is connected in series between the source electrode and the drain electrode.

[0018] In conjunction with the first aspect, in some implementations of the first aspect, the first Au gate electrode of the dual Au gate electrode is grounded through a first switch, the first switch being used to change the grounding state of the first Au gate electrode; the second Au gate electrode of the dual Au gate electrode is grounded through a second switch, the second switch being used to change the grounding state of the second Au gate electrode.

[0019] In conjunction with the first aspect, in certain implementations of the first aspect, the operating mode of the device includes at least one of the following:

[0020] The first Au gate electrode is grounded, and the second Au gate electrode is not grounded; the device is used to indicate -1.

[0021] The first Au gate electrode is not grounded, and the second Au gate electrode is grounded. The device is used to indicate 1.

[0022] The first Au gate electrode is not grounded, the second Au gate electrode is not grounded, and the device is used to indicate 0;

[0023] The first Au gate electrode is grounded, the second Au gate electrode is grounded, and the device is used to indicate 0.

[0024] By changing the grounding mode of the dual Au gate electrodes, the charge storage state of the dual Au gate electrodes can be changed, thereby obtaining different current signal outputs and realizing the logic gate function.

[0025] Secondly, a method for fabricating a floating-gate field-effect transistor device is provided, comprising:

[0026] (1) A double Au gate electrode was fabricated on the SiO2 layer of a Si substrate using electron beam lithography and thermal evaporation of metal electrodes;

[0027] (2) CuInP2S6 sheets were prepared on PDMS film by mechanical exfoliation and then physically transferred to dual Au gate electrodes;

[0028] (3) MoTe2 sheets were prepared on PDMS film by mechanical exfoliation and then physically transferred to CuInP2S6 sheets;

[0029] (4) Source and drain electrodes were fabricated on MoTe2 thin films using electron beam lithography and thermal evaporation of metal electrodes to obtain a floating gate field-effect transistor device with a MoTe2 thin film-CuInP2S6 thin film-double Au gate electrode stack structure. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of the device structure of the present invention.

[0031] Figure 2 This is a schematic diagram illustrating the application scenario of the device of the present invention.

[0032] Figure 3 This is a schematic diagram of the working process of the device under illumination conditions according to the present invention.

[0033] Figure 4 This is a schematic diagram of the material band structure and working principle of the present invention.

[0034] Figure 5 This is a schematic diagram of four working processes of the device under illumination conditions according to the present invention.

[0035] Figure 6 This is a schematic diagram showing the test results of the current signal of the device under illumination according to the present invention. Detailed Implementation

[0036] The present application will now be described in further detail with reference to the accompanying drawings and specific embodiments.

[0037] Figure 1 This application provides a floating-gate field-effect transistor device. The device can be a stacked structure. The device may include a molybdenum ditelluride (MoTe2) sheet, a copper indium thiophosphate (CuInP2S6) sheet, a double gold (Au) gate electrode, a Si substrate, a source electrode, and a drain electrode.

[0038] A SiO2 layer may be present on the Si substrate. Dual Au gate electrodes are spaced apart on the SiO2 layer. The Au gate electrodes may be sandwiched between the SiO2 layer and the CuInP2S6 wafer. The SiO2 layer can be used to disconnect the electrical connection between the Au gate electrodes and the Si substrate. Specifically, the Au gate electrodes may include a titanium layer and a gold layer, with the titanium layer located between the gold layer and the SiO2 layer. Leads of the Au gate electrodes may extend from between the SiO2 layer and the CuInP2S6 wafer. A MoTe2 wafer is disposed above the CuInP2S6 wafer, and the MoTe2 wafer is not in contact with the dual Au gate electrodes. Source and drain electrodes are respectively disposed at both ends of the MoTe2 wafer. Both the source and drain electrodes may be located on the CuInP2S6 wafer. One end of the MoTe2 wafer is connected to the source electrode, and the other end is connected to the drain electrode.

[0039] The MoTe2 thin film serves as both the photosensitive material and the conductive channel for the field-effect transistor (FET). The source and drain electrodes are used to collect electrical signals from the MoTe2 thin film; the CuInP2S6 thin film is the dielectric layer of the FET; and the dual Au gate electrodes are the floating gate layer of the FET.

[0040] Figure 2 This illustrates a possible application scenario for a floating-gate field-effect transistor device. For example... Figure 2 As shown, the source electrode is grounded, and the bias voltage of both the drain and source electrodes can be 0V. Au electrode 1 in the dual Au electrodes is electrically connected to one end of switch 1, and the other end of switch 1 is grounded. Au electrode 2 in the dual Au electrodes is electrically connected to one end of switch 2, and the other end of switch 2 is grounded. By controlling the on and off states of the switches, the grounding status of the dual Au electrodes can be controlled. The switches can also be replaced with photodiodes, etc. A current detection unit can be connected in series between the drain and source electrodes. This current detection unit can be used to detect the micro-current generated by the floating-gate field-effect transistor device under illumination.

[0041] The following is combined Figure 3 and Figure 4 This paper explains the principle by which floating-gate field-effect transistors generate microcurrents under illumination. For example... Figure 3 As shown, the left Au gate electrode is grounded, while the right Au gate electrode is not grounded.

[0042] Because the electron affinity of MoTe2 thin films and CuInP2S6 thin films is relatively close (e.g. Figure 4 As shown, under light irradiation, electrons in the MoTe2 thin film can be excited to the dual Au gate electrodes through the CuInP2S6 thin film. Since the left Au gate electrode is grounded, only the right Au gate electrode can store the excited photoelectrons, forming a localized negative gate voltage that modulates the channel conductance of the MoTe2 thin film directly above it, lowering its Fermi level. The MoTe2 thin film directly above the left Au gate electrode is not modulated, thus forming an in-plane homojunction within the MoTe2 channel. The device connection and the MoTe2 channel band structure are as follows: Figure 3 As shown, the built-in electric field of the homojunction separates the electron-hole pairs generated by photoexcitation, outputting a short-circuit photocurrent at the source and drain electrodes. Figure 6 The figure shows the current signal test curve of the device under periodic illumination.

[0043] Figure 5 The diagram illustrates four operating modes of a floating-gate field-effect transistor (FET). When the left Au gate electrode is grounded and the right Au gate electrode is not grounded, the current I generated by the floating-gate FET is... sd <0. When the left Au gate electrode is not grounded and the right Au gate electrode is grounded, the current I generated by the floating gate field-effect transistor device is 0. sd>0. When both the left and right Au gate electrodes are grounded, the floating gate field-effect transistor generates a current I0. sd =0. When neither the left nor the right Au gate electrode is grounded, the current I generated by the floating gate field-effect transistor device is 0. sd =0. Therefore, a floating-gate field-effect transistor device can be a logic device that implements an XOR gate.

[0044] This application also provides a floating gate field-effect transistor device with a molybdenum ditelluride thin film / copper indium thiophosphate thin film / double gold gate electrode stack structure and a method for fabricating the same, the method comprising the following steps:

[0045] (1) A double Au gate electrode pattern was prepared on the SiO2 (285nm) layer of a Si substrate using electron beam lithography, and the gate electrode pattern was thermally vaporized to obtain a double Au gate electrode.

[0046] (2) CuInP2S6 sheets were prepared on PDMS (Polydimethylsiloxane) film by mechanical peeling.

[0047] (3) Transfer the CuInP2S6 sheet prepared in step (2) onto the double Au gate electrode prepared in step (1);

[0048] (4) MoTe2 sheets were prepared on PDMS (Polydimethylsiloxane) film by mechanical peeling method;

[0049] (5) Transfer the MoTe2 sheet prepared in step (4) onto the CuInP2S6 sheet prepared in step (3) to form a vertical stacked structure of MoTe2 sheet-CuInP2S6 sheet-double Au gate electrode from top to bottom, wherein the CuInP2S6 sheet completely separates the MoTe2 sheet from the double Au gate electrode.

[0050] (6) Using electron beam lithography, source electrode patterns and drain electrode patterns are prepared on both ends of a MoTe2 thin film, and the source electrode and drain electrode are obtained by thermal evaporation of the electrode patterns.

[0051] Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make possible changes and modifications without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope defined in the claims of the present invention.

Claims

1. A floating-gate field-effect transistor device, characterized in that, Includes MoTe2 thin film, CuInP2S6 thin film, dual Au gate electrode, Si substrate, source electrode and drain electrode; The Si substrate has a SiO2 layer, the dual Au gate electrodes are spaced apart on the SiO2 layer, the Au gate electrodes are sandwiched between the SiO2 layer and the CuInP2S6 thin film, the MoTe2 thin film is disposed above the CuInP2S6 thin film, one end of the MoTe2 thin film is connected to the source electrode, and the other end of the MoTe2 thin film is connected to the drain electrode. The first Au gate electrode of the dual Au gate electrode is grounded through a first switch, which is used to change the grounding state of the first Au gate electrode; the second Au gate electrode of the dual Au gate electrode is grounded through a second switch, which is used to change the grounding state of the second Au gate electrode.

2. The device according to claim 1, characterized in that, The MoTe2 sheet is a photosensitive material and a conductive channel material, the CuInP2S6 sheet is a dielectric material, the dual Au gate electrode is a floating gate layer, and the source electrode and drain electrode are used to collect electrical signals from the MoTe2 sheet.

3. The device according to claim 1, characterized in that, The thickness of the SiO2 layer is 285 nm.

4. The device according to claim 1, characterized in that, The Au gate electrode includes a titanium layer and a gold layer, with the titanium layer sandwiched between the gold layer and the SiO2 layer.

5. The device according to claim 1, characterized in that, The lead wire of the Au gate electrode extends from between the SiO2 layer and the CuInP2S6 sheet.

6. The device according to claim 1, characterized in that, The source electrode is grounded, and the bias voltage of the source electrode and the drain electrode is 0V.

7. The device according to claim 1, characterized in that, A current detection unit is connected in series between the source electrode and the drain electrode.

8. The device according to claim 1, characterized in that, The operating mode of the device includes at least one of the following: The first Au gate electrode is grounded, and the second Au gate electrode is not grounded; the device is used to indicate -1. The first Au gate electrode is not grounded, and the second Au gate electrode is grounded. The device is used to indicate 1. The first Au gate electrode is not grounded, the second Au gate electrode is not grounded, and the device is used to indicate 0; The first Au gate electrode is grounded, the second Au gate electrode is grounded, and the device is used to indicate 0.

9. A method for fabricating a floating-gate field-effect transistor device as described in any one of claims 1 to 8, characterized in that, include: (1) A double Au gate electrode was fabricated on the SiO2 layer of a Si substrate using electron beam lithography and thermal evaporation of metal electrodes; (2) CuInP2S6 sheets were prepared on PDMS film by mechanical exfoliation and then physically transferred to dual Au gate electrodes; (3) MoTe2 sheets were prepared on PDMS film by mechanical exfoliation and then physically transferred to CuInP2S6 sheets; (4) Source and drain electrodes are prepared on MoTe2 thin film using electron beam lithography and thermal evaporation of metal electrodes to obtain a floating gate field effect transistor device with MoTe2 thin film-CuInP2S6 thin film-double Au gate electrode stack structure.

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