Light emitting chip and method of manufacturing the same

Abstract

The present application relates to a kind of light emitting chip and its manufacturing method, the top surface of first semiconductor layer, first active layer, second semiconductor layer and substrate included in light emitting chip is located at first horizontal plane, bottom surface is located at second horizontal plane, and directly the top surface of first semiconductor layer, first active layer, second semiconductor layer and substrate is used as light exit surface, the light generated by it can be directly emitted via first semiconductor layer, first active layer, second semiconductor layer, both shorten the emission path of this part of light, and can maximize reduce that light energy is absorbed, to improve the light emitting efficiency of light emitting chip, especially suitable for the light emitting efficiency of light energy high and easily absorbed by semiconductor material and electrode etc., and then converted into heat energy.

Description

Technical Field

[0001] This invention relates to the field of light-emitting chips, and more particularly to a light-emitting chip and its manufacturing method. Background Technology

[0002] Current LED (Light-emitting diode) chips typically consist of an epitaxial layer structure consisting of a substrate, an N-type semiconductor layer, an active layer, and a P-type semiconductor layer stacked sequentially from bottom to top. The light generated needs to pass through the active layer, the N-type semiconductor layer, and the substrate in sequence before being emitted from the bottom surface of the substrate. The light transmission path is relatively long, and the energy attenuation is relatively large, which is not conducive to improving the light extraction efficiency. This is especially true for light with high energy that is easily absorbed by semiconductor materials and electrodes and then converted into heat energy, such as ultraviolet light.

[0003] Therefore, improving the light extraction efficiency of LED chips is an urgent problem to be solved. Summary of the Invention

[0004] In view of the shortcomings of the prior art, the purpose of this invention is to provide a light-emitting chip and a method for manufacturing the same, aiming to solve the problem of how to improve the light extraction efficiency of LED chips in related technologies.

[0005] This invention provides a light-emitting chip, comprising a first semiconductor layer, a first active layer, a second semiconductor layer, and a substrate, wherein:

[0006] The first semiconductor layer, the first active layer, and the second semiconductor layer are located on a first side of the substrate; the top surface of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate is located on a first horizontal plane and serves as a light-emitting surface; the bottom surface of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate is located on a second horizontal plane.

[0007] The light-emitting chip further includes a first electrode electrically connected to the first semiconductor layer and a second electrode electrically connected to the second semiconductor layer, wherein the first electrode and the second electrode are insulated from each other.

[0008] The aforementioned light-emitting chip includes a first semiconductor layer, a first active layer, a second semiconductor layer, and a substrate. The top surface of these components is located on a first horizontal plane, and the bottom surface is located on a second horizontal plane. That is, the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate are coplanar. The top surface of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate is directly used as the light-emitting surface. A portion of the light generated can be directly emitted through the first semiconductor layer, the first active layer, and the second semiconductor layer. This shortens the emission path of this portion of light and minimizes the absorption of light energy, thereby improving the light extraction efficiency of the light-emitting chip. It is particularly suitable for improving the light extraction efficiency of light with high energy that is easily absorbed by semiconductor materials and electrodes and then converted into heat energy, such as improving the light extraction efficiency of ultraviolet light-emitting chips.

[0009] Based on the same inventive concept, the present invention also provides a method for manufacturing a light-emitting chip, comprising:

[0010] Fabricating an epitaxial layer for a light-emitting chip includes: forming a first semiconductor layer, a first active layer, and a second semiconductor layer on a first side of a substrate; the top surface of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate is located on a first horizontal plane and serves as a light-emitting surface; the bottom surface of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate is located on a second horizontal plane.

[0011] A first electrode electrically connected to the first semiconductor layer and a second electrode electrically connected to the second semiconductor layer are fabricated on the epitaxial layer of the light-emitting chip, wherein the first electrode and the second electrode are insulated from each other.

[0012] The light-emitting chip produced by the above-mentioned method directly uses the top surface of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate as the light-emitting surface. A portion of the light generated can be emitted directly through the first semiconductor layer, the first active layer, and the second semiconductor layer, which shortens the emission path of this portion of light and minimizes the absorption of light energy, thereby improving the light emission efficiency of the light-emitting chip. It is especially suitable for improving the light emission efficiency of ultraviolet light-emitting chips. Attached Figure Description

[0013] Figure 1 This is a schematic diagram of the LED light-emitting chip structure in related technologies;

[0014] Figure 2 The three-dimensional epitaxial layer of the light-emitting chip provided in the embodiment of the present invention Figure 1 ;

[0015] Figure 3 for Figure 2 The diagram shows the light emission direction of the epitaxial layer of the light-emitting chip.

[0016] Figure 4 for Figure 2 The diagram shows a planar schematic of the epitaxial layer of the light-emitting chip.

[0017] Figure 5 This is a planar schematic diagram of another light-emitting chip epitaxial layer provided in an embodiment of the present invention;

[0018] Figure 6 The three-dimensional epitaxial layer of the light-emitting chip provided in the embodiment of the present invention Figure 2 ;

[0019] Figure 7 for Figure 6 The diagram shows a planar schematic of the epitaxial layer of the light-emitting chip.

[0020] Figure 8 The three-dimensional epitaxial layer of the light-emitting chip provided in the embodiment of the present invention Figure 3 ;

[0021] Figure 9 A schematic diagram of the fabrication process of a single light-emitting chip epitaxial layer provided in another optional embodiment of the present invention. Figure 1 ;

[0022] Figure 10 A schematic diagram of the fabrication process of a single light-emitting chip epitaxial layer provided in another optional embodiment of the present invention. Figure 2 ;

[0023] Figure 11 A schematic diagram of the fabrication process of a single light-emitting chip epitaxial layer provided in another optional embodiment of the present invention. Figure 3 ;

[0024] Figure 12 A schematic diagram of the batch fabrication process of the epitaxial layer of a light-emitting chip provided in another optional embodiment of the present invention. Figure 1 ;

[0025] Figure 13 A schematic diagram of the batch fabrication process of the epitaxial layer of a light-emitting chip provided in another optional embodiment of the present invention. Figure 2 ;

[0026] Figure 14 A three-dimensional light-emitting chip provided as another optional embodiment of the present invention Figure 1 ;

[0027] Figure 15 for Figure 14 A schematic diagram of the light-emitting chip shown;

[0028] Figure 16 A three-dimensional light-emitting chip provided as another optional embodiment of the present invention Figure 2 ;

[0029] Figure 17A three-dimensional light-emitting chip provided as another optional embodiment of the present invention Figure 3 ;

[0030] Figure 18 for Figure 17 A schematic diagram of the light-emitting chip shown;

[0031] Figure 19 This is a cross-sectional schematic diagram of the connecting layer provided in another optional embodiment of the present invention;

[0032] Figure 20 A three-dimensional light-emitting chip provided as another optional embodiment of the present invention Figure 4 ;

[0033] Figure 21 A three-dimensional light-emitting chip provided as another optional embodiment of the present invention Figure 5 ;

[0034] Figure 22 A three-dimensional light-emitting chip provided as another optional embodiment of the present invention Figure 6 ;

[0035] Figure 23 for Figure 22 A schematic diagram of the light-emitting chip shown;

[0036] Figure 24 This is a schematic diagram of a method for fabricating a light-emitting chip according to another optional embodiment of the present invention;

[0037] Figure 25 This is a schematic diagram of the light-emitting chip fabrication process provided in another optional embodiment of the present invention;

[0038] Explanation of reference numerals in the attached figures:

[0039] 11-First semiconductor layer, 12-First active layer, 13-Second semiconductor layer, 14-Substrate, 20-N-type semiconductor layer, 21-Second conductive layer, 22-First conductive layer, 231-First insulating reflective layer, 232-Second insulating reflective layer, 233-Third insulating reflective layer, 24-Connection layer, 241-Zigzag protrusion, 30-Active layer, 31-Second electrode, 32-First electrode, 33-Third electrode, 34-Fourth electrode, 40-P-type semiconductor layer, 41-Third semiconductor layer, 42-Second active layer, 43-Fourth semiconductor layer, 50-Electrode, 61-Temporary substrate, 62-Photoresist layer, 7-Emitting chip epitaxial layer. Detailed Implementation

[0040] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Preferred embodiments of the invention are shown in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to provide a thorough and complete understanding of the disclosure of the invention.

[0041] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.

[0042] In related technologies, a typical flip-chip LED structure can be found in [reference needed]. Figure 1 As shown, it includes, from bottom to top, a substrate 14, an N-type semiconductor layer 20, an active layer 30, and a P-type semiconductor layer 40, and two electrodes 50 respectively disposed on the N-type semiconductor layer 20 and the P-type semiconductor layer 40. Its light emission direction is shown in [reference needed]. Figure 1 As shown by the arrow, the light it generates must pass through at least the N-type semiconductor layer 20 and the substrate 14 before it can be emitted. The light transmission path is relatively long, and the energy attenuation is relatively large, which is not conducive to improving the light emission efficiency. In particular, for ultraviolet light-emitting chips, the high energy of ultraviolet light is easily absorbed by semiconductor materials and electrodes and converted into heat energy, resulting in low light emission efficiency. This is also the main reason for the low light emission efficiency of ultraviolet light-emitting chips.

[0043] Based on this, the present invention aims to provide a solution that can solve the above-mentioned technical problems, the details of which will be described in subsequent embodiments.

[0044] This embodiment provides an epitaxial layer for a light-emitting chip, which includes, but is not limited to, a first semiconductor layer, a first active layer, a second semiconductor layer, and a substrate, wherein:

[0045] The first semiconductor layer, the first active layer, and the second semiconductor layer are located on a first side of the substrate, meaning they are on the same side of the substrate. Furthermore, the top surface of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate is located on a first horizontal plane, and the bottom surface of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate is located on a second horizontal plane. In other words, in this embodiment, the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate are coplanar, rather than... Figure 1The layers are stacked sequentially from top to bottom as shown. In this embodiment, the top surface of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate is directly used as the light-emitting surface. This allows a portion of the generated light to be emitted directly through the first semiconductor layer, the first active layer, and the second semiconductor layer. This shortens the emission path of this portion of light and minimizes the absorption of light energy, thereby improving the light extraction efficiency of the light-emitting chip. This is especially suitable for improving the light extraction efficiency of light with high energy that is easily absorbed by semiconductor materials and electrodes and then converted into heat energy, such as improving the light extraction efficiency of ultraviolet light-emitting chips.

[0046] It should be understood that the materials of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate in this embodiment can be flexibly set according to requirements. For example, in one application example, when the epitaxial layer of the light-emitting chip is an ultraviolet light-emitting chip epitaxial layer, the first semiconductor layer can be, but is not limited to, Al. x Ga 1-x N layers, the first active layer can be, but is not limited to, Al. y Ga 1-y N / Al z Ga 1-z The N-layer, the second semiconductor layer can be, but is not limited to, Al. x Ga 1-x N layers.

[0047] In this embodiment, to further shorten the light emission path and minimize the absorption of light energy by semiconductor layers, the height L3 between the bottom and top surfaces of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate is set to be greater than or equal to 0.3 micrometers and less than or equal to 15 micrometers. For example, it can be specifically set to 0.3 micrometers, 0.5 micrometers, 1 micrometer, 3 micrometers, 5 micrometers, 7 micrometers, 9 micrometers, 10 micrometers, 13 micrometers, 15 micrometers, etc., depending on the requirements. Of course, L3 in this embodiment is not limited to the dimensions shown in the examples above and can be equivalently replaced with other dimensions according to application requirements. For ease of understanding, this embodiment is described below in conjunction with... Figures 2 to 4 The epitaxial layer of the light-emitting chip shown is used as an example for illustration.

[0048] See Figures 2 to 4 The illustrated light-emitting chip epitaxial layer includes a first semiconductor layer 11, a first active layer 12, a second semiconductor layer 13, and a substrate 14. The top surface S2 of the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13, and the substrate 14 is located on a first horizontal plane, and the bottom surface S1 of the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13, and the substrate 14 is located on a second horizontal plane. That is, the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13, and the substrate 14 are coplanar. See also... Figure 3As shown, the top surface S2 of the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13, and the substrate 14 serves as the light-emitting surface. A portion of the light can directly pass through the top surface S2 of the first semiconductor layer 11, the first active layer 12, and the second semiconductor layer 13 and be emitted directly. (See [reference]). Figure 3 As shown, its light output path is relatively Figure 1 The light path of the medium-sized light source is shorter, and less light energy is absorbed during transmission, resulting in higher light extraction efficiency.

[0049] See Figure 2 As shown, the height between the bottom surface S1 and the top surface S2 of the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13, and the substrate 14 is [missing information]. Figure 2 As shown in L3. The value of L3 can be set to greater than or equal to 0.3 micrometers and less than or equal to 15 micrometers as required, so as to further ensure that the light output path is short enough, thereby ensuring the light output efficiency.

[0050] In some examples within this document, to ensure the emitted light area, see [reference needed]. Figure 2 As shown, the lengths L2 of the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13, and the substrate 14 can be set to be the same, and L2 is greater than or equal to twice L3. For example, the value of L2 can be, but is not limited to, greater than or equal to 0.6 micrometers and less than or equal to 30 micrometers, and can be flexibly set according to requirements. Of course, in some examples, the lengths L2 of the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13, and the substrate 14 can also be set to be different or partially different according to requirements. For example, in some examples, the length L2 of the first semiconductor layer 11 can be set to be less than the length L2 of the second semiconductor layer 13. The lengths of other layer structures can also be flexibly varied according to requirements, and will not be elaborated here.

[0051] In other examples within this example, to ensure the emitted light area, see [link to relevant documentation]. Figure 2 As shown, the total width L1 of the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13, and the substrate 14 can be greater than or equal to L3. In this embodiment, the total width L1 of the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13, and the substrate 14 is the total width of the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13, and the substrate 14 after they are stacked, in the stacking direction. For example, see... Figure 4 As shown, in some examples of this embodiment, the first semiconductor layer 11 may be a P-type semiconductor layer, and the second semiconductor layer 13 may be an N-type semiconductor layer. Figure 4In this embodiment, the first semiconductor layer 11, the first active layer 12, and the second semiconductor layer 13 are disposed on the left side of the substrate 14, and the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13, and the substrate 14 are stacked sequentially from left to right. Of course, in this embodiment, the specific positions of the first semiconductor layer 11 and the second semiconductor layer 13 can be flexibly interchanged according to requirements, for example, see [reference needed]. Figure 5 As shown, relative to Figure 4 The positions of the first semiconductor layer 11 and the second semiconductor layer 13 have been swapped.

[0052] In another example of this embodiment, to increase the light output of the epitaxial layer of the light-emitting chip, see [reference needed]. Figures 6 to 7 As shown, the epitaxial layer of the light-emitting chip also includes, but is not limited to, a third semiconductor layer 41, a second active layer 42, and a fourth semiconductor layer 43 located on the second side of the substrate 14. The top surface S2 of the third semiconductor layer 41, the second active layer 42, and the fourth semiconductor layer 43 is located on a first horizontal plane, and the bottom surface S1 of the third semiconductor layer 41, the second active layer 42, and the fourth semiconductor layer 43 is located on a second horizontal plane. The first side and the second side of the substrate 14 are opposite sides of the substrate, for example... Figure 6 The first side of the middle substrate 14 is the left side of the substrate 14, and the second side of the substrate 14 is the right side of the substrate 14. Figures 6 to 7 The light output of the epitaxial layer of the optical chip shown is relative to Figures 2-5 The light output of the epitaxial layer of the light-emitting chip shown can be significantly improved, thereby increasing the brightness of the epitaxial layer of the light-emitting chip and better meeting the needs of high-brightness applications.

[0053] It should be understood that in this embodiment, the type of the third semiconductor layer 41 can be the same as the first semiconductor layer 11, the type of the fourth semiconductor layer 43 can be the same as the second semiconductor layer 13, and the type of the second active layer 42 can be the same as the first active layer 12. In this case, the semiconductor layers and active layers disposed on the left and right sides of the substrate 14 are symmetrically arranged. Of course, adjustments can be made flexibly according to requirements. For example, the type of the third semiconductor layer 41 can be the same as the second semiconductor layer 13, the type of the fourth semiconductor layer 43 can be the same as the first semiconductor layer 11, and the type of the second active layer 42 can be the same as or different from the type of the first active layer 12. Furthermore, in this example, the length L4 of the substrate 14 can be appropriately set according to requirements to increase the light-emitting area while ensuring the light output. For example, L4 can be set to be greater than or equal to twice L3.

[0054] Of course, depending on the requirements, corresponding semiconductor layers and active layers can also be formed on other sides of the substrate 14 in this embodiment. For example, on at least one of the third and fourth sides between the first and second sides of the substrate 14, a similar semiconductor layer and active layer can be formed. Figure 7 The settings shown correspond to the semiconductor layer and the active layer, and will not be described in detail here.

[0055] In another example of this embodiment, in order to increase the light output of the epitaxial layer of the light-emitting chip, at least two Figure 2 The epitaxial layers of the light-emitting chips shown are spliced ​​together to form a similar structure. Figure 7 The image shows a spliced ​​light-emitting chip epitaxial layer with a higher light output. For example, see an example of a spliced ​​light-emitting chip epitaxial layer. Figure 8 As shown, the second sides of the substrates 14 of the two light-emitting chip epitaxial layers are symmetrically joined together by a connecting layer 24, thereby forming a light-emitting surface and a spliced ​​light-emitting chip epitaxial layer with a larger light emission amount. In this embodiment, the connecting layer 24 can be transparent or, depending on the requirements, non-transparent; the specific configuration can be flexibly set according to application needs. In this example, the semiconductor layers and active layers on both sides of the two substrates 14 correspond one-to-one. Of course, refer to the above... Figure 7 As shown in the example, it can also be set to a non-one-to-one correspondence as needed.

[0056] Furthermore, in this embodiment, the number of epitaxial layers of the symmetrically spliced ​​light-emitting chips can be flexibly set according to requirements, and is not limited to... Figure 7 The two shown can be combined to form a spliced ​​epitaxial layer, for example, by selecting 4, 6, or 8 epitaxial layers of light-emitting chips as needed.

[0057] As can be seen, in the epitaxial layer of the light-emitting chip provided in this embodiment, the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate are arranged coplanarly, rather than stacked vertically. The top surface of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate is used as the light-emitting surface. A portion of the generated light can be directly emitted through the first semiconductor layer, the first active layer, and the second semiconductor layer, which shortens the emission path of this portion of light and minimizes light energy absorption, thereby improving the light extraction efficiency of the light-emitting chip. This is particularly suitable for improving the light extraction efficiency of light with high energy that is easily absorbed by semiconductor materials and electrodes, and then converted into heat energy, such as improving the light extraction efficiency of ultraviolet light-emitting chips. Furthermore, for applications requiring high light extraction, corresponding semiconductor layers can be arranged on both the first and second sides of the substrate, or at least two epitaxial layers can be spliced ​​together to obtain an epitaxial layer with even greater light extraction, thus broadening the application scenarios of the epitaxial layer.

[0058] Another alternative embodiment:

[0059] For ease of understanding, this embodiment will be described below using an example of a method for fabricating an epitaxial layer of a light-emitting chip. In this embodiment, fabricating an epitaxial layer of a light-emitting chip includes: forming a first semiconductor layer, a first active layer, and a second semiconductor layer on a first side of a substrate; the top surface of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate is located on a first horizontal plane and serves as a light-emitting surface; the bottom surface of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate is located on a second horizontal plane. For example, in fabricating... Figure 2 For the fabrication process of the epitaxial layer of the light-emitting chip shown, please refer to [link / reference]. Figure 9 As shown, it includes, but is not limited to:

[0060] S901: A second semiconductor layer 13, a first active layer 12 and a first semiconductor layer 11 are sequentially formed on the first side of the substrate 14.

[0061] In this embodiment, a second semiconductor layer 13, an active layer 12, and a first semiconductor layer 11 can be sequentially formed on the first side of the substrate 14 by means of deposition, but not limited to deposition.

[0062] S902: The substrate 14 is ground and polished to reduce its thickness. The degree of grinding and polishing can be adjusted according to application requirements to change the total width L1 of the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13, and the substrate 14, thereby flexibly adjusting the light-emitting area as needed. It should be understood that this step is optional.

[0063] For example, in the production Figures 6 to 7 For the fabrication process of the epitaxial layer of the light-emitting chip shown, please refer to [link / reference]. Figure 10 As shown, it includes, but is not limited to:

[0064] S1001: A second semiconductor layer 13, a first active layer 12 and a first semiconductor layer 11 are sequentially formed on the first side of the substrate 14.

[0065] S1002: A fourth semiconductor layer 43, a second active layer 42 and a third semiconductor layer 41 are sequentially formed on the second side of the substrate 14.

[0066] In this example, before executing S1002, the substrate 14 can be ground and polished according to application requirements to adjust the thickness of the substrate 14. In some examples, S1002 can be executed first, followed by S1001, or S1001 and S1002 can be executed in parallel.

[0067] For example, in the production Figure 8 For the fabrication process of the epitaxial layer of the light-emitting chip shown, please refer to [link / reference]. Figure 11 As shown, it includes, but is not limited to:

[0068] S1101: A second semiconductor layer 13, a first active layer 12 and a first semiconductor layer 11 are sequentially formed on the first side of the substrate 14.

[0069] S1102: The substrate 14 is ground and polished to reduce its thickness. The degree of grinding and polishing can be adjusted according to the application requirements to determine the total width L1 of the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13 and the substrate 14.

[0070] S1103: The two fabricated light-emitting chip epitaxial layers are symmetrically spliced ​​together through the connecting layer 24.

[0071] The examples above illustrate the fabrication process of a single LED epitaxial layer. It should be understood that LED epitaxial layers can also be fabricated in batches.

[0072] For example, a mass production Figure 2 The process of the epitaxial layer of the light-emitting chip shown is described in [reference]. Figure 12 As shown, it includes, but is not limited to:

[0073] S1201: A second semiconductor layer 13, a first active layer 12 and a first semiconductor layer 11 are sequentially formed on the first side of the substrate 14.

[0074] S1202: The substrate 14 is ground and polished to reduce its thickness. The degree of grinding and polishing can be adjusted according to the application requirements to determine the total width L1 of the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13 and the substrate 14.

[0075] S1203: Photolithography and etching processes are performed on the first semiconductor layer 11, the first active layer 12, and the second semiconductor layer 13 on the substrate 14, thereby forming an epitaxial layer array on the first side of the substrate 14.

[0076] S1204: The epitaxial array is diced along the channel of the epitaxial array to obtain a single light-emitting chip epitaxial layer.

[0077] For mass production Figures 6 to 7 When forming the epitaxial layer of the light-emitting chip shown, before step S1203, the corresponding fourth semiconductor layer 43, second active layer 42 and third semiconductor layer 41 can be formed on the second side of the substrate 14, which will not be described in detail here.

[0078] For example, a mass production Figure 8 The process of the epitaxial layer of the light-emitting chip shown is described in [reference]. Figure 13 As shown, it includes, but is not limited to:

[0079] S1301: A second semiconductor layer 13, a first active layer 12 and a first semiconductor layer 11 are sequentially formed on the first side of the substrate 14.

[0080] S1302: The substrate 14 is ground and polished to reduce its thickness. The degree of grinding and polishing can be adjusted according to the application requirements to determine the total width L1 of the first semiconductor layer 11, the first active layer 12, the second semiconductor layer 13 and the substrate 14.

[0081] S1303: Two substrates 14 are symmetrically spliced ​​together by the connecting layer 24.

[0082] S1304: Photolithography and etching processes are performed on the first semiconductor layer 11, the first active layer 12, and the second semiconductor layer 13 on both sides of the two substrates 14, so that an epitaxial layer array is formed on the first side of the substrates 14.

[0083] S1305: The epitaxial array is diced along the channels of the epitaxial array to obtain individual wafers. Figure 8 The epitaxial layer of the spliced ​​light-emitting chip is shown.

[0084] As can be seen, the fabrication process of the light-emitting chip epitaxial layer provided in this embodiment is simple, efficient, and low-cost. Furthermore, in the fabricated light-emitting chip epitaxial layer, the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate are coplanar. The top surfaces of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate serve as light-emitting surfaces. A portion of the light generated can be directly emitted through the first semiconductor layer, the first active layer, and the second semiconductor layer, which shortens the emission path of this portion of light and minimizes light energy absorption, thereby improving the light extraction efficiency of the light-emitting chip. This is particularly suitable for the fabrication of ultraviolet light chip epitaxial layers.

[0085] Another alternative embodiment:

[0086] This embodiment provides a light-emitting chip, which can be an ultraviolet light-emitting chip, a blue light-emitting chip, a green light-emitting chip, or a red light-emitting chip, etc. The light-emitting chip provided in this embodiment can be a right-mounted chip, a flip-chip chip, or a vertically mounted chip. Furthermore, the light-emitting chip provided in this embodiment can be a micrometer-sized chip (i.e., a micro-chip), such as including but not limited to Mini LED chips and Micro LED chips, or it can be a chip larger than a micrometer, such as a standard-sized chip or a large-sized chip.

[0087] One example of this embodiment provides a light-emitting chip including Figure 2 or Figure 5The illustrated light-emitting chip epitaxial layer further includes a first electrode electrically connected to a first semiconductor layer and a second electrode electrically connected to a second semiconductor layer. The first electrode and the second electrode are insulated from each other. Since the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate of the light-emitting chip epitaxial layer are coplanar, and the top surfaces of the first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate serve as light-emitting surfaces, a portion of the generated light can be directly emitted through the first semiconductor layer, the first active layer, and the second semiconductor layer. This shortens the emission path of this portion of light and minimizes light energy absorption, thereby improving the light extraction efficiency of the light-emitting chip, especially suitable for improving the light extraction efficiency of ultraviolet chips.

[0088] In one application scenario of this embodiment, in order to further improve the light extraction efficiency of the light-emitting chip, the first electrode and the second electrode of the light-emitting chip are respectively disposed on the bottom surface of the epitaxial layer of the light-emitting chip. Here, the bottom surface of the epitaxial layer of the light-emitting chip consists of the first semiconductor layer, the first active layer, the second semiconductor layer and the bottom surface of the substrate (i.e., Figure 2 As shown in S1 in the diagram. Of course, in some other application scenarios, at least one of the first electrode and the second electrode can also be disposed on the top surface of the epitaxial layer of the light-emitting chip (i.e., Figure 2 (As shown in S2).

[0089] For ease of understanding, the following will use... Figure 14 The light-emitting chip shown is for illustrative purposes only. See also... Figure 14 As shown, the light-emitting chip includes Figure 2 The illustrated light-emitting chip epitaxial layer includes a first semiconductor layer 11 (P-type) and a second semiconductor layer 13 (N-type). A first electrode 32 and a second electrode 31 are disposed on the bottom surface of the light-emitting chip epitaxial layer. The light-emitting chip also includes a first conductive layer 22 located between the second semiconductor layer 13 and the bottom surface of the substrate 14, and the second electrode 31. A second conductive layer 21 is attached to the outer surface of the first semiconductor layer 11, with one end of the second conductive layer 21 near the bottom surface of the light-emitting chip epitaxial layer in contact with the first electrode 32. (See also...) Figure 14 As shown, in this example, the outer surface of the first semiconductor layer 11 includes at least one exposed side located between the top and bottom surfaces of the first semiconductor layer 11, such as including but not limited to... Figure 14 The left side of the first semiconductor layer 11 and the right side of the first semiconductor layer 11 are attached to the first active layer 12. It should be understood that the specific positions of the first electrode 32 and the second electrode 31 on the bottom surface of the epitaxial layer of the light-emitting chip in this embodiment can be flexibly set, and will not be described in detail here.

[0090] Of course, in some application examples, at least one of the first electrode 32 and the second electrode 31 may also be disposed on the side, for example, see Figure 16As shown, the first electrode 32 can be disposed on the left side of the first conductive layer 22, and the second electrode 31 can be disposed on the side of the second side of the substrate 14 (the right side of the substrate 14 in the figure). In this case, compared with the method of disposing the electrode on the top surface S2, the light extraction efficiency can also be improved.

[0091] In this embodiment, to further improve the light extraction efficiency of the light-emitting chip, at least one of the first conductive layer 22 and the second conductive layer 21 can be set as a reflective layer, thereby reflecting the light incident on the first conductive layer 22 or the second conductive layer 21 and causing it to be emitted from the top surface. For example, in one application scenario, the second conductive layer 21 can be set as a reflective layer, and to improve the reflection effect, the surface of the second conductive layer 21 can be set as a rough surface, including a side that contacts the first semiconductor layer 11. In some examples, only this side can be set as a rough surface, while the other sides of the second conductive layer 21 can be set as smooth surfaces.

[0092] To further improve the light extraction efficiency of the light-emitting chip, in some other application scenarios of this embodiment, see [reference needed]. Figure 14 As shown, the light-emitting chip may also include, but is not limited to, at least one of the following:

[0093] The first insulating reflective layer 231 is disposed on the side of the first conductive layer 22 away from the epitaxial layer of the light-emitting chip. For example, it can be attached to the bottom surface of the first conductive layer 22, thereby reflecting the light incident on the bottom surface of the first conductive layer 22 toward the light-emitting surface and improving the light-emitting efficiency.

[0094] The second insulating reflective layer 232 is disposed on the bottom surface of the first semiconductor layer 11 and the first active layer 12. For example, it can be attached to the bottom surface of the first semiconductor layer 11 and the first active layer 12, thereby reflecting the light incident on the bottom surface of the first semiconductor layer 11 and the first active layer 12 toward the light-emitting surface and improving the light-emitting efficiency.

[0095] The third insulating reflective layer 233 is disposed on the side surface of the second side of the substrate 14, for example, it can be attached to the side surface of the second side of the substrate 14, thereby reflecting the light emitted from the side surface of the second side of the substrate 14 to the light emitting surface, thereby improving the light emission efficiency.

[0096] It should be understood that the first insulating reflective layer 231, the second insulating reflective layer 232, and the third insulating reflective layer 233 in the above example can be flexibly combined according to requirements, and the specific combination methods will not be described in detail here.

[0097] Furthermore, in some application scenarios, in order to further improve the light extraction efficiency, at least one of the first electrode 32 and the second electrode 31 can also be set as an electrode layer with reflective properties.

[0098] See Figure 15As shown, through the arrangement of the first insulating reflective layer 231, the second insulating reflective layer 232 and the third insulating reflective layer 233, the light beam A that hits the bottom surface of the first conductive layer 22 can be reflected and emitted from the light-emitting surface, and the light beam B that hits the side surface of the second side of the substrate 14 is reflected and emitted towards the light-emitting surface. A portion of the light beam can be emitted directly from the first semiconductor layer 11, the first active layer 12 and the second semiconductor layer 13, thereby further improving the light emission efficiency.

[0099] Another example of this embodiment provides a light-emitting chip including Figure 8 The epitaxial layer of the light-emitting chip shown is that the light-emitting chip includes two... Figure 2 or Figure 5 The illustrated light-emitting chip epitaxial layers are symmetrically joined together on their second sides via a connecting layer. See also an example of a light-emitting chip structure. Figures 17 to 18 As shown, the second sides of the two substrates 14 are joined together by a connecting layer 24, which may be, but is not limited to, an adhesive layer. Figure 17 The arrangement of the first insulating reflective layer 231, the second insulating reflective layer 232, the first conductive layer 22 and the second conductive layer 21 shown are the same as in the example above, and will not be repeated here. Figure 17 The first electrode 32 shown has two electrodes, but only one may be provided as needed, as long as it is electrically connected to the two corresponding first semiconductor layers 11 on both sides of the substrate 14. Similarly, the number of second electrodes 31 can also be flexibly set, which will not be elaborated here.

[0100] exist Figures 17 to 18 In the illustrated light-emitting chip, because it uses a spliced ​​epitaxial layer, its light-emitting surface and light-emitting area are relatively large compared to... Figures 14 to 16 The light-emitting chip shown is larger. In some application examples, to further improve light extraction efficiency and effect, at least one of the two sides of the connecting layer 24 that contact the two substrates can be configured as a reflective surface capable of reflecting light. Furthermore, to enhance the reflection effect, this reflective surface can be further configured as a rough reflective surface. In this embodiment, the rough surface can be achieved by providing protrusions and / or recesses. For example, in one example, the rough reflective surface can be, but is not limited to, a serrated surface with serrated protrusions, and to enhance the reflection effect, the inclined surface of the serrated protrusions faces the top surface of the substrate. See, for example... Figure 19 The schematic diagram of the interface of the connecting layer 24 shown shows that the two surfaces that contact the two sides of the two substrates 14 are reflective rough surfaces, and the inclined surface 241 of the serrated protrusion 241 on the reflective rough surface faces the top surface of the substrate 14. Of course, it should be understood that the serrated protrusion 241 can also be replaced by other shapes of protrusions or recesses, which will not be described in detail here.

[0101] In addition, it should be understood that the first insulating reflective layer 231 in this embodiment is close to the surface of the substrate 14, and the side of the second insulating reflective layer 232 close to the first active layer 12 can also be set as a rough surface as required, which will not be described in detail here.

[0102] It should be understood that when a light-emitting chip uses spliced ​​epitaxial layers, the spliced ​​epitaxial layers are not limited to... Figures 17 to 18 The two mentioned above can also be set to four as needed, for example, see [link to relevant documentation]. Figure 20 As shown, it can also be set to 6, 8 or 10, etc., depending on the needs, which will not be elaborated here.

[0103] Another example of this embodiment provides a light-emitting chip including... Figures 6 to 7 The epitaxial layer of the light-emitting chip shown is, in other words, relative to... Figures 14 to 15 The light-emitting chip shown in this example further includes a third semiconductor layer, a second active layer, and a fourth semiconductor layer located on the second side of the substrate, as well as a third electrode electrically connected to the third semiconductor layer and a fourth electrode electrically connected to the fourth semiconductor layer. The third electrode is insulated from the fourth electrode and the second electrode, and the fourth electrode is insulated from the first electrode. See also an example of a light-emitting chip structure. Figure 21 As shown, the light-emitting chip includes a substrate 14, a first semiconductor layer 11, a first active layer 12 and a second semiconductor layer 13 disposed on a first side of the substrate 14, and a third semiconductor layer 41, a second active layer 42 and a fourth semiconductor layer 43 disposed on a second side of the substrate 14. Figure 21 In addition to the first electrode 32 and the second electrode 31, it also includes a third electrode 33 electrically connected to the third semiconductor layer 41, and a fourth electrode 34 electrically connected to the fourth semiconductor layer 43. It should be understood that when the first semiconductor layer 11 and the third semiconductor layer 41 are of the same type, only one of the third electrode 33 and the first electrode 32 may be retained and electrically connected to the first semiconductor layer 11 and the third semiconductor layer 41, respectively. The arrangement of the second electrode 31 and the fourth electrode 34 is similar, for example, see [reference needed]. Figures 22 to 23 As shown, when the second semiconductor layer 13 and the fourth semiconductor layer 43 are of the same type, only one second electrode 31 can be provided. This second electrode 31 is electrically connected to the second semiconductor layer 13 and the fourth semiconductor layer 43 respectively through the first conductive layer 22. The light-emitting chip shown in this embodiment has relatively high overall integrity. Figures 17 to 18 The light-emitting chip shown is better, and the light-emitting area and light emission of both are comparable. Furthermore, in some examples, Figures 21 to 23 In the light-emitting chip shown, at least one of the third and fourth sides between the first and second sides of the substrate 14 can be provided with a corresponding semiconductor layer and an active layer as needed to further increase the light output. The size of the substrate 14 can also be appropriately increased as needed to simultaneously increase the light output area.

[0104] As can be seen, the light-emitting chip provided in this embodiment can be, but is not limited to, an ultraviolet light-emitting chip, and its light extraction efficiency is relatively high compared to... Figure 1 The light-emitting chip shown is taller, and its light output and light-emitting area can be adjusted according to needs, making it more suitable for various application scenarios and with better applicability.

[0105] Another alternative embodiment:

[0106] For ease of understanding, this embodiment will be described below using the fabrication process of a light-emitting chip as an example. In this embodiment, the method for fabricating a light-emitting chip is described in [reference needed]. Figure 24 As shown, it includes, but is not limited to:

[0107] S2401: Fabrication of the epitaxial layer of the light-emitting chip. The method for fabricating the epitaxial layer of the light-emitting chip in this embodiment may be, but is not limited to, the methods shown in the above embodiments, and will not be described in detail here.

[0108] S2402: Fabricating electrodes on the epitaxial layer of a light-emitting chip.

[0109] For example, the epitaxial layer of the light-emitting chip obtained by the method shown in the above embodiments is Figures 2 to 5 or Figure 8 When fabricating the epitaxial layer of the light-emitting chip shown (wherein...) Figure 8 The light-emitting chip epitaxial layer shown is such that, before S2402, the second sides of the substrates of the two light-emitting chip epitaxial layers are symmetrically spliced ​​together by a connecting layer. Then, a first electrode electrically connected to the first semiconductor layer and a second electrode electrically connected to the second semiconductor layer are formed on the light-emitting chip epitaxial layer. The first electrode and the second electrode are insulated from each other.

[0110] The epitaxial layer of the light-emitting chip prepared by the method shown in the above embodiments is... Figures 6 to 7 When the light-emitting chip epitaxial layer is shown, a first electrode and / or a third electrode electrically connected to the first semiconductor layer and the third semiconductor layer, and a second electrode and / or a fourth electrode electrically connected to the second semiconductor layer and the fourth semiconductor layer are fabricated on the light-emitting chip epitaxial layer.

[0111] For ease of understanding, the following will use... Figure 8 The epitaxial layer of the light-emitting chip shown is an example to illustrate the process of fabricating a light-emitting chip. (See also...) Figure 25 As shown, it includes, but is not limited to:

[0112] S2501: Transfer the independent light-emitting chip epitaxial layer 7 to the temporary substrate 61. In some examples, during the dicing step of fabricating the light-emitting chip epitaxial layer 7, the independent light-emitting chip epitaxial layer 7 obtained by dicing can be transferred to the temporary substrate 61 while dicing is being performed, in order to improve fabrication efficiency.

[0113] S2502: A first conductive layer 22 is formed in a corresponding area on the bottom surface of the epitaxial layer 7 of the light-emitting chip.

[0114] In one example, a first conductive layer 22 can be deposited in a corresponding area on the bottom surface of the epitaxial layer 7 of the light-emitting chip by means of, but not limited to, a mask and a photolithography process. The first conductive layer 22 is electrically connected to the second semiconductor layer and is insulated from the first semiconductor layer.

[0115] S2503: A first insulating reflective layer 231 and a second insulating reflective layer 232 are formed in the corresponding area on the bottom surface of the epitaxial layer 7 of the light-emitting chip.

[0116] In one example, a first insulating reflective layer 231 and a second insulating reflective layer 232 can be deposited in a corresponding area on the bottom surface of the epitaxial layer 7 of the light-emitting chip by means of, but not limited to, a mask and photolithography process, and a window for setting the second electrode is reserved in the first conductive layer 22.

[0117] S2504: A photoresist layer 62 is coated and patterned on the bottom surface of the epitaxial layer 7 of the light-emitting chip, so that the photoresist layer 62 is exposed at the end of the first semiconductor layer of the epitaxial layer 7 facing the bottom surface.

[0118] S2505: A second conductive layer 21 is formed on the outer surface of the first semiconductor layer.

[0119] For example, in one instance, a second conductive layer 21 can be fabricated on the outer surface of the first semiconductor layer using photolithography and atomic layer deposition (ALD) processes.

[0120] S2506: Remove photoresist layer 62.

[0121] S2507: A first electrode 32 and a second electrode 31 are fabricated on the bottom surface of the epitaxial layer 7 of the light-emitting chip.

[0122] For example, in one embodiment, a first electrode 32 and a second electrode 31 can be fabricated on the epitaxial layer 7 of the light-emitting chip by processes including but not limited to evaporation or sputtering to form a light-emitting chip. The fabricated light-emitting chips can be separated from the temporary substrate 61 as needed, or they can be sent directly to the next process without separation.

[0123] It should be understood that the photolithography process, ALD process, vapor deposition or sputtering process involved in the above steps are merely illustrative examples. Those skilled in the art can use other processes that can achieve the corresponding functions for equivalent substitution, which will not be elaborated here.

[0124] It should be understood that when adopting Figures 2-5The process of fabricating a light-emitting chip using the epitaxial layer shown is similar to that of fabricating a light-emitting chip. Figure 25 Similarly, the process involves selectively adding a third insulating reflective layer as needed. When using... Figures 6 to 7 The process of fabricating a light-emitting chip using the epitaxial layer shown is similar to that of fabricating a light-emitting chip. Figure 25 Similarly, I will not go into details here.

[0125] As can be seen, the fabrication process of the light-emitting chip provided in this embodiment is simple, efficient, and low-cost. Furthermore, the semiconductor layer, active layer, and substrate in the fabricated light-emitting chip are coplanar, with the top surfaces of these layers serving as light-emitting surfaces. A portion of the generated light can be directly emitted through the semiconductor layer and active layer, thus shortening the emission path of this portion of the light and minimizing light absorption, thereby improving the light extraction efficiency of the light-emitting chip. This method is particularly suitable for the fabrication of ultraviolet LED chips or deep ultraviolet LED chips.

[0126] It should be understood that the application of the present invention is not limited to the examples above. Those skilled in the art can make improvements or modifications based on the above description, and all such improvements and modifications should fall within the protection scope of the appended claims.

Claims

1. A light-emitting chip, comprising a light-emitting chip epitaxial layer, said light-emitting chip epitaxial layer comprising a first semiconductor layer, a first active layer, a second semiconductor layer, and a substrate, characterized in that, The first semiconductor layer, the first active layer, and the second semiconductor layer are located on a first side of the substrate; the top surface of the first semiconductor layer, the top surface of the first active layer, the top surface of the second semiconductor layer, and the top surface of the substrate are located on a first horizontal plane and serve as light-emitting surfaces; the bottom surface of the first semiconductor layer, the bottom surface of the first active layer, the bottom surface of the second semiconductor layer, and the bottom surface of the substrate are located on a second horizontal plane. The light-emitting chip further includes a first electrode electrically connected to the first semiconductor layer and a second electrode electrically connected to the second semiconductor layer. The first electrode and the second electrode are insulated from each other and are respectively disposed on the bottom surface of the epitaxial layer of the light-emitting chip. The light-emitting chip also includes: The first conductive layer is located between the bottom surface of the second semiconductor layer and the bottom surface of the substrate and the second electrode, and the second conductive layer is attached to the side of the first semiconductor layer away from the first active layer. The end of the second conductive layer near the bottom surface of the epitaxial layer of the light-emitting chip is in contact with the first electrode. At least one of the first conductive layer and the second conductive layer is a reflective layer. The light-emitting chip also includes: The substrate comprises a first insulating reflective layer, a second insulating reflective layer, and a third insulating reflective layer, wherein the first insulating reflective layer is disposed on the side of the first conductive layer away from the epitaxial layer of the light-emitting chip, the second insulating reflective layer is disposed on the bottom surface of the first semiconductor layer and the bottom surface of the first active layer, and the third insulating reflective layer is disposed on the surface of the second side of the substrate, wherein the first side and the second side are opposite sides of the substrate.

2. The light-emitting chip as described in claim 1, characterized in that, The height L3 between the bottom surface to the top surface of the first semiconductor layer, the bottom surface to the top surface of the first active layer, the bottom surface to the top surface of the second semiconductor layer, and the bottom surface to the top surface of the substrate is greater than or equal to 0.3 micrometers and less than or equal to 15 micrometers.

3. The light-emitting chip as described in claim 2, wherein, The first semiconductor layer, the first active layer, the second semiconductor layer, and the substrate have the same length L2, and the length L2 is greater than or equal to twice the height L3. The direction of the length is perpendicular to the stacking direction of the epitaxial layers and perpendicular to the direction of the height L3. And / or, the total width L1 of the first semiconductor layer, the first active layer, the second semiconductor layer and the substrate is greater than or equal to L3, and the direction of the total width is the stacking direction of the epitaxial layers.

4. The light-emitting chip according to any one of claims 1-3, characterized in that, The light-emitting chip includes two light-emitting chip epitaxial layers as described in claim 1. The second sides of the substrates of the two light-emitting chip epitaxial layers are symmetrically spliced ​​together by a connecting layer, and the first side and the second side are opposite sides of the substrate.

5. The light-emitting chip as described in claim 4, characterized in that, The bottom surface of the epitaxial layer of the light-emitting chip is composed of the bottom surface of the first semiconductor layer, the bottom surface of the first active layer, the bottom surface of the second semiconductor layer, and the bottom surface of the substrate.

6. The light-emitting chip according to any one of claims 1-3, characterized in that, The epitaxial layer of the light-emitting chip is an ultraviolet light chip epitaxial layer.

7. A method for manufacturing a light-emitting chip, applied to the light-emitting chip as described in any one of claims 1-3, characterized in that, include: Fabricating an epitaxial layer for a light-emitting chip includes: forming a first semiconductor layer, a first active layer, and a second semiconductor layer on a first side of a substrate; The top surface of the first semiconductor layer, the top surface of the first active layer, the top surface of the second semiconductor layer, and the top surface of the substrate are located on a first horizontal plane and serve as light-emitting surfaces; the bottom surface of the first semiconductor layer, the bottom surface of the first active layer, the bottom surface of the second semiconductor layer, and the bottom surface of the substrate are located on a second horizontal plane. A first electrode electrically connected to the first semiconductor layer and a second electrode electrically connected to the second semiconductor layer are fabricated on the epitaxial layer of the light-emitting chip, wherein the first electrode and the second electrode are insulated from each other.

8. The method for manufacturing a light-emitting chip as described in claim 7, characterized in that, After the light-emitting chip epitaxial layer is fabricated, before fabricating the first electrode electrically connected to the first semiconductor layer and the second electrode electrically connected to the second semiconductor layer on the light-emitting chip epitaxial layer, the method further includes: The second sides of the substrates of the two light-emitting chip epitaxial layers are symmetrically spliced ​​together from left to right through a connecting layer, with the first side and the second side being opposite sides of the substrate.

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