Current sampling resistor short circuit protection circuit, method, chip, system and device

Abstract

A current sampling resistor short circuit protection circuit, method, chip, system and device. The current sampling resistor short circuit protection circuit comprises: a load mode determination circuit adapted to determine the current load mode of a switching power supply system based on the working state of the transformer after the voltage at the opposite end of the transformer crosses zero upwards, and output a load identification signal; a logic protection circuit adapted to output an identification signal of whether to trigger the current sampling resistor short circuit protection based on the load identification signal; when the load identification signal indicates that the current load mode of the switching power supply system is a heavy load mode, the current sampling resistor short circuit protection is triggered; when the load identification signal indicates that the current load mode of the switching power supply system is a light load mode, the current sampling resistor short circuit protection is not triggered. With the above scheme, the current sampling resistor short circuit protection can be accurately realized under the condition of ensuring the simplification of the peripheral system.

Description

Technical Field

[0001] This invention relates to the field of charging technology, specifically to a short-circuit protection circuit, method, chip, system, and device for a current sampling resistor. Background Technology

[0002] To meet reliability requirements and accommodate applications with varying power supply voltages, chips used in switching power supply systems integrate current sampling resistor protection, also known as limited power source (LPS) protection. A short circuit in the current sampling resistor limits the voltage, current, and power output to the load, thus preventing circuit damage caused by excessive current or power and reducing safety hazards.

[0003] Currently, short-circuit protection of the current sampling resistor is mainly achieved by limiting the output current.

[0004] However, the existing schemes that achieve short-circuit protection of the current sampling resistor by limiting the output current are difficult to accurately achieve short-circuit protection of the current sampling resistor while ensuring the simplification of the peripheral system. Summary of the Invention

[0005] The problem this invention aims to solve is to accurately achieve short-circuit protection of the current sampling resistor while ensuring a streamlined peripheral system.

[0006] To address the above problems, this invention provides a short-circuit protection circuit for a current sampling resistor, the current sampling resistor short-circuit protection circuit comprising:

[0007] The zero-crossing detection circuit is suitable for detecting the voltage at the opposite terminal of the transformer when the secondary current sampling resistor of the transformer is short-circuited, determining whether the voltage at the opposite terminal of the transformer has crossed zero upwards, and outputting the detection result signal.

[0008] A load mode determination circuit, connected to the zero-crossing detection circuit, is adapted to determine the current load mode of the switching power supply system based on the operating state of the transformer after the voltage at the opposite terminal of the transformer crosses zero upwards, and output a load identification signal.

[0009] A logic protection circuit, connected to the load mode determination circuit, is adapted to output an identification signal indicating whether to trigger the current sampling resistor short-circuit protection based on the load identification signal.

[0010] When the load identification signal indicates that the current load mode of the switching power supply system is heavy load mode, the logic protection circuit outputs an identification signal that triggers the short-circuit protection of the current sampling resistor; when the load identification signal indicates that the current load mode of the switching power supply system is light load mode, the logic protection circuit outputs an identification signal that does not trigger the short-circuit protection of the current sampling resistor.

[0011] Optionally, the load mode determination circuit includes:

[0012] A shielding duration counting sub-circuit, connected to the zero-crossing detection circuit, is adapted to determine whether the preset shielding duration has been reached after the voltage at the opposite end of the transformer crosses zero upwards, and outputs a transformer operating status signal after the preset shielding duration has been reached. The transformer operating status signal is used to represent the conduction time and demagnetization time of the transformer.

[0013] The load mode identification sub-circuit, connected to the shielding duration counting sub-circuit, is adapted to determine the current load mode of the switching power supply system based on the transformer operating status signal and output a load identification signal.

[0014] Optionally, the load pattern recognition sub-circuit includes:

[0015] The valley count detection module is adapted to count the number of valleys of the transformer's opposite-terminal resonant signal based on the transformer's operating status signal during the transformer's demagnetization time. If the number of valleys continuously reaches the preset number of valleys, it outputs a load identification signal representing the light load mode; otherwise, it outputs a load identification signal representing the heavy load mode.

[0016] Optionally, the valley bottom number detection module includes: a first inverter, a first NOR gate circuit, and a third counter;

[0017] The first inverter has its input terminal connected to the identification signal indicating that the secondary side current sampling resistor is short-circuited, and its output terminal connected to the first input terminal of the first NOR gate circuit.

[0018] The first NOR gate circuit has its second input terminal connected to the shielding duration counting sub-circuit, and its output terminal connected to the enable terminal of the third counter.

[0019] The control terminal of the third counter is connected to the output terminal of the zero-crossing detection circuit, and the output terminal is connected to the logic protection circuit.

[0020] Optionally, the logic protection circuit is adapted to perform timing when the valley number detection module outputs a load identification signal representing a light load mode and the secondary side current sampling resistor of the transformer is short-circuited, and to trigger the current sampling resistor protection after a first preset time period is reached.

[0021] Optionally, the logic protection circuit includes: a second inverter, a first AND gate, a fourth counter, and a first RS flip-flop, wherein:

[0022] The second inverter has an input terminal adapted to receive the load identification signal representing the light load mode, and its output terminal connected to the first input terminal of the first AND gate circuit.

[0023] The first AND gate circuit has its second input terminal connected to the short-circuit identification signal of the secondary side current sampling resistor;

[0024] The fourth counter has a control terminal connected to a second clock signal, an enable terminal connected to the output terminal of the first AND gate circuit, and an output terminal connected to the setting terminal of the first RS flip-flop.

[0025] The first RS flip-flop has its reset terminal connected to the output terminal of the first inverter, its enable terminal connected to the load identification signal, and its output terminal outputting an identification signal indicating whether the current sampling resistor short-circuit protection has been triggered.

[0026] Optionally, the load pattern recognition sub-circuit includes:

[0027] The switching frequency detection module is adapted to detect the frequency of the transformer operating status signal. If the frequency of the transformer operating status signal reaches a preset frequency value within a second preset time period, it outputs a load identification signal representing a heavy load mode; otherwise, it outputs a load identification signal representing a light load mode.

[0028] Optionally, the switching frequency detection module includes: an enable signal generation submodule and a fifth counter; wherein:

[0029] The enable signal generation submodule is adapted to generate a switching frequency counting signal to the enable terminal of the fifth counter based on the third clock signal;

[0030] The fifth counter is connected to the enable signal generation submodule. It uses the switching frequency counting signal as the enable signal to count the frequency of the transformer operating status signal. If the frequency of the transformer operating status signal reaches a preset frequency value within a second preset time period, it outputs the load identification signal representing the heavy load mode; otherwise, it outputs the load identification signal representing the light load mode.

[0031] Optionally, the logic protection circuit includes: a second RS flip-flop, wherein:

[0032] The second RS flip-flop has its reset terminal connected to the inverted signal of the short-circuit flag signal of the secondary side current sampling resistor, its setting terminal connected to the output terminal of the fifth counter, and its output terminal outputting the flag signal indicating whether the short-circuit protection of the current sampling resistor is triggered.

[0033] Optionally, the zero-crossing detection circuit includes:

[0034] The first comparison circuit has a first input terminal connected to the opposite-named terminal of the transformer and a second input terminal connected to the same-named terminal of the transformer. It is adapted to compare the voltage at the opposite-named terminal of the transformer and the voltage at the same-named terminal of the transformer to obtain a voltage comparison result signal.

[0035] A blanking circuit, connected to the output of the first comparison circuit, is adapted to perform a blanking operation on the voltage comparison result signal;

[0036] The first delay circuit, connected to the blanking circuit, is adapted to delay the blanked voltage comparison result signal.

[0037] The first NAND gate is connected to the output of the first comparator circuit and the output of the first delay circuit, and the output of the gate outputs the detection result signal.

[0038] This invention also provides a method for short-circuit protection of a current sampling resistor, the method comprising:

[0039] When the secondary current sampling resistor of the transformer is short-circuited, the voltage at the opposite terminal of the transformer is detected, it is determined whether the voltage at the opposite terminal of the transformer crosses zero upwards, and the detection result signal is output.

[0040] After the voltage at the opposite terminal of the transformer crosses zero upwards, the current load mode of the switching power supply system is determined based on the operating state of the transformer, and a load identification signal is generated.

[0041] Based on the load identification signal, determine whether to trigger the short-circuit protection of the current sampling resistor;

[0042] When the load identification signal indicates that the current load mode of the switching power supply system is heavy load mode, it is determined that the current sampling resistor short-circuit protection is triggered; when the load identification signal indicates that the current load mode of the switching power supply system is light load mode, it is determined that the current sampling resistor short-circuit protection is not triggered.

[0043] Optionally, after the voltage at the opposite terminal of the transformer crosses zero upwards, based on the operating state of the transformer, the current load mode of the switching power supply system is determined, and a load identification signal is generated, including:

[0044] After the voltage at the opposite terminal of the transformer crosses zero upwards, it is determined whether the preset shielding time has been reached. After the preset shielding time has been reached, a transformer operating status signal is output. The transformer operating status signal is used to represent the conduction time and demagnetization time of the transformer.

[0045] Based on the transformer operating status signal, the current load mode of the switching power supply system is determined, and a load identification signal is generated.

[0046] Optionally, determining the current load mode of the switching power supply system based on the transformer operating status signal and outputting a load identification signal includes:

[0047] Based on the transformer operating status signal, during the transformer demagnetization time, the number of valleys of the transformer's opposite-terminal resonant signal is counted. If the number of valleys continuously reaches the preset number of valleys, a load identification signal representing a light load mode is output; otherwise, a load identification signal representing a heavy load mode is output.

[0048] Optionally, determining the current load mode of the switching power supply system based on the transformer operating status signal and outputting a load identification signal includes:

[0049] The frequency of the transformer operating status signal is detected. If the frequency of the transformer operating status signal reaches a preset frequency value within a preset time period, a load identification signal representing the heavy load mode is output; otherwise, a load identification signal representing the light load mode is output.

[0050] Optionally, it also includes:

[0051] When the short-circuit protection of the trigger current sampling resistor is detected, the power switch on the primary side is controlled by the optocoupler, and the power supply of the protocol chip is pulled low.

[0052] This invention also provides a protocol chip, which integrates the current sampling resistor short-circuit protection circuit as described in any one of claims 1 to 9.

[0053] This invention also provides a switching power supply system, the system comprising:

[0054] transformer;

[0055] The aforementioned protocol chip is connected to the transformer;

[0056] An interface circuit is connected to the protocol chip;

[0057] The protocol chip is adapted to convert the input voltage of the transformer secondary coil into a voltage compatible with the interface circuit and control the charging current.

[0058] This invention also provides a charging device, which includes the aforementioned switching power supply system.

[0059] Compared with the prior art, the technical solution of the embodiments of the present invention has the following advantages:

[0060] Applying the scheme of this invention, after the voltage at the opposite terminal of the transformer crosses zero upwards, based on the operating state of the transformer, the current load mode of the switching power supply system is first determined, and then, based on the load identification signal, an output is made regarding whether to trigger the current sampling resistor short-circuit protection. When the load identification signal indicates that the current load mode of the switching power supply system is a heavy load mode, the identification signal for the current sampling resistor short-circuit protection is triggered; otherwise, the identification signal for the current sampling resistor short-circuit protection is not triggered. Thus, the current sampling resistor short-circuit protection is only triggered in the heavy load mode, thereby reducing false short-circuit protection of the current sampling resistor in the light load mode, thus avoiding unnecessary power-off restarts of the switching power supply system, and ultimately accurately achieving the current sampling resistor short-circuit protection. Attached Figure Description

[0061] Figure 1 This is a schematic diagram of a switching power supply system.

[0062] Figure 2 This is a schematic diagram of the structure of a current sampling resistor protection circuit in an embodiment of the present invention;

[0063] Figure 3 This is a circuit structure diagram of a current sampling resistor protection circuit according to an embodiment of the present invention;

[0064] Figure 4 This is a schematic diagram of a signal waveform for identifying load patterns by detecting the number of valleys in an embodiment of the present invention;

[0065] Figure 5 This is a schematic diagram of a signal waveform in another embodiment of the present invention for identifying load patterns by detecting the number of valleys;

[0066] Figure 6 This is a circuit structure diagram of a load mode recognition sub-circuit and a logic protection circuit in an embodiment of the present invention;

[0067] Figure 7 This is a schematic diagram of various signal waveforms in an embodiment of the present invention for implementing short-circuit protection of a current sampling resistor through a switching frequency detection method;

[0068] Figure 8 This is a flowchart of a current sampling resistor short-circuit protection method according to an embodiment of the present invention. Detailed Implementation

[0069] Figure 1 The diagram shows a typical switching power supply system structure. (Refer to...) Figure 1 The switching power supply system may include: a transformer T, a power switch control circuit U1, a synchronous rectification circuit U2, a transformer T, and a protocol chip U3.

[0070] The primary circuit of transformer T may include: primary coil Np, power switch control circuit U1, switching transistor Q1, optocoupler feedback U4B, and other peripheral circuits. These other peripheral circuits may include a first resistor R1, a first capacitor C1, a second capacitor C2, a second resistor R2, and a primary current sampling resistor Rcs. The primary current sampling resistor Rcs is used to sample the primary current to achieve constant current control on the primary side.

[0071] The power switch control circuit U1 is a signal generator that produces a square wave pulse signal to adjust the gate voltage of the primary-side switching transistor Q1, controlling whether the power switch Q1 is turned on, thereby adjusting the duty cycle and switching frequency of the switching transistor Q1, so that the switching power supply system operates within a set frequency range. The transformer T includes a primary-side coil Np and a secondary-side coil Ns. The input voltage Vin is coupled to the secondary-side coil Ns via the primary-side coil Np. The received voltage signal provides power to the secondary-side protocol chip U3, ensuring the normal operation of the protocol chip U3. The protocol chip U3 communicates with the corresponding interface circuit via protocol.

[0072] The secondary circuit of transformer T may include: secondary coil Ns, synchronous rectifier circuit U2, synchronous rectifier tube Q2, protocol chip U3 and other peripheral circuits.

[0073] The non-circular terminal DRAIN of the secondary coil of transformer T is connected to the drain of synchronous rectifier Q2 and then to the drain terminal of protocol chip U3. The gate of synchronous rectifier Q2 is controlled by synchronous rectifier circuit U2 to rectify the voltage signal. Under the combined action of switching transistor Q1 and synchronous rectifier Q2, the switching power supply system operates within the set duty cycle and switching frequency.

[0074] In practical implementation, the protocol chip U3 may include various circuits, such as a power module, an optocoupler control circuit, a constant voltage and constant current loop, and a current sampling operational amplifier. The constant voltage and constant current loop may include a constant voltage loop and a constant current loop.

[0075] In practical implementation, the source and secondary side current sampling resistor R of synchronous rectifier Q2 are connected. sense Connection. Secondary side current sampling resistor R sense The other end is connected to the CS- pin of protocol chip U3. The CS+ pin of protocol chip U3 is connected to the secondary side current sampling resistor R. sense The other end is connected. The CS+ pin is the positive input of the internal current sampling operational amplifier of the protocol chip U3, and the CS- pin is the negative input of the internal current sampling operational amplifier of the protocol chip U3. Connect the secondary side current sampling resistor R. senseThe voltage difference across the two ends is connected to the current sampling operational amplifier in the internal constant current loop of protocol chip U3 via the CS+ and CS- pins. The signal amplified by the current sampling operational amplifier is output through the IFB pin of protocol chip U3 to achieve constant current control on the secondary side. The IFB pin of protocol chip U3 is connected to the secondary-side optocoupler U4A and the OPTO pin through the seventh capacitor C7. The OPTO pin of protocol chip U3 is the output terminal of the internal optocoupler control and constant voltage / constant current loop of protocol chip U3, thereby allowing adjustment of the constant voltage / constant current loop.

[0076] A fifth capacitor C5 is also provided between the CS+ and CS- pins of the protocol chip U3. The VFB pin of the protocol chip U3 is the internal output voltage sampling point of the protocol chip U3. It is externally connected to the OPTO pin through the fifth resistor R5 and the sixth capacitor C6, and voltage loop compensation is realized through the RC network.

[0077] The OPTO pin of protocol chip U3 is connected via secondary-side optocoupler U4A and the secondary coil Ns of transformer R4. Protocol chip U3 is coupled to primary-side optocoupler U4B via secondary-side optocoupler U4A to provide compensation to the primary side, with a compensation signal Vcomp. The power switch control circuit U1 adjusts the conduction of primary-side switch Q1 according to the compensation signal Vcomp, thereby controlling the switching frequency.

[0078] Currently, the short-circuit protection function of the current sampling resistor is mainly achieved by detecting the current state of the secondary-side current sampling resistor Rsense through the synchronous rectification control circuit U2. This necessitates the integration of the synchronous rectification control circuit U2 into the switching power supply system to realize the short-circuit protection function of the current sampling resistor.

[0079] Furthermore, when implementing the current sampling resistor short-circuit protection function through the synchronous rectification control circuit U2, regardless of the load mode, the current sampling resistor Rsense will trigger the short-circuit protection operation whenever it is short-circuited on the secondary side. Since the main method of current sampling resistor short-circuit protection is to limit the current, when the load is small, the current is also small, making it unnecessary to limit the current further, i.e., there is no need to execute the current sampling resistor short-circuit protection operation. Therefore, the existing technical solution may result in false protection, leading to unnecessary power-off restarts in the switching power supply system and making it difficult to accurately implement current sampling resistor short-circuit protection.

[0080] To address this issue, this invention provides a protocol circuit. After the voltage at the transformer's opposite-name terminal crosses zero upwards, based on the transformer's operating state, the current load mode of the switching power supply system is first determined. Then, based on the load identification signal, an output is given indicating whether to trigger the current sampling resistor short-circuit protection. When the load identification signal indicates that the current load mode of the switching power supply system is a heavy load mode, the current sampling resistor short-circuit protection identification signal is triggered; otherwise, it is not triggered. Thus, the current sampling resistor short-circuit protection is only triggered under heavy load mode, thereby reducing false short-circuit protection under light load mode, avoiding unnecessary power-off restarts of the switching power supply system, and ultimately achieving accurate current sampling resistor short-circuit protection.

[0081] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0082] In switching power supply systems, the switching state of the power supply is controlled by sampling the current through a secondary-side current sampling resistor. However, a short circuit in the secondary-side current sampling resistor can easily damage the power supply. To prevent damage to the power supply caused by a short circuit in the secondary-side current sampling resistor, this invention provides a short-circuit protection circuit for the current sampling resistor.

[0083] To facilitate understanding and implementation of the current sampling resistor short-circuit protection circuit, the switching power supply system involved in the current sampling resistor short-circuit protection circuit will be described first.

[0084] This invention provides a switching power supply system, which may include:

[0085] transformer;

[0086] The protocol chip is connected to the transformer;

[0087] An interface circuit is connected to the protocol chip;

[0088] The protocol chip is adapted to convert the input voltage of the transformer secondary coil into a voltage compatible with the interface circuit and control the charging current.

[0089] In practical implementation, the protocol chip refers to a protocol chip that is compatible with multiple protocols to adapt to specific interface types, and has a wide and considerable application market in power adapters and car chargers. The protocol can be a fast charging protocol or other protocols. Various fast charging protocols exist on the market, such as USB Power Delivery (PD), Quick Charge (QC) protocol, and MediaTek's Pump Express protocol.

[0090] In practical implementation, the interface circuit can be a USB interface circuit, specifically a Type-C interface circuit, or a Type-A or Type-B interface circuit; no limitation is made here. Among them, the Type-C interface circuit has the characteristics of low heat generation and reversible insertion, resulting in a better user experience.

[0091] The mains power is connected through a transformer. The protocol chip can convert the input voltage of the transformer's secondary coil into a voltage that is compatible with the interface circuit, and output it to the device to be charged through the interface circuit, as well as control the charging current to improve the charging efficiency of the device to be charged.

[0092] It should be noted that, in Figure 1 In this circuit, the DRAIN terminal voltage is connected to the drain of the synchronous rectifier switch Q2. The synchronous rectifier circuit U2 can be one of many secondary-side rectification methods. It is understood that the secondary-side rectifier circuit includes, but is not limited to, synchronous rectification methods, and other rectifier circuit structures are also feasible.

[0093] It should be noted that, Figure 1 The switching power supply system shown is only a schematic diagram. In actual applications, the circuit structure may be different, as long as it includes a transformer, protocol chip, and interface circuit.

[0094] It should be noted that, Figure 1 In the switching power supply system shown, the protocol chip U3 is only a schematic diagram. In actual applications, the specific number of pins may vary.

[0095] In a specific implementation, a current sampling resistor short-circuit protection circuit U3-1 can be integrated on a certain pin of the protocol chip U3, such as the drain pin. The input voltage at the drain pin is the DRAIN pin voltage in the switching power supply system. Understandably, different protocol chips define the withstand voltage of the drain pin differently; therefore, the drain pin voltage can also be a voltage divider of the system's DRAIN pin voltage.

[0096] In practical implementation, the current sampling resistor short-circuit protection circuit U3-1 can also be integrated into other pins of the protocol chip U3, as long as that pin can reflect the primary side voltage information. There is no limitation on which pin of the protocol chip the current sampling resistor short-circuit protection circuit U3-1 is specifically integrated into.

[0097] Since switching power supply systems typically include the protocol chip U3, but not necessarily the synchronous rectification control circuit U2, integrating the current sampling resistor short-circuit protection circuit U3-1 into the protocol chip simplifies the peripheral system of the switching power supply. This allows for precise short-circuit protection of the current sampling resistor while maintaining a streamlined peripheral system, resulting in wider applicability and broader application range.

[0098] In specific implementations, the protocol chip U3 can also be configured with a controller MCU, which can include a sampling resistor short-circuit detection module 11 and a control module 12. The sampling resistor short-circuit detection module 11 can detect the current on the secondary-side current sampling resistor Rsense and determine whether Rsense is short-circuited based on the current magnitude. When Rsense is short-circuited, the current sampling resistor short-circuit protection circuit U3-1 determines whether to trigger the short-circuit protection and outputs an indicator signal indicating whether the short-circuit protection has been triggered to the control module 12. The control module 12 then performs the corresponding operation based on the indicator signal (hereinafter referred to as the LPS protection signal).

[0099] In practical implementation, when the current sampling resistor short-circuit protection circuit U3-1 determines that current sampling resistor short-circuit protection is required, it will send an LPS protection signal to the control module 12 of the controller MCU. The control module 12 issues a command to pull up or pull down the voltage of the OPTO pin, thereby controlling the secondary-side optocoupler U4A. The secondary-side optocoupler U4A is coupled to the primary-side optocoupler U4B, and the switching control ground circuit U1 controls the on / off state of the power switch Q1, thereby adjusting the operating frequency and energy of the switching power supply system, thus regulating the energy supply on the primary side and adjusting the energy on the secondary side, thereby achieving power limiting power supply protection. At the same time, when the LPS protection signal is detected, the control module 12 of the protocol chip U3 will send a command to the power module of the protocol chip to control the power module, so that the power discharge is pulled low to ensure that the chip is not damaged.

[0100] Understandably, the current sampling resistor short-circuit protection action performed by the control module 12 is not limited to the few described in this invention patent. The specific protection action can be determined in combination with the specific application chip and the functions integrated by the chip, but it must have the function of limiting power supply protection for the circuit, chip and system under the condition of short circuit of sampling resistor.

[0101] This invention provides a short-circuit protection circuit for a current sampling resistor, as described in the following embodiment. Figure 2 The current sampling resistor short-circuit protection circuit may include: a zero-crossing detection circuit 21, a load mode determination circuit 22, and a logic protection circuit 23. Wherein:

[0102] The zero-crossing detection circuit 21 is adapted to detect the voltage at the opposite terminal (e.g., the drain terminal) of the transformer when the secondary side current sampling resistor Rsense is short-circuited, determine whether the voltage at the opposite terminal of the transformer has crossed zero upwards, and output the detection result signal.

[0103] The load mode determination circuit 22 is connected to the zero-crossing detection circuit 21 and is adapted to determine the current load mode of the switching power supply system based on the operating state of the transformer after the voltage at the opposite end of the transformer crosses zero upwards, and output a load identification signal.

[0104] The logic protection circuit 23 is connected to the load mode determination circuit 22 and is adapted to output an identification signal as to whether to trigger the current sampling resistor short-circuit protection based on the load identification signal.

[0105] When the load identification signal indicates that the current load mode of the switching power supply system is heavy load mode, the logic protection circuit outputs an identification signal that triggers the short-circuit protection of the current sampling resistor; when the load identification signal indicates that the current load mode of the switching power supply system is light load mode, the logic protection circuit outputs an identification signal that does not trigger the short-circuit protection of the current sampling resistor.

[0106] The decision to trigger the current sampling resistor short-circuit protection based on the current load mode of the switching power supply system avoids false short-circuit protection under light load conditions, making the current sampling resistor short-circuit protection more accurate and reducing unnecessary power-down restarts of the switching power supply system. Furthermore, since the constant current loop in the protocol chip is used to maintain a constant current, an open current loop indicates that the switching power supply system is in a heavy load mode. Therefore, triggering the current sampling resistor short-circuit protection under heavy load mode can prevent excessive output power when the constant current loop is open.

[0107] In specific implementation, refer to Figure 2 The zero-crossing detection circuit 21 mainly includes a first comparison circuit 211. The first input terminal of the first comparison circuit 211 is connected to the transformer's opposite-name terminal (e.g., the drain terminal), and the second input terminal is connected to the transformer's same-name terminal. It is adapted to compare the voltage Vdrain at the transformer's opposite-name terminal and the voltage VCC at the transformer's same-name terminal to obtain a voltage comparison result signal. The load mode determination circuit 22 can determine the load mode based on the voltage comparison result signal after the voltage at the transformer's opposite-name terminal has crossed zero upwards, thereby allowing the logic protection circuit to determine whether to trigger the current sampling resistor short-circuit protection.

[0108] In specific implementations, in addition to the first comparison circuit 211, the zero-crossing detection circuit 21 may also include other circuits, which are not limited here.

[0109] In one embodiment of the present invention, reference is made to... Figure 3 The zero-crossing detection circuit 21 may include: a first comparison circuit cmp1, a blanking circuit BT1, a first delay circuit delay1, and a first NAND gate circuit Y1. Wherein:

[0110] The first comparison circuit cmp1 has a first input terminal connected to the opposite-name terminal of the transformer and a second input terminal connected to the same-name terminal of the transformer. It is adapted to compare the voltage Vdrain at the opposite-name terminal of the transformer and the voltage VCC at the same-name terminal of the transformer to obtain a voltage comparison result signal.

[0111] The blanking circuit BT1 is connected to the output terminal of the first comparison circuit cmp1 and is adapted to perform a blanking operation on the voltage comparison result signal.

[0112] The first delay circuit delay1 is connected to the blanking circuit BT1 and is adapted to delay the blanked voltage comparison result signal up.

[0113] The first NAND gate circuit Y1 is connected to the output terminal of the first comparator circuit cmp1 and the output terminal of the first delay circuit delay1, and the output terminal outputs the detection result signal up_ps.

[0114] In specific implementation, the first comparison circuit cmp1 compares the voltage Vdrain at the opposite end of the transformer with the voltage VCC at the same end of the transformer to determine whether the voltage Vdrain at the opposite end of the transformer has crossed zero upwards, thus obtaining a voltage comparison result signal. The output signal of the first comparison circuit cmp1 is shielded by the blanking circuit BT1 and outputs a square wave up signal. After being processed by a delay circuit, the square wave up signal, along with the up signal, serves as the input to the first NAND gate Y1, ultimately generating the up_ps signal. The blanking and delaying of the voltage comparison result signal filters the signal, removing short pulse signals and preventing false detections. Performing a AND operation between the square wave up signal and the delayed square wave up signal generates a valley indicator signal.

[0115] Understandably, in the zero-crossing detection circuit 21, the shielding blanking time of the blanking circuit BT1 and the signal delay time of the first delay circuit delay1 can be designed according to the circuit requirements, and there are no restrictions here.

[0116] In specific implementations, the load mode determination circuit can have various structures, and no restrictions are imposed here.

[0117] In one embodiment of the present invention, reference is made to... Figure 2The load mode determination circuit 22 includes: a shielding duration counting sub-circuit 221 and a load mode identification sub-circuit 222. Wherein:

[0118] The shielding duration counting sub-circuit 221 is connected to the zero-crossing detection circuit 21. It is adapted to determine whether the preset shielding duration has been reached after the voltage at the opposite end of the transformer crosses zero upwards, and output the transformer operating status signal TBK after the preset shielding duration has been reached. The transformer operating status signal TBK is used to represent the conduction time and demagnetization time of the transformer.

[0119] The load mode identification sub-circuit 222 is connected to the shielding duration counting sub-circuit 221 and is adapted to determine the current load mode of the switching power supply system based on the transformer operating status signal TBK and output a load identification signal.

[0120] By detecting the transformer's conduction and demagnetization times to determine the load mode, the load mode determination circuit 22 can be applied to a wider range of systems. Single conduction time detection or time detection is prone to false detection of load mode.

[0121] In practical implementation, the detection result signal output by the zero-crossing detection circuit 21 can be used as the enable control signal for the shielding duration counting sub-circuit 221. The output of the shielding duration counting sub-circuit 221 is used as the input for the load mode recognition sub-circuit 222. After processing by the load mode recognition sub-circuit 222, a load identification signal is output. The logic protection circuit 23 determines whether to trigger the current sampling resistor short-circuit protection based on the identified load identification signal and outputs a corresponding identification signal to the MCU. When the logic protection circuit 23 determines that the current sampling resistor needs to be protected against a short circuit, the MCU's control module will issue a command to perform a protection action on the chip, such as powering down and restarting the chip, or the optocoupler control unit pulling up or down the optocoupler.

[0122] In specific implementation, the transformer operating status signal TBK is used to represent the transformer's conduction time and demagnetization time. Specifically, when the primary side power switch Q1 (e.g., Figure 1 When the transformer (as shown) is turned on, it is in the conducting state, and correspondingly, the transformer operating status signal TBK is at a high level. When the primary-side power switch Q1 is turned off, the transformer is in the demagnetizing state, and correspondingly, the transformer operating status signal TBK is at a low level. During transformer demagnetization, the signal at the transformer's opposite terminals is a resonant signal. Based on the transformer operating status signal TBK, the current load mode of the switching power supply system is determined.

[0123] In specific implementations, the shielding duration counting sub-circuit 221 can have various structures, which are not limited here.

[0124] In one embodiment of the present invention, reference is made to... Figure 3 The shielding duration counting sub-circuit 221 may include a first counter 221a and a second counter 221b. The first counter 221a and the second counter 221b may be D flip-flops. Specifically:

[0125] The enable terminal of the first counter 221a is connected to the detection result signal up_ps, meaning that the detection result signal up_ps serves as the enable signal. Therefore, it can start operating after the voltage at the transformer's opposite-side terminal crosses zero upwards. The data terminal of the first counter 221a is connected to a high-level VINT signal, and the control terminal is connected to the blanked voltage comparison result signal up. Therefore, it can output under the control of the blanked voltage comparison result signal up. The VINT signal is the internal power supply signal of the circuit; it is a fixed power supply voltage signal generated after the variable input voltage VCC passes through the power supply module, used to power the internal modules of the protocol chip U3.

[0126] The first output terminal of the first counter 221a is connected to the enable terminal of the second counter 221b, meaning the output of the first counter 221a is used as the enable signal. The control terminal of the second counter 221b is connected to the first clock signal clk1. The data terminal of the second counter 221b is connected to the first output terminal. The second output terminal of the second counter 221b outputs the transformer operating status signal TBK.

[0127] A shielding duration counting subcircuit 221 is constructed using a first counter 221a and a second counter 221b. This subcircuit can count the shielding duration each time the transformer is turned on. After the preset shielding duration is reached, the transformer operating status signal TBK flips to a high level. After the transformer is demagnetized, the transformer operating status signal TBK flips from a high level to a low level. Thus, once the transformer operating status signal TBK is detected to flip to a low level, the load mode recognition subcircuit 222 begins load mode recognition.

[0128] It should be noted that, in specific implementations, the shielding duration counting sub-circuit 221 is not limited to... Figure 3 The structure shown can be customized according to circuit requirements, with different numbers of D flip-flops and combinational logic to achieve counting for a preset shielding duration.

[0129] In specific implementations, the load pattern recognition sub-circuit 222 can use various methods to achieve load pattern recognition, and no restrictions are imposed here.

[0130] In one embodiment of the present invention, reference is made to... Figure 3 The load pattern recognition sub-circuit may include:

[0131] The valley count detection module 2221 is adapted to count the number of valleys of the transformer's opposite-terminal resonant signal based on the transformer's operating status signal during the transformer's demagnetization time. If the number of valleys continuously reaches the preset number of valleys, a load identification signal representing a light load mode is output; otherwise, a load identification signal representing a heavy load mode is output.

[0132] In practice, during transformer demagnetization, the signal at the transformer's opposite-terminal terminals is a resonant signal. The duration of this resonant signal oscillation is affected by the load of the switching power supply system. Therefore, by detecting the number of valleys in the resonant signal, the load of the switching power supply system can be determined. Thus, the number of valleys in the resonant signal at the transformer's opposite-terminal terminals can be counted to determine if the number of valleys continuously reaches a preset number. If it does, it indicates that the load of the switching power supply system is light; otherwise, it is heavy.

[0133] Light and heavy loads can be determined by detecting the output current of the switching power supply system. A low output current indicates a light load, while a high output current indicates a heavy load. Generally, an output current below 3A indicates a light load, and an output current exceeding 3A indicates a heavy load. However, the definitions of light and heavy loads differ for different switching power supply systems, and the critical value for the output current is not necessarily 3A. This critical value can be adjusted based on the specific structure of the switching power supply system.

[0134] In specific implementations, the valley bottom number detection module 2221 can have various structures, and no restrictions are imposed here.

[0135] In one embodiment of the present invention, reference is made to... Figure 3 The valley bottom number detection module 2221 includes: a first inverter 2221a, a first NOR gate circuit 2221b and a third counter 2221c;

[0136] The first inverter 2221a has its input terminal connected to the short-circuit flag signal cs_short of the secondary side current sampling resistor Rsense, and its output terminal connected to the first input terminal of the first NOR gate circuit 2221b.

[0137] The first NOR gate circuit 2221b has its second input terminal connected to the shielding duration counting sub-circuit 221, and its output terminal connected to the enable terminal of the third counter 2221c.

[0138] The control terminal of the third counter 2221c is connected to the output terminal of the zero-crossing detection circuit 21, and the output terminal is connected to the logic protection circuit 23.

[0139] In practical implementation, the transformer operating status signal TBK and the short-circuit flag signal cs_short of the current sampling resistor are processed by logic to generate the reset signal reset for the third counter 2221c, which serves as the enable input for the third counter 2221c. The third counter 2221c is used to detect the number of valleys, and its clock input is the detection result signal up_ps. The third counter 2221c detects the output signal of the first NOR gate circuit 2221b to identify the number of valleys, thereby determining the load mode. When the number of consecutive valleys of the resonant signal reaches the preset number of valleys, the third counter 2221c outputs a load flag signal representing the light load mode. When the number of consecutive valleys of the resonant signal does not reach the preset number of valleys, the third counter 2221c outputs a load flag signal representing the light load mode.

[0140] Accordingly, the logic protection circuit 23 is adapted to perform timing when the valley number detection module outputs a load identification signal representing a light load mode and the secondary side current sampling resistor of the transformer is short-circuited, and to trigger the current sampling resistor protection after a first preset time period is reached.

[0141] In one embodiment of the present invention, reference is made to... Figure 3 The logic protection circuit 23 may include: a second inverter 231, a first AND gate circuit 232, a fourth counter 233, and a first RS flip-flop 234, wherein:

[0142] The second inverter 231 has an input terminal adapted to receive the load identification signal load, and its output terminal connected to the first input terminal of the first AND gate circuit 232;

[0143] The first AND gate circuit 232 has its second input terminal connected to the short-circuit flag signal cs_short of the secondary side current sampling resistor Rsense;

[0144] The fourth counter 233 has a control terminal connected to the second clock signal clk2, an enable terminal connected to the output terminal of the first AND gate circuit 232, and an output terminal connected to the setting terminal of the first RS flip-flop 234.

[0145] The first RS flip-flop 234 has its reset terminal connected to the output terminal of the first inverter 2221a, its enable terminal connected to the load identification signal, and its output terminal outputting the identification signal LPS indicating whether the current sampling resistor short-circuit protection is triggered.

[0146] In practical implementation, the fourth counter 233 can be a D flip-flop. When the switching power supply system is in a non-light load mode and the current sampling resistor Rsense is short-circuited, the fourth counter 233 starts timing. After reaching the first preset duration, it triggers the current sampling resistor short-circuit protection. That is, the current sampling resistor short-circuit protection is only triggered after the switching power supply system has been in a heavy load mode for a period of time, avoiding false protection. Combined with... Figure 3 The inverted signal of the load indicator signal load and the short-circuit indicator signal cs_short of the current sampling resistor are output through the first AND gate circuit 232 and used as the enable input of the fourth counter 233. That is, the logic protection circuit 23 only starts to work when the system is detected to be in non-light load mode and the current sampling resistor is short-circuited.

[0147] The clock input of the fourth counter 233 is the second clock signal clk2. The second clock signal clk2 and the first clock signal clk1 can be clock signals of the same frequency or clock signals of different frequencies, which can be determined according to the actual circuit.

[0148] After the first preset time is reached, the output signal "heavy time" from the fourth counter 233 serves as the input to the first RS flip-flop 234 with reset function. The load indicator signal "load" serves as the reset signal. When the load indicator signal "load" is high, the indicator signal "LPS" for the current sampling resistor short-circuit protection is cleared, thus disabling the short-circuit protection function. If the current sampling resistor short-circuit signal "cs_short" is 0, the indicator signal "LPS" for the current sampling resistor short-circuit protection is also cleared. The indicator signal "LPS" for the current sampling resistor short-circuit protection is used to indicate whether the switching power supply system triggers LPS protection. When the load indicator signal "load" is low, it indicates that the switching power supply system is in non-light load mode. The current sampling resistor is short-circuited, and after the fourth counter 233 counts for a certain time, it will output the LPS signal to the MCU, triggering LPS protection.

[0149] In practical implementation, different numbers of D flip-flops and combinational logic can be selected according to circuit requirements to achieve timing functions, and are not limited to the above embodiments.

[0150] Figure 4 The following waveform diagram is provided for identifying load patterns by detecting the number of valleys in an embodiment of the present invention. Combined with... Figure 3 and Figure 4 The waveform diagram further illustrates the function of the current sampling resistor short-circuit protection circuit by identifying the valley number.

[0151] Reference Figure 3 and Figure 4The waveform at the drain terminal of the Vdrain protocol chip, and the voltage comparison result signal up, are the output waveforms of the zero-crossing detection circuit 21. When the Vdrain voltage is greater than the VCC voltage, the voltage comparison result signal up outputs high; otherwise, it is low. The detection result signal up_ps toggles low on the rising edge of the voltage comparison result signal up. Figure 4 In this context, the load signal is a load mode indicator signal based on the number of detected valleys. When m valleys are detected, the load mode indicator signal flips high, indicating that the switching power supply system is in light load mode. Figure 4 In this study, it is assumed that when the 5th valley is detected (m=5), the switching power supply system is under light load. However, the value of m is not fixed at 5 and can be adjusted according to the circuit requirements.

[0152] By detecting the number of valleys in the resonant signal, the load mode can be distinguished, thereby achieving precise protection.

[0153] Figure 5 This is a waveform diagram of each signal during load mode switching of the switching power supply system in an embodiment of the present invention. (Refer to...) Figure 5 The waveforms at the drain terminal of the Vdrain protocol chip are shown. `cs_short` is the short-circuit indicator signal for the current sampling resistor; a high `cs_short` indicates a short circuit in the current sampling resistor. The `load` signal is the load mode indicator signal based on the number of detected valleys. A `load` signal of 1 indicates that the switching power supply system is in light-load mode. The `heavy_time` signal is the output signal of the fourth counter when the switching power supply system's current sampling resistor is short-circuited and it is under heavy load. A high `heavy_time` signal indicates that the system's current sampling resistor is short-circuited and the system maintains a heavy-load state for a certain period.

[0154] At time t1, the current sampling resistor short-circuit flag signal cs_short flips to high, indicating that the current sampling resistor in the switching power supply system is short-circuited.

[0155] During the time period t1 to t2, the switching power supply system is in light load mode, and the sampling resistor short-circuit protection will not be triggered at this time.

[0156] At time t2, the waveform at the drain terminal of the switching power supply system changes.

[0157] During the time period t2 to t3, the switching power supply system is under heavy load, and the current sampling resistor is short-circuited. At this time, the fourth counter starts working, and at time t3, after reaching the first preset duration, the heavy_time signal flips high, triggering the sampling resistor short-circuit protection. That is, at time t3, the LPS signal flips high. Therefore, the solution of this invention triggers the sampling current resistor short-circuit protection only after the current sampling resistor is short-circuited and the system has been in a non-light load mode for a certain period. All three conditions are indispensable, better preventing false detection.

[0158] In this embodiment of the invention, when the current sampling resistor is short-circuited, the load state is identified by detecting the waveform at the drain terminal. Only after the system is not in a light-load mode and this condition is maintained for a certain period of time is LPS protection applied to the chip and the system. This prevents excessive current caused by the short circuit in the current sampling resistor from damaging the chip.

[0159] In another embodiment of the invention, reference is made to Figure 6 The load pattern recognition sub-circuit may include:

[0160] The switching frequency detection module 2222 is adapted to detect the frequency of the transformer operating status signal. If the frequency of the transformer operating status signal reaches a preset frequency value within a second preset time period, it outputs a load identification signal representing a heavy load mode; otherwise, it outputs a load identification signal representing a light load mode.

[0161] Similar to the method of identifying load patterns by counting valleys, both require detecting the transformer operating status signal TBK, which characterizes the transformer's conduction and demagnetization times. However, the methods for load pattern identification and the protection logic differ. In this embodiment, the load status is determined by frequency detection of the transformer operating status signal TBK.

[0162] Specifically, under the condition of a short circuit in the current sampling resistor, after a preset shielding time, the switching frequency of the transformer operating status signal TBK is detected, and the number of pulse width modulation (PWM) counts is accumulated within a fixed time to detect the switching frequency of the switching power supply system, identify the load mode, and thus trigger the short circuit protection of the current sampling resistor. When the secondary-side current sampling resistor is short-circuited, if the load identification mode detects that the switching power supply system is under heavy load, and the count reaches the preset frequency value within the second preset time, the sampling resistor short circuit protection is triggered. The MCU control module issues a command to perform protection actions on the chip. This prevents excessive current in the circuit from damaging the circuit and chip due to the short circuit of the current sampling resistor, thus achieving power limiting protection for the chip and the system.

[0163] In one embodiment of the present invention, reference is made to... Figure 6 The switching frequency detection module 2222 includes: an enable signal generation submodule 2222a and a fifth counter 2222b; wherein:

[0164] The enable signal generation submodule 2222a is adapted to generate a switching frequency counting signal EN to the enable terminal of the fifth counter 2222b based on the third clock signal clk3.

[0165] The fifth counter 2222b is connected to the enable signal generation submodule 2222a. It uses the switching frequency counting signal EN as the enable signal to count the frequency of the transformer operating status signal TBK. If the frequency of the transformer operating status signal reaches a preset frequency value within a second preset time period, it outputs a load identification signal representing the heavy load mode; otherwise, it outputs a load identification signal representing the light load mode.

[0166] The fifth counter 2222b outputs a load identification signal only when the frequency of the transformer operating status signal reaches the preset frequency value within the second preset time period. That is, the protection is triggered only after the switching power supply system has been running for a period of time, which can effectively avoid false protection.

[0167] In specific implementations, the enable signal generation submodule 2222a may have various structures, which are not limited here.

[0168] In one embodiment of the present invention, the enable signal generation submodule 2222a may include: a second delay circuit delay2, a third inverter 61, and a second NAND gate circuit 62. The input terminal of the second delay circuit delay2 is connected to a third clock signal clk3. The output terminal of the second delay circuit delay2 is connected to the input terminal of the third inverter 61. The output terminal of the third inverter 61 is connected to the first input terminal of the second NAND gate circuit 62, and the second input terminal of the second NAND gate circuit 62 is connected to the third clock signal.

[0169] When the switching frequency counting signal EN is high, the fifth counter 2222b starts working; otherwise, the fifth counter 2222b does not count the frequency of the transformer operating status signal TBK. That is, when the switching frequency counting signal EN is high, the frequency of the transformer operating status signal TBK is counted; when the switching frequency counting signal EN is low, the count of the frequency of the transformer operating status signal TBK is reset to zero, thus realizing the detection of the switching frequency within a fixed period.

[0170] Accordingly, refer to Figure 6 The logic protection circuit 23 includes: a second RS flip-flop 235, wherein: the reset terminal of the second RS flip-flop 235 is connected to the inverted signal cs_unshort of the identification signal of the short circuit of the secondary side current sampling resistor, the setting terminal is connected to the output terminal of the fifth counter 2222b, and the output terminal outputs the identification signal LPS of whether the short circuit protection of the current sampling resistor is triggered.

[0171] Compared to identifying load patterns by counting valleys, the core of both circuits is a counter, but... Figure 6 The solution is better than Figure 3The proposed solution includes an additional enable signal generation submodule 2222a. Under the control of the enable signal, the fifth counter 2222b outputs a load identification signal. The second RS flip-flop 235 determines whether to trigger the sampling resistor short-circuit protection of the circuit based on the load identification signal.

[0172] Figure 7 This is a schematic diagram of the signal waveforms for short-circuit protection of the current sampling resistor achieved by switching frequency detection in an embodiment of the present invention.

[0173] At time t0, the current sampling resistor short-circuit indicator signal cs_short flips to high, indicating that the current sampling resistor is short-circuited at time t0.

[0174] At time t1, the preset shielding duration is detected. After time Tbk, the transformer operating status signal TBK flips to high.

[0175] The switching frequency counting signal EN is the enable signal for the fifth counter, and its high level duration is T1. During the T1 time period, the number of times the transformer operating status signal TBK flips is detected, that is, the detection of the number of switching times within the second preset time period, which can be understood as frequency detection.

[0176] After time T1, the switching frequency count signal EN will toggle low, and the low level will be maintained for T2. T1 and T2 constitute a complete cycle, meaning that the switching frequency is detected within time T1. If a preset number of n PWM signals are detected within time T1, the LPS signal will toggle high. If the preset number of toggles is not reached within time T1, the LPS signal will remain in the previous state.

[0177] The frequency result detected in time T1 is reset to zero within time T2, and frequency detection continues in the next time T1. For example... Figure 7 As shown, the switching frequency of the TBK signal is detected during the T1 time period when the EN signal is high.

[0178] At time t2, the cumulative count of TBK flips reaches n, and LPS flips to high.

[0179] At time t3, the short-circuit protection signal of the current sampling resistor flips to low, indicating that the system current sampling resistor is not short-circuited. At this time, LPS flips to low, indicating that the system exits LPS protection.

[0180] In this embodiment, the switching frequency of the system is detected within a fixed time period to determine the system's load status. When the current sampling resistor is short-circuited, the TBK signal will flip a preset number n within a fixed time period, triggering LPS protection. Once it is detected that the current sampling resistor is not short-circuited, LPS protection will be deactivated.

[0181] and Figure 3The same as the embodiments shown herein is that when referring to Figure 1 When the current sampling resistor protection unit detects the need to trigger LPS protection, it sends the LPS signal to the MCU's control module. The control module then controls the power supply module to discharge the power to the protocol chip U3, protecting U3. Simultaneously, the optocoupler control module pulls up or down the secondary-side optocoupler U4A, while the primary-side optocoupler U4B is coupled to the secondary-side coupling U4A. The switching control circuit then controls the power switch Q1, thereby adjusting the system operating frequency and primary-side energy. This achieves precise short-circuit protection for the current sampling resistor and power-limiting protection by adjusting the primary-side energy supply.

[0182] It should be noted that the above embodiments are described using the example of the current sampling resistor protection circuit being integrated into the drain terminal of the protocol chip. Besides the drain terminal, the current sampling resistor protection circuit can also be integrated into other terminals, as long as that terminal can reflect changes in the input voltage. Regardless of where the current sampling resistor protection circuit is integrated into the protocol chip, it is within the scope of protection of this invention.

[0183] As can be seen from the above, the short-circuit protection circuit for the current sampling resistor in this embodiment of the invention can achieve accurate protection of the current sampling resistor without increasing the complexity of the peripheral system, thereby achieving power limiting protection for the system and the chip.

[0184] To enable those skilled in the art to better understand and implement the present invention, the apparatus, testing system, electronic device, and computer-readable storage medium corresponding to the above method are described in detail below.

[0185] Reference Figure 8 This invention also provides a method for short-circuit protection of a current sampling resistor, the method comprising:

[0186] Step 81: When the secondary side current sampling resistor of the transformer is short-circuited, detect the voltage at the opposite terminal of the transformer, determine whether the voltage at the opposite terminal of the transformer has crossed zero upwards, and output the detection result signal.

[0187] Step 82: After the voltage at the opposite terminal of the transformer crosses zero upwards, the current load mode of the switching power supply system is determined based on the operating state of the transformer, and a load identification signal is generated.

[0188] In specific implementation, after the voltage at the opposite terminal of the transformer crosses zero upwards, based on the operating state of the transformer, the current load mode of the switching power supply system is determined, and a load identification signal is generated, including:

[0189] After the voltage at the opposite terminal of the transformer crosses zero upwards, it is determined whether the preset shielding time has been reached. After the preset shielding time has been reached, a transformer operating status signal is output. The transformer operating status signal is used to represent the conduction time and demagnetization time of the transformer.

[0190] Based on the transformer operating status signal, the current load mode of the switching power supply system is determined, and a load identification signal is generated.

[0191] In one embodiment of the present invention, based on the transformer operating status signal, the number of valleys of the transformer's opposite-terminal resonant signal can be counted during the transformer demagnetization time. If the number of valleys continuously reaches a preset number of valleys, a load identification signal representing a light load mode is generated; otherwise, a load identification signal representing a heavy load mode is generated.

[0192] In one embodiment of the present invention, the frequency of the transformer operating status signal can be detected. If the frequency of the transformer operating status signal reaches a preset frequency value within a preset time period, a load identification signal representing a heavy load mode is output; otherwise, a load identification signal representing a light load mode is output.

[0193] Step 83: Based on the load identification signal, determine whether to trigger the short-circuit protection of the current sampling resistor.

[0194] When the load identification signal indicates that the current load mode of the switching power supply system is light load mode, proceed to step 84; otherwise, proceed to step 85.

[0195] Step 84: Do not trigger the short-circuit protection of the current sampling resistor.

[0196] In practice, when the short-circuit protection of the trigger current sampling resistor is determined, the power switch on the primary side is controlled by an optocoupler, and the power supply of the protocol chip is pulled low.

[0197] Step 85: Trigger the short-circuit protection of the current sampling resistor.

[0198] This invention also provides a protocol chip, which integrates the current sampling resistor protection circuit of any of the above embodiments.

[0199] In practice, the protocol chip can be applied to any type of switching power supply system.

[0200] This invention also provides a switching power supply system, which can be referred to in detail below. Figure 1 However, it is not limited to Figure 1 The structure shown in the figure.

[0201] This invention also provides a charging device, which may include the aforementioned switching power supply system. The charging device includes, but is not limited to, a vehicle charger, a power adapter, etc. The charging device may have multiple USB ports, each of which can be connected to a device to be charged for charging.

[0202] While the present invention has been disclosed above, it is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of the invention; therefore, the scope of protection of the present invention should be determined by the scope defined in the claims.

Claims

1. A short-circuit protection circuit for a current sampling resistor, characterized in that, include: The zero-crossing detection circuit is suitable for detecting the voltage at the opposite terminal of the transformer when the secondary current sampling resistor of the transformer is short-circuited, determining whether the voltage at the opposite terminal of the transformer has crossed zero upwards, and outputting the detection result signal. A load mode determination circuit, connected to the zero-crossing detection circuit, is adapted to determine the current load mode of the switching power supply system based on the operating state of the transformer after the voltage at the opposite terminal of the transformer crosses zero upwards, and output a load identification signal. A logic protection circuit, connected to the load mode determination circuit, is adapted to output an identification signal indicating whether to trigger the current sampling resistor short-circuit protection based on the load identification signal. When the load identification signal indicates that the current load mode of the switching power supply system is heavy load mode, the logic protection circuit outputs an identification signal that triggers the short-circuit protection of the current sampling resistor; when the load identification signal indicates that the current load mode of the switching power supply system is light load mode, the logic protection circuit outputs an identification signal that does not trigger the short-circuit protection of the current sampling resistor.

2. The current sampling resistor short-circuit protection circuit as described in claim 1, characterized in that, The load mode determination circuit includes: A shielding duration counting sub-circuit, connected to the zero-crossing detection circuit, is adapted to determine whether a preset shielding duration has been reached after the voltage at the opposite end of the transformer crosses zero upwards, and outputs a transformer operating status signal after the preset shielding duration has been reached. The transformer operating status signal is used to represent the conduction time and demagnetization time of the transformer. The load mode identification sub-circuit, connected to the shielding duration counting sub-circuit, is adapted to determine the current load mode of the switching power supply system based on the transformer operating status signal and output a load identification signal.

3. The current sampling resistor short-circuit protection circuit as described in claim 2, characterized in that, The load pattern recognition sub-circuit includes: The valley count detection module is adapted to count the number of valleys of the transformer's opposite-terminal resonant signal based on the transformer's operating status signal during the transformer's demagnetization time. If the number of valleys continuously reaches the preset number of valleys, it outputs a load identification signal representing the light load mode; otherwise, it outputs a load identification signal representing the heavy load mode.

4. The current sampling resistor short-circuit protection circuit as described in claim 3, characterized in that, The valley bottom number detection module includes: a first inverter, a first NOR gate circuit and a third counter; The first inverter has its input terminal connected to the identification signal indicating that the secondary side current sampling resistor is short-circuited, and its output terminal connected to the first input terminal of the first NOR gate circuit. The first NOR gate circuit has its second input terminal connected to the output terminal of the shielding duration counting sub-circuit, and its output terminal connected to the enable terminal of the third counter. The control terminal of the third counter is connected to the output terminal of the zero-crossing detection circuit, and the output terminal is connected to the logic protection circuit.

5. The current sampling resistor short-circuit protection circuit as described in claim 4, characterized in that, The logic protection circuit is adapted to start timing when the valley number detection module outputs a load identification signal representing the heavy load mode and the secondary side current sampling resistor of the transformer is short-circuited, and to trigger the current sampling resistor short-circuit protection after a first preset time period is reached.

6. The current sampling resistor short-circuit protection circuit as described in claim 5, characterized in that, The logic protection circuit includes: a second inverter, a first AND gate, a fourth counter, and a first RS flip-flop, wherein: The second inverter has an input terminal adapted to receive the load identification signal representing the light load mode, and its output terminal connected to the first input terminal of the first AND gate circuit. The first AND gate circuit has its second input terminal connected to the short-circuit identification signal of the secondary side current sampling resistor; The fourth counter has a control terminal connected to a second clock signal, an enable terminal connected to the output terminal of the first AND gate circuit, and an output terminal connected to the setting terminal of the first RS flip-flop. The first RS flip-flop has its reset terminal connected to the output terminal of the first inverter, its enable terminal connected to the load identification signal, and its output terminal outputting an identification signal indicating whether the current sampling resistor short-circuit protection has been triggered.

7. The current sampling resistor short-circuit protection circuit as described in claim 2, characterized in that, The load pattern recognition sub-circuit includes: The switching frequency detection module is adapted to detect the frequency of the transformer operating status signal. If the frequency of the transformer operating status signal reaches a preset frequency value within a second preset time period, it outputs a load identification signal representing a heavy load mode; otherwise, it outputs a load identification signal representing a light load mode.

8. The current sampling resistor short-circuit protection circuit as described in claim 7, characterized in that, The switching frequency detection module includes: an enable signal generation submodule and a fifth counter; wherein: The enable signal generation submodule is adapted to generate a switching frequency counting signal to the enable terminal of the fifth counter based on the third clock signal; The fifth counter is connected to the enable signal generation submodule. It uses the switching frequency counting signal as the enable signal to count the frequency of the transformer operating status signal. If the frequency of the transformer operating status signal reaches a preset frequency value within a second preset time period, it outputs the load identification signal representing the heavy load mode; otherwise, it outputs the load identification signal representing the light load mode.

9. The current sampling resistor short-circuit protection circuit as described in claim 8, characterized in that, The logic protection circuit includes: a second RS flip-flop, wherein: The second RS flip-flop has its reset terminal connected to the inverted signal of the short-circuit flag signal of the secondary side current sampling resistor, its setting terminal connected to the output terminal of the fifth counter, and its output terminal outputting the flag signal indicating whether the short-circuit protection of the current sampling resistor is triggered.

10. The current sampling resistor short-circuit protection circuit as described in claim 1, characterized in that, The zero-crossing detection circuit includes: The first comparison circuit has a first input terminal connected to the opposite-named terminal of the transformer and a second input terminal connected to the same-named terminal of the transformer. It is adapted to compare the voltage at the opposite-named terminal of the transformer and the voltage at the same-named terminal of the transformer to obtain a voltage comparison result signal. A blanking circuit, connected to the output of the first comparison circuit, is adapted to perform a blanking operation on the voltage comparison result signal; The first delay circuit, connected to the blanking circuit, is adapted to delay the blanked voltage comparison result signal. The first NAND gate is connected to the output of the first comparator circuit and the output of the first delay circuit, and the output of the gate outputs the detection result signal.

11. A short-circuit protection method for a current sampling resistor, characterized in that, include: When the secondary current sampling resistor of the transformer is short-circuited, the voltage at the opposite terminal of the transformer is detected, it is determined whether the voltage at the opposite terminal of the transformer crosses zero upwards, and the detection result signal is output. After the voltage at the opposite terminal of the transformer crosses zero upwards, the current load mode of the switching power supply system is determined based on the operating state of the transformer, and a load identification signal is generated. Based on the load identification signal, determine whether to trigger the short-circuit protection of the current sampling resistor; When the load identification signal indicates that the current load mode of the switching power supply system is heavy load mode, the current sampling resistor short-circuit protection is triggered. When the load identification signal indicates that the current load mode of the switching power supply system is light load mode, it is determined that the current sampling resistor short-circuit protection will not be triggered.

12. The short-circuit protection method for current sampling resistor as described in claim 11, characterized in that, After the voltage at the opposite terminal of the transformer crosses zero upwards, based on the operating state of the transformer, the current load mode of the switching power supply system is determined, and a load identification signal is generated, including: After the voltage at the opposite terminal of the transformer crosses zero upwards, it is determined whether a preset shielding time has been reached. After the preset shielding time has been reached, a transformer operating status signal is output. The transformer operating status signal is used to indicate the conduction time and demagnetization time of the transformer. Based on the transformer operating status signal, the current load mode of the switching power supply system is determined, and a load identification signal is generated.

13. The current sampling resistor short-circuit protection method as described in claim 12, characterized in that, The step of determining the current load mode of the switching power supply system based on the transformer operating status signal and outputting a load identification signal includes: Based on the transformer operating status signal, during the transformer demagnetization time, the number of valleys of the transformer's opposite-terminal resonant signal is counted. If the number of valleys continuously reaches the preset number of valleys, a load identification signal representing a light load mode is output; otherwise, a load identification signal representing a heavy load mode is output.

14. The current sampling resistor short-circuit protection method as described in claim 12, characterized in that, The step of determining the current load mode of the switching power supply system based on the transformer operating status signal and outputting a load identification signal includes: The frequency of the transformer operating status signal is detected. If the frequency of the transformer operating status signal reaches a preset frequency value within a preset time period, a load identification signal representing the heavy load mode is output; otherwise, a load identification signal representing the light load mode is output.

15. The short-circuit protection method for current sampling resistor as described in claim 11, characterized in that, Also includes: When the short-circuit protection of the trigger current sampling resistor is detected, the power switch on the primary side is controlled by the optocoupler, and the power supply of the protocol chip is pulled low.

16. A protocol chip, characterized in that, The protocol chip integrates a current sampling resistor short-circuit protection circuit as described in any one of claims 1 to 9.

17. A switching power supply system, characterized in that, include: transformer; The protocol chip of claim 16 is connected to the transformer; An interface circuit is connected to the protocol chip. The protocol chip is adapted to convert the input voltage of the transformer secondary coil into a voltage compatible with the interface circuit and control the charging current.

18. A charging device, characterized in that, Includes the switching power supply system as described in claim 17.

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