An information processing method, apparatus and network device

Abstract

The application provides an information processing method, device and network equipment, and relates to the technical field of communication. The method performed by a first node comprises: obtaining a first transmission frame to be transmitted; wherein the first transmission frame comprises a destination identification code and a preset protocol destination address, and the destination identification code comprises a preset protocol interface identification code and a serial number identification code; in the case that the preset protocol interface identification code in the first transmission frame is consistent with the preset protocol interface identification code of a sending end, the first transmission frame is sent according to the buffer area state of a second node receiving the first transmission frame; and in the case that the preset protocol interface identification code in the first transmission frame is inconsistent with the preset protocol interface identification code of the sending end, the first transmission frame is sent to a target node corresponding to the serial number identification code. The technical scheme of the application can be applied to various underlying architectures by setting the preset protocol interface identification code and the serial number identification code in the first transmission frame, and the reliability of information communication is ensured.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to an information processing method, apparatus and network device. Background Technology

[0002] Currently, communication middleware is widely used in various distributed application systems. For example, message middleware plays a significant role in parallel signal processing systems employing multiple digital signal processor (DSP) arrays. The development of parallel signal processing systems primarily involves multiprocessor development and methods for allocating parallel tasks. In past multiprocessor development and debugging, problems such as tight hardware-software integration, simple supporting software functionality, insufficient system openness, and inflexible communication ultimately led to limited system functionality and performance, and increased development cycles and costs. To meet the networking and integration requirements of modern array signal processing systems, message middleware should be configured within the system. This middleware shields the details and heterogeneity of internal data networks and network protocols, separating complex low-level processing from specific engineering applications. By establishing information and control channels through simple interface functions, engineers can focus on application layer design and implementation, freeing them from the constraints of having to conduct in-depth research on the underlying hardware system.

[0003] In some large-scale distributed systems, there are multiple architectures and different models of processors. The mainstream operating systems are also different for different processors. Therefore, in order to reduce the development difficulty and increase the executability of business code, a general communication framework is developed for node management, thread management, and a unified communication interface that is compatible with the standard RapidIO standard protocol and supports inter-DSP core communication.

[0004] In summary, large-scale distributed systems typically have multiple architectures and different models of processors. The mainstream operating systems of different processors are also different, making it difficult to achieve unified communication. In other words, the underlying architecture of multi-core processors is not unified, making it difficult to simultaneously address the issues of reliability, real-time performance, and CPU processing power. Summary of the Invention

[0005] This application provides an information processing method, apparatus, and network device to solve the problem that existing information processing methods cannot achieve communication under multi-core processors with inconsistent underlying architectures.

[0006] To solve the above-mentioned technical problems, this application adopts the following technical solution:

[0007] This application embodiment provides an information processing method, executed by a first node, the method comprising:

[0008] Obtain the first transmission frame to be transmitted; wherein the first transmission frame includes a destination identification code and a preset protocol destination address, and the destination identification code includes a preset protocol interface identification code and a core number identification code;

[0009] If the preset protocol interface identification code in the first transmission frame is consistent with the preset protocol interface identification code of the sending end, the first transmission frame is sent according to the buffer status of the second node that receives the first transmission frame.

[0010] If the preset protocol interface identification code in the first transmission frame is inconsistent with the preset protocol interface identification code of the sending end, the first transmission frame is sent to the target node corresponding to the core number identification code.

[0011] Optionally, sending the first transmission frame according to the buffer state of the second node receiving the first transmission frame includes:

[0012] The buffer flag status of the second node receiving the first transmission frame is determined from the preset protocol destination address using the first transaction packet format.

[0013] The first transmission frame is sent according to the status of the buffer flag.

[0014] Optionally, sending the first transmission frame according to the state of the buffer flag bit includes:

[0015] If the buffer flag is in a data-receiving state, the first transmission frame is sent to the second node receiving the first transmission frame using the second transaction packet format, and the buffer flag of the second node is determined to be in a data-unreceiving state.

[0016] If the state of the buffer flag is unacceptable, then the state of the buffer flag is queried in a loop until the state of acceptable data is reached, and then the first transmission frame is sent.

[0017] Optionally, when the first node is the master node, the method further includes:

[0018] Initialize the slave nodes connected to the first node and assign a preset protocol interface identification code to each slave node;

[0019] Based on the preset protocol interface identification code and the type of processor corresponding to the slave node, cache flag bits are established for the first node and the slave node connected to the first node respectively.

[0020] Optionally, when the first node is a slave node, the method further includes:

[0021] Heartbeat data is periodically sent to the master node connected to the sending end.

[0022] This application embodiment also provides an information processing method, executed by a second node, the method comprising:

[0023] Receive a first transmission frame sent by a first node; wherein the first transmission frame includes a destination identification code and a preset protocol destination address, and the destination identification code includes a preset protocol interface identification code and a core number identification code;

[0024] Based on the core identification code in the first transmission frame, determine whether inter-core communication transmission is required for the first transmission frame.

[0025] Optionally, determining whether inter-core communication transmission of the first transmission frame is required includes:

[0026] If the core identification code of the first node is the first preset information, then it is determined to perform inter-core communication transmission;

[0027] If the core identification code of the first node is the second preset information, then the inter-process communication (IPC) interrupts the second node and parses the first transmission frame, and determines to perform inter-core communication transmission.

[0028] Optionally, the inter-core communication transmission includes:

[0029] The first transmission frame is copied to the target application layer via Direct Memory Access (DMA), and the buffer state of the second node is cleared.

[0030] Optionally, when the second node is the master node, the method further includes:

[0031] Periodically receive heartbeat data sent by the first node connected to the sending end;

[0032] If the received heartbeat data fails, the first node is determined to be in a fault state.

[0033] Optionally, when the second node is a slave node, after receiving the first transmission frame sent by the first node, the method further includes:

[0034] Determine whether the core number identification code of the first transmission frame is consistent with the core number identification code of the second node;

[0035] If they match, proceed to determine whether inter-core communication transmission of the first transmission frame is required; if they do not match, interrupt the second node via IPC and send the first transmission frame to the buffer of the target node corresponding to the first transmission frame.

[0036] This application embodiment also provides an information processing apparatus, the apparatus comprising:

[0037] The acquisition module is used to acquire a first transmission frame to be transmitted; wherein the first transmission frame includes a destination identification code and a preset protocol destination address, and the destination identification code includes a preset protocol interface identification code and a core number identification code;

[0038] The sending module is used to send the first transmission frame according to the buffer status of the second node receiving the first transmission frame, provided that the preset protocol interface identification code in the first transmission frame is consistent with the preset protocol interface identification code of the sending end.

[0039] The processing module is configured to send the first transmission frame to the target node corresponding to the core number identification code when the preset protocol interface identification code in the first transmission frame is inconsistent with the preset protocol interface identification code of the sending end.

[0040] This application embodiment also provides an information processing apparatus, the apparatus comprising:

[0041] The first receiving module is used to receive a first transmission frame sent by the first node; wherein the first transmission frame includes a destination identification code and a preset protocol destination address, and the destination identification code includes a preset protocol interface identification code and a core number identification code;

[0042] The first determining module is used to determine whether inter-core communication transmission is required for the first transmission frame based on the core identification code in the first transmission frame.

[0043] This application also provides a network device, including: a transceiver, a memory, a processor, and a program stored in the memory and executable on the processor, characterized in that...

[0044] The transceiver is used to receive a first transmission frame sent by a first node; wherein the first transmission frame includes a destination identification code and a preset protocol destination address, and the destination identification code includes a preset protocol interface identification code and a core number identification code;

[0045] When the processor executes the program, it performs the following steps:

[0046] Based on the core identification code in the first transmission frame, determine whether inter-core communication transmission is required for the first transmission frame.

[0047] This application also provides a readable storage medium storing a program thereon, which, when executed by a processor, implements the steps in the information processing method described above.

[0048] The beneficial effects of this application are:

[0049] In the above technical solution, the information processing method executed by the first node includes: acquiring a first transmission frame to be transmitted; wherein the first transmission frame includes a destination identification code and a preset protocol destination address, the destination identification code including a preset protocol interface identification code and a core number identification code; if the preset protocol interface identification code in the first transmission frame is consistent with the preset protocol interface identification code of the sending end, the first transmission frame is sent according to the buffer state of the second node receiving the first transmission frame; if the preset protocol interface identification code in the first transmission frame is inconsistent with the preset protocol interface identification code of the sending end, the first transmission frame is sent to the target node corresponding to the core number identification code. The technical solution of this application, through the preset protocol interface identification code and the core number identification code, is compatible with preset protocols of different processor frameworks, ensures hardware redundancy characteristics for the unified communication interface, and is beneficial for later driver expansion, enabling data communication with frameworks of more device types. Attached Figure Description

[0050] Figure 1 This is a schematic flowchart illustrating one of the information processing methods provided in an embodiment of this application;

[0051] Figure 2 This is a second flowchart illustrating the information processing method provided in an embodiment of this application;

[0052] Figure 3 This diagram illustrates the system framework of different processors provided in the embodiments of this application.

[0053] Figure 4 A schematic diagram illustrating the first transmission frame provided in an embodiment of this application;

[0054] Figure 5 This diagram illustrates one of the modules of the information processing apparatus provided in an embodiment of this application.

[0055] Figure 6 This is a second schematic diagram of the module of the information processing device provided in the embodiments of this application;

[0056] Figure 7 This is a block diagram illustrating the network device provided in the embodiments of this application. Detailed Implementation

[0057] To make the technical problems, technical solutions, and advantages of this application clearer, a detailed description will be provided below in conjunction with the accompanying drawings and specific embodiments. In the following description, specific details such as particular configurations and components are provided merely to aid in a comprehensive understanding of the embodiments of this application. Therefore, those skilled in the art should understand that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of this application. Furthermore, for clarity and brevity, descriptions of known functions and structures have been omitted.

[0058] It should be understood that the phrase "one embodiment" or "an embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment" or "in an embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments.

[0059] In the various embodiments of this application, it should be understood that the sequence number of each process described below does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0060] It's important to know that RapidIO is an interconnect communication technology primarily used in high-performance embedded systems. It employs a switched interconnect method for data transmission, meaning it doesn't use a traditional single-point-to-point connection but adds a switching mechanism, enhancing system flexibility. Serial RapidIO (SRIO) can use 1X, 4X, and other modes, with transmission rates reaching tens of gigabits. RapidIO technology has comprehensive considerations for routing, switching, and fault tolerance, and therefore is increasingly being applied to high-performance, reliable data transmission systems.

[0061] Most existing asymmetric multiprocessing (AMP) architecture processors are digital signal processor (DSP) chips. Existing symmetric multiprocessing (SMP) architecture processors integrate a RapidIO controller conforming to the RapidIO Interconnect Specification. The controller consists of RapidIO ports and a RapidIO message passing unit. Each SMP architecture processor integrates two RapidIO ports, each supporting 1x or 4x physical links, with a maximum supported rate of 3.125Gbps per link. The message passing unit supports two data message sending controllers, two data message receiving controllers, one doorbell message sending controller, one doorbell message receiving controller, and one port receiving controller.

[0062] Message-oriented middleware refers to middleware that supports and ensures synchronous / asynchronous data transmission and reception between distributed applications. The communication interface between distributed applications is provided by the middleware's API. Specifically, communication middleware is data communication middleware between processes or threads.

[0063] This application addresses the problem that existing information processing methods cannot achieve communication under multi-core processors with inconsistent underlying architectures, by providing an information processing method, apparatus, and network device.

[0064] like Figure 3 The diagram illustrates the system framework of different processors provided in this application embodiment. The processors in this system include various types, including Symmetric Multiprocessing (SMP) and Asymmetric Multiprocessing (AMP) architecture processors, each connected to a processing chip. To achieve advantages in computing speed, this application preferably uses the high-performance 8-core DSP TMS320C6678 for the AMP architecture processor and the P2020 model for the SMP architecture processor. The processors in this application's system framework can be homogeneous or heterogeneous, selected according to actual needs. The system framework provided in this application is applicable to the steps of the following information processing methods.

[0065] For example Figure 1 As shown, an optional embodiment of this application provides an information processing method, executed by a first node, the method comprising:

[0066] Step 100: Obtain the first transmission frame to be transmitted; wherein the first transmission frame includes a destination identifier (destination ID) and a preset protocol destination address (RapidIO destination address), and the destination identifier (destination ID) includes a preset protocol interface identifier (SRIO ID) and a core identifier (CORE ID);

[0067] Specifically, such as Figure 4 As shown, the first transmission frame consists of three parts: destination ID (4 bytes), RapidIO destination address (8 bytes), and data length (8 bytes); the meanings of each part are as follows:

[0068] Destination ID: The lower 16 bits consist of a unique SRIO ID for each device, and the higher 16 bits consist of the core number of the receiving end. When the receiving end is an SMP architecture processor, these 16 bits are 0 by default. When it is an AMP architecture processor, these 16 bits are the core number corresponding to the data to be received. Destination RaidIO Address: The destination RapidIO address of the corresponding sending node (or core) is parsed from the destination ID specified by the application layer, and the data is sent to the data buffer of the corresponding node (or core).

[0069] Data length to be sent: This refers to the length of data that the application layer needs to send.

[0070] In this embodiment, the first transmission frame can be applied to the POSIX interface for general task management based on the C language, facilitating compatibility with task management interfaces of other operating systems and improving the portability of the application. The first transmission frame can also be applied to the AMP multi-core architecture of the DSP, and is also compatible with inter-core communication (IPC) methods based on a queue manager (QMSS).

[0071] Step 200: If the preset protocol interface identification code (SRIO ID) in the first transmission frame is consistent with the preset protocol interface identification code of the sending end, the first transmission frame is sent according to the buffer status of the second node receiving the first transmission frame.

[0072] Here, if the SRIO ID in the first transmission frame matches the SRIO ID of the sending end, the current communication type can be considered to be SRIO communication. In the case of SRIO communication, the first transmission frame is sent.

[0073] Step 300: If the preset protocol interface identification code in the first transmission frame is inconsistent with the preset protocol interface identification code of the sending end, the first transmission frame is sent to the target node corresponding to the core number identification code.

[0074] Here, if the SRIO ID in the first transmission frame is inconsistent with the SRIO ID of the sending end, the current communication type can be considered to be a non-SRIO communication type. Sending the first transmission frame to the target node corresponding to the core number identification code can be understood as follows: the first node first puts the data to be sent into the transmission queue of the Queue Manager (QMSS), sends the data to the cache address corresponding to the core number in the first transmission frame through the QMSS, and then notifies the target node to receive the data through the inter-core interrupt of IPC. The target node that receives the inter-core interrupt takes the data from the received cache address.

[0075] Optionally, step 200 includes:

[0076] Step 210: Determine the buffer flag status of the second node receiving the first transmission frame from the RapidIO destination address using the first transaction packet format;

[0077] Step 220: Send the first transmission frame according to the status of the buffer flag bit.

[0078] It should be understood that, in order to reduce the number of messages and enable the processor to process multiple transactions in parallel, thereby improving the system's information processing efficiency, the concept of "transaction packaging" is introduced in the RapidIO destination address. "Transaction packaging" refers to merging multiple ready request metaclips or other transactions to be initiated at the RapidIO destination address into a single transaction request message, forming a transaction packet. The processor can process these transactions in the order they are received, or it can process them out of order.

[0079] In this embodiment, the buffer flag state of the second node receiving the first transmission frame is determined from the RapidIO destination address using the first transaction packet format (NREAD transaction packet format); the buffer flag state includes a data-receiveable state and a data-unreceiveable state.

[0080] Optionally, step 220 includes:

[0081] If the buffer flag is in a data-receiving state, the first transmission frame is sent to the second node receiving the first transmission frame using the second transaction packet format, and the buffer flag of the second node is determined to be in a data-unreceiving state.

[0082] If the state of the buffer flag is unacceptable, then the state of the buffer flag is queried in a loop until the state of acceptable data is reached, and then the first transmission frame is sent.

[0083] In this embodiment, if the status of the buffer flag is in the data-receiving state, the first transmission frame is sent to the second node receiving the first transmission frame through the second transaction packet format (NWRITE transaction packet format). If the status is in the data-unreceiving state, the status of the buffer flag is queried in a loop until the data-receiving state is reached, and then the first transmission frame is sent.

[0084] Of course, this application can also determine the message type of the message data packet to be sent: if it is an RTPS protocol message, then the data replaces the RapidIO destination address of the first transmission frame; if it is a service message, then the service message data is written into the RapidIO destination address of the first transmission frame.

[0085] Optionally, when the first node is the master node, the method further includes:

[0086] Initialize the slave nodes connected to the first node and assign a preset protocol interface identification code to each slave node;

[0087] In this embodiment, the first transmission frame is sent by the communication middleware. Before the first node acquires the first transmission frame to be transmitted, it initializes the slave nodes connected to the first node and assigns a preset protocol interface identification code (SRIO ID) to each slave node; for example, using an SMP architecture processor as the master node, the... Figure 3 All slave nodes within the system are in a blocking wait state (the so-called blocking mode means that when attempting to read or write to a file descriptor, if there is nothing to read or temporarily unwritable, the program enters a waiting state until something is available to read or write). The master node scans and assigns the SRIO ID of the first node and the slave nodes connected to the first node in the network as a unique identifier for each node.

[0088] Based on the preset protocol interface identification code and the type of processor corresponding to the slave node, cache flag bits are established for the first node and the slave node connected to the first node respectively.

[0089] In this embodiment, the master node can observe all node types and SRIO IDs in the entire SRIO network. Based on the SRIO ID and the processor type corresponding to the slave node (i.e., each core of each SMP architecture processor and AMP architecture processor), a cache flag is established to determine whether the cache can accept data. This application solves the problem of communication failure in multi-core processors with inconsistent underlying architectures by establishing cache flags based on SRIO ID and processor type.

[0090] Optionally, when the first node is a slave node, the method further includes:

[0091] Heartbeat data is periodically sent to the master node connected to the sending end.

[0092] In this embodiment, if there are four processors and one processing chip, that is... Figure 3 The system framework involves data writers and readers of DDS monitoring each other's activity by sending heartbeat messages. Here, when the first node is a slave node, it periodically sends heartbeat messages to the participants at the receiving end (which can be the master node of the receiving end) via multicast transmission to refresh its own activity status.

[0093] like Figure 2 As shown in the embodiment of this application, an information processing method is also provided, executed by a second node, the method comprising:

[0094] Step 400: Receive a first transmission frame sent by the first node; wherein the first transmission frame includes a destination identification code and a preset protocol destination address, and the destination identification code includes a preset protocol interface identification code and a core number identification code;

[0095] Here, the destination identifier is the destination ID, the destination address is the RapidIO destination address, the preset protocol interface identifier is the SRIO ID, and the core identifier is the CORE ID. This is consistent with the above... Figure 4 The content of the first transmitted frame is consistent with the content description.

[0096] Step 500: Determine whether inter-core communication transmission is required for the first transmission frame based on the core identification code in the first transmission frame.

[0097] In this embodiment, the CORE ID in the first transmission frame determines whether the second node is a node requiring inter-core communication. If the second node is not a node requiring inter-core communication, the content of the first transmission frame is transmitted to the desired target node. For example, if node A requires inter-core communication, but node B receives the information, then inter-core communication with node B is not required; instead, the content of the first transmission frame is forwarded to node A, which requires inter-core communication. This method increases the diversity and accuracy of inter-core communication.

[0098] Optionally, determining whether inter-core communication transmission of the first transmission frame is required includes:

[0099] If the core identification code of the first node is the first preset information, then it is determined to perform inter-core communication transmission;

[0100] If the core identification code of the first node is the second preset information, then the inter-process communication (IPC) interrupts the second node and parses the first transmission frame, and determines to perform inter-core communication transmission.

[0101] In this embodiment, the first preset information is preferably 0, and the second preset information is preferably non-zero.

[0102] Optionally, the inter-core communication transmission includes:

[0103] The first transmission frame is copied to the target application layer via Direct Memory Access (DMA), and the buffer state of the second node is cleared.

[0104] In this embodiment, the receiving end task receives the information of the first transmission frame, parses it, and if the parsing core number is 0, then it copies the data to the buffer of the target application layer to receive the data through DMA, clears the SRIO data buffer, and sets the buffer accept flag to accept data.

[0105] If the parsed core number is not 0 and the receiving data node is an AMP architecture processor, the second node first puts the data to be sent into the QMSS transmission queue, sends the data to the cache address corresponding to the core number through QMSS, and then notifies the core to receive the data through the IPC inter-core interrupt. After receiving the inter-core interrupt, the core retrieves the data from the receiving cache address, parses the transmission frame content, copies the data to the application layer cache area to receive the data on the corresponding core through DMA, clears the SRIO data cache area, and sets the cache area accept flag to accept data.

[0106] Optionally, when the second node is the master node, the method further includes:

[0107] Periodically receive heartbeat data sent by the first node connected to the sending end;

[0108] If the received heartbeat data fails, the first node is determined to be in a fault state.

[0109] In this embodiment, each sender sends a heartbeat message to the second node through a built-in data writer. The second node is used to discover information about the sending node itself or other nodes connected to the sending node. The second node monitors their activity period. If the received heartbeat data fails, it proves that the sending node (first node) is abnormal. At this time, the first node is determined to be in a fault state.

[0110] Of course, the second node can also parse the heartbeat data sent by the first node to determine whether the first node has lost power. This application supports node management. In the case of independent node reset or single node power failure, it can provide a judgment result. Based on the judgment result, it can prompt relevant personnel to perform corresponding maintenance operations; it can also determine whether the slave node is in normal working condition, thereby updating the node status.

[0111] Optionally, when the second node is a slave node, after receiving the first transmission frame sent by the first node, the method further includes:

[0112] Determine whether the core number identification code of the first transmission frame is consistent with the core number identification code of the second node;

[0113] If they match, proceed to determine whether inter-core communication transmission of the first transmission frame is required; if they do not match, interrupt the second node via IPC and send the first transmission frame to the buffer of the target node corresponding to the first transmission frame.

[0114] In this embodiment, determining whether the core identification code of the first transmission frame is consistent with the core identification code of the second node can be understood as follows: if the core identification code of the first transmission frame is A and the core identification code of the second node is B, then if A and B are consistent, the step of determining whether inter-core communication transmission of the first transmission frame is required is executed; if A and B are inconsistent, the second node first puts the data to be sent into the transmission queue of the Queue Manager (QMSS), sends the data to the cache address corresponding to the core number through the QMSS, and then notifies the core to receive the data through the inter-core interrupt of IPC. The core that receives the inter-core interrupt takes the data from the received cache address.

[0115] In summary, the method of this application supports a general communication framework with redundant multi-architecture, compatible with the communication mode of the standard RapidIO protocol and inter-core communication based on the AMP framework. Furthermore, this application adds a specific middleware-specific transmission frame definition on top of the protocol. The transmission frame consists of three parts: destination ID (4 bytes), RapidIO destination address (8 bytes), and data length (8 bytes). Specifically, the first transmission frame includes a destination identifier (destination ID) and a preset protocol destination address (RapidIO destination address). The destination identifier (destination ID) includes a preset protocol interface identifier (SRIO ID) and a core ID. The receiving end of this application determines whether inter-core communication is needed by adding a process for handling non-zero core IDs, thus increasing the diversity of inter-core communication.

[0116] like Figure 5 As shown in the illustration, this application also provides an information processing apparatus, the apparatus comprising:

[0117] The acquisition module 10 is used to acquire a first transmission frame to be transmitted; wherein the first transmission frame includes a destination identification code and a preset protocol destination address, and the destination identification code includes a preset protocol interface identification code and a core number identification code;

[0118] The sending module 20 is used to send the first transmission frame according to the buffer status of the second node receiving the first transmission frame when the preset protocol interface identification code in the first transmission frame is consistent with the preset protocol interface identification code of the sending end.

[0119] The processing module 30 is used to send the first transmission frame to the target node corresponding to the core number identification code when the preset protocol interface identification code in the first transmission frame is inconsistent with the preset protocol interface identification code of the sending end.

[0120] Optionally, the sending module 20 includes:

[0121] The first determining unit is configured to determine the buffer flag status of the second node receiving the first transmission frame from the preset protocol destination address using the first transaction packet format;

[0122] The sending unit is configured to send the first transmission frame according to the status of the buffer flag bit.

[0123] Optionally, the transmitting unit includes:

[0124] The first determining subunit is configured to, if the buffer flag state is a data-receiving state, send the first transmission frame to the second node receiving the first transmission frame through the second transaction packet format, and determine that the buffer flag state of the second node is a data-unreceiving state.

[0125] The transmitting subunit is configured to, if the state of the buffer flag is an unreceiveable data state, cyclically query the state of the buffer flag until it reaches a receivable data state, and then transmit the first transmission frame.

[0126] Optionally, the device further includes:

[0127] The assignment module is used to initialize the slave nodes connected to the first node and assign a preset protocol interface identification code to each slave node.

[0128] The module is configured to establish cache flags for the first node and the slave node connected to the first node, respectively, based on the preset protocol interface identification code and the type of processor corresponding to the slave node.

[0129] Optionally, the device further includes:

[0130] The second sending module is used to periodically send heartbeat data to the master node connected to the sending end.

[0131] like Figure 6 As shown in the illustration, this application also provides an information processing apparatus, the apparatus comprising:

[0132] The first receiving module 40 is used to receive a first transmission frame sent by the first node; wherein the first transmission frame includes a destination identification code and a preset protocol destination address, and the destination identification code includes a preset protocol interface identification code and a core number identification code;

[0133] The first determining module 50 is used to determine whether inter-core communication transmission is required for the first transmission frame based on the core number identification code in the first transmission frame.

[0134] Optionally, the first determining module 50 includes:

[0135] The second determining unit is used to determine to perform inter-core communication transmission if the core number identification code of the first node is the first preset information.

[0136] The third determining unit is configured to, if the core identification code of the first node is the second preset information, interrupt the second node in inter-process communication (IPC) and parse the first transmission frame, and determine to perform inter-core communication transmission.

[0137] It should be noted that the first determining unit or the second determining unit performs inter-core communication transmission to copy the first transmission frame to the target application layer via direct memory access (DMA) and clear the cache state of the second node.

[0138] Optionally, the device further includes:

[0139] The second receiving module is used to periodically receive heartbeat data sent by the first node connected to the sending end;

[0140] The third receiving module is used to determine that the first node is in a fault state if the received heartbeat data fails.

[0141] Optionally, the device further includes:

[0142] The second determining module is used to determine whether the core number identification code of the first transmission frame is consistent with the core number identification code of the second node;

[0143] The second processing module is used to, if consistent, perform the step of determining whether the first transmission frame needs to be transmitted via inter-core communication; if inconsistent, interrupt the second node via IPC and send the first transmission frame to the buffer of the target node corresponding to the first transmission frame.

[0144] like Figure 7 As shown in the illustration, this application also provides a network device, including: a transceiver 61, a memory 62, a processor 63, and a program stored in the memory 62 and executable on the processor 63.

[0145] The transceiver 61 is used to receive a first transmission frame sent by the first node; wherein the first transmission frame includes a destination identification code and a preset protocol destination address, and the destination identification code includes a preset protocol interface identification code and a core number identification code;

[0146] When the processor 63 executes the program, it performs the following steps:

[0147] Based on the core identification code in the first transmission frame, determine whether inter-core communication transmission is required for the first transmission frame.

[0148] Among them, Figure 7In this context, the bus architecture may include any number of interconnected buses and bridges, specifically linking various circuits together, represented by one or more processors (processor 63) and memory (memory 62). The bus architecture may also link together various other circuits such as peripheral devices, voltage regulators, and power management circuits, which are well known in the art and therefore will not be described further herein. The bus interface provides an interface. The transceiver 61 may be multiple elements, including transmitters and receivers, providing a unit for communicating with various other devices over a transmission medium. The processor 63 is responsible for managing the bus architecture and general processing, and the memory 62 may store data used by the processor 63 during operation.

[0149] It should be noted that the network device can be the second node mentioned above.

[0150] Optionally, the processor 63 is further configured to:

[0151] If the core identification code of the first node is the first preset information, then it is determined to perform inter-core communication transmission;

[0152] If the core identification code of the first node is the second preset information, then the inter-process communication (IPC) interrupts the second node and parses the first transmission frame, and determines to perform inter-core communication transmission.

[0153] Optionally, the processor 63 is further configured to:

[0154] The first transmission frame is copied to the target application layer via Direct Memory Access (DMA), and the buffer state of the second node is cleared.

[0155] Optionally, the processor 63 is further configured to:

[0156] Periodically receive heartbeat data sent by the first node connected to the sending end;

[0157] If the received heartbeat data fails, the first node is determined to be in a fault state.

[0158] Optionally, the processor 63 is further configured to:

[0159] Determine whether the core number identification code of the first transmission frame is consistent with the core number identification code of the second node;

[0160] If they match, proceed to determine whether inter-core communication transmission of the first transmission frame is required; if they do not match, interrupt the second node via IPC and send the first transmission frame to the buffer of the target node corresponding to the first transmission frame.

[0161] This application also provides a readable storage medium storing a program. When executed by a processor, the program implements the various processes of the information processing method embodiments described above and achieves the same technical effects. To avoid repetition, it will not be described again here. The readable storage medium may be a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, etc.

[0162] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0163] The above describes the preferred embodiments of this application. It should be noted that those skilled in the art can make several improvements and modifications without departing from the principles described in this application, and these improvements and modifications are also within the protection scope of this application.

Claims

1. An information processing method characterized by comprising: The method, executed by a first node, which is either a master node or a slave node in the communication network, includes: Obtain the first transmission frame to be transmitted; wherein, the first transmission frame includes a destination identification code and a preset protocol destination address, the destination identification code includes a preset protocol interface identification code and a core number identification code; the preset protocol destination address is a RapidIO destination address; the preset protocol interface identification code is a Serial RapidIO ID; If the preset protocol interface identification code in the first transmission frame matches the preset protocol interface identification code corresponding to the first node, the first transmission frame is sent according to the buffer status of the second node receiving the first transmission frame, including: determining the buffer flag status of the second node receiving the first transmission frame from the preset protocol destination address using a first transaction packet format; if the buffer flag status is a data-receiveable status, sending the first transmission frame to the second node receiving the first transmission frame using a second transaction packet format, and determining that the buffer flag status of the second node is a data-unreceiveable status; if the buffer flag status is a data-unreceiveable status, then iteratively querying the buffer flag status until a data-receiveable status is reached, and then sending the first transmission frame. If the preset protocol interface identification code in the first transmission frame is inconsistent with the preset protocol interface identification code corresponding to the first node, the first transmission frame is sent to the target node corresponding to the core number identification code.

2. The method according to claim 1, characterized in that, When the first node is the master node, the method further includes: Initialize the slave nodes connected to the first node and assign a preset protocol interface identification code to each slave node; Based on the preset protocol interface identification code and the type of processor corresponding to the slave node, cache flag bits are established for the first node and the slave node connected to the first node respectively.

3. The method according to claim 1, characterized in that, When the first node is a slave node, the method further includes: It periodically sends heartbeat data to the master node connected to the first node.

4. An information processing method, executed by a second node, characterized in that, The method includes: Receive a first transmission frame sent by a first node; wherein the first node is a master node or a slave node in a communication network, the first transmission frame includes a destination identification code and a preset protocol destination address, the destination identification code includes a preset protocol interface identification code and a core number identification code; the preset protocol destination address is a RapidIO destination address; the preset protocol interface identification code is a Serial RapidIO ID; Based on the core number identification code in the first transmission frame, determine whether inter-core communication transmission of the first transmission frame is required; Wherein, if the preset protocol interface identification code in the first transmission frame is consistent with the preset protocol interface identification code corresponding to the first node, the first node sends the first transmission frame to the second node according to the buffer status of the second node receiving the first transmission frame, including: determining the buffer flag status of the second node receiving the first transmission frame from the preset protocol destination address using a first transaction packet format; if the buffer flag status is a data-receiveable status, sending the first transmission frame to the second node receiving the first transmission frame using a second transaction packet format, and determining that the buffer flag status of the second node is a data-unreceiveable status; if the buffer flag status is a data-unreceiveable status, then iteratively querying the buffer flag status until a data-receiveable status is reached, and then sending the first transmission frame.

5. The method according to claim 4, characterized in that, The step of determining whether inter-core communication transmission of the first transmission frame is required includes: If the core identification code of the first node is the first preset information, then it is determined to perform inter-core communication transmission; If the core identification code of the first node is the second preset information, then the inter-process communication (IPC) interrupts the second node and parses the first transmission frame, and determines to perform inter-core communication transmission.

6. The method according to claim 5, characterized in that, The inter-nuclear communication transmission includes: The first transmission frame is copied to the target application layer via Direct Memory Access (DMA), and the buffer state of the second node is cleared.

7. The method according to claim 4, characterized in that, When the second node is the master node, the method further includes: When the first node is a slave node, it periodically receives heartbeat data sent by the first node; If the received heartbeat data fails, the first node is determined to be in a fault state.

8. The method according to claim 4, characterized in that, When the second node is a slave node, after receiving the first transmission frame sent by the first node, the method further includes: Determine whether the core number identification code of the first transmission frame is consistent with the core number identification code of the second node; If they match, proceed to determine whether inter-core communication transmission of the first transmission frame is required; if they do not match, interrupt the second node via IPC and send the first transmission frame to the buffer of the target node corresponding to the first transmission frame.

9. An information processing device, characterized in that, Executed by a first node, which is either a master node or a slave node in a communication network, the device includes: The acquisition module is used to acquire a first transmission frame to be transmitted; wherein, the first transmission frame includes a destination identification code and a preset protocol destination address, the destination identification code includes a preset protocol interface identification code and a core number identification code; the preset protocol destination address is a RapidIO destination address; the preset protocol interface identification code is a Serial RapidIO ID; A sending module is configured to send the first transmission frame according to the buffer state of the second node receiving the first transmission frame, provided that the preset protocol interface identification code in the first transmission frame matches the preset protocol interface identification code corresponding to the first node. The sending module includes: a first determining unit, configured to determine the buffer flag state of the second node receiving the first transmission frame from the preset protocol destination address using a first transaction packet format; and a sending unit, configured to send the first transmission frame according to the buffer flag state. The sending unit includes: a first determining subunit, configured to send the first transmission frame to the second node receiving the first transmission frame using a second transaction packet format if the buffer flag state is a data-receiveable state, and determine if the buffer flag state of the second node is a data-unreceiveable state; and a sending subunit, configured to continuously query the buffer flag state until a data-receiveable state is reached, and then send the first transmission frame. The processing module is configured to send the first transmission frame to the target node corresponding to the core number identification code when the preset protocol interface identification code in the first transmission frame is inconsistent with the preset protocol interface identification code corresponding to the first node.

10. An information processing device, characterized in that, Executed by a second node, the device includes: The first receiving module is configured to receive a first transmission frame sent by a first node; wherein the first transmission frame includes a destination identification code and a preset protocol destination address, the destination identification code includes a preset protocol interface identification code and a core number identification code; the first node is a master node or a slave node in a communication network; the preset protocol destination address is a RapidIO destination address; and the preset protocol interface identification code is a Serial RapidIO ID. The first determining module is used to determine whether inter-core communication transmission is required for the first transmission frame based on the core number identification code in the first transmission frame. Wherein, if the preset protocol interface identification code in the first transmission frame is consistent with the preset protocol interface identification code corresponding to the first node, the first node sends the first transmission frame to the second node according to the buffer status of the second node receiving the first transmission frame, including: determining the buffer flag status of the second node receiving the first transmission frame from the preset protocol destination address using a first transaction packet format; if the buffer flag status is a data-receiveable status, sending the first transmission frame to the second node receiving the first transmission frame using a second transaction packet format, and determining that the buffer flag status of the second node is a data-unreceiveable status; if the buffer flag status is a data-unreceiveable status, then iteratively querying the buffer flag status until a data-receiveable status is reached, and then sending the first transmission frame.

11. A network device, characterized in that, include: Transceiver, memory, processor, and programs stored in memory and capable of running on the processor. The transceiver is used to receive a first transmission frame sent by a first node; wherein the first transmission frame includes a destination identification code and a preset protocol destination address, the destination identification code includes a preset protocol interface identification code and a core number identification code; wherein the first node is a master node or a slave node in a communication network, the preset protocol destination address is a RapidIO destination address, and the preset protocol interface identification code is a Serial RapidIO ID; When the processor executes the program, it performs the following steps: Based on the core number identification code in the first transmission frame, determine whether inter-core communication transmission of the first transmission frame is required; Wherein, if the preset protocol interface identification code in the first transmission frame is consistent with the preset protocol interface identification code corresponding to the first node, the first node sends the first transmission frame to the second node according to the buffer status of the second node receiving the first transmission frame, including: determining the buffer flag status of the second node receiving the first transmission frame from the preset protocol destination address using a first transaction packet format; if the buffer flag status is a data-receiveable status, sending the first transmission frame to the second node receiving the first transmission frame using a second transaction packet format, and determining that the buffer flag status of the second node is a data-unreceiveable status; if the buffer flag status is a data-unreceiveable status, then iteratively querying the buffer flag status until a data-receiveable status is reached, and then sending the first transmission frame.

12. A readable storage medium having a program stored thereon, characterized in that, When the program is executed by the processor, it implements the steps of the information processing method as described in any one of claims 1 to 3; or... When the program is executed by the processor, it implements the steps of the information processing method as described in any one of claims 4 to 8.

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