Methods of incorporating arrester devices into capacitor configurations to reduce cell interference and capacitor configurations incorporating arrester devices
By introducing a leakage current device into the memory array, the problem of data instability caused by leakage of dielectric material in the memory device is solved, and the memory cell achieves high efficiency, reliability and low power consumption operation.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- MICRON TECHNOLOGY INC
- Filing Date
- 2021-06-30
- Publication Date
- 2026-06-12
AI Technical Summary
As the density of memory devices increases, leakage problems in dielectric materials lead to data storage instability and power waste, especially in ferroelectric RAM where the cell interference mechanism caused by the potential accumulation at the bottom node of the cell is difficult to control.
By introducing a leakage current device into the memory array and coupling the bottom electrode to the conductive plate, the leakage current device material prevents charge from accumulating in the capacitor insulation material, enabling discharge from the bottom electrode and reducing unwanted charge leakage.
It effectively reduces interference between memory cells, improves the reliability and power efficiency of data storage, and prevents data loss caused by charge accumulation.
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