Method of coupling semiconductor dies and corresponding semiconductor device

Abstract

The present disclosure relates to a method of coupling semiconductor dies and a corresponding semiconductor device. A laser direct structuring (LDS) material package is molded onto a substrate having a first semiconductor die and a second semiconductor die disposed thereon. Laser beam energy is applied to a surface of the LDS material package to construct, therein, a die via extending through the LDS material to the first semiconductor die and the second semiconductor die and a die-to-die line extending at the surface of the LDS material between the die via. A laser-induced forward transfer (LIFT) process is applied to transfer a conductive material to the die via and the die-to-die line extending between the die via. An electroless plating of a layer of the conductive material on the die via and the die-to-die line facilitates improved adhesion of the conductive material transferred via the LIFT process.

Description

[0001] Cross-application of related applications

[0002] This application claims priority to Italian patent application No. 102021000020540, filed on July 30, 2021, the contents of which are incorporated herein by reference in their entirety to the fullest extent permitted by law. Technical Field

[0003] This specification relates to semiconductor devices.

[0004] One or more embodiments can be applied to semiconductor devices including die-to-die connections.

[0005] A system-in-package (SiP) device, which includes multiple circuits integrated in one or more chip carrier packages, can be an example of such a device. Background Technology

[0006] For example, various types of semiconductor devices, such as power devices, can contain die-to-die coupling.

[0007] An example of this is the desired power semiconductor chip or die (e.g., gallium nitride or gallium nitride) being connected to a device that uses a driver chip or die manufactured using BCD (bipolar-CMOS-DMOS) technology.

[0008] Laser direct forming (LDS) technology has recently been proposed as an alternative to conventional wire bonding, which provides die-to-lead electrical connections in semiconductor devices.

[0009] In the currently implemented laser direct forming technology, after the laser beam forming (activation) of the LDS material, the conductivity of structures such as through holes and traces is made easy through electroless metallization and electroplating, so as to achieve a metallization thickness of tens of micrometers in metallic materials such as copper.

[0010] The problem that arises when trying to apply LDS technology to die-to-die coupling is that the associated conductive pattern is an electrically floating node.

[0011] Therefore, the expectation of using electroplating to enhance the full conductivity of conductive structures (vias and / or lines or traces) constructed via LDS technology has hindered the expansion of the use of LDS technology from die-to-wire coupling to die-to-die coupling.

[0012] There is a need in this field to contribute to the adequate handling of such problems. Summary of the Invention

[0013] One or more embodiments relate to a method.

[0014] One or more embodiments relate to corresponding semiconductor devices. Examples of such devices include power devices comprising multiple mutually coupled semiconductor chips or dies.

[0015] One or more embodiments combine laser direct forming technology (including electroplating) with laser-induced forward transfer (LIFT) technology.

[0016] LIFT technology can be used to complete the growth (filling) of vias / traces in die-to-die interconnects.

[0017] One or more embodiments may benefit from the fact that, as is currently used in LDS technology, the non-electric underlayer promotes the adhesion of LIFT material to the (LDS) molding compound. Attached Figure Description

[0018] One or more embodiments will now be described by way of example only with reference to the accompanying drawings, in which:

[0019] Figure 1 This is an example of a possible application of laser direct forming (LDS) technology in the manufacture of semiconductor devices;

[0020] Figure 2 This is a cross-sectional view of a semiconductor device according to an embodiment of this specification;

[0021] Figure 3 This is an exemplary flowchart of possible steps in the embodiments of this specification;

[0022] Figure 4A and 4B schematic representation Figure 3 The results of certain steps in the flowchart;

[0023] Figure 5 This is a schematic diagram of the mechanical layout for implementing the embodiments of this specification; and

[0024] Figure 6 These are further examples of possible results in the methods according to embodiments of this specification. Detailed Implementation

[0025] Unless otherwise specified, corresponding numbers and symbols in different figures usually refer to the corresponding parts.

[0026] The accompanying drawings are provided to clearly illustrate relevant aspects of the embodiments and are not necessarily drawn to scale.

[0027] The edges of features drawn in the attached figures do not necessarily indicate the end of the feature range.

[0028] In the following description, various specific details are shown to provide a thorough understanding of various examples of the embodiments according to the description. Embodiments may be obtained without one or more specific details, or by utilizing other methods, components, materials, etc. In other cases, known structures, materials, or operations are not shown or described in detail so that various aspects of the embodiments are not obscured.

[0029] References to "embodiment" or "an embodiment" within the framework of this specification are intended to indicate that a particular configuration, structure, or feature described with respect to an embodiment is included in at least one embodiment. Therefore, phrases such as "in an embodiment," "in one embodiment," etc., that may appear at various points in this specification do not necessarily refer precisely to the same embodiment. Furthermore, specific configurations, structures, or features may be combined in any suitable manner in one or more embodiments.

[0030] The titles / references used herein are provided for convenience only and are not intended to limit the scope of protection or the scope of the embodiments.

[0031] Figure 1 This indicates that laser direct forming (LDS) technology offers potential applications for die-to-wire coupling in the assembly process of multiple semiconductor devices, where multiple semiconductor devices are manufactured simultaneously and ultimately separated into individual devices via a dicing step.

[0032] Figure 1 The invention relates to a (single) device comprising a lead frame having a plurality of die pads 12A (e.g., two die pads), wherein a corresponding semiconductor integrated circuit chip or die 14 is mounted (e.g., attached via die attachment material 140) on the die pads 12A using a lead array 12B surrounding the die pads 12A and the semiconductor chip or die 14.

[0033] The term “lead frame” (or “lead box”) is currently used (see, for example, the USPC Combined Glossary) to refer to a metal frame that provides support for an integrated circuit chip or die, and electrical leads that interconnect the integrated circuit in the die or chip to other components or contacts.

[0034] Essentially, the leadframe comprises an array of conductive structures (leads) extending inward from a contour location in the direction of the semiconductor chip or die, thereby forming the conductive structure array from die pads configured to have at least one semiconductor chip or die attached thereto. This can be achieved by conventional means such as die attachment adhesive (e.g., die attachment film (DAF)).

[0035] exist Figure 1The document shows two bare die pads 12A on which corresponding bare dies or chips 14 are attached (throughout the specification, "bare die / multiple bare dies" and "chip / multiple chips" are used as synonyms).

[0036] In various embodiments, multiple chips 14 can be mounted on a single die pad 12A: for example, instead of Figure 1 The different components shown can be joined by two bare die pads 12A to form as shown. Figure 2 The image shows a single die pad on which two chips are mounted.

[0037] Laser direct forming (LDS), often referred to as direct copper interconnect (DCI) technology, is a laser-based processing technology now widely used in various industries across the industrial and consumer electronics markets, such as for high-performance antenna integration, where antenna designs can be directly formed onto molded plastic parts. In one exemplary process, the molded part can be produced using a commercially available resin that includes additives suitable for LDS processing; a wide range of resins, such as polymer resins like PC, PC / ABS, ABS, and LCP, can currently be used for this purpose.

[0038] In LDS, a laser beam can be used to transfer a desired conductive pattern onto a plastic molded part, which can then be metallized (e.g., by electroless plating and electroplating with copper or other metals) to complete the desired conductive pattern.

[0039] Documents such as U.S. Patent Application Publication Nos. 2018 / 0342453, 2019 / 0115287, 2020 / 0203264, 2020 / 0321274, 2021 / 0050226, 2021 / 0050299, or 2021 / 0183748 (all of which are incorporated herein by reference) are examples of the possibilities of applying LDS technology in the manufacture of semiconductor devices. For example, LDS technology facilitates the use of wires / vias created by laser beam processing of LDS material and subsequent metallization (e.g., growing a metal such as copper through an electroplating process) instead of wires, clips, or strips.

[0040] Still referencing Figure 1 The LDS material package 16 can be molded onto lead frames 12A and 12B, which have semiconductor chips or dies 14 mounted thereon.

[0041] A conductive die-to-lead coupling structure may (e.g., in a manner known per se, see the previously cited publication) be provided in LDS material 16.

[0042] like Figure 1As shown, the die-to-lead coupling structure includes: a first through-hole 181, a second through-hole 182, and a conductive line or trace line (trace) 183.

[0043] The first through-hole 181 extends through the LDS package 16 between the top (front) surface 16A of the package (opposite to the lead frames 12A, 12B) and the conductive pads (not visible due to scale) on the front or top surface of the chip or die 14.

[0044] The second through-hole 182 extends through the LDS package 16 between the top (front) surface 16A of the package and the corresponding lead 12B in the lead frame.

[0045] Conductive lines or traces (traces) 183 extend at the front or top surface 16A of package 16 and electrically couple selected vias in first via 181 to selected vias in second via 182 to provide a desired die-to-lead electrical connection pattern between chip or die 14 and lead 12B.

[0046] Providing conductive dies to lead structures 181, 182, and 183 essentially involves constructing structures in LDS material 16 (e.g., drilling holes therein at desired locations for vias 181, 182), followed by growing a conductive material (e.g., a metal, such as copper) at a location on the front or top surface 16A of LDS material 16 that has been activated (constructed) by the laser beam energy.

[0047] Further details regarding the treatment discussed above can be derived, for example, from the published applications mentioned above.

[0048] Extending the use of LDS processing as discussed above to the production of die-to-die coupled structures presents problems related to the nature of the structure.

[0049] like Figure 1 The die-to-die coupling structure indicated by 200 in the diagram should ideally include: a conductive via 201 and a conductive line or trace line 202.

[0050] Conductive via 201 extends through the LDS package 16 between the top (front) surface 16A of the package and the die pad (not visible due to scale) at the top or front surface of one of the two chips or dies 14, connecting the two chips or dies to each other.

[0051] Conductive lines or traces 202 extend in a bridge-like manner between first vias 201 on the front or top surface 16A of package 16 to complete the desired die-to-die coupling pattern.

[0052] Laser beam shaping (also referred to as “activation”) of vias 201 and lines or traces 202 in LDS material package 16 can be performed in the same manner as shaping vias 181, 182 and lines or traces 183, which are used to provide a die-to-lead coupling structure as previously discussed.

[0053] A key aspect involves growing conductive materials, such as metals (e.g., by electroplating), at the constructed locations to provide the desired conductivity – as is the case in a die-to-lead coupling structure.

[0054] The growth of conductive materials currently involves electroplating (in addition to electroless plating), which is based on reducing the cations of the metal to be deposited, contained in an electrolyte “bath” EB, into a metallic material (e.g., copper).

[0055] Cations (such as Cu2+ cations) are reduced to metallic copper at the cathode C by gaining electrons (e) from the current, such as... Figure 1 As shown, A represents the anode of the electrolyte containing the metal cations to be deposited.

[0056] For example (as is also known to those skilled in the art), electrolyte EB may contain (in the case of copper deposition) Cu2+ cations and SO2−4 anions.

[0057] This process, in which Cu²⁺ cations are reduced to metallic copper at the anode to create a conductive path (and thus the desired growth of a conductive metal such as copper at the coupling structure 200), involves the acquisition of electrons e from a current flowing through the cathode C, represented by the lead frame (e.g., by lead 12B). This current, in the case of… Figure 1 The arrangement shown simply prevents flow: here, structure 200 is electrically isolated from the lead frame (through chip 14) so ​​that Cu2+ cannot be reduced to metal (copper).

[0058] It should be noted that, at least in principle, die-to-lead conductive structures 181, 182, and 183 can be provided using (only) LDS technology, while other technologies are used to provide, for example... Figure 1 The die-to-die coupling illustrated in section 200 addresses this issue.

[0059] Conventional wire bonding can represent the first candidate for die-to-die coupling. Undesirable high-impedance paths and / or stress applied to the device junction represent (adverse) factors to consider.

[0060] Providing a die-to-die coupling structure 200 using conductive adhesive could be another option to consider. It should be noted that filling the vias constructed in the LDS material 16 with conductive adhesive may become impractical due to the adhesive viscosity.

[0061] In such Figure 1 Creating a sacrificial path within the structure shown remains another option to consider. However, this approach does not eliminate drawbacks such as undesirable antenna effects and potential design limitations (especially in devices with numerous input / output connections).

[0062] One or more embodiments consider using laser-induced forward transfer (LIFT) processing instead of (e)plating processing for growing metallic material on vias and lines (trace lines) constructed in LDS material 16.

[0063] LIFT is a deposition process that uses laser pulses to transfer material from a donor zone to an acceptor substrate.

[0064] The name LIFT is suitable for facilitating the transfer of material from a donor strip or sheet using laser pulses (see [link]). Figure 5 The process of transferring 300 and 302 in the sample to the acceptor substrate (here, LDS material) is known to those skilled in the art.

[0065] General information about LIFT processing can be found, for example, in P. Serra, et al.: “Laser-Induced Forward Transfer: Fundamentals and Applications”, Advanced Materials Technologies / Volume 4, Issue 1 (incorporated hereby by reference).

[0066] Using LIFT processing provides increased design flexibility in die-to-die coupling and also facilitates the use of copper and silver materials for filling vias and traces.

[0067] Figure 2 (where it is already combined) Figure 1 The components or elements discussed are similar to those indicated by the same reference numerals (so the corresponding detailed descriptions will not be repeated) and are examples of the possibility of providing a die-to-die coupling structure 200 using LIFT technology.

[0068] Note that in Figure 2 In the diagram, two semiconductor chips or dies 14 are shown mounted on the same die pad 12A, as if mounted on... Figure 1 The alternatives are shown on the separate die pads.

[0069] also, Figure 2This demonstrates the possibility of molding another protective package 20 (which may be a non-LDS material, such as a conventional epoxy molding compound) on the front or top surface 16A of the “first” LDS material package 16, with the protective package 20 extending on top of the vias 181, 182 and 201 and on the lines or traces 183 and 202.

[0070] Figure 3 Flowcharts are helpful in providing information with Figure 2 Exemplary steps of a semiconductor device with the structure shown in the cross-sectional view.

[0071] It should be noted that Figure 3 The sequence of steps shown in the flowchart is merely exemplary and not mandatory, for example: Figure 3 Some steps in the example can be omitted and / or replaced by other steps; additional steps may be included in the sequence (for simplicity, in...). Figure 3 (not shown in the image); and / or certain steps may be simultaneous rather than subsequent and / or with... Figure 3 The different orders of the example shown in the text are implemented.

[0072] Furthermore, it should be understood that, although possibly included in the same workstation, the LDS processing laser (to "construct" or activate LDS material 16) and the LIFT processing laser (to transfer metallic material to fill via 201 and trace 202: see [link]). Figure 5 The LB in the image is usually a different laser source.

[0073] Figure 3 Box 100 in the flowchart is an exemplary step of providing the lead frames 12A, 12B and the attachment of the chip or die 14 thereon (via, for example, die attachment material 140).

[0074] Figure 3 Box 101 in the flowchart is an example of molding and bonding (e.g., via thermosetting) the LDS package 16 to lead frames 12A, 12B on which the chip or die 14 is attached.

[0075] In step 102, the laser beam activation energy is applied to the structure in the LDS material 16, vias 181, 182 (die-to-wire coupling) and 201 (die-to-die coupling), and lines or traces 183 (die-to-wire coupling) and 202 ((one or more) die-to-die couplings: in fact, multiple such couplings can be provided).

[0076] Figure 3 Box 103 in the flowchart is an example of electroless plating plus electroplating of a metallic material (e.g., copper) to complete the vias 181, 182 and the line or trace 183 in the die-to-lead coupling.

[0077] It should also be noted that: without electroplating, multiple seed layers will also be formed on the die-to-die coupling 200, i.e., on the via 201 and the line or trace 202 (see...). Figure 4A Layer 200A); and the plating performed at the die-to-lead connection (i.e., at vias 181, 182 and trace 183) cannot be performed at vias 201 and lines or traces 202, provided that no electrical grounding connection is available at these locations.

[0078] Figure 3 Box 104 in the flowchart is an example of the possibility of growing (filling or printing) additional conductive material (metal, such as copper or silver) as well as via LIFT processing, and via 201 and line or trace 202.

[0079] In the example considered in this paper, electroplating (which cannot be performed at via 201 and line or trace 202 due to the lack of grounding connection) is therefore replaced by the LIFT process used for metal deposition at via 201 and line or trace 202.

[0080] Note that the layer 200A formed in step 103 at the via 201 and the line or trace 202 by electroless plating promotes the adhesion of the subsequent LIFT metallization in step 104 and thus improves robustness.

[0081] This layer is Figure 4A and 4B Both are designated as 200A. It should be noted that providing this 200A layer is optional, but it does offer advantages in promoting adhesion.

[0082] Specifically, Figure 4A The behavior of filling via 201 and (multiple) lines 202 (with a "non-plated" layer 200A pre-formed thereon) by LIFT processing is illustrated.

[0083] Figure 3 Box 105 in the flowchart represents the in-line sintering of LIFT-printed metal material to complete the vias 201 and lines or tracks 202 in die-to-die coupling 200: see Figure 4B .

[0084] Figure 3 Box 106 in the flowchart represents a second (e.g., non-LDS) package 20 molded onto the front or top surface 16A.

[0085] Finally, boxes 107 and 108 indicate electroplating on the back or bottom surface (considering soldering to substrate S: see [link]). Figure 2 ) and segmentation to produce a single semiconductor device 10.

[0086] Figure 4A and 4B The diagram illustrates the process of “printing” (metallic) materials such as copper or silver through a LIFT process to fill the through-holes 201 and traces 202 constructed on the front or top surface 16A of the LDS material.

[0087] like Figure 4A and 4B As can be seen, the metallization of the die-to-die coupling structure 200 (e.g., 201, 202) includes a double layer of non-electric metal (see layer 200A) and LIFT metal.

[0088] The double-layer structure (a first conductive material 200A grown on LDS material 16 without electroplating, which has a second conductive material transferred thereon by LIFT treatment) is clearly identifiable even after sintering.

[0089] As mentioned above, various examples can benefit from an electrical-free underlying layer (such as...). Figure 4A and 4B The fact that 200A in the middle promotes the adhesion of LIFT material to (LDS) molding compound.

[0090] Similar dual-layer structures (again, a first conductive material grown without plating on LDS material 16 has a second conductive material plated thereon, as is common in LDS processing) are also identifiable at the die-to-lead coupling structures 181, 182, 183.

[0091] As previously combined Figure 3 As discussed in block 103 of the flowchart, conductive materials (e.g., copper) can be grown without plating at both the die-to-die coupling structure 200 (e.g., 201, 202) and the die-to-lead coupling structures 181, 182, 183 (e.g., in the same step).

[0092] Then (another) conductive material can be: electroplated (as is the case in LDS processing) onto the conductive material grown without plating at the die-to-lead coupling structures 181, 182, 183; and transferred by LIFT onto the conductive material grown without plating at the die-to-die coupling structures 200 (e.g., 201, 202) which are not suitable for conventional plating.

[0093] Sintering at the die-to-die coupling structure 200 (performed in other ways known to those skilled in the art) is advantageous because it consolidates the conductive material stretched (filled) in the via 201 and the line or trace 202. Thus, one or more embodiments can utilize the sintered material to provide electrical connections with high conductivity.

[0094] As discussed above (and conventional methods in the art), the LIFT process involves the use of a donor membrane (e.g., a polyethylene membrane coated with a thin metal layer).

[0095] This donor film can be provided in the form of a donor belt 300 coated with a material 302 applied thereon during a roll-to-roll coating process (between two rollers R1, R2) to fill the through-holes 201 and lines or traces 202, in the present case. This provides the advantage of facilitating the simultaneous processing of multiple materials. The thickness of the coating 302 determines the height of the final layer.

[0096] Then, as Figure 5 The laser beam energy shown at LB is applied to those locations on the coated donor bands 300, 302 (on the uncoated side). Figure 5 (Generally indicated by 304), at those locations a conductive material (such as copper or silver) will be transferred onto the LDS material 16 to fill the through-hole 201 and onto the lines or traces 202 previously constructed therein by laser beam forming (activation).

[0097] Figure 6 The transfer of filler material from the donor strip in the LIFT process may also include the exemplary fact that an upright structure 400 is formed on the front or top surface of the bare sheet 14, the thickness of which makes the distal (upper) end of the material visible on the surface of the LDS material 16. These upright structures can be used as a reference (benchmark) in the LDS process, as disclosed in U.S. Patent Application No. 17 / 752,503, filed May 24, 2022 (corresponding to Italian Patent Application No. 102021000014198), which is incorporated herein by reference.

[0098] Without departing from the basic principles, details and embodiments may vary significantly from the content described by way of example only, without departing from the scope of the embodiments.

[0099] The claims form an integral part of the technical teachings provided herein regarding the embodiments.

[0100] The scope of protection is determined by the appended claims.

Claims

1. A method for coupling a semiconductor die, comprising: A first semiconductor die and a second semiconductor die are disposed on a substrate; Laser-directly formed LDS material is molded onto a first semiconductor die and a second semiconductor die, the first semiconductor die and the second semiconductor die being disposed on the substrate, the LDS material package having a surface opposite to the substrate; At least one conductive die-to-die coupling structure is provided between the first semiconductor die and the second semiconductor die, the at least one die-to-die coupling structure comprising: a die via extending through the LDS material between the LDS material packaged surface opposite the substrate and the first semiconductor die and the second semiconductor die; and a die-to-die line extending at the LDS material packaged surface opposite the substrate and coupling the die via; The at least one die-to-die coupling structure providing conductivity includes: Laser beam energy is applied to selected locations on the surface of the LDS material package opposite the substrate to activate and construct the die vias and die-to-die lines within the LDS material package; and Laser-induced forward transfer (LIFT) is applied to transfer conductive material onto the die vias and onto the die-to-die lines extending between the die vias.

2. The method according to claim 1, further comprising: The conductive material is sintered and transferred to the die-to-die lines extending between the die-to-die vias.

3. The method of claim 1, wherein applying LIFT processing to the die via and the die-to-die line extending between the die via transfers a metallic material made of copper or silver onto the die via and the die-to-die line extending between the die via.

4. The method of claim 1, further comprising: After applying laser beam energy and before applying LIFT processing, a conductive layer is electroless grown onto the die vias and the die-to-die lines; The conductive material transferred to the die vias and to the die-to-die lines extending between the die vias is applied to the conductive layer.

5. The method of claim 1, wherein the arrangement comprises: The first semiconductor die and the second semiconductor die are disposed on at least one die pad in the substrate, the substrate including an array of conductive leads surrounding the at least one die pad. The method further includes: applying an LDS process to the LDS material package to provide a die-to-lead conductive structure, the die-to-lead conductive structure coupling the first semiconductor die and the second semiconductor die to selected conductive leads in the conductive lead array, wherein the die-to-lead conductive structure includes: A first via extends through the LDS material between the LDS material packaged on the surface opposite the substrate and one of the first and second semiconductor dies and the other semiconductor die; A second via, the second via extending through the LDS material between the LDS material-encapsulated surface opposite the substrate and a selected conductive lead in the conductive lead array; and A conductive line extends on the surface of the LDS material package opposite the substrate between a selected via in the first via and a selected via in the second via.

6. The method of claim 5, further comprising: After applying laser beam energy and before applying LIFT processing: A conductive material layer is electroless grown onto the bare die via, the bare die to bare die line, the first via, the second via, and the conductive line; as well as Then, conductive material is electroplated onto the conductive material layer grown without electroplating at the first through hole, the second through hole, and the conductive line; The conductive material transferred to the die vias and to the die-to-die lines extending between the die vias is applied to the conductive material layer grown without electroplating.

7. A device for coupling a semiconductor die, comprising: Substrate; A first semiconductor die disposed on the substrate; A second semiconductor die disposed on the substrate; Laser-directly formed LDS material package, wherein the LDS material package is molded onto a first semiconductor die and a second semiconductor die disposed on the substrate, and the LDS material package has a surface opposite to the substrate; At least one conductive die-to-die coupling structure, said at least one die-to-die coupling structure being located between the first semiconductor die and the second semiconductor die, said at least one die-to-die coupling structure comprising: A bare die through-hole laser, the bare die through-hole laser being configured to pass through the LDS material between the surface of the LDS material packaged and the substrate and the first semiconductor die and the second semiconductor die; A die-to-die line laser, the die-to-die line laser being configured to be located on the surface of the LDS material package opposite the substrate and coupled to the die via; and Conductive laser-induced forward transfer of LIFT material on and between the die-to-die lines constructed in the die vias of the LDS material package.

8. The device of claim 7, wherein the LIFT material comprises a metallic material made of copper or silver.

9. The device of claim 7, further comprising sintered material extending on and between the die vias along the die-to-die lines.

10. The device of claim 7, further comprising a conductive electroless growth material layer between the surfaces of the die-to-die line and the die via and the LIFT material, wherein the LIFT material is in contact with the conductive electroless growth material layer.

11. The device of claim 7, wherein the first semiconductor die and the second semiconductor die are disposed on at least one die pad in the substrate, wherein the substrate includes an array of conductive leads surrounding the at least one die pad; Furthermore, it includes a die-to-lead conductive structure that couples the first semiconductor die and the second semiconductor die to selected conductive leads in the conductive lead array, wherein the die-to-lead conductive structure includes: A first via extends through the LDS material between the LDS material packaged on the surface opposite the substrate and the first semiconductor die and the second semiconductor die; A second via, the second via extending through the LDS material between the LDS material-encapsulated surface opposite the substrate and a selected conductive lead in the conductive lead array; and A conductive line extends on the surface of the LDS material package opposite to the substrate between a selected first via in the first via and a selected second via in the second via.

12. The device of claim 11, further comprising: A conductive electroless growth material layer is formed between the surface of the die-to-die line and the die via and the LIFT material, wherein the LIFT material is in contact with the conductive electroless growth material layer. as well as At the surfaces of the first through hole, the second through hole, and the conductive wire, there is a conductive electroless growth material layer and a conductive electroplating material on the conductive electroless growth material layer.

13. A method for coupling a semiconductor die, comprising: A laser direct-formed LDS material package is molded on a first circuit and a second circuit, the LDS material package having an upper surface; Laser beam energy is applied to selected locations on the upper surface of the LDS material package to activate and construct a first via and a second via, the first via and the second via extending through the LDS material between the upper surface and the first circuit and the second circuit, respectively. Laser beam energy is applied to selected locations on the upper surface of the LDS material package to activate and construct interconnects in the LDS material package, the interconnects extending on the upper surface between the first via and the second via; A conductive layer is grown electrolessly onto the first via, the second via, and the connecting line; as well as Laser-induced forward transfer (LIFT) is applied to transfer conductive material onto the conductive layer at the first via, the second via, and the connecting line.

14. The method of claim 13, further comprising: The conductive material is sintered and transferred to the conductive layer at the first and second through holes and at the connecting lines.

15. The method of claim 13, wherein a LIFT process is applied to transfer a metallic material made of copper or silver onto the conductive layer at the first via and the second via, and at the connection line.

16. The method of claim 13, wherein the first circuit and the second circuit are supported by a substrate, the substrate comprising an array of conductive leads, the method further comprising: Laser beam energy is applied to selected locations on the upper surface of the LDS material package to activate and construct a third and a fourth via, which extend through the LDS material between the upper surface and the conductive lead array. Laser beam energy is applied to a selected location on the upper surface of the LDS material package to activate and construct another connection line that extends on the upper surface between the third and fourth vias in the LDS material package. Another conductive layer is grown electrolessly onto the third via, the fourth via, and the other connecting line; and LIFT processing is applied to transfer conductive material onto the other conductive layer at the third and fourth vias and at the other connection line.

17. The method of claim 16, further comprising: After the other conductive layer is grown without electroplating and before the LIFT process is applied, a conductive material is electroplated onto the other conductive layer.

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