SiC epitaxial wafer and method for manufacturing siC epitaxial wafer

Abstract

A SiC epitaxial wafer having a small content of boron at any position in plane and a large effective area and a method for producing the same. The SiC epitaxial wafer has a SiC substrate and an epitaxial layer of SiC laminated to the SiC substrate, the epitaxial layer containing an impurity determining a conduction type and boron different from the impurity in conduction type, the concentration of the boron being less than 1.0 x 10 14 cm ‑3 -2 at any position in plane in the epitaxial layer.

Description

Technical Field

[0001] This invention relates to SiC epitaxial wafers and methods for manufacturing SiC epitaxial wafers. Background Technology

[0002] Compared to silicon (Si), silicon carbide (SiC) has an insulation breakdown electric field that is an order of magnitude larger, a band gap that is three times larger, and thermal conductivity that is about three times higher. There are high hopes for the application of silicon carbide (SiC) in power devices, high-frequency devices, and high-temperature operating devices.

[0003] The practical application of SiC devices requires the establishment of high-quality SiC epitaxial wafers and high-quality epitaxial growth technology.

[0004] SiC devices are formed on SiC epitaxial wafers. SiC epitaxial wafers have a SiC substrate and epitaxial layers stacked on the SiC substrate. The SiC substrate is obtained by processing a bulk single crystal of SiC grown by methods such as sublimation recrystallization.

[0005] The epitaxial layer is fabricated using methods such as Chemical Vapor Deposition (CVD) and becomes the active region of the device.

[0006] Epitaxial layers sometimes contain impurities that determine the conductivity type of the epitaxial layer and boron with a different conductivity type than the impurities (e.g., Patent Documents 1-3). Boron reduces the effective carrier concentration within the drift layer, and sometimes becomes the cause of shortened carrier lifetime in bipolar devices.

[0007] Existing technical documents

[0008] Patent documents

[0009] Patent Document 1: Japanese Patent Application Publication No. 2019-121690

[0010] Patent Document 2: International Publication No. 2006 / 008941

[0011] Patent Document 3: International Publication No. 2018 / 193664 Summary of the Invention

[0012] The problem that the invention aims to solve

[0013] Boron is present in components used in manufacturing, making it difficult to completely remove. If there are regions with high boron concentration within the epitaxial layer, these regions are difficult to universally apply to devices. The higher the proportion of regions with high in-plane boron concentration in the epitaxial wafer, the smaller the effective area that can be universally applied to devices. Patent documents 1-3 do not describe the in-plane uniformity of boron concentration within the epitaxial layer.

[0014] The present invention was made in view of the above-mentioned problems, and its purpose is to obtain a SiC epitaxial wafer with low boron content at any position in the plane and a large effective area, and a method for manufacturing the same.

[0015] Technical solutions for solving the problem

[0016] In order to solve the above-mentioned problems, the present invention provides the following technical solution.

[0017] (1) The SiC epitaxial wafer of the first embodiment includes a SiC substrate and a SiC epitaxial layer stacked on the SiC substrate, the epitaxial layer containing impurities that determine the conductivity type and boron with a conductivity type different from the impurities, wherein the concentration of boron in the epitaxial layer is less than 1.0 × 10⁻⁶ at any position in the plane. 14 cm -3 .

[0018] (2) In the SiC epitaxial wafer of the above scheme, the diameter can be 150 mm or more.

[0019] (3) In the SiC epitaxial wafer of the above scheme, the diameter can be 200 mm or more.

[0020] (4) The method for manufacturing SiC epitaxial wafers according to the second embodiment includes a film formation process for forming an epitaxial layer of SiC on a SiC substrate using a vertical furnace having a gas supply port above the mounting surface of a SiC substrate. The film formation process includes a heating process for heating to a film formation temperature while changing the heating rate in the order of a first heating rate, a second heating rate, and a third heating rate. The first heating rate is faster than the second heating rate, the second heating rate is faster than the third heating rate, and the first heating rate is 100°C / min or higher.

[0021] (5) In the SiC epitaxial wafer manufacturing method of the above scheme, at the film forming temperature, the height position of the center of the mounting surface of the SiC substrate can be 30 μm higher than the height position of the outer periphery.

[0022] (6) In the film deposition step of the SiC epitaxial wafer manufacturing method described above, a purge gas can be supplied from the back side of the SiC substrate. The purge gas is supplied, for example, from a distance of 20 mm or more inward from the outer periphery of the SiC substrate.

[0023] (7) The time required for the heating process in the SiC epitaxial wafer manufacturing method of the above scheme can be set to more than 300 seconds and less than 750 seconds.

[0024] Invention Effects

[0025] In the SiC epitaxial wafer of the above scheme, the boron content is low at any location within the plane, resulting in a large effective area. Furthermore, the manufacturing method of the SiC epitaxial wafer of the above scheme can achieve a low boron content at any location within the plane. Attached Figure Description

[0026] Figure 1 This is a cross-sectional view of the SiC epitaxial wafer of the first embodiment.

[0027] Figure 2 This is a top view of the SiC epitaxial wafer of the first embodiment.

[0028] Figure 3 This is a schematic diagram of the SiC epitaxial wafer deposition apparatus according to the first embodiment.

[0029] Figure 4 This is an example of the film deposition process for SiC epitaxial wafers in the first embodiment.

[0030] Figure 5 This is an enlarged view of the vicinity of the SiC substrate in the SiC epitaxial wafer film deposition apparatus of the first embodiment.

[0031] Explanation of reference numerals in the attached figures

[0032] 1…SiC substrate, 2…Epiaxial layer, 10…SiC epitaxial wafer, 20…Cavity, 21…Main body, 22…Gas supply port, 23…Gas outlet, 30…Support, 40…Base, 41…Support part, 42…Outer periphery, 43…Through hole, 50…Lower heater, 60…Upper heater, 100…Film forming apparatus, G…Film forming gas, RS…Heating process, S1…First heating process, S2…Second heating process, S3…Third heating process, T1…Film forming temperature, Δh…Difference between high and low points, d…Distance, p1…Center, p2…Point. Detailed Implementation

[0033] Hereinafter, this embodiment will be described in detail with appropriate reference to the accompanying drawings. In the drawings used in the following description, to facilitate understanding of the features of the invention, some parts that would be considered features are sometimes shown enlarged, and the size ratios of the constituent elements may differ from the actual dimensions. The materials, dimensions, etc., illustrated in the following description are examples, and the invention is not limited to them; it can be implemented with appropriate modifications without changing its spirit.

[0034] Figure 1 This is a cross-sectional view of the SiC epitaxial wafer 10 according to the first embodiment. Figure 2This is a top view of the SiC epitaxial wafer 10 according to the first embodiment. The SiC epitaxial wafer 10 has a SiC substrate 1 and an epitaxial layer 2. The SiC epitaxial wafer 10 is, for example, a circular plate with a diameter of 150 mm or more. The diameter of the SiC epitaxial wafer 10 may also be 200 mm or more.

[0035] The SiC substrate 1 is, for example, cut from a SiC ingot. The SiC ingot is grown on a SiC seed crystal, for example, using a sublimation method. The SiC substrate 1 has, for example, a growth surface with an offset angle from (0001) to the <11-20> direction. The SiC substrate 1 contains impurities. The impurity is, for example, nitrogen.

[0036] The top view of the SiC substrate 1 is, for example, circular. The diameter of the SiC substrate 1 is, for example, 150 mm or more. For the SiC substrate 1, a portion of the circle may also be slotted. The slotted portion is called the orientation flat (OF). The orientation flat (OF) is used to confirm the orientation, etc., of the SiC substrate 1.

[0037] Epitaxial layer 2 is stacked on SiC substrate 1. Epitaxial layer 2 is formed, for example, by chemical vapor deposition (CVD). Epitaxial layer 2 is a single crystal film of SiC. Epitaxial layer 2 can also be formed from multiple layers. For example, epitaxial layer 2 can also be formed from multiple SiC single crystal films with different impurity concentrations.

[0038] Epitaxial layer 2 contains an impurity that determines the conductivity type and boron. The impurity determining the conductivity type is, for example, nitrogen. Nitrogen has an n-type conductivity. The impurity concentration of the conductivity-determining impurity in epitaxial layer 2 is, for example, 1.0 × 10⁻⁶. 14 cm -3 Above and 3.0×10 16 cm -3 The preferred value is 1.0 × 10⁻⁶. 14 cm -3 Above and 3.0×10 15 cm -3 The in-plane uniformity of impurity concentration in the epitaxial layer 2, which determines the conductivity type, is preferably 20% or less, more preferably 10% or less. The in-plane uniformity of impurity concentration is determined, for example, based on the results of at least 10 measurement points radially passing through the center of the SiC epitaxial wafer. The in-plane uniformity of impurity concentration determining the conductivity type is obtained by dividing the difference between the maximum and minimum impurity concentrations at multiple measurement points by the average impurity concentration at the multiple measurement points. Measurement points can be arranged in a direction parallel to the orientation plane OF, or in a direction perpendicular to the orientation plane OF, or both in directions parallel and perpendicular to the orientation plane OF.

[0039] Boron represents a different conductivity type than nitrogen. Boron's conductivity type is p-type. Boron is not intentionally doped into epitaxial layer 2, but rather introduced as an impurity during the film formation process of epitaxial layer 2, contained within the film-forming apparatus such as the substrate. Boron is a significant cause of reduced carrier concentration and may also suppress conductivity modulation in bipolar devices. A low boron concentration in epitaxial layer 2 is preferred, but complete removal is difficult.

[0040] In epitaxial layer 2, the boron concentration is less than 1.0 × 10⁻⁶ at any location within the plane. 14 cm -3 The boron concentration tends to be higher on the outer side of epitaxial layer 2 than at the center. If the boron concentration at the center p1 of epitaxial layer 2 and at four points p2 within 5 mm from the outer periphery is within the aforementioned range, then the boron concentration at any location within the plane can be considered to be within the aforementioned range. Furthermore, the area within 5 mm from the outer periphery is sometimes not considered the effective area of ​​the device. Therefore, the area within 5 mm from the outer periphery can be ignored in most cases.

[0041] Impurities and boron concentrations in each layer can be determined, for example, by mercury probe microanalysis (Hg-CV) or secondary ion mass spectrometry (SIMS).

[0042] The Hg-CV method measures the difference between the donor concentration Nd and the acceptor concentration Na (Nd-Na) as the concentration of n-type impurities. When the acceptor concentration is sufficiently small compared to the donor concentration, their concentration difference can be considered as the concentration of n-type impurities.

[0043] Secondary ion mass spectrometry (SIMS) is a method that involves cutting a layer in the thickness direction while simultaneously analyzing the mass spectrometry of the emitted secondary ions. It allows for the determination of doping concentration based on mass spectrometry analysis.

[0044] For the measurement points of impurities and boron concentration, any point can be used as long as it reflects the distribution within the wafer surface. Preferably, the portion less than 5 mm from the edge of the wafer is not included in the measurement points. For example, measurements can be taken at multiple points along the cross directions with the center of the wafer as the origin. For example, in the case of a 6-inch wafer, measurements can be taken at a total of 21 points, with 5 points in each of the four cross directions centered on the origin.

[0045] Next, the method for manufacturing a SiC epitaxial wafer according to the first embodiment will be described. First, a SiC substrate 1 is prepared. The SiC substrate 1 is obtained by cutting a SiC ingot to a predetermined thickness. The SiC substrate 1 can also be purchased commercially available SiC substrates.

[0046] Next, a film formation process is performed to form an epitaxial layer 2 on the SiC substrate 1. The epitaxial layer 2 is formed, for example, by CVD.

[0047] Figure 3 This is a schematic diagram of an example of a film-forming apparatus 100 for a SiC epitaxial wafer 10 according to the first embodiment. The film-forming apparatus 100 includes, for example, a chamber 20, a support 30, a base 40, a lower heater 50, and an upper heater 60. Figure 3 The image shows the SiC substrate 1 placed on the substrate 40. The film deposition apparatus 100 is a vertical furnace with a gas supply port 22 above the placement surface of the SiC substrate 1.

[0048] The chamber 20, for example, has a main body 21, a gas supply port 22, and a gas outlet 23.

[0049] The main body 21 surrounds the film-forming space S. The gas supply port 22 is an inlet for supplying film-forming gas G into the film-forming space S. The gas supply port 22 is, for example, located above the mounting surface of the SiC substrate 1. The gas outlet 23 is an outlet for discharging the film-forming gas G and the like retained within the film-forming space S. The gas outlet 23 is, for example, located below the mounting surface of the SiC substrate 1. The film-forming gas G is, for example, a Si-based gas, a C-based gas, a purge gas, or a dopant gas.

[0050] Si-based gases are raw material gases containing Si within their molecules. Examples of Si-based gases include silane (SiH4), dichlorosilane (SiH2Cl2), trichlorosilane (SiHCl3), and tetrachlorosilane (SiCl4). C-based gases include propane (C3H8) and ethylene (C2H4). Dopant gases are gases containing elements that act as charge carriers. Examples of dopant gases include nitrogen and ammonia. Purge gases are gases that transport these gases to the SiC substrate 1; these are gases such as hydrogen, which are inert relative to SiC.

[0051] The support 30 supports the SiC substrate 1. The support 30 is rotatable about an axis. The SiC substrate 1 is placed on the support 30, for example, with the SiC substrate 1 placed on the base 40. The base 40 is transported into the chamber 20 with the SiC substrate 1 placed on it. The lower heater 50 is located, for example, inside the support 30, and heats the SiC substrate 1.

[0052] The upper heater 60 heats the upper part of the heating chamber 20. The exposed components in the film-forming space S are, for example, carbon components, and their surfaces may be coated with SiC or TaC.

[0053] For example, in the film-forming process Figure 3 The process is carried out in the longitudinal furnace shown. Figure 4 This is an example of the manufacturing process for the SiC epitaxial wafer 10 according to the first embodiment. The film deposition process includes a heating step RS in which the temperature is raised to a film deposition temperature T1. After the heating step, the film deposition temperature T1 is maintained, and the epitaxial layer 2 is deposited. The film deposition temperature T1 is, for example, 1500°C or higher.

[0054] The time required for the heating process RS is, for example, 300 seconds or more and 750 seconds or less. If the time required for the heating process RS is short, the deformation of the SiC substrate 1 and the substrate 40 will increase, and the in-plane uniformity of the epitaxial layer 2 will deteriorate. In addition, if the time required for the heating process RS is short, the film-forming gas will be reversed due to convection caused by the in-plane temperature difference of the substrate 40, and the boron released from the substrate 40 will be drawn into the wafer. If the time required for the heating process RS is long, the amount of boron released from the components used in the film-forming apparatus 100 will increase.

[0055] The heating process RS, for example, includes a first heating process S1, a second heating process S2, and a third heating process S3. The heating rates of the first heating process S1, the second heating process S2, and the third heating process S3 are different. For the heating process RS, it is possible to change the heating rate at least two times, and it can also include further processes with different heating rates, such as a fourth heating process and a fifth heating process.

[0056] The first heating step S1 heats the temperature at a first heating rate of 100°C / min or higher. This first heating rate is faster than the second heating rate in the second heating step S2. For example, in the first heating step S1, the temperature is raised to approximately 1200°C.

[0057] The second heating step S2 is performed after the first heating step S1 and before the third heating step S3. The second heating step S2 is performed at a second heating rate. This second heating rate is slower than the first heating rate but faster than the third heating rate. For example, the second heating rate is less than 90% of the first heating rate. In the second heating step S2, the temperature is, for example, raised to approximately 1400°C.

[0058] The third heating step S3 is performed after the second heating step S2. The third heating step S3 is performed at a third heating rate. The third heating rate is slower than the second heating rate. For example, the third heating rate is less than 90% of the second heating rate.

[0059] By accelerating the first heating rate, the overall time required for the heating process RS can be shortened. If the overall time required for the heating process RS is shortened, the amount of boron released from the film deposition apparatus 100 decreases. Furthermore, by gradually slowing down the heating rate, excessive deformation of the SiC substrate 1 and the substrate 40 can be suppressed.

[0060] in addition, Figure 5 This is an enlarged view of the vicinity of the SiC substrate 1 in the SiC epitaxial wafer deposition apparatus of the first embodiment. The SiC substrate 1 is placed on a base 40. The base 40 has, for example, a support portion 41, an outer peripheral portion 42, and a through hole 43.

[0061] The SiC substrate 1 is placed on the support portion 41. The outer peripheral portion 42 prevents the SiC substrate 1 from flying outward during film deposition. The outer peripheral portion 42 may, for example, be a ring-shaped independent component. The through hole 43 is a hole that connects the upper surface and the lower surface of the support portion 41.

[0062] The height difference between the center and the outermost periphery of the mounting surface of the SiC substrate 1 is called the height difference Δh. The height difference Δh can be measured, for example, using a laser displacement meter. First, a measurement port and a laser displacement meter are installed at the center and outer periphery of the substrate in the upper part of the furnace. Without a wafer, the height difference between the center and outer periphery at the film deposition temperature is calculated, thereby measuring the warpage of the substrate. Next, by placing a wafer on the substrate and measuring under the same conditions as when measuring warpage without a wafer, the height difference Δh can be measured. By measuring the height difference Δh while performing film deposition, any height difference Δh can be maintained. Furthermore, by selecting the wavelength of the laser light source, the warpage of the substrate can also be measured with a wafer present. For example, in the case of a SiC wafer, if the wavelength of the laser light source is set to 600 nm or higher, the laser light passes through the SiC wafer, thus allowing the warpage of the substrate to be measured with a wafer present. The height difference Δh during film deposition is preferably 30 μm or higher. That is, at the film formation temperature T1, it is preferable that the height of the center of the mounting surface of the SiC substrate 1 is at least 30 μm higher than the height of the outermost periphery. In addition, the height difference Δh at the film formation temperature T1 is preferably 100 μm or less.

[0063] The aforementioned range of height difference Δh only needs to be satisfied at the film formation temperature T1, and does not need to be satisfied at room temperature. In addition, regarding the outermost periphery of the mounting surface, when an outer peripheral portion 42 exists, the boundary between the outer peripheral portion 42 and the mounting surface is called the outermost periphery.

[0064] The height difference Δh can be controlled, for example, by the film formation conditions. If the heating rate is fast, the height difference Δh tends to increase. Alternatively, the height difference Δh can also be adjusted by the material constituting the base 40. For example, the base 40 can be made of two or more materials with different coefficients of thermal expansion, and the height difference Δh can be adjusted by utilizing the difference in thermal expansion coefficients.

[0065] If the height difference Δh increases, a flow of film-forming gas G from the center of the SiC substrate 1 outwards is formed near the upper surface of the SiC substrate 1, preventing back-rolling of the film-forming gas G. Back-rolling of the film-forming gas G causes boron and unreacted gases released from the substrate 40 to be drawn into the epitaxial layer 2. If a flow of film-forming gas G from the center of the SiC substrate 1 outwards is formed near the upper surface of the SiC substrate 1, the boron concentration in the epitaxial layer 2 becomes lower. Furthermore, if the height difference Δh is within a predetermined range, the difference in film-forming conditions between the center and the outer periphery of the epitaxial layer 2 is smaller, and the in-plane uniformity of the epitaxial layer 2 is improved.

[0066] Alternatively, gas can be supplied to the back side of the SiC substrate 1 through the through-hole 43. The gas supplied to the back side of the SiC substrate 1 prevents the film-forming gas G from flowing around to the back side of the SiC substrate 1.

[0067] The gas supplied to the back side is a purge gas that is inert relative to SiC.

[0068] The purge gas is preferably supplied towards the back surface of the SiC substrate 1 from a position at least 20 mm inward from the outermost periphery. For example, the distance d between the through-hole 43 and the outermost periphery is preferably at least 20 mm. If the supply position of the purge gas to the back surface of the SiC substrate 1 satisfies the above conditions, it is possible to suppress the disturbance of the film-forming gas G flow by the purge gas from the back surface.

[0069] Through the above processes, the boron concentration at any location within the surface is 1.0 × 10⁻⁶. 14 cm -3 The following is a SiC epitaxial wafer 10.

[0070] In this embodiment, the SiC epitaxial wafer 10 has a boron concentration of 1.0 × 10⁻⁶. 14 cm -3 Therefore, it is possible to extend the carrier lifetime after device fabrication. If the carrier lifetime is long, sufficient conductivity modulation effect can be obtained in bipolar devices.

[0071] In epitaxial layer 2, the lower the concentration of impurities that determine the conductivity type, the more significant the effect. For example, the nitrogen concentration in epitaxial layer 2 is 1.0 × 10⁻⁶. 15 cm -3 And the boron concentration is 1.0 × 10⁻⁶. 14 cm -3 In this case, boron accounts for 10% of the composition relative to nitrogen, which determines the conductivity type. In this situation, the adverse effects of the presence of boron become greater. In other words, a low boron concentration is valuable in epitaxial layer 2, where the impurity concentration that determines the conductivity type is low.

[0072] The preferred embodiments of the present invention have been described in detail above, but the present invention is not limited to specific embodiments and various modifications and alterations can be made within the scope of the spirit of the present invention as set forth in the claims.

[0073]

Example

[0074] (Example 1)

[0075] A SiC substrate with a diameter of 150 mm was prepared. It was used in conjunction with... Figure 3 The film deposition apparatus 100 shown is a vertical furnace used to deposit an epitaxial layer 2 on a SiC substrate 1. The heating process is set to three stages, with the heating rate varied twice. The first heating rate (first heating rate) is 100°C / min or higher. The second heating rate (second heating rate) is less than 80% of the first heating rate. The third heating rate (third heating rate) is less than 80% of the second heating rate. The film deposition temperature is set to 1600°C or higher and less than 1700°C. The heating time is 300 seconds or higher and less than 750 seconds.

[0076] During the deposition of the epitaxial layer 2, a purge gas was supplied from the back side of the SiC substrate 1.

[0077] The purging gas was supplied to a position at least 20 mm inside the outer periphery of the SiC substrate 1. In addition, in a temperature range of 1600°C or higher but lower than 1700°C, the height of the center of the mounting surface of the SiC substrate 1 was at least 30 μm higher than the height of the outermost periphery.

[0078] Furthermore, after fabrication, the boron concentration at the center p1 of the SiC epitaxial wafer 10 and the boron concentration at four points p2 located 5 mm inward from the outer periphery were measured. In Example 1, the boron concentration at the center p1 was 5.0 × 10⁻⁶. 13 cm -3 The boron concentration at point p2 is 9.0 × 10⁻⁶. 13 cm -3 Therefore, the boron concentration at any location within the plane of the SiC epitaxial wafer in Example 1 is less than 1.0 × 10⁻⁶. 14 cm -3 .

[0079] (Comparative Example 1)

[0080] A SiC substrate with a diameter of 150 mm was prepared. Comparative Example 1 used a horizontal furnace with a gas supply port on the side of the SiC substrate. Using the horizontal furnace, an epitaxial layer 2 was deposited on the SiC substrate 1. The heating process was a single stage, and the heating rate remained unchanged. The heating rate was set to 100°C / min or less. The film deposition temperature was set to 1600°C or higher but lower than 1700°C. The heating time was 750 seconds or more.

[0081] In the comparative example, no purge gas was supplied to the back side of the SiC substrate 1. Furthermore, because the heating rate was slower compared to the embodiment, the height of the center of the mounting surface of the SiC substrate 1 was less than 30 μm higher than the height of the outermost periphery in the temperature range of 1600°C to 1700°C.

[0082] Furthermore, after fabrication, the boron concentration at the center p1 of the SiC epitaxial wafer of Comparative Example 1 and the boron concentration at four points p2 located 5 mm inward from the outer periphery were measured. The boron concentration at the center p1 of Comparative Example 1 was 9.2 × 10⁻⁶. 14 cm -3 The boron concentration at point p2 is 8.1 × 10⁻⁶. 13 cm -3 Therefore, the SiC epitaxial wafer of Comparative Example 1 has a boron concentration of 1.0 × 10⁻⁶. 14 cm -3 The above-mentioned areas.

Claims

1. A SiC epitaxial wafer, It comprises a SiC substrate and an epitaxial layer of SiC stacked on the SiC substrate. The epitaxial layer contains impurities that determine the conductivity type and boron with a conductivity type different from that of the impurities. In the epitaxial layer, the concentration of boron is less than 1.0 × 10⁻⁶ at any location within the plane. 14 cm -3 .

2. The SiC epitaxial wafer according to claim 1, The diameter is 150mm or more.

3. The SiC epitaxial wafer according to claim 1 or 2, The diameter is 200mm or more.

4. A method for manufacturing SiC epitaxial wafers, This includes a film deposition process in which an epitaxial layer of SiC is formed on a SiC substrate using a vertical furnace with a gas supply port located above the mounting surface of the SiC substrate. The film-forming process includes a heating process in which the heating rate is changed in the order of the first heating rate, the second heating rate, and the third heating rate while the temperature is raised to the film-forming temperature. The first heating rate is faster than the second heating rate. The second heating rate is faster than the third heating rate. The first heating rate is 100℃ / min or higher. At the film-forming temperature, the height of the center of the mounting surface of the SiC substrate is more than 30 μm higher than the height of the outer periphery.

5. The method for manufacturing SiC epitaxial wafers according to claim 4, In the film formation process, purge gas is supplied from the back side of the SiC substrate. The purging gas is supplied from a position at least 20 mm inside the outer periphery of the SiC substrate.

6. The method for manufacturing SiC epitaxial wafers according to claim 4 or 5, The heating process requires a time of more than 300 seconds and less than 750 seconds.

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