Circuit board and method of manufacturing the same

Abstract

A circuit board comprises a first circuit substrate and second and third circuit substrates arranged on opposite sides of the first circuit substrate, the first circuit substrate is provided with a plurality of capillary holes, the second circuit substrate is provided with a first cavity, the first cavity contains a cooling liquid, and the third circuit substrate is provided with a second cavity, each capillary hole is in communication with the first cavity and the second cavity. The application also relates to a manufacturing method of the circuit board.

Description

Technical Field

[0001] This invention relates to the field of circuit boards, and more particularly to a circuit board capable of rapid heat dissipation and its manufacturing method. Background Technology

[0002] With the development of science and technology, more and more components are being integrated into electronic devices, making heat dissipation a crucial parameter affecting their performance. Current electronic devices dissipate heat generated by components mounted on the circuit board using the circuit board itself or metal reinforcing plates mounted on it. However, this heat dissipation method is dependent on the ambient temperature of the circuit board and has relatively poor heat dissipation efficiency. Summary of the Invention

[0003] In view of this, the present invention provides a circuit board and a method for manufacturing the same, which solves the above-mentioned technical problems.

[0004] This application provides a circuit board including a first circuit board and a second circuit board and a third circuit board disposed on opposite sides of the first circuit board. The first circuit board has a plurality of capillary holes, the second circuit board has a first cavity containing a coolant, and the third circuit board has a second cavity. Each capillary hole connects the first cavity and the second cavity.

[0005] This application also provides a method for manufacturing a circuit board, comprising the following steps:

[0006] A double-sided substrate is provided, including a first base layer and a first metal foil and a second metal foil disposed on opposite sides of the first base layer, wherein the double-sided substrate has a plurality of capillary pores;

[0007] A first dry film and a second dry film are respectively laminated on the side of the first metal foil and the second metal foil away from the first substrate, and the first dry film and the second dry film are exposed and developed to form a plurality of first through holes and a plurality of second through holes respectively.

[0008] A plurality of first metal pillars and a plurality of second metal pillars are formed in the plurality of first through holes and the plurality of second through holes, wherein the plurality of first metal pillars are all connected to the first metal foil and disposed adjacent to the plurality of capillaries, and the plurality of second metal pillars are all connected to the second metal foil and disposed adjacent to the plurality of capillaries.

[0009] Remove the first dry film and the second dry film, and fabricate circuits on the first metal foil and the second metal foil to form a first conductive layer and a second conductive layer;

[0010] A first metal adhesive is formed at one end of the plurality of first metal pillars opposite to the first conductive layer;

[0011] A second base layer and a third metal foil are sequentially laminated on one side of the first conductive layer. The second base layer has a first cavity. The plurality of first metal pillars pass through the first cavity and are connected to the third metal foil through the first metal adhesive. The third metal foil covers one end of the first cavity.

[0012] Inject coolant into the first cavity;

[0013] A second metal adhesive is formed at one end of the plurality of second metal pillars opposite to the second conductive layer;

[0014] A third base layer and a fourth metal foil are sequentially laminated on one side of the second conductive layer. The third base layer has a second cavity. The plurality of second metal pillars pass through the second cavity and are connected to the fourth metal foil through the second metal adhesive. The fourth metal foil covers one end of the second cavity.

[0015] A third conductive layer and a fourth conductive layer are formed by fabricating circuitry on the third metal foil and the fourth metal foil.

[0016] In the circuit board and its manufacturing method provided in this application, the first cavity and the second cavity are connected through capillary pores, and the heat introduced into the second cavity is quickly conducted to the first cavity through the coolant, that is, the heat on one side of the circuit board is quickly conducted to the other side, thereby improving the heat dissipation efficiency. Attached Figure Description

[0017] Figure 1 This is a cross-sectional schematic diagram of a circuit board provided in one embodiment of this application.

[0018] Figure 2 for Figure 1 A partial 3D schematic diagram of the circuit board shown.

[0019] Figures 3 to 11 This is a cross-sectional schematic diagram of the manufacturing process of a circuit board according to an embodiment of this application.

[0020] Explanation of main component symbols

[0021] Circuit board 100

[0022] First circuit board 10

[0023] Second circuit board 20

[0024] First grassroots level 11

[0025] First conductive layer 12

[0026] Second conductive layer 13

[0027] 101 pores

[0028] Metal layer 14

[0029] First Metal Pillar 161

[0030] Second metal pillar 162

[0031] Covering membrane 15

[0032] Second grassroots level 21

[0033] Third conductive layer 22

[0034] First cavity 201

[0035] Coolant 50

[0036] Third grassroots level 31

[0037] Fourth conductive layer 32

[0038] Second cavity 301

[0039] First metal adhesive 41

[0040] Second metal binder 42

[0041] Second annular hole 221

[0042] Part 1, 222, 322

[0043] Part Two, 223, 323

[0044] First annular hole 321

[0045] Opening 401

[0046] Original copper layer 121

[0047] Copper plating layer 123

[0048] Solder resist layer 70

[0049] Weldproof opening 71

[0050] Conductive structure 60

[0051] Chip 80

[0052] Thermal adhesive 90

[0053] Wire 81

[0054] Double-sided substrate 300

[0055] First metal foil 310

[0056] Second metal foil 320

[0057] First dry film 200

[0058] Second dry film 400

[0059] First through hole 210

[0060] Second through hole 410

[0061] 500 tapes

[0062] Third metal foil 330

[0063] Fourth metal foil 340

[0064] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation

[0065] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments.

[0066] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0067] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the following embodiments and features can be combined or substituted with each other.

[0068] Please see Figure 1 One embodiment of this application provides a circuit board 100, including a first circuit board 10 and a second circuit board 20 and a third circuit board 30 disposed on opposite sides of the first circuit board 10.

[0069] The first circuit board 10 includes a first base layer 11, a first conductive layer 12, and a second conductive layer 13. The first conductive layer 12 and the second conductive layer 13 are respectively disposed on opposite sides of the first base layer 11.

[0070] The first circuit board 10 has a plurality of capillary holes 101, which penetrate the first base layer 11, the first conductive layer 12, and the second conductive layer 13. By setting the pore diameter of the capillary holes 101 and the thickness of the first circuit board 10, the capillary holes 101 have a capillary effect. The pore walls of the capillary holes 101 are covered with a metal layer 14, and the two ends of the metal layer 14 are respectively connected to the first conductive layer 12 and the second conductive layer 13.

[0071] In some embodiments, the surface of the metal layer 14 is provided with a browning layer (not shown) to increase the surface roughness of the metal layer 14.

[0072] A plurality of first metal pillars 161 are disposed on the first conductive layer 12. The plurality of first metal pillars 161 are disposed adjacent to the plurality of capillaries 101. (See also...) Figure 2 In this embodiment, the plurality of first metal pillars 161 and the plurality of capillaries 101 are arranged in an array.

[0073] A plurality of second metal pillars 162 are disposed on the second conductive layer 13. The plurality of second metal pillars 162 are disposed adjacent to the plurality of capillaries 101. (See also...) Figure 2 In this embodiment, the plurality of second metal pillars 162 and the plurality of capillaries 101 are arranged in an array.

[0074] The first base layer 11 can be made of dielectric materials commonly used in the art, such as polyimide, epoxy resin, glass fiber prepreg, carbon fiber prepreg, etc. In this embodiment, the first base layer 11 is made of a flexible dielectric material.

[0075] The first circuit board 10 further includes two cover films 15. The two cover films 15 respectively cover the portions of the first conductive layer 12 and the second conductive layer 13 that are away from the first base layer 11. The two cover films 15 are positioned opposite each other. The portion of the first circuit board 10 corresponding to the two cover films 15 is designated as a curved region, and the other regions are designated as non-bent regions.

[0076] The second circuit board 20 includes a second base layer 21 and a third conductive layer 22 disposed on the second base layer 21. The second base layer 21 is bonded to the first conductive layer 12. The second base layer 21 has a first cavity 201, through which a portion of the third conductive layer 22 is exposed. The plurality of first metal pillars 161 are housed in the first cavity 201 and connected to the third conductive layer 22 by a first metal adhesive 41. The first metal adhesive 41 is sandwiched between the first metal pillars 161 and the third conductive layer 22. The plurality of capillaries 101 communicate with the first cavity 201.

[0077] The first cavity 201 contains a coolant 50. The coolant 50 is a non-conductive liquid, which can be pure water, ethylene glycol, etc.

[0078] The third circuit board 30 includes a third base layer 31 and a fourth conductive layer 32 disposed on the third base layer 31. The third base layer 31 is bonded to the second conductive layer 13. The third base layer 31 has a second cavity 301, through which a portion of the fourth conductive layer 32 is exposed. The plurality of second metal pillars 162 are housed in the second cavity 301 and connected to the fourth conductive layer 32 by a second metal adhesive 42. The second metal adhesive 42 is sandwiched between the fourth conductive layer 32 and the second metal pillars 162. The plurality of capillaries 101 are connected to the second cavity 301. Coolant 50 contained in the first cavity 201 can enter the second cavity 301 through the capillary action.

[0079] A second annular hole 221 is formed on the third conductive layer 22. The second annular hole 221 surrounds the periphery of the first cavity 201 and exposes a portion of the second base layer 21, dividing the third conductive layer 22 into a first part 222 and a second part 223 that are isolated from each other. The position of the first part 222 corresponds to the position of the first cavity 201, and the second part 223 is disposed on the second base layer 21 and surrounds the first part 222. The heat conducted from the first cavity 201 is dissipated only through the first part 222, thereby reducing the impact of heat on the circuitry on the second part 223.

[0080] A first annular hole 321 is formed on the fourth conductive layer 32. The first annular hole 321 surrounds the periphery of the second cavity 301 and exposes a portion of the third base layer 31, dividing the fourth conductive layer 32 into a first part 322 and a second part 323 that are isolated from each other. The position of the first part 322 corresponds to the position of the second cavity 301, and the second part 323 is disposed on the third base layer 31. The first part 322 is used to mount the chip 80, and the heat emitted by the chip 80 is only introduced into the second cavity 301 through the first part 322, thereby reducing the impact of heat on the circuitry on the second part 323.

[0081] The materials of the second base layer 21 and the third base layer 31 can both be commonly used dielectric materials in the art, such as polyimide, epoxy resin, glass fiber prepreg, carbon fiber prepreg, etc. In this embodiment, the materials of the second base layer 21 and the third base layer 31 are both rigid dielectric materials.

[0082] Both the second circuit board 20 and the third circuit board 30 have openings 401 to expose portions of the corresponding cover film 15, thereby allowing the circuit board 100 to be bent at the cover film 15.

[0083] The materials of the first conductive layer 12, the second conductive layer 13, the third conductive layer 22, the fourth conductive layer 32, the first metal pillar 161, and the second metal pillar 162 may include, but are not limited to, copper, gold, silver, etc.

[0084] The first conductive layer 12, the second conductive layer 13, the third conductive layer 22, and the fourth conductive layer 32 each include a primary copper layer 121 and a copper-plated layer 123 stacked together. The primary copper layer 121 is copper foil.

[0085] The circuit board 100 further includes a solder resist layer 70 disposed on the third conductive layer 22 and the fourth conductive layer 32. The solder resist layer 70 has solder resist openings 71. The first portion 222 of the third conductive layer 22 and the first portion 322 of the fourth conductive layer 32 are exposed from the corresponding solder resist openings 71. A portion of the cover film 15 is also exposed outside the corresponding solder resist layer 70.

[0086] The circuit board 100 also includes a plurality of conductive structures 60 for electrically connecting adjacent conductive layers. The conductive structures may be, but are not limited to, conductive pillars or conductive vias.

[0087] The circuit board 100 also includes a chip 80. The chip 80 is mounted on the first portion 322 of the fourth conductive layer 32. The electrode side of the chip 80 is disposed away from the fourth conductive layer 32, and thermally conductive adhesive 90 is sandwiched between the chip 80 and the first portion 322 of the fourth conductive layer 32 to improve heat dissipation efficiency. The electrode side of the chip 80 is electrically connected to the second portion 323 via a wire 81.

[0088] The heat generated by the chip 80 is transferred to the second cavity 301 through the first part 322 of the fourth conductive layer 32. The coolant 50 in the second cavity 301 absorbs heat and evaporates. The evaporated gas returns to the first cavity 201 through the capillary pores 101 and condenses into liquid. Then, the coolant 50 in the first cavity 201 is transported back to the second cavity 301 through capillary action. This cycle is repeated to quickly transfer the heat generated by the chip 80 from the first part 322 of the fourth conductive layer 32 to the first part 222 of the third conductive layer 22, thereby achieving the function of heat dissipation and cooling, and improving heat dissipation efficiency.

[0089] Please see Figures 3 to 11 One embodiment of this application provides a method for manufacturing a circuit board, which includes the following steps:

[0090] Step S1, please refer to Figure 3 A double-sided substrate 300 is provided. The double-sided substrate 300 includes a first base layer 11 and a first metal foil 310 and a second metal foil 320 disposed on opposite sides of the first base layer 11.

[0091] The double-sided substrate 300 has a plurality of capillary holes 101, which penetrate the first base layer 11, the first metal foil 310, and the second metal foil 320. The walls of the capillary holes 101 are covered with a metal layer 14, and the two ends of the metal layer 14 are respectively connected to the first metal foil 310 and the second metal foil 320.

[0092] The capillary pores 101 can be formed by mechanical drilling or laser drilling. The metal layer 14 can be formed by electroplating.

[0093] For step S2, please refer to [link / reference]. Figure 4A first dry film 200 and a second dry film 400 are respectively laminated onto the sides of the first metal foil 310 and the second metal foil 320 opposite to the first substrate 11. The first dry film 200 and the second dry film 400 are then exposed and developed to form a plurality of first through-holes 210 and a plurality of second through-holes 410. The plurality of first through-holes 210 and the plurality of second through-holes 410 are all disposed adjacent to the plurality of capillaries 101. A portion of the first metal foil 310 is exposed through the first through-hole 210, and a portion of the second metal foil 320 is exposed through the second through-hole 410.

[0094] Step S3, please refer to Figure 4 A plurality of first metal pillars 161 and a plurality of second metal pillars 162 are formed in the plurality of first through holes 210 and the plurality of second through holes 410, respectively, by a pattern electroplating process. The plurality of first metal pillars 161 and the plurality of second metal pillars 162 are respectively connected to the first metal foil 310 and the second metal foil 320.

[0095] For step S4, please refer to [link / reference]. Figure 5 Remove the first dry film and the second dry film, fabricate circuits on the first metal foil and the second metal foil to form a first conductive layer 12 and a second conductive layer 13, and form a first metal adhesive 41 at the end of the first metal pillar 161 away from the first conductive layer 12 to obtain the first circuit substrate 10.

[0096] In some embodiments, the step S4 is followed by the step of browning the metal layer 14 to increase the surface roughness of the walls of the capillary pores 101.

[0097] Step S5, please refer to Figure 5 Covering films 15 are formed on the side of the first conductive layer 12 and the second conductive layer 13 away from the first base layer 11, and adhesive tape 500 is formed on the covering films 15.

[0098] For step S6, please refer to [link / reference]. Figure 6 The system provides a second base layer 21 and a third metal foil 330. The second base layer 21 has a first cavity 201 for the plurality of first metal pillars 161 to pass through in a subsequent pressing process.

[0099] For step S7, please refer to [link / reference]. Figure 7The second base layer 21 and the third metal foil 330 are sequentially pressed onto the side of the first circuit board 10 where the first conductive layer 12 is located. The second base layer 21 is connected to the first conductive layer 12. The first metal pillar 161 passes through the first cavity 201 and is connected to the third metal foil 330 via the first metal adhesive 41. The third metal foil 330 covers the side of the first cavity 201 opposite to the first conductive layer 12. The capillary pore 101 is connected to the first cavity 201. The second base layer 21 is also covered by a cover film 15 and adhesive tape 500 disposed on the first conductive layer 12.

[0100] The glass transition temperature of the first metal adhesive 41 is lower than that of the second base layer 21, so that during pressing, the first metal adhesive 41 preferentially bonds to the first metal pillar 161.

[0101] Step S8, please refer to Figure 7 Coolant 50 is injected into the first cavity 201.

[0102] For step S9, please refer to [link / reference]. Figure 8 A second metal adhesive 42 is formed at one end of the second metal pillar 162 away from the second conductive layer 13, providing a third base layer 31 and a fourth metal foil 340. The third base layer 31 has a second cavity 301 for the plurality of second metal pillars 162 to pass through in a subsequent pressing process.

[0103] Step S10, please refer to Figure 9 The third base layer 31 and the fourth metal foil 340 are sequentially pressed onto the side of the first circuit board 10 where the second conductive layer 13 is located. The third base layer 31 is connected to the second conductive layer 13. The second metal pillar 162 passes through the second cavity 301 and is connected to the fourth metal foil 340 via the second metal adhesive 42. The fourth metal foil 340 covers the side of the second cavity 301 opposite to the second conductive layer 13. The capillary pore 101 is connected to the second cavity 301. The third base layer 31 is also covered by a cover film 15 and adhesive tape 500 disposed on the second conductive layer 13.

[0104] The glass transition temperature of the second metal adhesive 42 is lower than that of the third base layer 31, so that during pressing, the second metal adhesive 42 preferentially bonds to the second metal pillar 162.

[0105] Step S11, please refer to Figure 10A third conductive layer 22 and a fourth conductive layer 32 are formed on the third metal foil 330 and the fourth metal foil 340.

[0106] Both the third conductive layer 22 and the fourth conductive layer 32 are provided with openings 401. The portion of the second base layer 21 corresponding to the adhesive tape 500 is exposed in the opening 401 on the third conductive layer 22, and the portion of the third base layer 31 corresponding to the adhesive tape 500 is exposed in the opening 401 on the fourth conductive layer 32. The edges of the openings 401 are aligned with the edges of the adhesive tape 500.

[0107] The third conductive layer 22 is further provided with a second annular hole 221, which surrounds the periphery of the first cavity 201 and exposes a portion of the second base layer 21, thereby dividing the third conductive layer 22 into a first part 222 and a second part 223 that are isolated from each other. The fourth conductive layer 32 is further provided with a first annular hole 321, which surrounds the periphery of the second cavity 301 and exposes a portion of the third base layer 31, thereby dividing the fourth conductive layer 32 into a first part 322 and a second part 323 that are isolated from each other.

[0108] The opening 401, the second annular hole 221, and the first annular hole 321 can be formed by mechanical drilling or laser drilling.

[0109] Step S12, please refer to Figure 11 A solder resist layer 70 is formed on the surfaces of the third conductive layer 22 and the fourth conductive layer 32. The solder resist layer 70 has solder resist openings 71. The first portion 222 of the third conductive layer 22 and the first portion 322 of the fourth conductive layer 32 are exposed from the corresponding solder resist openings 71.

[0110] Step S13, please refer to Figure 11 Cut the second base layer 21 and the third base layer 31 along the edge of the opening 401 and remove the tape 500 to expose a portion of the covering film 15 into the opening 401.

[0111] In this embodiment, the tape 500 is removed by tearing off the tape. When removing the tape 500, the second base layer 21 / third base layer 31 located on the tape 500 are also removed.

[0112] Step S14, please refer to Figure 1A chip 80 is mounted on the first portion 322 of the fourth conductive layer 32. The electrode side of the chip 80 is disposed away from the fourth conductive layer 32, and thermally conductive adhesive 90 is sandwiched between the chip 80 and the first portion 322 of the fourth conductive layer 32. The electrode side of the chip 80 is electrically connected to the second portion 323 via a wire 81.

[0113] In the circuit board and its manufacturing method provided in this application, the first cavity and the second cavity are connected through capillary pores, and the heat introduced into the second cavity is quickly conducted to the first cavity through the coolant, that is, the heat on one side of the circuit board is quickly conducted to the other side, thereby improving the heat dissipation efficiency.

[0114] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above as a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A circuit board, comprising a first circuit board and a second circuit board and a third circuit board disposed on opposite sides of the first circuit board, characterized in that, The first circuit board has multiple capillary pores, the second circuit board has a first cavity containing coolant, and the third circuit board has a second cavity. The first circuit board includes a first base layer and a first conductive layer and a second conductive layer disposed on opposite sides of the first base layer. The second circuit board includes a second base layer and a third conductive layer disposed on the second base layer. The second base layer is connected to the first conductive layer. The first cavity is formed in the second base layer, and a portion of the third conductive layer is exposed from the first cavity, with the third conductive layer covering one end of the first cavity. The third circuit board includes a third base layer and a fourth conductive layer disposed on the third base layer. The third base layer is connected to the second conductive layer. The second cavity is formed in the third base layer. A portion of the fourth conductive layer is exposed in the second cavity. The fourth conductive layer covers one end of the second cavity. The capillaries penetrate the first base layer, the first conductive layer, and the second conductive layer. Each capillary connects the first cavity and the second cavity. A plurality of first metal pillars are provided on the first conductive layer. The plurality of first metal pillars are housed in the first cavity and are all connected to the third conductive layer by a first metal adhesive. And / or, a plurality of second metal pillars are provided on the second conductive layer. The plurality of second metal pillars are housed in the second cavity and are all connected to the fourth conductive layer by a second metal adhesive.

2. The circuit board as described in claim 1, characterized in that, The capillary pore wall is provided with a metal layer, and the two ends of the metal layer are respectively connected to the first conductive layer and the second conductive layer.

3. The circuit board as described in claim 1, characterized in that, The circuit board also includes a chip disposed on the fourth conductive layer, and thermally conductive adhesive is sandwiched between the chip and the fourth conductive layer.

4. The circuit board as described in claim 3, characterized in that, The fourth conductive layer has a first annular hole. The first annular hole surrounds the periphery of the second cavity and exposes a portion of the third base layer, and divides the fourth conductive layer into a first part and a second part that are isolated from each other. The position of the first part corresponds to the position of the second cavity, and the chip is disposed on the first part.

5. A method for manufacturing a circuit board, characterized in that, Includes the following steps: A double-sided substrate is provided, including a first base layer and a first metal foil and a second metal foil disposed on opposite sides of the first base layer, wherein the double-sided substrate has a plurality of capillary pores; A first dry film and a second dry film are respectively laminated on the side of the first metal foil and the second metal foil away from the first substrate, and the first dry film and the second dry film are exposed and developed to form a plurality of first through holes and a plurality of second through holes respectively. A plurality of first metal pillars and a plurality of second metal pillars are formed in the plurality of first through holes and the plurality of second through holes, wherein the plurality of first metal pillars are all connected to the first metal foil and disposed adjacent to the plurality of capillaries, and the plurality of second metal pillars are all connected to the second metal foil and disposed adjacent to the plurality of capillaries. Remove the first dry film and the second dry film, and fabricate circuits on the first metal foil and the second metal foil to form a first conductive layer and a second conductive layer; A first metal adhesive is formed at one end of the plurality of first metal pillars opposite to the first conductive layer; A second base layer and a third metal foil are sequentially laminated on one side of the first conductive layer. The second base layer has a first cavity. The plurality of first metal pillars pass through the first cavity and are connected to the third metal foil through the first metal adhesive. The third metal foil covers one end of the first cavity. Inject coolant into the first cavity; A second metal adhesive is formed at one end of the plurality of second metal pillars opposite to the second conductive layer; A third base layer and a fourth metal foil are sequentially laminated on one side of the second conductive layer. The third base layer has a second cavity. The plurality of second metal pillars pass through the second cavity and are connected to the fourth metal foil through the second metal adhesive. The fourth metal foil covers one end of the second cavity. A third conductive layer and a fourth conductive layer are formed by fabricating circuitry on the third metal foil and the fourth metal foil.

6. The method for manufacturing a circuit board as described in claim 5, characterized in that, The glass transition temperature of the first metal adhesive is lower than that of the second substrate, and the glass transition temperature of the second metal adhesive is lower than that of the third substrate.

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