Automatic Optimization Method for Analog Integrated Circuit Design Parameters Based on Deep Neural Networks

Abstract

This invention belongs to the field of integrated circuit design technology, specifically a method for rapid and automatic optimization of analog integrated circuit design parameters. The method includes: defining a design goal; fixing the circuit topology; defining N circuit device parameter variables and setting their ranges; defining a performance space P; defining the optimization target variable; actual simulation; and optimization using a deep neural network model. This method is highly goal-oriented, with continuous step size changes, significantly improving both optimization accuracy and speed. The deep neural network can memorize circuit optimization experience, eliminating the need to retrain the algorithm from scratch for new optimization goals. Simultaneously, a circuit optimization model library can be established, enabling direct access from different computers within seconds, making the entire design process more convenient and efficient.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit design technology, specifically relating to a method for rapid and automatic optimization of analog integrated circuit design parameters. Background Technology

[0002] The design parameter optimization process for analog integrated circuits can be summarized as follows (see Figure 3 As shown in the diagram: Given the design goals and topology of an analog circuit, designers use their experience or relevant optimization methods to find circuit design parameters that meet the design goals. The relationship between high-dimensional design parameters and circuit performance indicators is complex and non-linear. Relying solely on manual calculations is inefficient. Mathematical methods can be used to transform this problem into a constrained non-linear programming problem, which can then be solved using optimization algorithms.

[0003] Currently, commonly used optimization methods include heuristic algorithms and machine learning algorithms. Heuristic algorithms include genetic algorithms, simulated annealing algorithms, particle swarm optimization, etc., which essentially accelerate the parameter optimization process by reducing the number of simulations. Machine learning algorithms include supervised learning, unsupervised learning, reinforcement learning, etc., with neural networks playing the role of the "brain" in the model's learning process.

[0004] Currently used circuit simulation software takes a long time to perform a single simulation, and there is no commercial software in the industry that can quickly and accurately calculate and output user-level circuit design parameters when given circuit performance requirements. Instead, it is necessary to re-optimize from scratch to achieve the design of a new circuit, and the optimization model cannot be shared across multiple terminals, which seriously reduces optimization efficiency. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides an automatic optimization method for analog integrated circuit design parameters based on deep neural networks. This method solves the problem that currently, there is no commercial software in the industry that can quickly and automatically calculate and output user-level circuit design parameters after a given circuit performance index requirement. The optimization accuracy and speed cannot be balanced, and the optimization needs to be restarted from scratch whenever the optimization target or the usage environment changes.

[0006] The present invention provides an automatic optimization method for analog integrated circuit design parameters based on deep neural networks, comprising the following steps: A1. Define the design objectives; A2. Fixed circuit topology; A3. Define N circuit device parameter variables and set their ranges; A4. Define the performance space P, which is to perform circuit simulation after randomly assigning values ​​to the circuit device parameter variables within a specified range. The resulting performance points constitute the actual performance space P of the circuit, effectively avoiding the use of unrealistic circuit performance points. A5. Define the optimization target variable, that is, uniformly sample in the performance space P to obtain M points covering the performance space P as the optimization target variable. These M points constitute the optimization target variable set Q as the training set. Randomly sample from Q to obtain the optimization target variable for this round. A6. Obtain the actual simulation results, that is, write the N variable values ​​of this round into the circuit netlist, perform circuit simulation, and obtain the actual simulation results of this round. A7. Inputting the values ​​of N variables in this round, the target variable for optimization, and the actual simulation results into the deep neural network model, and using the target variable for optimization and the actual simulation results as inputs, can more effectively guide the algorithm to optimize in the target direction based on the existing situation; A8. The deep neural network calculates and outputs the changes corresponding to N variables, and then updates the values ​​of N variables. Here, the step size of the change is continuous rather than a fixed value, which helps the algorithm converge to the target faster. A9. Write the above N new variable values ​​into the circuit netlist and perform circuit simulation. Evaluate the performance of the difference between the simulation results and the optimization target. Determine whether the evaluation result meets the standard. Case 1: If the evaluation result meets the standard, directly output the optimization result. Case 2: If the evaluation result does not meet the standard, improve the parameters of the deep neural network model, and then perform a new round of variable update, circuit simulation and performance evaluation until the termination condition is met and the optimization result is output. A10. Update the circuit design and save the deep neural network model structure; A11. When there is a new optimization target, the saved deep neural network model structure can be directly called to achieve second-level optimization of any target in the performance space P on any computer. There is no need to train the algorithm from scratch. The optimization capability generalizes from the limited training set to the entire performance space, which greatly improves the design efficiency.

[0007] The beneficial effects of this invention are as follows: This method for automatic optimization of analog integrated circuit design parameters based on deep neural networks uses deep neural networks to calculate continuously changing component design parameter values. By adding optimization target variables as input, its target orientation is improved. It is superior to other algorithms that have disadvantages such as fixed parameter change step size and redundant iteration, and achieves a balance between optimization speed and optimization accuracy.

[0008] This method for automatic optimization of analog integrated circuit design parameters based on deep neural networks utilizes deep neural networks to optimize the design parameters of analog integrated circuits. It has memory of previous circuit optimization experience, so it can directly call the neural network for new optimization targets. The optimization capability generalizes from the limited training set to the entire performance space without having to retrain the neural network from scratch, which greatly reduces the optimization time consumption and improves optimization efficiency.

[0009] This method for automatically optimizing analog integrated circuit design parameters based on deep neural networks can save trained deep neural network models of different circuits to build a circuit optimization model library. It enables direct calling on different computers in seconds, without relying on the designer's prior knowledge, simplifying the optimization steps, lowering the design threshold, and improving optimization efficiency. Attached Figure Description

[0010] Figure 1 This is a flowchart illustrating the operation of the present invention.

[0011] Figure 2 This is a schematic diagram of the structure of the present invention.

[0012] Figure 3 A schematic diagram illustrating the process of optimizing design parameters for analog integrated circuits. Detailed Implementation

[0013] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0014] like Figure 1-3 As shown, this invention provides a technical solution: an automatic optimization method for analog integrated circuit design parameters based on deep neural networks, comprising the following steps: A1. Define the design objectives; A2. Fixed circuit topology; A3. Define N circuit device parameter variables and set their ranges; A4. Define the performance space P, where this step includes: Method 1; A5. Define the target variable for optimization, which includes: Method 2; A6. Obtain the actual simulation results, which includes: Method 3; A7. Inputting the values ​​of N variables in this round, the target variable for optimization, and the actual simulation results into the deep neural network model, and using the target variable for optimization and the actual simulation results as inputs, can more effectively guide the algorithm to optimize in the target direction based on the existing situation; A8. The deep neural network calculates and outputs the changes corresponding to N variables, and then updates the values ​​of N variables. Here, the step size of the change is continuous rather than a fixed value, which helps the algorithm converge to the target faster. A9. Write the above N new variable values ​​into the circuit netlist and perform circuit simulation. Evaluate the performance of the difference between the simulation results and the optimization target. Determine whether the evaluation result meets the standard. Case 1: If the evaluation result meets the standard, directly output the optimization result. Case 2: If the evaluation result does not meet the standard, improve the parameters of the deep neural network model, and then perform a new round of variable update, circuit simulation and performance evaluation until the termination condition is met and the optimization result is output. A10. Update the circuit design and save the deep neural network model structure; A11. When there is a new optimization target, the saved deep neural network model structure can be directly called to achieve second-level optimization of any target in the performance space P on any computer. There is no need to train the algorithm from scratch. The optimization capability generalizes from the limited training set to the entire performance space, which greatly improves the design efficiency.

[0015] Method 1 includes: randomly assigning values ​​to the circuit device parameters within a specified range and then performing circuit simulation; the resulting performance points constitute the actual performance space P of the circuit. Method 2 includes: uniformly sampling in the performance space P to obtain M points covering the performance space P as optimization target variables. These M points constitute the optimization target variable set Q as the training set, and the optimization target variables for this round are randomly sampled from Q. Method 3 involves writing the values ​​of N variables for this round into the circuit netlist and performing circuit simulation to obtain the actual simulation results for this round.

[0016] The operation of the automatic optimization method for analog integrated circuit design parameters based on deep neural networks includes the following steps: B1. Define the design goals and fix the circuit topology, if necessary B i Performance reaches target value b i Then choose the one with B. i Circuit A, with its superior performance, is optimized through training to improve its performance (B). i Performance reaches target value b i In this step, B i It can be gain, gain-bandwidth product, quiescent current, etc., and A can be a two-stage operational amplifier circuit, i=1, 2, 3, ...; B2. Obtain the performance space P. This step involves the following method: After randomly assigning multiple values ​​to the N device parameter variables of circuit A within a specified range, perform circuit simulation. The resulting performance points constitute the actual performance space P that circuit A can achieve. B2. Obtain the optimization target variable. This step involves the following method: uniformly sample in the performance space P to obtain M points covering the performance space P as optimization target variables. These M points constitute the optimization target variable set Q as the training set. Randomly sample from Q to obtain the optimization target variable for this round. B3. Initialize N circuit device parameter variables. Random values ​​or default values ​​can be assigned. B4. Run circuit simulation and obtain actual simulation results. This step involves the following methods: write the values ​​of N variables for this round into the circuit netlist, perform circuit simulation, and obtain the actual simulation results for this round. In this step, circuit simulation can be performed on open-source SPICE, such as ngspice, on commercial SPICE, or on independently developed SPICE. B5. Input the values ​​of N variables in this round, the target variable for optimization, and the actual simulation results into the deep neural network model. In this step, the deep neural network model simulation is performed on the open-source OpenAI platform. B6. The deep neural network model outputs the changes corresponding to N variables. Based on these results, the N circuit parameter variables are updated, and then the corresponding B is calculated. i The actual simulation results are used as the performance indicators for this round. B7. Compare the current performance metrics with the expected metrics (i.e., the optimization target variable), calculate the relative error, and determine whether to proceed to the next iteration based on the magnitude of the relative error and whether the number of iterations has reached the preset value. B8. Iterate through the circuit and deep neural network parameters until the exit condition is met. B9. Update the circuit design. In this step, the design can be changed by directly changing the netlist or by changing the schema. These can all be achieved through software. The development language can be Python, C, C++, Java, or Perl. B10. Save the deep neural network model structure so that it can be directly called in seconds when there is an optimization need. In this step, the optimization target can be arbitrarily selected from the performance space P, the optimization capability can generalize from the limited training set to the entire performance space, the model can be called on any computer, and the optimization speed is 94 times faster than mainstream methods (such as genetic algorithms), achieving the best balance between optimization accuracy and optimization speed.

[0017] In summary: The differences between this invention and current mainstream policy software are as follows: S1. Current mainstream methods for optimizing circuit parameters suffer from disadvantages such as fixed parameter change step sizes and redundant iterations. This invention utilizes deep neural networks to calculate continuously changing component design parameter values ​​and adds an optimization target variable as input to improve the algorithm's goal orientation, thus solving the problem of the inability to balance optimization speed and accuracy. S2. Mainstream methods lack memory of previous work experience when designing new circuits, and all parameter optimization processes need to be repeated. This invention can learn optimization experience and store the experience in the deep neural network inside the model. Therefore, it is not necessary to retrain the algorithm from scratch for new design goals. The optimization capability generalizes from the limited training set to the entire performance space, which greatly reduces the optimization time consumption and improves design efficiency. S3. Mainstream methods rely on the designer's background knowledge and experience, testing the designer's own design capabilities. This invention can save the trained deep neural network models of different circuits, establish a circuit optimization model library, and achieve direct calling in seconds on different computers, reducing the design threshold and greatly improving optimization efficiency.

[0018] The specific embodiments described above further illustrate the purpose, technical solution, and beneficial effects of the present invention. It should be understood that the above description is only a specific embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. An automatic optimization method for analog integrated circuit design parameters based on deep neural networks, characterized in that, Includes the following steps: A1. Define the design objectives; A2. Fixed circuit topology; A3. Define N circuit device parameter variables and set their ranges; A4. Constructing the performance space P: After randomly assigning values ​​to the circuit device parameters within a specified range, the circuit simulation is performed, and the resulting performance points constitute the actual performance space P that the circuit can achieve. A5. Construct the optimization target variable set Q: Uniformly sample in the performance space P to obtain M points covering the entire performance space P as optimization target variables. The M points constitute the optimization target variable set Q, which serves as the training set. A6. Randomly sample the target variables for this round of optimization from the set of target variables Q; A7. Write the N variable values ​​of this round into the circuit netlist and perform circuit simulation to obtain the actual simulation results of this round. A8. Input the values ​​of N variables in this round, the target variable for optimization in this round, and the actual simulation results in this round into the deep neural network model; A9. A deep neural network model calculates and outputs the continuous changes of N variables, and updates the values ​​of N variables accordingly. A10. Write the updated N variable values ​​into the circuit netlist and perform circuit simulation to obtain new simulation results; A11. Compare and evaluate the new simulation results with the optimization objective: If the evaluation results meet the standards, the optimized results will be output. If the evaluation results are not satisfactory, update the parameters of the deep neural network model and repeat steps A8 to A11 until the termination condition is met. A12. Save the structure of the trained deep neural network model; A13. When there is a new optimization objective, the saved deep neural network model structure can be directly called to optimize any new objective in the performance space P without training the algorithm from scratch.

2. The automatic optimization method for analog integrated circuit design parameters according to claim 1, characterized in that, The specific usage procedure is as follows: B1. Define the design objectives and fix the circuit topology; Assuming B is needed i Performance reaches target value b i Then choose the one with B. i A circuit A with poor performance is optimized through training to improve its performance (B). i Performance reaches target value b i Here, B i It can be gain, gain-bandwidth product, or quiescent current; A can be a two-stage operational amplifier circuit, where i = 1, 2, 3, ...; B2. Obtain the performance space P; After randomly assigning multiple values ​​to the N device parameter variables of circuit A within a specified range, circuit simulation is performed, and the resulting performance points constitute the actual performance space P that circuit A can achieve. B2. Obtain the target variable for optimization; Uniform sampling is performed in the performance space P to obtain M points covering the performance space P as optimization target variables. These M points constitute the optimization target variable set Q as the training set. The optimization target variables for this round are randomly sampled from Q. B3. Initialize N circuit device parameter variables, assigning random values ​​or default values; B4. Run the circuit simulation and obtain the actual simulation results; Write the N variable values ​​for this round into the circuit netlist, and perform circuit simulation to obtain the actual simulation results for this round. B5. Input the values ​​of N variables in this round, the target variable for optimization, and the actual simulation results into the deep neural network model; the deep neural network model simulation is performed on the open-source OpenAI platform; B6. The deep neural network model outputs the changes corresponding to N variables. Based on these results, the N circuit parameter variables are updated, and then the corresponding B is calculated. i The actual simulation results are used as the performance indicators for this round. B7. Compare the current performance indicators with the expected indicators, i.e. the optimization target variables, calculate the relative error, and determine whether to proceed to the next iteration based on the magnitude of the relative error and whether the number of iterations has reached the preset value. B8. Iterate through the circuit and deep neural network parameters until the exit condition is met. B9. Update the circuit design; B10. Save the deep neural network model structure, and it can be directly called in seconds when there is an optimization need.

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