Totem-pole bridgeless boost circuit and switching power supply device

Abstract

The application discloses a totem column bridgeless boost type Boost circuit and a switching power supply device, and relates to the technical field of switching power supply devices, in particular to a totem column bridgeless boost type Boost circuit and a switching power supply device. The circuit comprises an inductor, a high-frequency bridge arm which comprises series-connected first and second switches, a first midpoint of the first and second switches being coupled to a first end of an alternating-current power supply through the inductor, and a power-frequency bridge arm which comprises series-connected third and fourth switches, the power-frequency bridge arm being connected in parallel with the high-frequency bridge arm, and a second midpoint of the third and fourth switches being coupled to a second end of the alternating-current power supply. The commutation time of the third and fourth switches is greater than a first preset time and smaller than a second preset time, and the first preset time is 40 microseconds. Therefore, the common-mode electromagnetic interference caused by commutation of the circuit is reduced without affecting the input current waveform.

Description

Technical Field

[0001] This invention relates to the field of power factor correction technology, and in particular to a totem pole bridgeless boost circuit and a switching power supply device. Background Technology

[0002] In switching power supplies, the following is typically used: Figure 1 The rectifier bridge boost circuit shown is used to achieve power factor correction (PFC) for power supplies connected to the mains. However, current flows through three semiconductor power devices at every moment, and under high-frequency operating conditions, the switching transistor S1 and the freewheeling diode D5 operate under hard switching conditions, resulting in high switching losses and severe electromagnetic interference. To reduce the losses caused by the rectifier bridge and improve circuit efficiency, most switching power supplies now use totem-pole bridgeless boost circuits to replace the rectifier bridge boost circuits. Compared with the rectifier bridge boost circuit, the totem-pole bridgeless boost circuit has higher efficiency, but its voltage change rate dv / dt during the power frequency commutation stage is larger, which will cause greater common-mode electromagnetic interference.

[0003] Currently, common-mode electromagnetic interference caused by commutation in totem-pole bridgeless boost circuits can be addressed by reducing the voltage change rate dv / dt. However, reducing the voltage change rate dv / dt inevitably increases the power frequency commutation time. Excessive commutation time can affect the waveform of the input current during commutation, thereby impacting the THD (Total Harmonic Distortion) of the input current.

[0004] Therefore, how to reduce common-mode electromagnetic interference without affecting the THD of the input current is a technical problem that urgently needs to be solved. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this invention provides a totem-pole bridgeless boost circuit and switching power supply device, which can reduce common-mode electromagnetic interference without affecting the input current waveform.

[0006] To address the aforementioned technical problems, in a first aspect, the present invention provides a totem-pole bridgeless boost circuit, comprising:

[0007] inductance;

[0008] A high-frequency bridge arm includes a first switch and a second switch connected in series, and a first midpoint connecting the first switch and the second switch is coupled to a first terminal of an AC power supply through the inductor.

[0009] The power frequency bridge arm includes a third switch and a fourth switch connected in series. The power frequency bridge arm is connected in parallel with the high frequency bridge arm. The second midpoint of the third switch and the fourth switch is coupled to the second terminal of the AC power supply.

[0010] The commutation time of the third switch and the fourth switch is greater than a first preset time and less than a second preset time, wherein the first preset time is 40 μs.

[0011] Secondly, embodiments of the present invention also provide a switching power supply device, which includes the totem pole bridgeless boost circuit described in the first aspect.

[0012] In the totem pole bridgeless boost circuit provided by this invention, the input is an AC power supply. By controlling the commutation time of the third and fourth switches to between 40μs and 200μs, it can not only reduce the interference caused by common-mode electromagnetic interference, but also ensure that the THD of the input current is not affected. Attached Figure Description

[0013] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the following description of the embodiments will be briefly introduced. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 A schematic diagram of an existing bridged boost circuit structure;

[0015] Figure 2 This is a schematic diagram of the totem pole bridgeless boost circuit structure provided in an embodiment of the present invention;

[0016] Figure 3 This is another schematic diagram of the totem pole bridgeless boost circuit provided in an embodiment of the present invention;

[0017] Figure 4 The timing diagram for the commutation of the third and fourth switches provided in the embodiments of the present invention;

[0018] Figure 5 A timing diagram for commutation of the third and fourth switches provided in an embodiment of the present invention;

[0019] Figure 6 This is another timing diagram for the commutation of the third and fourth switches provided in an embodiment of the present invention;

[0020] Figure 7 This is a schematic diagram of the totem pole bridgeless boost circuit structure provided in an embodiment of the present invention;

[0021] Figure 8 This is a schematic diagram of the totem pole bridgeless boost circuit structure provided in an embodiment of the present invention;

[0022] Figure 9 This is a schematic diagram of the totem pole bridgeless boost circuit structure provided in an embodiment of the present invention;

[0023] Figure 10 This is a schematic diagram of the totem pole bridgeless boost circuit structure provided in an embodiment of the present invention;

[0024] Figure 11 This is a schematic diagram of the totem pole bridgeless boost circuit structure provided in an embodiment of the present invention;

[0025] Figure 12 This is a schematic diagram of a totem pole bridgeless boost circuit structure provided in an embodiment of the present invention. Detailed Implementation

[0026] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0027] It should be understood that, when used in this specification and the appended claims, the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or collections thereof.

[0028] It should also be understood that the terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the invention. As used in this specification and the appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0029] It should also be further understood that the term "and / or" as used in this specification and the appended claims refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0030] Please see Figure 2 and Figure 3 , Figure 2 This is a schematic diagram of the totem pole bridgeless boost circuit structure provided in an embodiment of the present invention; Figure 3This is another schematic diagram of a totem-pole bridgeless boost circuit provided in an embodiment of the present invention. Figure 2 and Figure 3 As shown, the totem pole bridgeless boost circuit includes: an inductor L1, a high-frequency bridge arm, and a power frequency bridge arm. The high-frequency bridge arm includes a first switch S1 and a second switch S2 connected in series. The first midpoint A connecting the first switch S1 and the second switch S2 is coupled to the first terminal of the AC power supply VAC through the inductor L1. The power frequency bridge arm includes a third switch and a fourth switch connected in series. The third and fourth switches can be... Figure 2 D1 and D2 in the middle can also be Figure 3 S3 and S4 in the circuit are connected in parallel with the power frequency bridge arm and the high frequency bridge arm. At the same time, the second midpoint B of the third switch and the fourth switch are coupled to the second terminal of the AC power supply VAC.

[0031] Specifically, because the commutation voltage waveform of the N-phase of the totem-pole bridgeless boost circuit relative to the negative terminal of the bus voltage is also a power frequency voltage, its voltage change rate during commutation is relatively large, leading to significant common-mode electromagnetic interference (EMI). While this can be addressed by reducing the voltage change rate, reducing the voltage change rate inevitably increases the power frequency commutation time, affecting the waveform of the input current during commutation and consequently impacting the THD of the input current. Therefore, by controlling the commutation time of the third and fourth switches within a certain range—specifically, controlling the AC time between a first preset time and a second preset time—it is possible to reduce EMI caused by common-mode electromagnetic interference while ensuring that the THD of the input current remains unaffected. The first preset time can be 40 μs.

[0032] In some embodiments, the second preset time can be 200μs to ensure that the input current THD is not affected, and the commutation time of the third switch and the fourth switch can be the time for the voltage of the third switch to rise from 0 to the bus voltage, or the time for the voltage of the fourth switch to rise from 0 to the bus voltage.

[0033] In some embodiments, the first switch S1 and the second switch S2 can be, but are not limited to, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), IGBTs (Insulated Gate Bipolar Transistors), GaN (Gallium Nitride) switches, or SiC (Silicon Carbide) switches, and the third switch and the fourth switch can be... Figure 2Diodes D1 and D2 in the diagram can also be... Figure 3 S3 and S4 in the middle. When the third switch and the fourth switch are Figure 3 When switches S3 and S4 are used, the third and fourth switches can be, but are not limited to, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors), IGBTs (Insulated Gate Bipolar Transistors), GaN (Gallium Nitride) switches, or SiC (Silicon Carbide) switches.

[0034] exist Figure 2 In the illustrated embodiment, during normal operation, when the AC power supply VAC is in the positive half-cycle, diode D1 remains off, diode D2 remains on, and the first switch S1 and the second switch S2 are alternately on. At this time, the second switch S2 acts as the main switch, and the first switch S1 acts as the freewheeling switch. When the second switch S2 is on, inductor L1 stores energy; when the first switch S1 is on, the energy stored in inductor L1 is transferred to the bus capacitor C1.

[0035] When the AC power supply VAC is in the negative half-cycle, diode D1 remains in the conducting state, and diode D2 remains in the off state. The first switch S1 and the second switch S2 are alternately turned on. At this time, the second switch S2 acts as a freewheeling switch, and the first switch S1 acts as the main switch. When the first switch S1 is in the conducting state, the inductor L1 stores energy; when the second switch S2 is in the conducting state, the energy stored in the inductor L1 is transferred to the bus capacitor C1.

[0036] Similarly, in Figure 3 In the illustrated embodiment, during normal operation, when the AC power supply VAC is in the positive half-cycle, the third switch S3 remains in the off state, the fourth switch S4 remains in the on state, and the first switch S1 and the second switch S2 are alternately turned on. At this time, the second switch S2 acts as the main switch, and the first switch S1 acts as the freewheeling switch. When the second switch S2 is in the on state, the inductor L1 stores energy; when the first switch S1 is in the on state, the energy stored in the inductor L1 is transferred to the bus capacitor C1.

[0037] When the AC power supply VAC is in the negative half-cycle, the third switch S3 remains in the on state, the fourth switch S4 remains in the off state, and the first switch S1 and the second switch S2 are alternately turned on. At this time, the second switch S2 acts as a freewheeling switch, and the first switch S1 acts as the main switch. When the first switch S1 is in the on state, the inductor L1 stores energy; when the second switch S2 is in the on state, the energy stored in the inductor L1 is transferred to the bus capacitor C1.

[0038] In some embodiments, during the polarity reversal phase of the AC power supply VAC, the switching timing of the first switch S1 or the second switch S2 is controlled to adjust the commutation time of the third and fourth switches. For example, during the reversal of the AC power supply VAC from the positive half-cycle to the negative half-cycle, the third switch changes from off to on, and the fourth switch changes from on to off. The first switch S1 and the second switch S2 are alternately on, and the high-frequency bridge arm is in operation. At this time, the switching timing of the first switch S1 or the second switch S2 can be controlled before the polarity reversal of the AC power supply VAC, or after the polarity reversal of the AC power supply VAC, or both before and after the polarity reversal of the AC power supply VAC, thereby enabling the adjustment of the commutation time of the third and fourth switches.

[0039] In some embodiments, such as Figure 4 As shown, after the polarity of the AC power supply VAC is reversed, the commutation time of the third and fourth switches can be adjusted by fixing the operating frequency of the first switch S1 or the second switch S2 and controlling the duty cycle of the first switch S1 or the second switch S2. Specifically, when it is necessary to increase the commutation time of the third and fourth switches, it is only necessary to decrease the duty cycle of the first switch S1 or the second switch S2; when it is necessary to decrease the commutation time of the third and fourth switches, it is only necessary to increase the duty cycle of the first switch S1 or the second switch S2.

[0040] exist Figure 4 In the embodiment shown, Figure 4 The upper part is to increase the duty cycle of the first switch S1 or the second switch S2 to reduce the commutation time of the third and fourth switches. Figure 4 The lower part is to reduce the duty cycle of the first switch S1 or the second switch S2 to increase the commutation time of the third and fourth switches. Figure 4 It can be seen from this that Figure 4 The commutation time of the upper part is less than Figure 4 The lower half of the commutation time, at the same time Figure 4 The duty cycle of the upper part of the first switch S1 or the second switch S2 is greater than Figure 4The lower half corresponds to the duty cycle of the switch. Here, Vbulk is the bus voltage, Vds is the voltage at the second midpoint B, Vgs is the gate voltage of the first switch S1 or the second switch S2, t0~t9 is the commutation stage of the third or fourth switch, t0~t1, t2~t3, t4~t5, t6~t7, and t8~t9 are the on / off times of the third or fourth switch, and the on-times are the same; t1~t2, t3~t4, t4~t5, t5~t6, and t8~t9 are the on / off times of the third or fourth switch, and the on-times are the same; the t7~t8 stage is the same as the t0~t7 stage.

[0041] AC power VAC Figure 3 Taking the case where the positive polarity of a substance reverses to negative polarity as an example, such as... Figure 4 As shown, when the AC power supply VAC polarity is reversed, the third switch changes from off to on, and the fourth switch changes from on to off. The first switch S1 and the second switch S2 are alternately turned on, and the high-frequency bridge arm is in working state. At this time, a voltage Vgs is applied to the gate of the first switch S1 at time t0, and the voltage at the drain of the corresponding fourth switch S4, that is, at the second midpoint B, gradually increases. At time t1, the voltage of the gate of the first switch S1 is 0, and the voltage at the drain of the corresponding fourth switch S4, that is, at the second midpoint B, remains in a stable state. At time t2, a voltage Vgs is applied to the gate of the first switch S1 again, and the voltage at the second midpoint B continues to gradually increase. This process is repeated until time t9, when the voltage at the second midpoint B reaches the bus voltage, thus completing the commutation of the third and fourth switches.

[0042] In some embodiments, such as Figure 5 As shown, after the polarity of the AC power supply VAC is reversed, the conduction time of the first switch S1 or the second switch S2 is fixed, and the operating frequency of the first switch S1 or the second switch S2 is controlled to adjust the commutation time of the third switch and the fourth switch. Specifically, when it is necessary to increase the commutation time of the third switch and the fourth switch, it is only necessary to decrease the operating frequency of the first switch S1 or the second switch S2; when it is necessary to decrease the commutation time of the third switch and the fourth switch, it is only necessary to increase the operating frequency of the first switch S1 or the second switch S2.

[0043] exist Figure 5 In the embodiment shown, Figure 5 The upper part involves increasing the operating frequency of the first switch S1 or the second switch S2 to reduce the commutation time of the third and fourth switches, while keeping the conduction time of the first switch S1 or the second switch S2 fixed. Figure 5The lower part involves reducing the operating frequency of the first switch S1 or the second switch S2 to increase the commutation time of the third and fourth switches, while keeping the conduction time of the first switch S1 or the second switch S2 fixed. Figure 5 It can be seen from this that Figure 5 The commutation time of the upper part is less than Figure 5 The lower half corresponds to the commutation time of the switch, and at the same time... Figure 5 The operating frequency of the upper part of the first switch S1 or the second switch S2 is greater than Figure 5 The lower half corresponds to the operating frequency of the switch. Here, Vbulk is the bus voltage, Vds is the voltage at the second midpoint B, Vgs is the gate voltage of the first switch S1 or the second switch S2, t0~t9 is the commutation stage of the third or fourth switch, t0~t1, t2~t3, t4~t5, t6~t7, and t8~t9 are the on / off times of the third or fourth switch, and the on-times are the same; t1~t2, t3~t4, t4~t5, t5~t6, and t8~t9 are the on / off times of the third or fourth switch, and the on-times are the same; the t7~t8 stage is the same as the t0~t7 stage.

[0044] AC power VAC Figure 3 Taking the case where the positive polarity of a substance reverses to negative polarity as an example, such as... Figure 5 As shown, when the AC power supply VAC polarity is reversed, the third switch changes from off to on, and the fourth switch changes from on to off. The first switch S1 and the second switch S2 are alternately turned on, and the high-frequency bridge arm is in working state. At this time, a voltage Vgs is applied to the gate of the first switch S1 at time t0, and the voltage at the drain of the corresponding fourth switch S4, that is, at the second midpoint B, gradually increases. At time t1, the voltage of the gate of the first switch S1 is 0, and the voltage at the drain of the corresponding fourth switch S4, that is, at the second midpoint B, remains in a stable state. At time t2, a voltage Vgs is applied to the gate of the first switch S1 again, and the voltage at the second midpoint B continues to gradually increase. This process is repeated until time t9, when the voltage at the second midpoint B reaches the bus voltage, thus completing the commutation of the third and fourth switches.

[0045] In some embodiments, such as Figure 6As shown, after the polarity of the AC power supply VAC is reversed, the commutation time of the third and fourth switches can be adjusted by fixing the operating frequency of the first switch S1 or the second switch S2 and controlling the rate of change of the duty cycle of the first switch S1 or the second switch S2. Specifically, when it is necessary to increase the commutation time of the third and fourth switches, it is only necessary to control the duty cycle of the first switch S1 or the second switch S2 to increase rapidly to the normal value; when it is necessary to increase the commutation time of the third and fourth switches, it is only necessary to control the duty cycle of the first switch S1 or the second switch S2 to increase slowly to the normal value.

[0046] exist Figure 6 In the embodiment shown, Figure 6 The upper part involves rapidly increasing the duty cycle of the first switch S1 or the second switch S2 to its normal value while keeping the operating frequency of the first switch S1 or the second switch S2 fixed, thereby reducing the commutation time of the third and fourth switches. Figure 6 The lower part involves, while maintaining a fixed operating frequency for either the first switch S1 or the second switch S2, slowly increasing the duty cycle of either switch S1 or the second switch S2 to its normal value to increase the commutation time of the third and fourth switches. Figure 6 It can be seen from this that Figure 6 The commutation time of the upper part is less than Figure 6 The lower half corresponds to the commutation time of the switch, and at the same time... Figure 6 The duty cycle of the upper part of the first switch S1 or the second switch S2 increases faster than... Figure 6 The lower half corresponds to the rate at which the duty cycle of the switch increases. Here, Vbulk is the bus voltage, Vds is the voltage at the second midpoint B, Vgs is the gate voltage of the first switch S1 or the second switch S2, t0~t9 is the commutation stage of the third or fourth switch, t0~t1, t2~t3, t4~t5, t6~t7, t8~t9 are the on / off times of the third or fourth switch; t1~t2, t3~t4, t4~t5, t5~t6, t8~t9 are the on / off times of the third or fourth switch; the t7~t8 stage is the same as the t0~t7 stage.

[0047] AC power VAC Figure 3 Taking the case where the positive polarity of a substance reverses to negative polarity as an example, such as... Figure 6As shown, when the AC power supply VAC polarity is reversed, the third switch changes from off to on, and the fourth switch changes from on to off. The first switch S1 and the second switch S2 are alternately turned on, and the high-frequency bridge arm is in working state. At this time, a voltage Vgs is applied to the gate of the first switch S1 at time t0, and the voltage at the drain of the corresponding fourth switch S4, that is, at the second midpoint B, gradually increases. At time t1, the voltage of the gate of the first switch S1 is 0, and the voltage at the drain of the corresponding fourth switch S4, that is, at the second midpoint B, remains in a stable state. At time t2, a voltage Vgs is applied to the gate of the first switch S1 again, and the voltage at the second midpoint B continues to gradually increase. This process is repeated until time t9, when the voltage at the second midpoint B reaches the bus voltage, thus completing the commutation of the third and fourth switches.

[0048] In some embodiments, such as Figures 7-12 As shown, a capacitor is connected in parallel between one end of the busbar connecting the third switch and / or the fourth switch and the second midpoint B to control the rate of change of voltage at the second midpoint B, thereby more accurately controlling the commutation time of the third switch and the fourth switch.

[0049] In summary, the totem pole bridgeless boost circuit disclosed in this application, with AC power input, can reduce interference caused by common-mode electromagnetic interference and ensure that the THD of the input current is not affected by controlling the commutation time of the third and fourth switches between 40μs and 200μs.

[0050] In some embodiments, this application also provides a switching power supply device, which uses the totem-pole bridgeless boost circuit provided in the above embodiments. In this embodiment, the switching power supply device can be a power adapter, a power bank, etc., and this embodiment does not specifically limit it.

[0051] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A totem-pole bridgeless boost circuit, characterized in that, include: inductance; The high-frequency bridge arm includes a first switch and a second switch connected in series, and the first midpoint connecting the first switch and the second switch is coupled to the first terminal of the AC power supply through the inductor. The power frequency bridge arm includes a third switch and a fourth switch connected in series. The power frequency bridge arm is connected in parallel with the high frequency bridge arm. The second midpoint of the third switch and the fourth switch is coupled to the second terminal of the AC power supply. Wherein, the commutation time of the third switch and the fourth switch is greater than the first preset time and less than the second preset time. The first preset time is configured to reduce common-mode electromagnetic interference caused by commutation. The first preset time is 40µs. The second preset time is set to avoid the total harmonic distortion of the input current from exceeding the allowable range. The second preset time is 200µs. During the polarity reversal phase of the AC power supply, the on / off timing of the first switch or the second switch is controlled to adjust the commutation time.

2. The totem pole bridgeless boost circuit according to claim 1, characterized in that, The switching time is the time it takes for the voltage of the third switch to rise from 0 to the bus voltage, or the time it takes for the voltage of the fourth switch to rise from 0 to the bus voltage.

3. The totem pole bridgeless boost circuit according to claim 1, characterized in that, A capacitor is connected in parallel between one end of the busbar connecting the third switch and / or the fourth switch and the second midpoint.

4. The totem pole bridgeless boost circuit according to claim 1, characterized in that, After the polarity of the AC power supply is reversed, the operating frequency of the first switch or the second switch is fixed, and the duty cycle of the first switch or the second switch is controlled to adjust the commutation time.

5. The totem pole bridgeless boost circuit according to claim 1, characterized in that, After the polarity of the AC power supply is reversed, the conduction time of the first switch or the second switch is fixed, and the operating frequency of the first switch or the second switch is controlled to adjust the commutation time.

6. The totem pole bridgeless boost circuit according to claim 1, characterized in that, The first switch and the second switch are any one of MOSFET switch, IGBT switch, GaN switch or SiC switch.

7. The totem pole bridgeless boost circuit according to claim 1, characterized in that, The third switch and the fourth switch are diodes.

8. The totem pole bridgeless boost circuit according to claim 1, characterized in that, The third switch and the fourth switch are any one of MOSFET switch, IGBT switch, GaN switch or SiC switch.

9. A switching power supply device, characterized in that, The totem pole bridgeless boost circuit includes any one of claims 1-8.

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