redistribution layer connections

Abstract

Examples in this paper include die-to-metallization connections that eliminate solder joints to reduce resistance and noise on the connection. In one example, a first die (110) is attached to a metallization layer (102) via a plurality of copper interconnects (112), and a second die (104) is attached to the metallization layer opposite the first die via another plurality of copper interconnects (114). In this example, the copper interconnects can connect the respective dies to metallization structures (116, 118) in the metallization layer (102).

Description

[0001] Cross-references to related applications

[0002] This patent application claims the benefit of U.S. nonprovisional application No. 16 / 936263 entitled “REDISTRIBUTION LAYERCONNECTION”, filed July 22, 2020, which has been assigned to the assignee of this application and is expressly incorporated herein by reference in its entirety. Technical Field

[0003] This disclosure generally relates to metallized structure connections, and more specifically, but not exclusively, to die-to-metallized structure connections. Background Technology

[0004] Unlike general-purpose processors, dedicated high-speed application processors are designed for specific applications. However, compared to general-purpose processors, dedicated high-speed application processors require smaller interconnect paths for die-to-die circuitry. All current packaging solutions use at least one solder joint for two dies facing each other on opposite sides of a substrate or metallization layer. The solder joints of copper circuitry introduce resistance and noise into high-speed systems. This circuitry becomes even more sensitive to thin-layer packages with metallization structures, such as redistribution layers or metallization structures. This is a drawback of conventional approaches, which would benefit from methods to mitigate this noise for such packages that support high-speed die-to-die communication.

[0005] Therefore, there is a need for systems, apparatuses, and methods that overcome the shortcomings of conventional methods, including methods, systems, and apparatuses provided therefrom. Summary of the Invention

[0006] The following is a simplified overview relating to one or more aspects and / or examples in connection with the apparatus and methods disclosed herein. Thus, this overview should not be considered an exhaustive summary relating to all anticipated aspects and / or examples, nor should it be considered to identify key or essential elements relating to all anticipated aspects and / or examples, or to depict the scope relating to any particular aspect and / or example. Accordingly, the following overview has the sole purpose of presenting, in a simplified form, certain concepts relating to one or more aspects and / or examples of the apparatus and methods disclosed herein, prior to the detailed description presented below.

[0007] In one aspect, a package includes: a metallization layer; a first die electrically coupled to a first side of the metallization layer; a second die electrically coupled to a second side of the metallization layer, the second side being opposite to the first side of the metallization layer; a first plurality of copper interconnects between the first die and the metallization layer; and a second plurality of copper interconnects between the second die and the metallization layer.

[0008] In another aspect, a package includes: a metallization layer; a first die electrically coupled to a first side of the metallization layer; a second die electrically coupled to a second side of the metallization layer, the second side being opposite to the first side of the metallization layer; a first component for interconnection between the first die and the metallization layer; and a second component for interconnection between the second die and the metallization layer.

[0009] In another aspect, a method for manufacturing a package includes: forming a metallization layer; forming a first plurality of copper interconnects on a first side of the metallization layer; forming a second plurality of copper interconnects on a second side of the metallization layer, the second side being opposite to the first side of the metallization layer; electrically coupling a first die to the first plurality of copper interconnects; and electrically coupling a second die to the second plurality of copper interconnects.

[0010] Based on the accompanying drawings and detailed description, other features and advantages associated with the apparatus and methods disclosed herein will be apparent to those skilled in the art. Attached Figure Description

[0011] A more complete understanding of aspects of this disclosure and its many accompanying advantages will readily become apparent from the following detailed description taken in conjunction with the accompanying drawings, which are presented for illustrative purposes only and not as a limitation thereof, and wherein:

[0012] Figure 1 The illustration shows exemplary packages according to some examples of this disclosure;

[0013] Figures 2A-2M The illustration shows an exemplary partial method for manufacturing a first part of a package according to some examples of this disclosure;

[0014] Figures 3A-3I The illustration shows an exemplary partial method for manufacturing a second part of a package according to some examples of this disclosure;

[0015] Figures 4A-4C The illustration shows exemplary partial methods for manufacturing packages according to some examples of this disclosure;

[0016] Figure 5 The illustration shows another exemplary part of a method for manufacturing a package according to some examples of this disclosure;

[0017] Figure 6 The illustrations show exemplary mobile devices according to some examples of this disclosure; and

[0018] Figure 7 The illustrations depict various electronic devices that can be integrated with any of the methods, devices, semiconductor devices, integrated circuits, dies, interposers, packages, or PoPs described above, according to some examples of this disclosure.

[0019] By convention, features depicted in the accompanying drawings may not be drawn to scale. Therefore, for clarity, the dimensions of the depicted features may be arbitrarily enlarged or reduced. By convention, some figures in the drawings are simplified for clarity. Therefore, the drawings may not depict all components of a particular device or method. Furthermore, the same reference numerals denote the same features throughout the specification and the drawings. Detailed Implementation

[0020] The exemplary methods, apparatuses, and systems disclosed herein mitigate the drawbacks of conventional methods, apparatuses, and systems, as well as other previously unidentified needs. Examples herein include L1 interconnects (e.g., die-to-metallization or die-to-package layer connections) in multi-chip modules (MCMs), such as connections from die bumps through the package layer to module pins, and connections through the package layer between bumps on multiple dies, providing shorter and more uniform paths for these interconnects. In some examples, the interconnects lack solder joints or materials such as copper pillars, providing connections with lower resistance and noise than conventional solder-based connections. As used herein, metallization structures may include metal layers, vias, pads, or traces with dielectrics between them. As used herein, metallization structures (e.g., first and second metallization structures) may be redistribution layers (RDLs).

[0021] Figure 1 The illustration shows exemplary packages according to some examples of this disclosure. For example... Figure 1As shown, package 100 (i.e., integrated device, semiconductor device, integrated circuit, die, interposer, package or PoP, etc.) may include: a metallization layer 102, a first die 110 electrically coupled to a first side of the metallization layer 102, a second die 104 electrically coupled to a second side of the metallization layer 102, a first plurality of copper interconnects 112 between the first die 110 and the metallization layer 102; and a second plurality of copper interconnects 114 between the second die 104 and the metallization layer 102. Package 100 may also include: a first metallization structure 116 in the metallization layer 102, wherein the first plurality of copper interconnects 112 are connected to the first metallization structure 116; a second metallization structure 118 in the metallization layer 102, wherein the second plurality of copper interconnects 114 are connected to the second metallization structure 118; and the first metallization structure 116 coupled to the second metallization structure 118 may include one of copper, silver, gold or similar metals. Furthermore, the first plurality of copper interconnects 112 may include at least one copper die bump coupled to at least one copper pillar 106, the second plurality of interconnects 114 may include pillars formed using copper-to-copper diffusion bonding, and the package 100 may further include a dielectric layer 120 between the second die 104 and the metallization layer 102, wherein the dielectric layer 120 may include oxide covalent bonds. Optionally, the package 100 may be incorporated into devices selected from the group consisting of: music players, video players, entertainment units, navigation devices, communication devices, mobile devices, mobile phones, smartphones, personal digital assistants, fixed-location terminals, tablet computers, computers, wearable devices, laptop computers, servers, and devices in motor vehicles.

[0022] Figures 2A-2M The illustration shows an exemplary partial method for manufacturing a first part of a package according to some examples of this disclosure. For example... Figure 2A As shown, a partial method 200 for manufacturing the first portion 250 of the package may begin with providing a first carrier 202. Figure 2B As shown, part of method 200 may continue to apply the first adhesive coating 204 to the first carrier 202. Figure 2C As shown, part of method 200 may further plate multiple pillars 206 (e.g., copper pillars) to electrically couple the third die 208 and the first die 210 between the multiple pillars 206. Figure 2D As shown, part of method 200 may continue to apply molding compound 212 to encapsulate the plurality of pillars 206, the third die 208, and the first die 210. Figure 2E As shown, part of method 200 can continue back-side grinding to expose multiple pillars 206.

[0023] like Figure 2FAs shown, part of method 200 can continue to form a third metallization structure 214, such as by using a photoimageable dielectric (PID) [PID coating + PID exposure + development + seed deposition + metallization structure / under-bump metal (UBM) (photolithography + plating + lift-off + etching)] in addition to attaching solder balls 216 to the third metallization structure 214. Figure 2G As shown, part of method 200 can continue to attach the second carrier 218. For example... Figure 2H As shown, part of method 200 can continue to remove the first carrier 202 and flip the workpiece. As... Figure 2I As shown, part of method 200 can continue to form the first metallization structure 220.

[0024] like Figure 2J As shown, part of method 200 can continue to form the first plurality of interconnects 230, such as by plating copper pillars. Figure 2K As shown, part of method 200 can continue to apply PID 222. Figure 2L As shown, part of method 200 can be further used for back-side grinding and polishing of flat surfaces. Figure 2M As shown, part of method 200 may end with the application of oxide 224, such as by physical vapor deposition (PVD) and / or chemical vapor deposition (CVD).

[0025] Figures 3A-3I The illustration shows an exemplary partial method for manufacturing a second part of a package, according to some examples of this disclosure. For example... Figure 3A As shown, a portion of the method 300 for manufacturing the second portion 360 of the package may begin by providing a third carrier 326 and applying a second adhesive coating 328. Figure 3B As shown, part of method 300 can continue to electrically couple the fourth die 332 and the second die 321. For example... Figure 3C As shown, in part of method 300, molding compound 334 can be applied and the back side ground to planarize the surface. As... Figure 3D As shown, part of method 300 can continue to attach the fourth carrier 336 and flip the workpiece. (As illustrated...) Figure 3E As shown, part of method 300 can continue to remove the third carrier 326.

[0026] like Figure 3F As shown, part of method 300 can continue to form a second plurality of interconnects 340, such as by plating copper pillars. Figure 3G As shown, part of method 300 can continue to apply the second PID 338. (As illustrated...) Figure 3H As shown, part of method 300 can be further used for back-side grinding and polishing of flat surfaces. Figure 3IAs shown, part of method 300 may end with, for example, applying a second oxide 342 by PVD and / or CVD.

[0027] Figures 4A-4C The illustrations depict exemplary partial methods for manufacturing packages according to some examples of this disclosure. For example... Figure 4A As shown, a portion of the method for manufacturing package 400 (e.g., package 100) may begin by providing a first portion 450 (e.g., first portion 250). Figure 4B As shown, some methods may continue to pair the second portion 460 (e.g., the second portion 360) with the first portion 450, such as by curing (e.g., at 150°C–250°C) the first oxide layer 424 (e.g., oxide 224) and the second oxide layer 442 (e.g., the second oxide 342) to create covalent bonds between the first portion 450 and the second portion 460, and to create metal-to-metal diffusion bonds between the first plurality of interconnects 430 and the second plurality of interconnects 440. Figure 4C As shown, part of the method may end with the removal of the second carrier 418 (e.g., the second carrier 218) to form the package 400.

[0028] Figure 5 The illustration shows another exemplary partial method for manufacturing a package according to some examples of this disclosure. For example... Figure 5 As shown, part of method 500 may begin in block 502 with the formation of a metallization layer. Part of method 500 may continue in block 504 with the formation of a first plurality of copper interconnects on a first side of the metallization layer. Part of method 500 may continue in block 506 with the formation of a second plurality of copper interconnects on a second side of the metallization layer, the second side being opposite to the first side of the metallization layer. Part of method 500 may continue in block 508 with the electrical coupling of a first die to the first plurality of copper interconnects. Part of method 500 may end in block 510 with the electrical coupling of a second die to the second plurality of copper interconnects.

[0029] Alternatively, part of method 500 may include: forming a first metallization structure in a metallization layer, wherein a first plurality of copper interconnects are connected to the first metallization structure; forming a second metallization structure in the metallization layer, wherein a second plurality of copper interconnects are connected to the second metallization structure; wherein the first plurality of copper interconnects includes at least one copper die bump and at least one copper pillar; wherein the at least one copper pillar includes a pillar formed by copper-to-copper diffusion bonding; forming a dielectric layer between a first side of the metallization layer and the first die; wherein the dielectric layer includes oxide covalent bonds; and incorporating the package into a device selected from the group consisting of: music players, video players, entertainment units, navigation devices, communication devices, mobile devices, mobile phones, smartphones, personal digital assistants, fixed-location terminals, tablet computers, computers, wearable devices, laptop computers, servers, and devices in motor vehicles.

[0030] Figure 6 The illustration shows exemplary mobile devices according to some examples of this disclosure. Reference now is made to... Figure 6 This diagram depicts a block diagram of a mobile device configured according to exemplary aspects, and is generally designated as 600. In some aspects, mobile device 600 may be configured as a wireless communication device. As shown, mobile device 600 includes processor 601, which may be configured to implement the methods described herein in some aspects. Processor 601 is shown as including instruction pipeline 612, buffered processing unit (BPU) 608, branch instruction queue (BIQ) 611, and throttle valve 610, which is well known in the art. For clarity, other well-known details of these blocks (e.g., counters, entries, confidence fields, weighted sums, comparators, etc.) are omitted from this view of processor 601.

[0031] The processor 601 can be communicatively coupled to the memory 632 via a link, which can be a die-to-die or chip-to-chip link. The mobile device 600 also includes a display 628 and a display controller 626, wherein the display controller 626 is coupled to the processor 601 and the display 628.

[0032] In some respects, Figure 6 It may include an encoder / decoder (CODEC) 634 (e.g., an audio and / or voice CODEC) coupled to processor 601; a speaker 636 and a microphone 638 coupled to CODEC 634; and a wireless controller 640 (which may include a modem) coupled to wireless antenna 642 and processor 601.

[0033] In certain aspects, where one or more of the aforementioned blocks are present, processor 601, display controller 626, memory 632, CODEC 634, and wireless controller 640 may be included in a system-in-package or system-on-chip device 622. Input device 630 (e.g., physical or virtual keyboard), power supply 644 (e.g., battery), display 628, input device 630, speaker 636, microphone 638, wireless antenna 642, and power supply 644 may be external to system-on-chip device 622 and may be coupled to components of system-on-chip device 622, such as interfaces or controllers.

[0034] It should be noted that, although Figure 6 Mobile devices are described, but processor 601 and memory 632 can also be integrated into set-top boxes, music players, video players, entertainment units, navigation devices, personal digital assistants (PDAs), fixed-location data units, computers, laptop computers, tablet computers, communication devices, mobile phones, or other similar devices.

[0035] Figure 7 The illustrations depict various electronic devices that can be integrated with any of the aforementioned packages, according to some examples of this disclosure. For example, mobile phone device 702, laptop computer device 704, and fixed-location terminal device 706 may include a package 700 as described herein. Package 700 may be, for example, any of the integrated circuit, die, integrated device, integrated device package, integrated circuit device, device package, integrated circuit (IC) package, and stacked package device described herein. Figure 7 The devices 702, 704, and 706 illustrated in the figures are merely exemplary. Other electronic devices may also feature package 700, including but not limited to the group of devices (e.g., electronic devices), including: mobile devices, handheld personal communication system (PCS) units, portable data units such as personal digital assistants, GPS-enabled devices, navigation devices, set-top boxes, music players, video players, entertainment units, fixed location data units such as watch readers, communication devices, smartphones, tablet computers, computers, wearable devices, servers, routers, electronic devices implemented in motor vehicles (e.g., autonomous vehicles), or any other device that stores or retrieves data or computer instructions, or any combination thereof.

[0036] It should be understood that the aspects disclosed herein can be described as functional equivalents of structures, materials, and / or devices described and / or recognized by those skilled in the art. It should also be noted that the methods, systems, and apparatuses disclosed in the description or claims can be implemented by devices including components for performing corresponding actions of the method. For example, in one aspect, a package may include: a metallization layer; a first die on a first side of the metallization layer; a second die on a second side of the metallization layer opposite to the first side of the metallization layer; a first component (e.g., a first plurality of copper interconnects) for interconnection between the first die and the metallization layer; and a second component (e.g., a second plurality of copper interconnects) for interconnection between the second die and the metallization layer. It should be understood that the foregoing aspects are provided by way of example only, and the claimed aspects are not limited to the specific references and / or descriptions cited as examples.

[0037] Figures 1-7 One or more of the components, processes, features, and / or functions illustrated in the diagram may be rearranged and / or combined into a single component, process, feature, or function, or incorporated into several components, processes, or functions. Additional elements, components, processes, and / or functions may be added without departing from this disclosure. It should also be noted that in this disclosure… Figures 1-7 The corresponding descriptions are not limited to bare dies and / or ICs. In some implementations, Figures 1-7 The descriptions and corresponding information can be used to manufacture, create, provide, and / or produce integrated devices. In some embodiments, a device may include a die, an integrated device, a die package, an integrated circuit (IC), a device package, an integrated circuit (IC) package, a wafer, a semiconductor device, a package-on-a-panel (PoP) device, and / or an interposer. The active side of the device (such as a die) is a portion of the device that contains the active components of the device (e.g., transistors, resistors, capacitors, inductors, etc.), which perform the operation or function of the device. The back side of the device is the side of the device opposite to the active side.

[0038] As used herein, the terms “user equipment” (or “UE”), “user terminal”, “client equipment”, “communication equipment”, “wireless equipment”, “wireless communication equipment”, “handheld device”, “mobile device”, “mobile terminal”, “mobile station”, “phone”, “access terminal”, “subscriber equipment”, “subscriber terminal”, “subscriber station”, “terminal”, and their variations may interchangeably refer to any suitable mobile or fixed device capable of receiving wireless communication and / or navigation signals. These terms include, but are not limited to, music players, video players, entertainment units, navigation devices, communication devices, smartphones, personal digital assistants, fixed-location terminals, tablet computers, computers, wearable devices, laptop computers, servers, motor vehicle equipment in motor vehicles, and / or other types of portable electronic devices that are typically carried by a person and / or have communication capabilities (e.g., wireless, cellular, infrared, short-range radio, etc.). These terms are also intended to include devices that communicate with another device that can receive wireless communication and / or navigation signals, such as via short-range wireless, infrared, wired, or other connections, whether at the device itself or at another device, including satellite signal reception, auxiliary data reception, and / or location-related processing. Furthermore, these terms are intended to encompass all devices, including wireless and wired communication devices, capable of communicating with the core network via a radio access network (RAN), through which the UE can connect to external networks such as the Internet, and to other UEs. Of course, other mechanisms for connecting the UE to the core network and / or the Internet are also possible, such as via a wired access network, a wireless local area network (WLAN) (e.g., based on IEEE 802.11, etc.), and so on. The UE can be implemented by any of a variety of devices, including but not limited to printed circuit (PC) cards, compact flash memory devices, external or internal modems, wireless or wired telephones, smartphones, tablets, tracking devices, asset tags, and so on. The communication link through which the UE sends signals to the RAN is called an uplink channel (e.g., reverse flow channel, reverse control channel, access channel, etc.). The communication link through which the RAN sends signals to the UE is called a downlink or forward link channel (e.g., paging channel, control channel, broadcast channel, forward flow channel, etc.). As used in this article, the term Traffic Channel (TCH) can refer to either the uplink / reverse or downlink / forward traffic channel.

[0039] Wireless communication between electronic devices can be based on various technologies, such as Code Division Multiple Access (CDMA), W-CDMA, Time Division Multiple Access (TDMA), Frequency Division Multiple Access (FDMA), Orthogonal Frequency Division Multiplexing (OFDM), Global System for Mobile Communications (GSM), 3GPP Long Term Evolution (LTE), Bluetooth (BT), Bluetooth Low Energy (BLE), IEEE 802.11 (WiFi), and IEEE 802.15.4 (Zigbee / Thread), or other protocols that can be used in wireless communication networks or data communication networks. Bluetooth Low Energy (also known as Bluetooth LE, BLE, and Bluetooth Smart) is a wireless personal area network (PAN) technology designed and marketed by the Bluetooth Special Interest Group (SIG) to significantly reduce power consumption and cost while maintaining similar communication range. In 2010, with the adoption of Bluetooth Core Specification version 4.0 and the update to Bluetooth 5, BLE was incorporated into the main Bluetooth standard (both are explicitly incorporated herein by reference).

[0040] The term "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any detail described herein as "exemplary" should not be construed as superior to other examples. Similarly, the term "example" does not mean that all examples include the features, advantages, or modes of operation discussed. Furthermore, specific features and / or structures may be combined with one or more other features and / or structures. Additionally, at least a portion of the apparatus described herein may be configured to perform at least a portion of the methods described herein.

[0041] The terminology used herein is for the purpose of describing particular examples and is not intended to limit the scope of this disclosure. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the terms “comprising,” “having,” “containing,” and / or “including” as used herein specify the presence of the stated feature, integer, action, operation, element, and / or component, but do not preclude the presence or addition of one or more other features, integers, actions, operations, elements, components, and / or groups thereof.

[0042] It should be noted that the terms “connection,” “coupling,” or any variation thereof mean any direct or indirect connection or coupling between elements, and may cover the presence of an intermediate element between two elements (the two elements are “connected” or “coupled” together via the intermediate element).

[0043] This document does not limit the number and / or order of elements when using names such as "first," "second," etc. Rather, these names are used as a convenient way to distinguish two or more elements and / or multiple instances of elements. Furthermore, unless otherwise stated, a collection of elements may include one or more elements.

[0044] Those skilled in the art will understand that information and signals can be represented using any of a variety of different techniques and skills. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the foregoing description can be represented by voltage, current, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.

[0045] The various illustrative logic blocks, modules, and circuits described in conjunction with the aspects disclosed herein can be implemented or executed using a general-purpose processor, digital signal processor (DSP), application-specific integrated circuit (ASIC), field-programmable gate array (FPGA), or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof, designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but alternatively, the processor may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices (e.g., a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors cooperating with a DSP core, or other such configurations). Furthermore, the sequences of actions described herein can be considered to be entirely contained within any form of computer-readable storage medium (transient and non-transient) storing a corresponding set of computer instructions that, upon execution, will cause the associated processor to perform the functions described herein. Thus, various aspects of this disclosure may be included in a variety of different forms, all of which are contemplated to fall within the scope of the claimed subject matter. Furthermore, for each example described in this paper, the corresponding form of any such example can be described in this paper as, for example, "logic configured to perform the described action".

[0046] No statement or illustration in this application is intended to offer any component, action, feature, benefit, advantage, or equivalent to the public, whether or not such component, action, feature, benefit, advantage, or equivalent is described in the claims.

[0047] Furthermore, those skilled in the art will understand that the various illustrative logic blocks, modules, circuits, and algorithmic actions described in conjunction with the examples disclosed herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, various illustrative components, blocks, modules, circuits, and actions are described above in a generalized manner according to their functionality. Whether this functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in different ways for each specific application, but such implementation decisions should not be construed as causing a departure from the scope of this disclosure.

[0048] The methods, sequences, and / or algorithms described in conjunction with the examples disclosed herein may be incorporated directly into hardware, in software modules executed by a processor, or in a combination of both. Software modules may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disks, removable disks, CD-ROMs, or any other form of storage medium known in the art, including non-transitory types of memory or storage media. Exemplary storage media are coupled to the processor such that the processor can read information from and write information to the storage medium. Alternatively, the storage medium may be an integral part of the processor.

[0049] Although some aspects have been described in conjunction with the device, it goes without saying that these aspects also constitute a description of the corresponding method. Therefore, blocks or components of the device should also be understood as corresponding method actions, or as features of method actions. Similarly, aspects described in conjunction with method actions, or as method actions, also constitute a description of the corresponding blocks, details, or features of the corresponding device. Some or all of the method actions can be performed by a hardware device (or using a hardware device), such as a microprocessor, a programmable computer, or an electronic circuit. In some examples, some or more of the most important method actions can be performed by such a device.

[0050] As can be seen in the detailed description above, different features are combined together in the examples. This manner of disclosure should not be construed as an intention for the claimed examples to have more features than those expressly mentioned in the corresponding claims. Rather, this disclosure may include all features less than those of the individual examples disclosed. Therefore, the appended claims should be considered as included in the description, where each claim can serve as a separate example on its own. While each claim can serve as a separate example on its own, it should be noted that although dependent claims in a claim may refer to a specific combination having one or more claims, other examples may also cover or include combinations of the subject matter of the dependent claim with any other dependent claim, or any feature combined with other dependent and independent claims. Such combinations are presented herein unless it is expressly stated that a particular combination is not desired. Furthermore, it is intended that features of a claim may be included in any other independent claim, even if the claim is not directly dependent on that independent claim.

[0051] Furthermore, in some examples, a single action can be subdivided into multiple sub-actions or contain multiple sub-actions. Such sub-actions can be included in the disclosure of a single action and are part of the disclosure of the single action.

[0052] While the foregoing disclosure illustrates illustrative examples of this disclosure, it should be noted that various changes and modifications may be made herein without departing from the scope of this disclosure as defined by the appended claims. The functions and / or actions of the method claims according to the examples of the disclosure described herein need not be performed in any particular order. Furthermore, well-known elements will not be described in detail or may be omitted so as not to obscure the relevant details of the aspects disclosed herein and the examples. Moreover, although elements of this disclosure may be described or claimed in the singular, the plural form is contemplated unless expressly stated to be limited to the singular.

Claims

1. A package comprising: First redistribution layer; The first die is electrically coupled to a first side of the first redistribution layer; The second die is electrically coupled to a second side of the first redistribution layer, the second side being opposite to the first side of the first redistribution layer; A plurality of copper interconnects are located between the first die and the first redistribution layer, wherein the plurality of copper interconnects are connected to the first side of the first redistribution layer. as well as A second plurality of copper interconnects are located between the second die and the first redistribution layer, wherein the second plurality of copper interconnects are connected to the second side of the first redistribution layer, and wherein one of the second plurality of copper interconnects comprises: The first copper portion, coupled to the second die; and The second copper portion is coupled to the second side of the first redistribution layer. The first copper portion is directly coupled to the second copper portion.

2. The package of claim 1, further comprising a second redistribution layer, wherein the first die is located between the first redistribution layer and the second redistribution layer.

3. The package according to claim 2, further comprising a third plurality of copper interconnects between the first redistribution layer and the second redistribution layer.

4. The package of claim 3, wherein the first redistribution layer is coupled to the second redistribution layer via the third plurality of copper interconnects.

5. The package of claim 1, wherein the first redistribution layer comprises one of copper, silver, or gold.

6. The package of claim 2, wherein the second redistribution layer comprises one of copper, silver, or gold.

7. The package of claim 3, wherein the first plurality of copper interconnects includes at least one copper die bump and the third plurality of copper interconnects includes at least one copper pillar.

8. The package of claim 1, wherein the second plurality of copper interconnects comprises pillars formed by copper-to-copper diffusion bonding.

9. The package of claim 1, further comprising a dielectric layer between the second die and the first redistribution layer.

10. The package of claim 9, wherein the dielectric layer comprises oxide covalent bonds.

11. The package of claim 1, wherein the package is incorporated into a device selected from the group consisting of: music players, video players, entertainment units, navigation devices, communication devices, mobile devices, mobile phones, smartphones, personal digital assistants, fixed-location terminals, tablet computers, computers, wearable devices, laptop computers, servers, and devices in motor vehicles.

12. A package comprising: First redistribution layer; The first die is electrically coupled to a first side of the first redistribution layer; The second die is electrically coupled to a second side of the first redistribution layer, the second side being opposite to the first side of the first redistribution layer; A first component for interconnection is located between the first die and the first redistribution layer, wherein the first component for interconnection is connected to the first side of the first redistribution layer; as well as A second component for interconnection is located between the second die and the first redistribution layer, wherein the second component for interconnection is connected to the second side of the first redistribution layer, and wherein the second component for interconnection comprises: The first copper portion, coupled to the second die; and The second copper portion is coupled to the second side of the first redistribution layer. The first copper portion is directly coupled to the second copper portion.

13. The package of claim 12, further comprising a second redistribution layer, wherein the first die is located between the first redistribution layer and the second redistribution layer.

14. The package of claim 13, further comprising a third component for interconnection between the first redistribution layer and the second redistribution layer.

15. The package of claim 14, wherein the first redistribution layer is coupled to the second redistribution layer via the third component for interconnection.

16. The package of claim 12, wherein the first redistribution layer comprises one of copper, silver, or gold.

17. The package of claim 13, wherein the second redistribution layer comprises one of copper, silver, or gold.

18. The package of claim 14, wherein the first component for interconnection includes at least one copper die bump and the third component for interconnection includes at least one copper pillar.

19. The package of claim 12, wherein the second component for interconnection comprises pillars formed using copper-to-copper diffusion bonding.

20. The package of claim 12, further comprising a dielectric layer between the second die and the first redistribution layer.

21. The package of claim 20, wherein the dielectric layer comprises oxide covalent bonds.

22. The package of claim 12, wherein the package is incorporated into a device selected from the group consisting of: music players, video players, entertainment units, navigation devices, communication devices, mobile devices, mobile phones, smartphones, personal digital assistants, fixed-location terminals, tablet computers, computers, wearable devices, laptop computers, servers, and devices in motor vehicles.

23. A method for manufacturing a package, the method comprising: Forming the first redistribution layer; A first plurality of copper interconnects are formed on a first side of the first redistribution layer; A second plurality of copper interconnects are formed on a second side of the first redistribution layer, the second side being opposite to the first side of the first redistribution layer; The first die is electrically coupled to the first side of the first redistribution layer via the first plurality of copper interconnects; as well as The second die is electrically coupled to the second side of the first redistribution layer via the second plurality of copper interconnects. One of the second plurality of copper interconnects includes: The first copper portion, coupled to the second die; and The second copper portion is coupled to the second side of the first redistribution layer. The first copper portion is directly coupled to the second copper portion.

24. The method of claim 23, further comprising forming a second redistribution layer, wherein the first die is located between the first redistribution layer and the second redistribution layer.

25. The method of claim 24, further comprising forming a third plurality of copper interconnects between the first redistribution layer and the second redistribution layer.

26. The method of claim 25, wherein the first plurality of copper interconnects comprises at least one copper die bump and the third plurality of copper interconnects comprises at least one copper pillar.

27. The method of claim 23, wherein the second plurality of copper interconnects comprises pillars formed using copper-to-copper diffusion bonding.

28. The method of claim 23, further comprising forming a dielectric layer between the second die and the first redistribution layer.

29. The method of claim 28, wherein the dielectric layer comprises oxide covalent bonds.

30. The method of claim 23, further comprising incorporating the package into a device selected from the group consisting of: music players, video players, entertainment units, navigation devices, communication devices, mobile devices, mobile phones, smartphones, personal digital assistants, fixed-location terminals, tablet computers, computers, wearable devices, laptop computers, servers, and devices in motor vehicles.

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