An automatic test system for MCU chip inspection

Abstract

This invention discloses an automated testing system for MCU chip inspection, comprising a system logic control unit, an adjustable voltage output unit, a voltage / current acquisition unit, a first high-precision low-dropout linear regulator, a second high-precision low-dropout linear regulator, a DC power supply unit, and a human-machine interface unit. The human-machine interface unit is connected to the system logic control unit. The system logic control unit is connected to the adjustable voltage output unit and the voltage / current acquisition unit via SPI communication, and to the MCU chip under test via serial communication. The output of the adjustable voltage output unit is connected to the feedback terminal of the high-precision low-dropout linear regulator via a voltage regulation circuit. The input of the voltage / current acquisition unit is connected to the output of the high-precision low-dropout linear regulator via an acquisition circuit. Using this invention, the efficiency of testing can be improved, while effectively saving testing costs.

Description

Technical Field

[0001] This invention relates to an automated testing system for MCU chip inspection, belonging to the field of integrated circuit testing technology. Background Technology

[0002] A microcontroller unit (MCU) is a mixed-signal chip-level computer that integrates functions such as CPU (central processing unit), memory, SPI (serial peripheral interface), I2C (internal integrated circuit serial communication), UART (universal asynchronous transceiver), and ADC (analog-to-digital converter).

[0003] Typically, MCU chip testing includes numerous items such as voltage, power consumption, and communication. In current technology, testing of MCU chip analog parameters usually employs manual methods. Testers manually operate test equipment to test various performance indicators of the MCU chip. Due to the large number of test vectors and the complexity of the test environment, multiple hardware devices are needed to test different performance indicators during the testing process. Therefore, setting up the test environment is complex and the testing efficiency is low. On the other hand, with the development of the integrated circuit industry, the requirements for product reliability are becoming increasingly stringent. MCU chip parameters need to be tested under different ambient temperatures. However, existing test hardware is bulky and has limited adaptability to ambient temperatures. It can only be used to place the MCU chip separately in a high and low temperature test chamber and connect it to the test equipment via test leads. During testing, signal coupling between the test leads degrades the test signal quality and reduces the reliability of the test data.

[0004] Chinese patent application CN 110275805A discloses a fully automated testing system for MCU chips. This system includes a computer and an external DC power supply, which provides power to the test motherboard. The test motherboard is connected to both the computer and the external DC power supply. It includes a main control chip that controls the automated execution of the testing system. The MCU chip under test receives instructions from the main control chip and executes multiple test items. Multiple test execution units are connected between the main control chip and the MCU chip under test, each unit testing one of the multiple test items. The main control chip then stores the corresponding test data in the computer. This testing system combines hardware design with software control; after the test starts, the software automatically completes all tests, improving work efficiency. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide an automatic testing system for MCU chip inspection.

[0006] To achieve the above objectives, the present invention adopts the following technical solution:

[0007] An automated test system for MCU chip inspection includes a system logic control unit, an adjustable voltage output unit, a voltage / current acquisition unit, a first high-precision low-dropout linear regulator, a second high-precision low-dropout linear regulator, a DC power supply unit, and a human-machine interface unit; wherein,

[0008] The human-machine interface unit is used to issue test commands to the system logic control unit and to display test results after the test is completed.

[0009] The system logic control unit is used to execute the test instructions issued by the human-machine interface unit and control the operation of each functional unit in the automatic test system;

[0010] The adjustable voltage output unit is used to output a test voltage to the MCU chip under test;

[0011] The first high-precision low-dropout linear regulator and the second high-precision low-dropout linear regulator are used to improve the output drive capability of the adjustable voltage output unit;

[0012] The voltage / current acquisition unit is used to acquire the voltage / current signal of the MCU chip under test in real time and feed it back to the system logic control unit to realize closed-loop control.

[0013] The DC power supply unit is used to provide operating power to the system logic control unit, the adjustable voltage output unit, and the voltage / current acquisition unit, respectively.

[0014] Preferably, the system logic control unit is implemented using an MH2103 series microcontroller, which is connected to the adjustable voltage output unit and the voltage / current acquisition unit via SPI communication, and to the MCU chip under test via serial communication.

[0015] Preferably, the adjustable voltage output unit is implemented using a DAC chip and a voltage regulation circuit; the first and second output terminals of the DAC chip are respectively connected to the ADC port of the MCU chip under test, and the third and fourth output terminals are respectively connected to the feedback terminals of the first high-precision low-dropout linear regulator and the second high-precision low-dropout linear regulator through two identical voltage regulation circuits.

[0016] Preferably, the voltage regulation circuit is composed of a first resistor R1, a second resistor R2, and a third resistor R3; wherein the third output terminal of the DAC chip is connected to the third resistor R3, the other end of the third resistor R3 is connected to the feedback terminal of the first high-precision low-dropout linear regulator, as well as the second resistor R2 and the first resistor R1, the other end of the second resistor R2 is connected to the ground terminal, and the other end of the first resistor R1 is connected to the output terminal of the first high-precision low-dropout linear regulator.

[0017] Preferably, the output voltage V of the first high-precision low-dropout linear regulator is... OUT The following relationship must be satisfied:

[0018] (V OUT -V FB ) / R1+(V OUTC -V FB ) / R3=V FB / R2

[0019] Among them, V FB V is the voltage value at the feedback terminal of the first high-precision low-dropout linear regulator; OUTC R1, R2, and R3 are the voltage values ​​at the output terminal OUTC of the adjustable voltage output unit; R1, R2, and R3 are the resistance values ​​of the first resistor R1, the second resistor R2, and the third resistor R3, respectively.

[0020] Preferably, the output terminal of the first high-precision low-dropout linear regulator is connected to the VDD terminal of the MCU chip under test, and the output terminal of the second high-precision low-dropout linear regulator is connected to the VBAT terminal of the MCU chip under test.

[0021] Preferably, the voltage / current acquisition unit is implemented using an ADC chip and an acquisition circuit; the first and second input terminals of the ADC chip are connected to the output terminals of the first high-precision low-dropout linear regulator and the second high-precision low-dropout linear regulator through the acquisition circuit, and the third and fourth input terminals are respectively connected to the DAC ports of the MCU chip under test.

[0022] Preferably, the acquisition circuit comprises a first switch S1, a first sampling resistor Rs1, a second sampling resistor Rs2, a third sampling resistor Rs3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and a first operational amplifier A1, a second operational amplifier A2, a third operational amplifier A3, a fourth operational amplifier A4, and a fifth operational amplifier A5. One end of the first switch S1 is connected to the second sampling resistor Rs2, and both are connected to the output terminal of the first high-precision low-dropout linear regulator and the fifth resistor R5. The other end of the first switch S1 is connected to the first sampling resistor Rs1, and the other end of the first sampling resistor Rs1 is connected to the other end of the second sampling resistor Rs2, and both are connected to the fourth resistor R4 and the MCU under test. The VDD terminal of the chip is connected; the other end of the fifth resistor R5 is connected to the inverting input terminal of the first operational amplifier A1, the other end of the fourth resistor R4 is connected to the non-inverting input terminal of the first operational amplifier A1, and the output terminal of the first operational amplifier A1 is connected to the first input terminal of the ADC chip; one end of the third sampling resistor Rs3 is connected to the output terminal of the second high-precision low-dropout linear regulator on one side and the other end is connected to the sixth resistor R6; the other end of the third sampling resistor Rs3 is connected to the seventh resistor R7 on one side and the VBAT terminal of the MCU chip under test on the other side; the other end of the seventh resistor R7 is connected to the inverting input terminal of the fifth operational amplifier A5, the other end of the sixth resistor R6 is connected to the non-inverting input terminal of the fifth operational amplifier A5, and the output terminal of the fifth operational amplifier A5 is connected to the second input terminal of the ADC chip.

[0023] Preferably, the voltage / current acquisition unit acquires the actual output voltages of the first high-precision low-dropout linear regulator and the second high-precision low-dropout linear regulator, and transmits them to the system logic control unit via SPI communication. After obtaining the actual value of the output voltage VOUT, the system logic control unit compares it with the theoretical set value, and adjusts the output voltages VOUTC and VOUTD of the adjustable voltage output unit in real time according to the error value, thereby changing the output voltage VOUT of the first high-precision low-dropout linear regulator and the second high-precision low-dropout linear regulator to achieve closed-loop control.

[0024] Preferably, the human-machine interface unit is implemented using a general-purpose computer and is connected to the system logic control unit via serial communication.

[0025] Compared with existing technologies, the automatic test system for MCU chip inspection provided by this invention, on the one hand, solves the problem of insufficient output drive of the DAC chip itself by adopting a technical solution of using an adjustable voltage output unit to control the output voltage of a high-precision LDO feedback pin, thereby achieving high-precision adjustable output voltage. On the other hand, by acquiring the actual output voltage through a voltage / current acquisition unit, the closed-loop control system automatically adjusts the output voltage to accurately reach the set value, and then accurately tests the relevant parameters of the MCU chip under test (i.e., DUT_MCU). The test environment of this automatic test system is simple. Testers only need to select the test items on the PC, which serves as the human-machine interface unit, and the system will automatically perform the test and display the final test results on the PC, significantly improving the efficiency of the test work and effectively saving test costs. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the structure of an automatic testing system for MCU chip inspection provided by the present invention;

[0027] Figure 2 This is a circuit diagram of the voltage regulation circuit in an embodiment of the present invention;

[0028] Figure 3 This is a circuit diagram of the acquisition circuit in an embodiment of the present invention. Detailed Implementation

[0029] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0030] like Figure 1As shown, the automatic test system for MCU chip inspection provided by this invention includes at least a system logic control unit, an adjustable voltage output unit, a voltage / current acquisition unit, a high-precision LDO (low dropout linear regulator) 1, a high-precision LDO 2, a DC power supply unit, and a human-machine interface unit. The human-machine interface unit can be implemented by a PC. The PC is connected to the DB9 port of the system logic control unit via serial communication; the system logic control unit is connected to the adjustable voltage output unit and the voltage / current acquisition unit via SPI communication, and to the MCU chip under test (DUT_MCU) via serial communication; the output terminals OUTA and OUTB of the adjustable voltage output unit are connected to the ADC channels (channel 1 to channel 6) of the DUT_MCU, and the output terminals OUTC and OUTD are connected to the feedback (FB) terminals of the high-precision LDO1 and high-precision LDO2 via voltage regulation circuits, respectively. The output terminal of unit 1 is connected to the VDD (or AVDD) terminal of DUT_MCU, and the output terminal of high-precision LDO2 is connected to the VBAT terminal of DUT_MCU. The first input terminal IN1 and the second input terminal IN2 of the voltage / current acquisition unit are connected to the output terminals of high-precision LDO1 and high-precision LDO2 through the acquisition circuit. The third input terminal IN3 and the fourth input terminal IN4 are connected to the DAC_OUT1 terminal and DAC_OUT2 terminal of DUT_MCU, respectively. The three output terminals of the DC power supply unit are connected to the power supply terminals of the system logic control unit, the adjustable voltage output unit and the voltage / current acquisition unit, respectively, to provide them with operating power.

[0031] In one embodiment of the present invention, the system logic control unit is implemented using an MH2103 series microcontroller, which is mainly used to execute test commands issued by the PC and control the operation of various functional units in the automatic test system. After the PC sends the corresponding test commands to the system logic control unit via serial communication, the system logic control unit controls the operation of the corresponding functional units in the automatic test system and communicates and interacts with the DUT_MCU to ultimately complete the test of the DUT_MCU analog vector.

[0032] The adjustable voltage output unit is implemented using a DAC chip (preferably a 16-bit DAC for accuracy and cost considerations) and a voltage regulation circuit. In one embodiment of the invention, the DAC chip outputs two 0-5V voltage signals, which are respectively controlled by two identical voltage regulation circuits to control the feedback terminals of high-precision LDO1 and high-precision LDO2, thereby achieving high-precision adjustable output voltage and solving the problem of insufficient output drive of the DAC chip itself. On the other hand, the DAC chip can provide two output voltages for use by the DUT_MCU. Depending on the power supply requirements of the DUT_MCU, different configurations can be used to achieve adjustable and high-precision voltage output, with an accuracy of up to 0.1mV, and the output stability can be maintained under different ambient temperatures.

[0033] The following analysis and explanation will use a high-precision LDO1 as an example to illustrate the structure of the voltage regulation circuit and the output voltage of the high-precision LDO1.

[0034] like Figure 2 As shown, in one embodiment of the present invention, the voltage regulation circuit is composed of a first resistor R1, a second resistor R2, and a third resistor R3. The output terminal OUTC of the DAC chip is connected to the third resistor R3. The other end of the third resistor R3 is connected to the feedback terminal of the high-precision LDO1, as well as to the second resistor R2 and the first resistor R1. The other end of the second resistor R2 is connected to the ground terminal, and the other end of the first resistor R1 is connected to the output terminal OUT of the high-precision LDO1.

[0035] like Figure 2 The voltage regulation circuit shown, when the high-precision LDO1 and the adjustable voltage output unit are in the enabled state, the output voltage V of the high-precision LDO1 is... OUT Its function V OUT =f(V OUTC The following relationship is satisfied:

[0036] (V OUT -V FB ) / R1+(V OUTC -V FB ) / R3=V FB / R2 (1)

[0037] From formula (1), we can obtain:

[0038] V OUT =-(R1 / R3)V OUTC +(R1R2+R2R3+R1R3)V FB / R2R3 (2)

[0039] Among them, V FB This refers to the voltage value at the feedback terminal of the high-precision LDO1; V OUTCR1, R2, and R3 are the voltage values ​​at the output terminal OUTC of the adjustable voltage output unit; R1, R2, and R3 are the resistance values ​​of the first resistor R1, the second resistor R2, and the third resistor R3, respectively.

[0040] When the resistors in the voltage regulation circuit are R1 = 10kΩ, R2 = 2.8kΩ, and R3 = 10kΩ, the output voltage V of the high-precision LDO1 can be obtained. OUT for:

[0041] V OUT = -V OUTC +5.57V FB (3)

[0042] Where, take V FB =0.8V, then the output voltage V of the high-precision LDO1 is OUT for:

[0043] V OUT = -V OUTC +4.456 (4)

[0044] Typically, the maximum power supply requirement for certain test items of the DUT_MCU is 0.8–4.4V. Therefore, it is only necessary to control the output voltage V of the adjustable voltage output unit DAC. OUTC The system testing requirements can be met within the range of 0 to 3.65V.

[0045] The above describes the output voltage V of the high-precision LDO1. OUT Based on the calculation and analysis, the system logic control unit is set according to the V shown in formula (4). OUT =f(V OUTC The theoretical value V of the output voltage of the adjustable voltage output unit is controlled via SPI communication, based on a functional relationship. OUTC Then, the feedback network of the high-precision LDO1 is controlled by the voltage regulation circuit, so that the output voltage V of the high-precision LDO1 is controlled. OUT The theoretical set value has been reached.

[0046] It should be noted that, Figure 2 The voltage regulation circuit shown is for the case of high-precision LDO1. Similarly, when this voltage regulation circuit is used for high-precision LDO2, the output terminal of the adjustable voltage output unit connected to it is the OUTD terminal. Its circuit structure, working principle and parameter settings are the same as those analyzed above, so they will not be described again.

[0047] The voltage / current acquisition unit is implemented using an ADC chip (preferably a 24-bit ADC for accuracy and cost considerations) and an acquisition circuit. It acquires the output voltage V of high-precision LDO1 and high-precision LDO2 in real time through the acquisition circuit. OUTThe data is then fed back to the system logic control unit. The system logic control unit makes real-time adjustments based on the theoretical set values ​​to ensure the accuracy of the high-precision LDO1 and high-precision LDO2 output voltages, and to maintain the acquisition accuracy under different ambient temperatures, so that the output voltage remains stable within the set error range.

[0048] Because the components in the control loop are not in an ideal state, they will have problems such as response error and temperature drift, which will cause the output voltage V to vary. OUT There is a certain error between the actual value and the theoretical set value. Therefore, the actual output voltage of high-precision LDO1 and high-precision LDO2 is acquired by the voltage / current acquisition unit and transmitted to the system logic control unit via SPI communication. The system logic control unit obtains the output voltage V. OUT The actual value is compared with the theoretical set value, and the output voltage V of the adjustable voltage output unit is adjusted in real time according to the error value. OUTC and V OUTD This, in turn, changes the output voltage V of high-precision LDO1 and high-precision LDO2. OUT This achieves a closed-loop control system. Ultimately, the actual output voltage of the high-precision LDO1 and high-precision LDO2 has an error range of ±0.1mV compared to the theoretically set voltage, with an output voltage range of 0.8~4.4V and a maximum drive capability of 3A, providing power to the DUT_MCU under test.

[0049] The voltage / current acquisition unit can also acquire the DAC output signal of the DUT_MCU and feed it back to the system logic control unit. The system logic control unit analyzes the acquired data to determine whether it meets the test specifications.

[0050] like Figure 3 As shown, in one embodiment of the present invention, the acquisition circuit comprises a first switch S1, a first sampling resistor Rs1, a second sampling resistor Rs2, a third sampling resistor Rs3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, and a first operational amplifier A1, a second operational amplifier A2, a third operational amplifier A3, a fourth operational amplifier A4, and a fifth operational amplifier A5. One end of the first switch S1 is connected to the second sampling resistor Rs2, and both are connected to the output terminal V of the high-precision LDO1. OUT1On the one hand, the first switch S1 is connected to the first sampling resistor Rs1. On the other hand, the other end of the first sampling resistor Rs1 is connected to the other end of the second sampling resistor Rs2. Then, on one hand, they are connected together to the fourth resistor R4, and on the other hand, they are connected together to the VDD terminal of the DUT_MCU. The other end of the fifth resistor R5 is connected to the inverting input terminal of the first operational amplifier A1. The other end of the fourth resistor R4 is connected to the non-inverting input terminal of the first operational amplifier A1. The output terminal of the first operational amplifier A1 is connected to the first input terminal IN1 of the ADC chip. One end of the third sampling resistor Rs3 is connected to the output terminal VDD of the high-precision LDO2. OUT2 One end of the first operational amplifier A1 is connected to the sixth resistor R6; the other end of the third sampling resistor Rs3 is connected to the seventh resistor R7 on one side and to the VBAT terminal of the DUT_MCU on the other side; the other end of the seventh resistor R7 is connected to the inverting input terminal of the fifth operational amplifier A5, the other end of the sixth resistor R6 is connected to the non-inverting input terminal of the fifth operational amplifier A5, and the output terminal of the fifth operational amplifier A5 is connected to the second input terminal IN2 of the ADC chip; the connection method of the second operational amplifier A2, the third operational amplifier A3 and the fourth operational amplifier A4 is the same as that of the first operational amplifier A1.

[0051] In the acquisition circuit, the first sampling resistor Rs1, the second sampling resistor Rs2, and the third sampling resistor Rs3 are high-precision, low-temperature-drift resistors, connected in series in the main power domain (VDD terminal) and battery domain (VBAT terminal) loops of the high-precision LDO1, high-precision LDO2, and DUT_MCU. The first operational amplifier A1, the second operational amplifier A2, the third operational amplifier A3, the fourth operational amplifier A4, and the fifth operational amplifier A5 amplify the voltage drop ΔU across the sampling resistors and output it to the voltage / current acquisition unit. According to the current formula I = ΔU / Rs, this circuit can also perform loop current sampling.

[0052] In the acquisition circuit, the first switch S1 can switch the on / off state of the first sampling resistor Rs1 to change the resistance value of the sampling resistor. The above five operational amplifiers A1 to A5 are each set with appropriate amplification factors to meet the power consumption acquisition of the DUT_MCU in different operating modes, ranging from uA to mA.

[0053] In one embodiment of the present invention, the DUT_MCU has several operating modes, including running mode, stop mode, and standby mode. The specific data acquisition settings for each operating mode are as follows:

[0054] In operating mode, with the sampling resistor Rs set to 200mΩ, the operational amplifier gain set to 309, and the range set to 0–80mA, the operational amplifier output voltage range is 0–4.939V.

[0055] In shutdown mode, with the sampling resistor Rs set to 200Ω, the operational amplifier gain set to 20.5, and the range set to 10uA~1.2mA, the operational amplifier output voltage range is 0.041~4.92V.

[0056] In standby mode, with the sampling resistor Rs set to 200Ω, the operational amplifier gain set to 3090, and the range set to 0–8uA, the operational amplifier output voltage range is 0–4.944V.

[0057] Based on the voltage / current signals acquired by the voltage / current acquisition unit, the power consumption of the current power circuit can be obtained through conversion. The power consumption detection of DUT_MCU consists of two parts: VDD main power domain and VBAT battery domain.

[0058] The DC power supply unit includes a 12V-DC power adapter, a 12V / 5V-DCDC converter, and a 5V / 3.3V-LDO power supply, which provide operating power to the system logic control unit, the adjustable voltage output unit, and the voltage / current acquisition unit, respectively.

[0059] The PC serving as the human-machine interface unit can be implemented using a general-purpose computer. It is used to issue test commands to the system logic control unit and to display test results after the test is completed.

[0060] The component under test, namely DUT_MCU, can be routinely tested using the automatic test system provided by this invention. The main tests include POR (power on reset), PDR (power down reset), main power supply high and low voltage attack, battery domain high and low voltage attack, PVD (Programmable voltage detector), as well as MCU power consumption at full frequency, battery domain power consumption, power consumption of internal modules, ADC linearity, DAC linearity, etc.

[0061] The following example illustrates the testing process of some test items for the MCU chip under test (DUT_MCU) provided by the automatic test system of the present invention.

[0062] The testing process for the POR project is as follows:

[0063] S1: The PC sends a POR test command to the system logic control unit via serial communication.

[0064] S2: After receiving the POR test command, the system logic control unit controls the voltage output unit to output a high-precision voltage of 0.8V to 4.4V linearly increasing (step size of 10mV) to power the VDD port of the DUT_MCU.

[0065] S3: The system logic control unit sends a data frame to the DUT_MCU every 10ms via serial communication.

[0066] S4: If the DUT_MCU triggers POR, it sends a data frame to the system logic control unit via serial communication and proceeds to the next step. If the DUT_MCU still does not trigger a response when the VDD port power supply voltage increases to 4.4V, proceed to step S8.

[0067] S5: After receiving the data sent by DUT_MCU, the system logic control unit parses and judges it, and records that POR is normal.

[0068] S6: The voltage / current acquisition unit acquires the power supply voltage (VDD and VBAT) of the DUT_MCU at this time and sends it to the system logic control unit via SPI communication.

[0069] S7: After the system logic control unit obtains the voltage value, it records it as the POR threshold of the DUT_MCU and sends it to the PC through serial communication, then proceeds to step S9.

[0070] S8: The system logic control unit controls the voltage output unit to shut down the voltage output, determines that the test has failed, and sends the result to the PC via serial communication.

[0071] S9: The PC acquires and stores the test results.

[0072] S10: This test is over. Depending on the user configuration, the system will either enter standby mode or automatically proceed to the next test item.

[0073] II. The testing process for the "MCU power consumption at full frequency" item is as follows:

[0074] S1: The PC sends a "full-frequency MCU power consumption" test command to the system logic control unit via serial communication.

[0075] S2: After receiving the "MCU power consumption at full frequency" test command, the system logic control unit sends test-related commands to the DUT_MCU through serial communication to configure its clock frequency, peripheral function enable, etc., so that it works in the running mode.

[0076] S3: The system logic control unit controls the closing of switch S1 in the acquisition circuit, configures the sampling resistor Rs on the VDD domain of DUT_MCU to 200mΩ, and selects an operational amplifier sampling circuit with a gain of 309.

[0077] S4: The system logic control unit controls the adjustable voltage output unit to output two 3.3V high-precision voltages to power the VDD and VBAT ports of the DUT_MCU respectively.

[0078] S5: The voltage / current acquisition unit acquires the output voltage of the operational amplifier and sends the voltage data to the system logic control unit via SPI communication.

[0079] S6: After receiving the voltage data, the system logic control unit records it as U1, calculates the current power consumption of the DUT_MCU in the VDD domain according to the current formula I=U1 / Rs, and sends it to the PC through serial communication.

[0080] S7: The PC acquires and stores the test results.

[0081] S8: This test is over. Depending on the user configuration, the system will either enter standby mode or automatically proceed to the next test item.

[0082] III. The testing process for the "ADC linearity" item is as follows:

[0083] S1: The PC sends the "ADC Linearity test" test command to the system logic control unit via serial communication.

[0084] S2: After receiving the “ADC Linearity test” command, the system logic control unit controls the adjustable voltage output unit to output a 3.3V high-precision voltage to power the VDD port of the DUT_MCU.

[0085] S3: After waiting for 3 seconds, the system logic control unit controls the adjustable voltage output unit to output a 0V high-precision voltage signal to the ADC_Channel_1 port of DUT_MCU.

[0086] S4: The system logic control unit sends the data "5A04 00A5" to the DUT_MCU via serial communication.

[0087] S5: After receiving the data "5A 04 00A5", DUT_MCU configures its own ADC function, starts to collect the voltage of ADC_Channel_1 port, and sends the collected data to the system logic control unit through serial communication.

[0088] S6: After receiving the data from DUT_MCU, the system logic control unit sends the data to the PC via serial communication.

[0089] S7: The system logic control unit controls the adjustable voltage output unit to adjust the high-precision output voltage by 0.8mV, which supplies power to the ADC_Channel_1 port of the DUT_MCU.

[0090] S8: Return to steps S4 to S7 and repeat until the high-precision voltage output voltage reaches 3.35V, then proceed to the next step.

[0091] S9: The PC acquires and stores the test results.

[0092] S10: This test is over. Depending on the user configuration, the system will either enter standby mode or automatically proceed to the next test item.

[0093] The above examples of test items illustrate the testing process of the automated test system for MCU chip inspection provided by this invention. Other test items will not be listed here.

[0094] Compared with existing technologies, the automatic test system for MCU chip inspection provided by this invention, on the one hand, achieves high-precision adjustable output voltage while solving the problem of insufficient output drive of the DAC chip itself by adopting a technical solution of using an adjustable voltage output unit to control the output voltage of a high-precision LDO feedback pin. On the other hand, by acquiring the actual output voltage through a voltage / current acquisition unit, the closed-loop control system automatically adjusts the output voltage value to accurately reach the set value, and then accurately tests the relevant parameters of the MCU chip under test. The test environment of this automatic test system is simple. The tester only needs to select the test items on the PC, which serves as the human-machine interface unit, and the system will automatically perform the test and display the final test results on the PC, significantly improving the efficiency of the test work and effectively saving test costs.

[0095] The above provides a detailed description of the automated testing system for MCU chip inspection provided by this invention. Any obvious modifications made by those skilled in the art without departing from the essence of this invention will fall within the scope of protection of this invention's patent rights.

Claims

1. An automated testing system for MCU chip inspection, characterized in that... It includes a system logic control unit, an adjustable voltage output unit, a voltage / current acquisition unit, a first high-precision low-dropout linear regulator, a second high-precision low-dropout linear regulator, a DC power supply unit, and a human-machine interface unit; among which, The human-machine interface unit is used to issue test commands to the system logic control unit and to display test results after the test is completed. The system logic control unit is used to execute the test instructions issued by the human-machine interface unit and control the operation of each functional unit in the automatic test system; the system logic control unit sends a frame of data to the MCU chip under test through serial communication at predetermined intervals, and receives data sent by the MCU chip under test through serial communication after triggering power-on reset. The adjustable voltage output unit is used to output a test voltage to the MCU chip under test; the system logic control unit is also used to control the adjustable voltage output unit to output a high-precision voltage of 0.8V to 4.4V linearly increasing in step of 10mV to power the VDD port of the MCU chip under test. The first high-precision low-dropout linear regulator and the second high-precision low-dropout linear regulator are used to improve the output drive capability of the adjustable voltage output unit; The voltage / current acquisition unit is used to acquire the voltage / current signals of the MCU chip under test in real time and feed them back to the system logic control unit. Specifically, the voltage / current acquisition unit acquires the actual output voltages of the first and second high-precision low-dropout linear regulators and transmits them to the system logic control unit via SPI communication. The system logic control unit obtains the actual output voltage value and compares it with the theoretical set value. Based on the error value, it adjusts the output voltage of the adjustable voltage output unit in real time, thereby changing the output voltages of the first and second high-precision low-dropout linear regulators to achieve closed-loop control. The voltage / current signals acquired by the voltage / current acquisition unit are used to calculate the power consumption of the current power circuit. The power consumption detection includes two parts: VDD (main power domain) and VBAT (battery domain). The DC power supply unit is used to provide operating power to the system logic control unit, the adjustable voltage output unit, and the voltage / current acquisition unit, respectively.

2. The automated test system for MCU chip inspection as described in claim 1, characterized in that: The system logic control unit is implemented using an MH2103 series microcontroller. It is connected to the adjustable voltage output unit and the voltage / current acquisition unit via SPI communication, and to the MCU chip under test via serial communication.

3. The automated test system for MCU chip inspection as described in claim 1, characterized in that: The adjustable voltage output unit is implemented using a DAC chip and a voltage regulation circuit. The first and second output terminals of the DAC chip are respectively connected to the ADC port of the MCU chip under test, and the third and fourth output terminals are respectively connected to the feedback terminals of the first high-precision low-dropout linear regulator and the second high-precision low-dropout linear regulator through two identical voltage regulation circuits.

4. The automated test system for MCU chip inspection as described in claim 3, characterized in that: The voltage regulation circuit consists of a first resistor (R1), a second resistor (R2), and a third resistor (R3). The third output terminal of the DAC chip is connected to the third resistor (R3), the other end of the third resistor (R3) is connected to the feedback terminal of the first high-precision low-dropout linear regulator, as well as the second resistor (R2) and the first resistor (R1). The other end of the second resistor (R2) is connected to the ground terminal, and the other end of the first resistor (R1) is connected to the output terminal of the first high-precision low-dropout linear regulator.

5. The automated test system for MCU chip inspection as described in claim 4, characterized in that... The output voltage V of the first high-precision low-dropout linear regulator OUT The following relationship must be satisfied: (In OUT -V FB ) / R1+(V OUTC -V FB ) / R3=V FB / R2 Among them, V FB V is the voltage value at the feedback terminal of the first high-precision low-dropout linear regulator; OUTC R1 represents the voltage value at the output terminal OUTC of the adjustable voltage output unit; R1, R2, and R3 represent the resistance values ​​of the first resistor (R1), the second resistor (R2), and the third resistor (R3), respectively.

6. The automated test system for MCU chip inspection as described in claim 1, characterized in that: The output terminal of the first high-precision low-dropout linear regulator is connected to the VDD terminal of the MCU chip under test, and the output terminal of the second high-precision low-dropout linear regulator is connected to the VBAT terminal of the MCU chip under test.

7. The automated test system for MCU chip inspection as described in claim 1, characterized in that: The voltage / current acquisition unit is implemented using an ADC chip and an acquisition circuit; the first and second input terminals of the ADC chip are connected to the output terminals of the first high-precision low-dropout linear regulator and the second high-precision low-dropout linear regulator through the acquisition circuit, and the third and fourth input terminals are respectively connected to the DAC ports of the MCU chip under test.

8. The automated test system for MCU chip inspection as described in claim 7, characterized in that: The acquisition circuit consists of a first switch (S1), a first sampling resistor (Rs1), a second sampling resistor (Rs2), a third sampling resistor (Rs3), a fourth resistor (R4), a fifth resistor (R5), a sixth resistor (R6), a seventh resistor (R7), a first operational amplifier (A1), a second operational amplifier (A2), a third operational amplifier (A3), a fourth operational amplifier (A4), and a fifth operational amplifier (A5). One end of the first switch (S1) is connected to the second sampling resistor (Rs2), and both are connected to the output terminal of the first high-precision low-dropout linear regulator, and also to the fifth resistor (R5). The other end of the first switch (S1) is connected to the first sampling resistor (Rs1), and the other end of the first sampling resistor (Rs1) is connected to the other end of the second sampling resistor (Rs2), and both are connected to the fourth resistor (R4), and also to the resistor being measured. The MCU chip's VDD terminal is connected; the other end of the fifth resistor (R5) is connected to the inverting input terminal of the first operational amplifier (A1), the other end of the fourth resistor (R4) is connected to the non-inverting input terminal of the first operational amplifier (A1), and the output terminal of the first operational amplifier (A1) is connected to the first input terminal of the ADC chip; one end of the third sampling resistor (Rs3) is connected to the output terminal of the second high-precision low-dropout linear regulator on one side, and the other end is connected to the sixth resistor (R6); the other end of the third sampling resistor (Rs3) is connected to the seventh resistor (R7) on one side, and the other end is connected to the VBAT terminal of the MCU chip under test on the other side; the other end of the seventh resistor (R7) is connected to the inverting input terminal of the fifth operational amplifier (A5), the other end of the sixth resistor (R6) is connected to the non-inverting input terminal of the fifth operational amplifier (A5), and the output terminal of the fifth operational amplifier (A5) is connected to the second input terminal of the ADC chip.

9. The automated test system for MCU chip inspection as described in claim 1, characterized in that: The human-machine interface unit is implemented using a general-purpose computer and is connected to the system logic control unit via serial communication.

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