Coexistence of full frame and partial frame idle picture update

Abstract

This disclosure relates to coexistence of full frame and partial frame idle image updates. Disclosed herein are techniques for coordinating power management between a platform and a panel. Apparatuses, techniques, and circuitry are provided for determining whether to initiate a power management feature within a panel, and sending a signal from the platform to the panel, the signal including an indication that a frame update is not expected and that a power management function can be initiated.

Description

[0001] This application is a divisional application of the invention patent application filed on November 28, 2018, with application number 201811433836.5 and titled "Coexistence of Full Frame and Partial Frame Idle Image Updates". Technical Field

[0002] The embodiments described herein generally relate to refreshing a display panel, and more specifically, to refreshing an image displayed on a panel using partial and full frame updates. Background Technology

[0003] The display panel includes memory that stores the colors to be displayed for each pixel. The pixel memory is retained for approximately tens or hundreds of milliseconds. However, the image may be retained on the screen for extended viewing periods of approximately tens or hundreds of seconds (if not minutes). Therefore, the pixel memory is periodically refreshed at a so-called refresh rate.

[0004] Modern display panels typically include a frame buffer, which is integrated into the display panel and provides memory reservation to allow the panel to "self-refresh." Self-refresh technology significantly improves the energy efficiency of display devices. Summary of the Invention

[0005] According to one aspect of this disclosure, a display panel is provided, comprising: a receiver configured to: receive a first packet from a transmitter after a first frame boundary, the first packet including a symbol indicating that no frame update is expected; and receive a second packet from the transmitter after a second frame boundary, the second packet including a symbol indicating that no frame update is expected, wherein the second frame boundary is the next frame boundary after the first frame boundary; and a display controller configured to initiate one or more power management functions based on the value of the symbol in the first packet. Attached Figure Description

[0006] Figure 1 An embodiment of the display system is shown.

[0007] Figure 2 The update schedule for the first frame is shown.

[0008] Figure 3 The update schedule for the second frame is shown.

[0009] Figure 4 A technique is shown.

[0010] Figure 5 The logical flow is shown.

[0011] Figure 6 An embodiment of the storage medium is shown.

[0012] Figure 7 An embodiment of the device is shown. Detailed Implementation

[0013] This disclosure generally relates to optimizing the self-refresh mode of a display device based on full-frame idle images, new full-frame updates, and partial frame updates. Self-refresh techniques can save power, especially when processing full-frame idle images. However, display image updates are not always full images, and often, the image update interval is not synchronized with the frame update interval. For example, user interaction with the display system is arbitrary and typically not synchronized with the frame update interval. Therefore, the display panel needs to continuously monitor (full and partial) image updates, which may diminish the power reduction advantages of these self-refresh techniques.

[0014] This document provides a system, display panel, and source circuitry, as well as techniques for providing notifications to display modules regarding transitions between full-frame idle images, new full-frame updates, and partial frame updates. This disclosure offers advantages over existing technologies because power optimization (e.g., power management of unused display electronics and / or circuitry, reducing refresh rates in the display module, etc.) can be achieved without relying on control from the image source circuitry. This offers potential advantages because suppliers can independently test features (e.g., refresh rate variations, etc.) and thus make product line decisions without being tightly coupled with the image source circuitry supplier.

[0015] Various embodiments may include one or more elements. Elements may include any structure arranged to perform certain operations. Each element may be implemented as hardware, software, or any combination thereof, depending on the needs of a given set of design parameters or performance constraints. Although embodiments may be described by way of example using a limited number of elements in a particular topology, embodiments may include more or fewer elements in alternative topologies, depending on the needs of a given implementation. It is important to note that any reference to “one embodiment” or “embodiment” means that a particular feature, structure, or characteristic described in connection with that embodiment is included in at least one embodiment. The phrases “in one embodiment,” “in some embodiments,” and “in various embodiments” appearing throughout the specification do not necessarily refer to the same embodiment.

[0016] Figure 1A display system 100 arranged according to at least one embodiment of the present disclosure is illustrated. As shown, the display system 100 includes a platform 10 and a panel 18 coupled via a display interface 16. Typically, the platform 10 may include any platform arranged to generate an image to be displayed by the panel 18. For example, the platform 10 may be integrated into, be part of, or include a laptop computer, desktop computer, ultrabook, cellular phone, or any processor-based device. Typically, the panel 18 may be integrated into, be part of, or include various displays, such as a light-emitting diode (LED) display, an organic LED (OLED) display, a liquid crystal display (LCD), etc. The display interface 16 may be any of various display interfaces, such as a display port interface, an embedded display port interface, a high-definition multimedia interface (HDMI), etc.

[0017] Platform 10 may have a processing unit 12, which may be a conventional processor, a graphics processing unit (GPU), or a combination of a conventional processor and a GPU. Platform 10 also includes a transmitter 14. Processor 12 and transmitter 14 may constitute a display engine. Platform 10 may be provided as a system-on-a-chip (SoC), for example, it may be integrated into a display system device (e.g., a mobile phone, laptop computer, portable media device, etc.). Typically, platform 10 transmits images via display interface 16 for display on panel 10. For example, platform 10 may transmit information elements generated by GPU 12, including indications of pixel data (e.g., color, position, etc.), to panel 18 via transmitter 14 and display interface 16. These information elements (or “frames”) are typically transmitted at intervals corresponding to the frame rate of panel 18. This will be described in more detail below.

[0018] Panel 18 may include receiver 20, panel register 22, panel buffer 24, timer 26, display controller 28, and display electronics 30. Typically, panel 18 may receive frames at receiver 20 (e.g., from a platform) via display interface 16. Receiver 20 may provide frames to display controller 28, which in turn provides these frames for display on display electronics 28. Receiver 20 and / or display electronics may access panel register 22, which may store indications of settings for panel 18 (e.g., refresh rate, etc.). Timer 26 may be coupled to receiver 20 and / or display controller 28 and is operable to provide the expiration of a frame refresh interval, or the expiration of a period of time during which the display interface 16 link is turned off to save power, for example, when panel 18 operates in self-refresh mode (sometimes referred to as panel self-refresh (PSR)).

[0019] Panel buffer 24 provides memory storage for frames received via display interface 16. Display controller 28 is operable to turn off certain portions of the panel (e.g., receivers, etc.) during the PSR period and can refresh display electronics according to indications of frames stored in panel buffer 24.

[0020] During operation, transmitter 14 and receiver 20 can be arranged to coordinate PSR and / or disable display interface 16. As provided herein, such coordination may include coordinating frame updates between a source (e.g., platform 10) and a sink (e.g., panel 18).

[0021] Figure 2 An example frame update schedule 200 is shown. As shown, frame update schedule 200 illustrates continuous updates between platform 10 and panel 18. It should be understood that vertical blanking (VB) intervals 210 are arranged between each frame. VB interval 210 indicates the end of the last row of a frame and the beginning of the first row of the next frame. Frame update schedule 200 also includes frames 220. Note that for clarity, eight (8) frames are depicted in this figure, specifically frames 220-1, 220-2, 220-3, 220-4, 220-5, 220-6, 220-7, and 220-8. However, schedule 200 may include any number of frames 220 without departing from the spirit and scope of this disclosure. It should also be noted that frames 220-2 through 220-6 are identical. More specifically, when frames are labeled with the same identifier (e.g., “frame N+1”), it indicates that the frames are identical in terms of pixel content, even if the timestamps may differ. Furthermore, when a frame is marked with an apostrophe at the end (e.g., "partial frame N'"), it indicates that only a portion of the frame content has changed, and it is appropriate to use a partial update mechanism to update the frame.

[0022] Frame update schedule 200 depicts a typical streaming of frames from a source (e.g., platform 10) to a sink (e.g., panel 18) without panel self-refresh. Figure 3 An example frame update schedule 300 arranged according to some examples of this disclosure is shown. Schedule 300 illustrates an example of how a source (e.g., platform 10) and a sink (e.g., panel 18) coordinate the processing of full frame updates, partial frame updates, and no frame updates to provide PSR optimization, as detailed herein. This optimization can facilitate the panel entering a deeper sleep or lower power state than conventional systems, and the update schedule is coordinated between the source (e.g., platform 10) and the sink (e.g., panel 18).

[0023] Similar to schedule 200, schedule 300 includes a VB interval 210 arranged between frames 220. However, as shown, schedule 300 includes a PSR interval 330 and a retraining interval 340. Typically, schedule 300 can provide a full frame update for frames 220-2. Panel 18 can store frame N+1 for the PSR interval. For example, panel buffer 24 can store frame N+1, which display controller 28 can use to refresh display electronics 30 during PSR interval 330. Furthermore, schedule 300 includes a partial PSR interval PSR 330'. PSR 330' can correspond to a selective update process, such as updating a portion of frame N'.

[0024] Panel 18 can be arranged to resynchronize with platform 10 during retraining interval 340. In other words, receiver 20 and / or display controller 28 can be powered on and remain in full frame update mode for a selected number of frames (e.g., as specified in panel register 22) before restarting power management functions (e.g., PSR 330 or PSR_2 330'). Furthermore, receiver 20 and / or display controller 28 can be arranged to power off for a selected number of frames (e.g., as specified in panel register 22) during PSR 300 or PSR_2 330'.

[0025] Figure 4 An example technique 400 for coordinating updates between source and sink devices (e.g., platform 10 and panel 18) in a display system is illustrated. Technique 400 is depicted in conjunction with schedules 200 and 300 to illustrate update coordination for full-frame and partial-frame updates, as well as coordination link closure. As shown in the figure, technique 400 may include a selective update protocol initiated by platform 10 with panel 18, causing panel 18 to partially refresh the displayed image using partial frame N'. For example, platform 10 may implement selective updates at box 410 according to the Embedded Display Port (eDP) standard v1.4 published by the Video Electronics Standards Association (VESA) in February 2015.

[0026] At box 420, platform 10 can provide regular or single frame updates. Subsequently, at box 430, platform 10 can request or initiate a PSR. Specifically, at box 430, the platform can indicate to the panel that stable frame data is desired. In response, at box 440, panel 18 can enter a PSR. For example, panel 18 can shut down link 16 and / or other electronic devices within the panel, such as receiver 20. It is important to note that the PSR is enabled in response to the platform's indication that stable frame data is desired. This differs from conventional systems, where the panel determines that a stable frame has been received and enters a PSR.

[0027] At box 450, panel 18 can exit the PSR and retrain link 16. In some examples, panel 18 can remain in the PSR for a selected number of frames (e.g., 2 frames in this example). When exiting the PSR, panel 18 may be required to remain in full or regular frame update mode for the selected number of frames. This number of frames can be specified, for example, in the panel registers, etc.

[0028] Typically, platform 10 can use any of the various technologies to indicate to panel 18 that frame updates are not expected (full, partial, etc.). In response, panel 18 can enter PSR and apply power management functions (e.g., clock-gating components within panel 18, applying selective refresh rate reduction, etc.).

[0029] In some examples, platform 10 may indicate to panel 18 that frame updates are not expected via a sideband interconnect or sideband interface. For example, in many applications, link 16 may include a sideband channel coupling platform 10 and panel 18. Platform 10 may transmit indications (e.g., control signals, information elements, etc.) via this sideband channel. As a particular example, platform 10 may indicate to the panel that frame updates are not expected via a level-sensitive or edge-sensitive sideband channel in link 16.

[0030] In some examples, platform 10 can indicate to panel 18 that frame updates are not expected via an existing configuration channel within link 16. For example, if the display port link includes an AUX channel, platform 10 can use this AUX channel to indicate to panel 18 (e.g., via control signals, via information elements, etc.) that frame updates are not expected.

[0031] In some examples, platform 10 can indicate to panel 18 that a frame update is not expected by marking an indicator onto packets transmitted between platform 10 and panel 18 via link 16. For example, platform 10 can append selected characters or symbols to packets at each frame boundary to indicate to panel 18 whether a future frame update is expected. In response, panel 18 can determine whether to enter a PSR as discussed herein. As a specific example, platform 10 can employ the auxiliary data packet mechanism provided by the Embedded Display Port (eDP) standard v1.4 published by the Video Electronics Standards Association (VESA) in February 2015 to indicate to the panel that a frame update is not expected.

[0032] Figure 5A logic flow 500 is illustrated for classifying frames and indicating to a panel that frame updates are not expected. The logic flow 500 can be implemented by a platform coupled to the panel, such as platform 10 coupled to panel 18. The logic flow 500 can begin at box 510. At box 510, “Indicate Full Frame Update,” a full frame update can be indicated. For example, platform 10 can send a full frame update to panel 18. Continuing to decision box 515, “New Content,” the platform can determine whether subsequent frames (or frames) include new content. For example, platform 10 can determine whether the next frame is a partial frame update, a full frame update, or no frame update. From decision box 515, the logic flow 500 can continue to box 520 or decision box 525. For example, the logic flow 500 can continue from decision box 515 to box 520 based on the determination that the next frame does indeed include new content. Conversely, the logic flow 500 can continue from decision box 515 to decision box 525 based on the determination that the next frame does not include new content.

[0033] At box 520, “Indicate full or partial frame update”, a full or partial frame update can be indicated. For example, platform 10 can indicate a full frame update to panel 18, where the new content includes entirely new frames. Similarly, platform 10 can indicate a partial frame update to panel 18, where the new content includes partial frame updates. At decision box 525, “Idle duration threshold reached?”, platform 10 can determine whether an idle duration threshold has been reached. In other words, platform 10 can determine whether no new content has been received within the selected time period (e.g., 1 frame, 2 frames, 3 frames, 4 frames, etc.) (e.g., based on decision box 515).

[0034] From box 520, logic flow 500 can continue to decision box 535. At decision box 535, "Does the synchronization maintenance threshold need to be met?", platform 10 can determine whether the synchronization maintenance threshold has been reached. For example, in some implementations (e.g., ... Figure 3-4 As shown, platform 10 may need to update panel 18 with a selected number of frames (e.g., 2 frames, 3 frames, 4 frames, etc.) in order to establish and / or maintain synchronization between platform 10 and panel 18.

[0035] From decision box 535, logic flow 500 can return to decision box 510 or decision box 515. For example, logic flow 500 can continue from decision box 535 to decision box 510 based on the determination that the synchronization maintenance threshold has not yet been reached. Conversely, logic flow 500 can continue from decision box 535 to decision box 515 based on the determination that the synchronization maintenance threshold has been reached.

[0036] From decision box 525, logic flow 500 can return to decision box 515 or continue to box 530. For example, logic flow 500 can continue from decision box 525 to box 530 based on determining that the idle duration threshold has been met. Conversely, logic flow 500 can proceed from decision box 525 to decision box 515 based on determining that the idle duration threshold has not yet been met.

[0037] At box 530, “Indicate no new or partial frame update”, platform 10 may indicate that no new or partial frame update is expected. For example, platform 10 may send an indication to panel 18 that no new frame update is expected (e.g., via a sideband channel, via an out-of-band channel, via an in-band channel, via appending characters to a frame, etc.).

[0038] Continuing to box 540, "Waiting for New Content or Idle Link Threshold Expiration," platform 10 can wait for either new content or the idle link threshold to expire. For example, at box 540, platform 10 can determine that new content (e.g., a full frame or partial frame update) has been received. Furthermore, at box 540, platform 10 can determine that the idle link threshold duration has expired. For example, in some embodiments, platform 10 and panel 18 can be arranged to coordinate idle link time periods (e.g., 2 frames, 3 frames, 4 frames, etc.), wherein once platform 10 sends an indication that a frame update is not expected, platform 10 will send a new update when the known idle link threshold expires. This allows for coordination between platform 10 and panel 18 regarding when an update will be sent once a PSR is initiated. This idle link threshold can be programmed during initialization, for example, within panel register 22, etc.

[0039] Continuing from box 540 to box 550 "Send a complete frame to the panel", platform 10 can send a complete frame update to panel 18. Continuing to decision box 555 "Duration of timing resynchronization reached?", platform 10 can determine whether the timing resynchronization duration has been reached. For example, in some implementations, platform 10 and panel 18 need to exchange a set number of complete frames to resynchronize the timing between the controllers. At decision box 555, platform 10 can determine whether the time period has been reached. From decision box 555, logic flow 500 can return to box 550 or box 510. For example, logic flow 500 can continue from decision box 555 to box 510 based on the determination that the timing resynchronization duration has been reached. Conversely, logic flow 500 can continue from decision box 555 to box 550 based on the determination that the timing resynchronization duration has not yet been reached.

[0040] Figure 6An embodiment of storage medium 2000 is illustrated. Storage medium 2000 may include article of manufacture. In some examples, storage medium 2000 may include any non-transitory computer-readable or machine-readable medium, such as an optical, magnetic, or semiconductor storage device. Storage medium 2000 may store various types of computer-executable instructions, such as 2002. For example, storage medium 2000 may store various types of computer-executable instructions to implement technique 400. In some examples, storage medium 2000 may store various types of computer-executable instructions to implement logic flow 500.

[0041] Examples of computer-readable or machine-readable storage media may include any tangible medium capable of storing electronic data, including volatile or non-volatile memory, removable or non-removable memory, erasable or non-erasable memory, writable or reusable memory, etc. Examples of computer-executable instructions may include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, object-oriented code, visual code, etc. Examples are not limited to this context.

[0042] Figure 7 This is an illustration of an exemplary system embodiment, and specifically, it depicts a platform 3000 that may include various components. For example, the figure depicts the platform (system) 3000 as including a processor / graphics core 3002, a chipset 3004, an input / output (I / O) device 3006, random access memory (RAM) (e.g., dynamic RAM (DRAM)) 3008 and read-only memory (ROM) 3010, a panel 3020 (e.g., panel 18, etc.), and various other platform components 3014 (e.g., fans, crossflow fans, heat sinks, DTM systems, cooling systems, housings, vents, etc.). System 3000 may also include a wireless communication chip 3016 and a graphics device 3018. However, the embodiment is not limited to these components.

[0043] As shown in the figure, I / O devices 3006, RAM 3008, and ROM 3010 are coupled to processor 3002 via chipset 3004. Chipset 3004 can be coupled to processor 3002 via bus 3012. Therefore, bus 3012 may include multiple lines.

[0044] Processor 3002 may be a central processing unit including one or more processor cores, and may include any number of processors having any number of processor cores. Processor 3002 may include any type of processing unit, such as a CPU, a multiprocessor unit, a reduced instruction set computer (RISC), a pipelined processor, a complex instruction set computer (CISC), a digital signal processor (DSP), etc. In some embodiments, processor 3002 may be multiple individual processors located on a single integrated circuit chip. In some embodiments, processor 3002 may be a processor with integrated graphics, while in other embodiments, processor 3002 may be one or more graphics cores.

[0045] Embodiments may be described using the expressions "one embodiment" or "embodiment" and their derivatives. These terms mean that a particular feature, structure, or characteristic described in connection with that embodiment is included in at least one embodiment. The phrase "in one embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, embodiments may be described using the expressions "coupled" and "connected" and their derivatives. These terms are not necessarily synonyms. For example, the terms "connected" and / or "coupled" may be used to describe embodiments to indicate that two or more elements are in direct physical or electrical contact with each other. However, the term "coupled" may also indicate that two or more elements are not in direct contact with each other but still cooperate or interact with each other. Additionally, aspects or elements from different embodiments may be combined.

[0046] It is emphasized that this abstract is provided to allow the reader to quickly determine the nature of the technical disclosure. The abstract is submitted under the premise that it will not be used to interpret or limit the scope or meaning of the claims. Furthermore, in the above detailed description, it can be seen that various features are grouped together in a single embodiment for the purpose of simplifying the disclosure. This method of disclosure is not to be construed as reflecting an intention to require more features than expressly recited in each claim. Rather, as reflected in the following claims, the inventive subject matter lies in fewer than all features of a single disclosed embodiment. Therefore, the following claims are thus incorporated into the detailed description, wherein each claim is itself a separate preferred embodiment. In the appended claims, the terms “comprising” and “therein” are used as equivalents to the corresponding terms “including” and “wherein”, respectively. Furthermore, the terms “first,” “second,” and “third,” etc., are used merely as labels and are not intended to impose numbering requirements on their objects.

[0047] The above description includes examples of the disclosed architecture. It is certainly impossible to describe every conceivable combination of components and / or methods, but those skilled in the art will recognize that many other combinations and permutations are possible. Therefore, this novel architecture is intended to cover all such changes, modifications, and variations falling within the spirit and scope of the appended claims. The detailed disclosure now turns to providing examples in relation to other embodiments. The embodiments provided below are not limiting.

[0048] Example 1. An apparatus comprising: a transmitter for transmitting frames to a panel via a display interconnect; and a processor coupled to the transmitter, the processor: determining to initiate a power management function within the panel; and causing the transmitter to transmit an instruction to the panel to cause the panel to initiate the power management function.

[0049] Example 2. The apparatus of Example 1, wherein the processor is configured to: determine whether to send a full or partial frame update to the panel; and, based on the determination that a full or partial frame update should not be sent to the panel, determine to initiate a power management function within the panel.

[0050] Example 3. The apparatus of Example 2, wherein the processor is configured to: determine whether an idle duration threshold has been met; and based on the determination that the idle duration threshold has been met, determine to initiate a power management function within the panel.

[0051] Example 4. The device of Example 1, wherein the transmitter is coupled to the panel via a sideband channel, and the transmitter sends a control signal to the panel via the sideband channel, which causes the panel to initiate a power management function.

[0052] Example 5. The apparatus of Example 1, wherein the transmitter sends a control signal to the panel via an auxiliary channel within the display interconnect, the control signal causing the panel to initiate a power management function.

[0053] Example 6. The apparatus of Example 1, in which the processor appends a character to a frame to be sent by the transmitter to the panel, the character instructing the panel to initiate a power management function.

[0054] Example 7. The apparatus of Example 6, wherein the processor appends characters to the frame according to the auxiliary data packetization mechanism provided by the Embedded Display Port (eDP) standard v1.4, published in February 2015 and released by the Video Electronics Standards Association (VESA).

[0055] Example 8. The apparatus of Example 1 includes a display interface coupled to a transmitter, the display interface being coupled to a display interconnect.

[0056] Example 9. The device of Example 8, the display interface includes a display port interface or an embedded display port interface.

[0057] Example 10. A method comprising: determining, by a processor in a platform coupled to a panel via a display interconnect, to initiate a power management function within the panel; and sending an instruction from a transmitter to the panel to cause the panel to initiate the power management function.

[0058] Example 11. The method of Example 10 includes: determining whether to send a full or partial frame update to the panel; and determining, based on the determination not to send a full or partial frame update to the panel, to initiate a power management function within the panel.

[0059] Example 12. The method of Example 11 includes: determining whether an idle duration threshold has been met; and determining, based on the determination that the idle duration threshold has been met, to initiate a power management function within the panel.

[0060] Example 13. The method of Example 10, wherein a transmitter is coupled to a panel via a sideband channel, the method comprising transmitting a control signal from the transmitter to the panel via the sideband channel, the control signal causing the panel to initiate a power management function.

[0061] Example 14. The method of Example 10 includes sending a control signal from a transmitter to a panel via an auxiliary channel within a display interconnect, the control signal causing the panel to initiate a power management function.

[0062] Example 15. The method of Example 10 includes having a processor append a character to a frame to be sent by a transmitter to a panel, the character instructing the panel to initiate a power management function.

[0063] Example 16. The method of Example 15 includes appending characters to a frame according to the auxiliary data packetization mechanism provided by the Embedded Display Port (eDP) standard v1.4, published in February 2015 and released by the Video Electronics Standards Association (VESA).

[0064] Example 17. The method of Example 10, the display interconnect includes display port interconnect or embedded display port interconnect.

[0065] Example 18. At least one machine-readable storage medium including instructions that, when executed by a processor at a platform coupled to a panel via a display interconnect, cause the processor to: determine to initiate a power management function within the panel; and cause a transmitter to send an instruction to the panel via the display interconnect to cause the panel to initiate the power management function.

[0066] Example 19. At least one machine-readable storage medium of Example 18 includes instructions that further cause a processor to perform the following operations: determine whether to send a full or partial frame update to the panel; and determine, based on the determination not to send a full or partial frame update to the panel, to initiate a power management function within the panel.

[0067] Example 20. At least one machine-readable storage medium of Example 19 includes instructions that further cause a processor to perform the following operations: determine whether an idle duration threshold has been met; and determine, based on the determination that the idle duration threshold has been met, to initiate a power management function within the panel.

[0068] Example 21. At least one machine-readable storage medium of Example 18 includes instructions that further cause a processor to perform the following operations: cause a transmitter to send a control signal to a panel via a sideband channel, the control signal causing the panel to initiate a power management function, the transmitter being coupled to the panel via the sideband channel.

[0069] Example 22. At least one machine-readable storage medium of Example 18 includes instructions that further cause a processor to perform the following operation: cause a transmitter to send a control signal to a panel via an auxiliary channel within a display interconnect, the control signal causing the panel to initiate a power management function.

[0070] Example 23. At least one machine-readable storage medium of Example 18 includes instructions that further cause the processor to perform the following operation: append a character to a frame to be transmitted by the transmitter to the panel, the character instructing the panel to initiate a power management function.

[0071] Example 24. At least one machine-readable storage medium of Example 23 includes instructions that further cause the processor to perform the following operation: append characters to a frame in accordance with the auxiliary data packetization mechanism provided by the Embedded Display Port (eDP) standard v1.4, published in February 2015 and released by the Video Electronics Standards Association (VESA).

[0072] Example 25. At least one machine-readable storage medium of Example 18, the display interconnect includes a display port interconnect or an embedded display port interconnect.

[0073] Example 26. An apparatus comprising: a receiver located at a panel for receiving frames from a platform via a display interconnect; and a processor coupled to the receiver, the processor: receiving control signals from the platform, the control signals including an instruction to initiate a power management function at the panel; and causing the power management function to be initiated.

[0074] Example 27. The apparatus of Example 26, wherein the receiver is coupled to the platform via a sideband channel, and the receiver receives control signals via the sideband channel.

[0075] Example 28. The device of Example 26, wherein the receiver receives control signals via an auxiliary channel within the display interconnect.

[0076] Example 29. The apparatus of Example 26, wherein the control signal includes a frame, the frame including characters appended to the frame, the characters being used to instruct the panel to initiate a power management function.

[0077] The apparatus of Example 30 and Example 29 appends characters to frames according to the auxiliary data packetization mechanism provided by the Embedded Display Port (eDP) standard v1.4, published in February 2015 and released by the Video Electronics Standards Association (VESA).

[0078] Example 31. The apparatus of Example 26 includes a display interface coupled to a receiver, the display interface being coupled to a display interconnect.

[0079] Example 32. The device of Example 31 has a display interface including a display port interface or an embedded display port interface.

[0080] Example 33. A method comprising: receiving a control signal from a platform, the control signal including an indication to initiate a power management function at a panel; and causing the power management function to be initiated.

[0081] Example 34. The method of Example 33, wherein the receiver is coupled to the platform via a sideband channel, the method includes receiving control signals via the sideband channel.

[0082] Example 35. The method of Example 33 includes receiving control signals via an auxiliary channel within a display interconnect.

[0083] Example 36. The method of Example 33, wherein the control signal includes a frame, the frame including characters attached to the frame, the characters being used to instruct the panel to initiate a power management function.

[0084] Example 37. The method of Example 36 appends characters to the frame according to the auxiliary data packetization mechanism provided by the Embedded Display Port (eDP) standard v1.4, published in February 2015 and released by the Video Electronics Standards Association (VESA).

[0085] Example 38. The method of Example 33, the display interface includes a display port interface or an embedded display port interface.

[0086] Example 39. At least one machine-readable storage medium including instructions that, when executed by a processor at a panel coupled to the platform via a display interconnect, cause the processor to: receive a control signal from the platform, the control signal including an instruction to initiate a power management function at the panel; and cause the power management function to be initiated.

[0087] Example 40. At least one machine-readable storage medium of Example 39, wherein a receiver is coupled to a platform via a sideband channel, the at least one machine-readable storage medium includes instructions that further cause a processor to perform the following operation: receive control signals via the sideband channel.

[0088] Example 41. At least one machine-readable storage medium of Example 39 includes instructions that further cause a processor to perform the following operation: receive a control signal via an auxiliary channel within a display interconnect.

[0089] Example 42. At least one machine-readable storage medium of Example 39, wherein the control signal includes a frame that includes characters appended to the frame for instructing the panel to initiate a power management function.

[0090] Example 43. At least one machine-readable storage medium of Example 42 appends characters to frames according to the auxiliary data packetization mechanism provided by the Embedded Display Port (eDP) standard v1.4 published by the Video Electronics Standards Association (VESA) in February 2015.

[0091] Example 44. At least one machine-readable storage medium of Example 39, the display interface including a display port interface or an embedded display port interface.

[0092] Example 45. An apparatus comprising: in a platform coupled to a panel via a display interconnect, means for determining to initiate a power management function within the panel; and means for transmitting an instruction from a transmitter to the panel to cause the panel to initiate the power management function.

[0093] Example 46. The apparatus of Example 45 includes: means for determining whether to send a full or partial frame update to a panel; and means for determining, based on the determination that a full or partial frame update should not be sent to the panel, to initiate a power management function within the panel.

[0094] Example 47. The apparatus of Example 46 includes: means for determining whether an idle duration threshold has been met; and means for determining, based on the determination that the idle duration threshold has been met, to initiate a power management function within the panel.

[0095] Example 48. The apparatus of Example 45, wherein a panel is coupled to a platform via a sideband channel, the apparatus includes means for transmitting a control signal to the panel via the sideband channel, the control signal causing the panel to initiate a power management function.

[0096] Example 49. The apparatus of Example 45 includes means for sending a control signal to a panel via an auxiliary channel within a display interconnect, the control signal causing the panel to initiate a power management function.

[0097] The apparatus of Example 50 and Example 45 includes means for appending a character to a frame to be transmitted by a transmitter to a panel, the character instructing the panel to initiate a power management function.

[0098] Example 51. The apparatus of Example 50 includes means for appending characters to a frame in accordance with the auxiliary data packetization mechanism provided by the Embedded Display Port (eDP) standard v1.4 published in February 2015 and released by the Video Electronics Standards Association (VESA).

[0099] The apparatus of Example 52. Example 45, the display interconnect includes a display port interconnect or an embedded display port interconnect.

[0100] Example 53. An apparatus comprising: at a panel, means for receiving a control signal from a platform, the control signal including an indication to initiate a power management function at the panel; and means for causing the power management function to be initiated.

[0101] Example 54. The apparatus of Example 53, wherein a panel is coupled to a platform via a sideband channel, the apparatus including means for receiving control signals via the sideband channel.

[0102] Example 55. The apparatus of Example 53 includes means for receiving control signals via an auxiliary channel within a display interconnect.

[0103] Example 56. The apparatus of Example 53, wherein the control signal includes a frame, the frame including characters appended to the frame, the characters being used to instruct the panel to initiate a power management function.

[0104] The apparatus of Example 57.56 appends characters to frames according to the auxiliary data packetization mechanism provided by the Embedded Display Port (eDP) standard v1.4, published in February 2015 and released by the Video Electronics Standards Association (VESA).

[0105] Example 58. The apparatus of Example 53 has a display interface including a display port interface or an embedded display port interface.

[0106] Example 59. A system comprising: means of any one of Examples 1 to 10; and means of any one of Examples 26 to 32.

Claims

1. A display panel, comprising: Receiver, used for: The first packet is received from the transmitter after the first frame boundary. The first packet includes a symbol indicating that no frame update is expected. as well as A second packet is received from the transmitter after the second frame boundary, the second packet including a symbol indicating that no frame update is expected, wherein the second frame boundary is the next frame boundary after the first frame boundary; and The display controller is configured to initiate one or more power management functions based on the values ​​of the symbols in the first group; The display panel also includes a timer for synchronizing with the transmitter using the timing of the second group; Initiating one or more power management functions includes gating clock signals for one or more components of the display panel.

2. The display panel according to claim 1, wherein, The receiver is configured to receive the first packet and the second packet via a link with the transmitter, wherein the link with the transmitter is closed based on the value of the symbol in the first packet.

3. The display panel according to claim 1, wherein the receiver is configured to receive the first packet and the second packet in an in-band channel.

4. A display system comprising a display panel according to claim 1 and the transmitter, the transmitter being used for: Send the first packet to the display panel; and The second group is sent to the display panel.

5. The system of claim 4, wherein the transmitter is configured to transmit the first packet and the second packet in an in-band channel.

6. The system of claim 4, wherein the transmitter is configured to transmit the first packet to the display panel via a link, wherein, After the transmitter sends the first packet through the link, the link is shut down.

7. The system of claim 4, wherein the system is a mobile phone.

8. A display device, comprising The display engine includes a transmitter used for: After the first frame boundary, a first packet is sent to the display panel, wherein the first packet includes a symbol indicating that no frame update is expected; and Following the second frame boundary, a second packet is sent to the display panel, wherein the second packet includes a symbol indicating that no frame update is expected, and wherein the second frame boundary is the next frame boundary after the first frame boundary. in, Receiving the first packet will cause the display panel to initiate one or more power management functions; The display panel also includes a timer for synchronizing with the transmitter using the timing of the second group; Initiating one or more power management functions includes gating clock signals for one or more components of the display panel.

9. The apparatus of claim 8, wherein the transmitter is configured to transmit the first packet and the second packet in an in-band channel.

10. The device of claim 8, further comprising the display panel, wherein the display panel comprises: A receiver is configured to receive the first packet and the second packet from the transmitter; as well as The display controller is configured to initiate one or more power management functions based on the values ​​of the symbols in the first group.

11. The device according to claim 8, wherein, The transmitter is used to send the first packet to the display panel via a link, wherein the link is shut down after the transmitter sends the first packet via the link.

12. A display method, comprising: After the first frame boundary, a first packet is sent to the display panel, wherein the first packet includes a symbol indicating that no frame update is expected; After the second frame boundary, a second packet is sent to the display panel, wherein the second packet includes a symbol indicating that no frame update is expected, wherein the second frame boundary is the next frame boundary after the first frame boundary; as well as The display panel initiates one or more power management functions based on the value of the symbol in the first group; The method further includes: using the timing of the second group to synchronize the timer of the display panel with the transmitter that sent the first group; Initiating one or more power management functions includes gating clock signals for one or more components of the display panel.

13. The method of claim 12, wherein sending the first packet includes sending the first packet via a link, and further includes closing the link after sending the first packet via the link.

14. The method of claim 12, wherein sending the first packet comprises sending the first packet in an in-band channel.

15. A display device comprising means for performing the method according to any one of claims 12 to 14.

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