A broadband, high-frequency, low-harmonic-loss, high-harmonic-suppression frequency doubler chip

Abstract

This invention provides a broadband, high-frequency, low-harmonic-loss, high-harmonic-suppression frequency doubler chip, belonging to the field of radio frequency microwave integrated circuit technology in microelectronics and solid-state electronics. It includes a frequency doubler module, a first power supply filter circuit, a second power supply filter circuit, and an output matching module. The input terminal of the frequency doubler module forms the chip's input port and receives single-ended signals. The output terminal of the frequency doubler module is connected to the input terminal of the output matching network, and the output terminal of the output matching network forms the chip's output port, outputting a single-ended signal containing only even-order harmonics. The frequency doubler chip provided by this invention achieves higher harmonic suppression and lower harmonic-loss within a relatively small chip size, and also exhibits good linearity and dynamic range.

Description

Technical Field

[0001] This invention belongs to the field of radio frequency microwave integrated circuit technology in microelectronics and solid-state electronics, and in particular, a broadband high-frequency low-harmonic loss, high harmonic suppression frequency doubler chip. Background Technology

[0002] In recent years, millimeter-wave systems have been widely used in high-end equipment such as high-speed communication and high-resolution imaging radar. For such systems, the key lies in designing a high-power, wideband, and low-phase-noise local oscillator signal source. Because millimeter-wave oscillators are sensitive to process fluctuations and have a narrow tuning range, wideband frequency multipliers with low doubling loss are usually used as the key core circuit of the signal source in millimeter-wave signal source design.

[0003] For frequency multiplier circuits, frequency multiplication can be achieved using any nonlinear semiconductor device, such as common nonlinear rheostat diodes, step diodes, and field-effect transistors. Furthermore, with continuous research efforts, millimeter-wave frequency multiplier chips have seen significant improvements in frequency multiplication efficiency and harmonic suppression. The basic circuit architecture and implementation methods are relatively mature. However, the following problems still exist:

[0004] 1. For nonlinear resistive frequency multiplication, the required input power is high and the frequency multiplication loss is large;

[0005] 2. It is difficult to achieve higher harmonic suppression in the millimeter wave band;

[0006] 3. Adjacent harmonics of the broadband frequency multiplier chip overlap with the operating frequency band, resulting in poor suppression.

[0007] Based on the above problems, without affecting the harmonic suppression degree, this patent adopts the method of changing the voltage difference on both sides of the transistor to reduce the optimal input power of the frequency multiplier, which effectively reduces the frequency multiplication loss of the circuit. Summary of the Invention

[0008] In view of this, embodiments of the present invention provide a broadband high-frequency low-harmonic-loss, high-harmonic-suppression second frequency doubler chip to solve or alleviate the technical problems existing in the prior art, and at least provide a beneficial option.

[0009] The technical solution to achieve the purpose of this invention is as follows: a broadband, high-frequency, low-harmonic-loss, high-harmonic-suppression frequency doubler chip, mainly composed of a frequency multiplier module, a first power supply filter circuit, a second power supply filter circuit, and an output matching module; the input terminal of the frequency multiplier module constitutes the input port of the chip, used to receive single-ended signals; the output terminal of the frequency multiplier module is connected to the input terminal of the output matching network, used to output a set of odd harmonics with opposite phases and equal amplitudes, and a set of even harmonics with the same phase and equal amplitudes; the output terminal of the output matching network constitutes the output port of the chip, used to output a single-ended signal containing only even harmonics.

[0010] The input terminal of the first power filter circuit is connected to the preset positive terminal of the power supply, and the output terminal of the first power filter circuit is connected to the external positive terminal of the frequency multiplier module. The output terminal of the second power filter circuit is connected to the preset negative terminal of the power supply, and the input terminal of the second power filter circuit is connected to the external negative terminal of the frequency multiplier module. The first power filter circuit and the second power filter circuit are used to suppress the fundamental power of the chip output port and output the corresponding single-ended signal from the chip output port.

[0011] Specifically, the frequency multiplier module includes a microstrip transmission line TL1, base-emitter shorting transistors D1 and D2, a balun Tb1, a balun transmission line Tb2, and a balun transmission line Tb3. One end of the microstrip transmission line TL1 forms the input terminal of the frequency multiplier module, and the other end of the microstrip transmission line TL1 is connected to the collector of the base-emitter shorting transistor D1 and the emitter of the base-emitter shorting transistor D2. The emitter of the base-emitter shorting transistor D1 is also connected to the base-emitter shorting transistor D2. One end of the microstrip transmission line TL2 is connected to the other end of the microstrip transmission line TL2, one end of the balun transmission line Tb3, and the other end of the microstrip transmission line TL2 are connected together. The other end of the balun transmission line Tb3 forms the external positive terminal of the frequency multiplier module. The collector of the base-emitter short-circuit transistor D2 and one end of the balun transmission line Tb1 are connected through the microstrip transmission line TL3. The other end of the balun transmission line Tb1 forms the external negative terminal of the frequency multiplier module. The other end of the microstrip transmission line TL2 forms the output terminal of the frequency multiplier module.

[0012] The first power supply filter circuit includes resistors R1, R2, R3, and R4, and capacitor C1. One end of resistor R1 forms the input terminal of the first power supply filter circuit. The other end of resistor R1, one end of resistor R2, and one end of capacitor C1 are connected together to form the output terminal of the first power supply filter circuit. The other end of capacitor C1 is grounded, and the other end of resistor R2 is grounded.

[0013] The second power supply filter circuit includes resistors R3 and R4, capacitors C2 and C3; one end of resistor R3 forms the output terminal of the second power supply filter circuit, and the other end of resistor R3, one end of resistor R4, and one end of capacitor C2 are connected together to form the input terminal of the second power supply filter circuit. The other end of capacitor C2 is grounded, and the other end of resistor R4 is grounded.

[0014] The output matching module includes capacitor C3 and fifth microstrip transmission line TL5; one end of the fifth microstrip transmission line TL5 forms the input terminal of the output matching network, and the other end of the fifth microstrip transmission line TL5 is connected to one end of capacitor C3, and the other end of capacitor C3 forms the output terminal of the output matching module.

[0015] Preferably, the transmission line balun is a Ruthroff structure.

[0016] Specifically, the single-ended signal generates a series of out-of-phase odd harmonics and in-phase even harmonics after passing through the diode. The odd harmonics of the two signals are then canceled out by the balun transmission line, and finally a high-power second-harmonic signal is output.

[0017] Specifically, in a frequency multiplier chip, two power supply voltages are divided by a resistor and applied to the base-emitter shorted transistor. By adjusting the power supply voltage, the DC voltage drop across the transistor is indirectly adjusted, thereby reducing the required input power window range of the circuit. With a constant injection power, as the power supply voltage increases, the voltage drop across the base-emitter shorted transistor increases, resulting in a lower required injection power. This leads to increased conversion losses and lower conversion efficiency at the current power level. This method can effectively reduce the drive power of the frequency multiplier chip, but the required power supply voltage will increase accordingly.

[0018] Specifically, the power supply filtering circuit can remove ripple in the power supply to a certain extent, prevent the influence of power supply noise, and the filter capacitor to ground serves as AC ground, which can effectively suppress the fundamental power of the frequency multiplier chip output port, thereby improving the fundamental rejection ratio of the frequency multiplier chip.

[0019] Beneficial effects: Compared with the prior art, the advantages and significant effects of the present invention are as follows:

[0020] (1) The circuit has a simple structure.

[0021] (2) It has a wide operating frequency range and can adjust the power supply voltage to achieve lower power injection. Compared with the same type of frequency multiplier, the present invention achieves lower frequency doubling loss and higher fundamental and third harmonic suppression in a smaller chip size.

[0022] The above overview is for illustrative purposes only and is not intended to be limiting in any way. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features of the invention will become readily apparent from the accompanying drawings and the following detailed description. Attached Figure Description

[0023] In the accompanying drawings, unless otherwise specified, the same reference numerals throughout the various drawings denote the same or similar parts or elements. These drawings are not necessarily drawn to scale. It should be understood that these drawings depict only some embodiments disclosed in the invention and should not be construed as limiting the scope of the invention.

[0024] Figure 1 This is a circuit diagram of the present invention.

[0025] Figure 2 This is the circuit layout of a broadband, high-frequency, low-harmonic-loss, high-harmonic-suppression second frequency doubler chip in an embodiment of the present invention.

[0026] Figure 3 The output power curves of the fundamental, second harmonic, and third harmonic waves are shown in the embodiment of the present invention under a power supply voltage of ±1.5V and an input signal power of 15dBm.

[0027] Figure 4 The output power curves in this embodiment of the invention are for a power supply voltage of ±1.5V and input signal power of 11dBm, 13dBm, 15dBm, 17dBm, and 19dBm.

[0028] Figure 5 The fundamental output power curves are shown in the embodiments of the present invention under a power supply voltage of ±1.5V and input signal power of 11dBm, 13dBm, 15dBm, 17dBm, and 19dBm.

[0029] Figure 6 The output power curves of the third harmonic are shown in the embodiments of the present invention under a power supply voltage of ±1.5V and input signal power of 11dBm, 13dBm, 15dBm, 17dBm and 19dBm.

[0030] Figure 7 The input standing wave curves are shown in the embodiments of the present invention under a power supply voltage of ±1.5V and input signal power of 11dBm, 13dBm, 15dBm, 17dBm, and 19dBm.

[0031] Figure 8 The output power curves in this embodiment of the invention are for an input signal power of 15dBm and a supply voltage of ±0.5V, ±1V, ±1.5V, ±2V, and ±2.5V.

[0032] Figure 9 This is a curve showing the change of frequency conversion loss with input power under a supply voltage of ±1.5V in an embodiment of the present invention.

[0033] The following are the labeling elements in the figure:

[0034] 1-Chip input port; 2-Diode common terminal; 3-Dieter D1 output port; 4-Dieter D2 output port; 5-Single signal; 6-Chip output port; 7-Positive power-on port; 8-Negative power-on port. Detailed Implementation

[0035] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0036] In the following description, only certain exemplary embodiments are briefly described. As those skilled in the art will recognize, the described embodiments can be modified in various ways without departing from the spirit or scope of the invention. Therefore, the drawings and description are considered to be exemplary in nature and not restrictive.

[0037] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this invention and simplifying the description, and are not intended to indicate or imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0038] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0039] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection, an electrical connection, or a communication connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0040] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "to," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0041] The following disclosure provides many different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the invention. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. In addition, examples of various specific processes and materials are provided in this invention, but those skilled in the art will recognize the application of other processes and / or the use of other materials.

[0042] like Figure 1 As shown, this embodiment of the invention provides a broadband high-frequency low-harmonic-loss, high-harmonic-suppression frequency doubler chip, comprising:

[0043] The chip comprises a frequency multiplier module, a first power supply filter circuit, a second power supply filter circuit, and an output matching module. The input terminal of the frequency multiplier module forms the input port of the chip, used to receive single-ended signals. The output terminal of the frequency multiplier module is connected to the input terminal of the output matching network, used to output a set of odd harmonics with opposite phases and equal amplitudes, and a set of even harmonics with the same phase and equal amplitudes. The output terminal of the output matching network forms the output port of the chip, used to output a single-ended signal containing only even harmonics.

[0044] In one embodiment, the input terminal of the first power filter circuit is connected to the positive terminal of a preset power supply, the output terminal of the first power filter circuit is connected to the positive terminal of the frequency multiplier module, the output terminal of the second power filter circuit is connected to the negative terminal of a preset power supply, and the input terminal of the second power filter circuit is connected to the negative terminal of the frequency multiplier module. The first power filter circuit and the second power filter circuit are used to suppress the fundamental power of the chip output port and output the corresponding single-ended signal from the chip output port.

[0045] In one embodiment, a single-ended signal generates a series of out-of-phase odd harmonics and in-phase even harmonics after passing through a diode. The odd harmonics of the two signals are then canceled out by a balun transmission line, and finally a high-power second-harmonic signal is output.

[0046] In one embodiment, in a frequency multiplier chip, two power supply voltages are divided by a resistor and applied to the base-emitter shorted transistor. By adjusting the power supply voltage, the DC voltage drop across the transistor is indirectly adjusted, thereby reducing the required input power window range of the circuit. With a constant injection power, as the power supply voltage increases, the voltage drop across the base-emitter shorted transistor increases, resulting in a lower required injection power. This leads to increased conversion losses and lower conversion efficiency at the current power level. This method can effectively reduce the drive power of the frequency multiplier chip, but the required power supply voltage will increase accordingly.

[0047] In one specific implementation, the frequency multiplier module includes a microstrip transmission line TL1, base-emitter shorting transistors D1 and D2, a balun Tb1, a balun transmission line Tb2, and a balun transmission line Tb3. One end of the microstrip transmission line TL1 forms the input terminal of the frequency multiplier module, and the other end of the microstrip transmission line TL1 is connected to the collector of the base-emitter shorting transistor D1 and the emitter of the base-emitter shorting transistor D2. The emitter is connected to one end of the microstrip transmission line TL2. The other end of the microstrip transmission line TL2, one end of the balun transmission line Tb3, and the other end of the microstrip transmission line TL2 are connected together. The other end of the balun transmission line Tb3 forms the external positive terminal of the frequency multiplier module. The base-emitter short-circuit transistor D2 and one end of the balun transmission line Tb1 are connected through the microstrip transmission line TL3. The other end of the balun transmission line Tb1 forms the external negative terminal of the frequency multiplier module. The other end of the microstrip transmission line TL2 forms the output terminal of the frequency multiplier module.

[0048] In one specific embodiment, the first power supply filter circuit includes resistors R1, R2, R3, and R4, and capacitor C1; one end of resistor R1 constitutes the input terminal of the first power supply filter circuit, and the other end of resistor R1, one end of resistor R2, and one end of capacitor C1 are connected together to constitute the output terminal of the first power supply filter circuit, and the other end of capacitor C1 is grounded, and the other end of resistor R2 is grounded.

[0049] In one specific embodiment, the second power supply filter circuit includes resistors R3 and R4, capacitors C2 and C3; one end of resistor R3 constitutes the output terminal of the second power supply filter circuit, and the other end of resistor R3, one end of resistor R4, and one end of capacitor C2 are connected together to form the input terminal of the second power supply filter circuit. The other end of capacitor C2 is grounded, and the other end of resistor R4 is grounded.

[0050] In one specific implementation, the output matching module includes a capacitor C3 and a fifth microstrip transmission line TL5; one end of the fifth microstrip transmission line TL5 constitutes the input terminal of the output matching network, and the other end of the fifth microstrip transmission line TL5 is connected to one end of the capacitor C3, and the other end of the capacitor C3 constitutes the output terminal of the output matching module.

[0051] In a preferred embodiment, the balun transmission line is a Ruthroff structure.

[0052] Example 1

[0053] This embodiment is a 40~80GHz broadband high-frequency, low-harmonic-loss, high-harmonic-suppression frequency doubler chip. Its circuit diagram is shown below. Figure 1 As shown, the entire circuit mainly includes a frequency multiplier module, a first power supply filter circuit, a second power supply filter circuit, and an output matching module.

[0054] To maximize the nonlinearity of the circuit and improve output power, a base-emitter short-circuited transistor is used as the core nonlinear device. Furthermore, since the frequency doubler chip can operate from the Ka band to the W band, to avoid the effects of high-frequency parasitics on the transistor, this invention employs two small-sized diodes in a single-balanced structure to effectively improve the chip's operating bandwidth and odd harmonic suppression. The balun uses a wide-side coupled Ruthroff-type structure, which is simple, has strong coupling, low intermetallic parasitic capacitance, and excellent broadband characteristics. The filter capacitor serves as AC ground, effectively suppressing the fundamental power at the frequency doubler chip's output port, thereby improving the chip's fundamental suppression.

[0055] This invention provides a broadband, high-frequency, low-harmonic-loss, high-harmonic-suppression frequency doubler chip circuit board. Figure 2As shown, the circuit layout mainly consists of chip input port 1, diode common terminal 2, diode D1 output port 3, diode D2 output port 4, single-channel signal 5, chip output port 6, positive power-on port 7, and negative power-on port 8. The low-frequency input signal enters from input port 1, passes through the microstrip line of the input matching network, and then enters the common terminal 2 of the two diodes. Due to the nonlinear effect of the diodes, two multi-tone signals with opposite odd harmonics and in-phase even harmonics are generated at ports 3 and 4. Subsequently, the balun transmission line combines the two signals into a single signal 5, where the odd harmonics cancel each other out and the even harmonics power is superimposed. Finally, the single signal sequentially enters the output matching microstrip line and capacitor, and the secondary signal is output from port 6. The layout contains two power-on ports 7 and 8, which are applied with +1.5V and -1.5V respectively during testing.

[0056] Figures 3-8 The figures show the measured curves of the broadband high-frequency low-harmonic-loss, high-harmonic-suppression second frequency doubler chip of the present invention. Figure 3 The output power curves for the fundamental, second harmonic, and third harmonic frequencies are shown under a supply voltage of ±1.5V and an input signal power of 15dBm. Figure 4 Output power curves are provided for a supply voltage of ±1.5V and input signal power of 11dBm, 13dBm, 15dBm, 17dBm, and 19dBm. Figure 5 The fundamental output power curves are shown in the embodiments of the present invention under a power supply voltage of ±1.5V and input signal power of 11dBm, 13dBm, 15dBm, 17dBm, and 19dBm. Figure 6 The output power curves of the third harmonic are shown in the embodiments of the present invention under a power supply voltage of ±1.5V and input signal power of 11dBm, 13dBm, 15dBm, 17dBm and 19dBm. Figure 7 Input standing wave curves are provided for a supply voltage of ±1.5V and input signal power of 11dBm, 13dBm, 15dBm, 17dBm, and 19dBm. Figure 8 The output power curves are shown for input signal power of 15dBm and supply voltages of ±0.5V, ±1V, ±1.5V, ±2V, and ±2.5V. Figure 9 The curves show the frequency doubling loss at a supply voltage of ±1.5V and different input signal power. The measured curves show that at ±1.5V and an input signal power of 15dBm, the frequency range covers 40~80GHz, with good in-band flatness, a frequency doubling loss of less than 10dB, harmonic suppression greater than 20dBc, an input VSWR of less than 2, a chip area of ​​0.77mm × 0.88mm, and a relatively low input power window. Compared to similar domestic designs, this achieves lower frequency doubling loss and higher harmonic suppression.

[0057] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various variations or substitutions within the technical scope disclosed in the present invention, and these should all be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A broadband, high-frequency, low-harmonic-loss, high-harmonic-suppression frequency doubler chip, characterized in that, It includes a frequency multiplier module, a first power supply filter circuit, a second power supply filter circuit, and an output matching module; the input terminal of the frequency multiplier module constitutes the chip's input port for receiving single-ended signals; the output terminal of the frequency multiplier module is connected to the input terminal of the output matching network for outputting a set of odd harmonics with opposite phases and equal amplitudes, and a set of even harmonics with the same phase and equal amplitudes; the output terminal of the output matching network constitutes the chip's output port for outputting a single-ended signal containing only even harmonics. The input terminal of the first power filter circuit is connected to the preset positive terminal of the power supply, and the output terminal of the first power filter circuit is connected to the external positive terminal of the frequency multiplier module. The input terminal of the second power filter circuit is connected to the preset negative terminal of the power supply, and the output terminal of the second power filter circuit is connected to the external negative terminal of the frequency multiplier module. The first power filter circuit and the second power filter circuit are used to suppress the fundamental power of the chip output port and output the corresponding single-ended signal from the chip output port. The frequency multiplier module indirectly adjusts the DC voltage drop across the transistor by regulating the power supply voltage, thereby reducing the input power window range required by the circuit. The frequency multiplier module includes a microstrip transmission line TL1, base-emitter shorting transistors D1 and D2, and transmission line baluns Tb1, Tb2, and Tb3. One end of the microstrip transmission line TL1 forms the input terminal of the frequency multiplier module, and the other end of TL1 is connected to the collector of the base-emitter shorting transistor D1 and the emitter of the base-emitter shorting transistor D2. The emitter of the base-emitter shorting transistor D1 is connected to the microstrip transmission line Tb3. One end of transmission line TL2 is connected, and the other end of microstrip transmission line TL2, one end of balun transmission line Tb3, and one end of microstrip transmission line TL2 are connected together. The other end of balun transmission line Tb3 forms the external positive terminal of the frequency multiplier module. The collector of transistor D2, which is shorted between the base and emitter, is connected to one end of balun transmission line Tb1 through microstrip transmission line TL3. The other end of balun transmission line Tb1 forms the external negative terminal of the frequency multiplier module. The other end of microstrip transmission line TL2 forms the output terminal of the frequency multiplier module.

2. The broadband high-frequency low-harmonic-loss, high-harmonic-suppression frequency doubler chip as described in claim 1, characterized in that: The first power supply filter circuit includes resistors R1, R2, R3, and R4, and capacitor C1. One end of resistor R1 forms the input terminal of the first power supply filter circuit. The other end of resistor R1, one end of resistor R2, and one end of capacitor C1 are connected together to form the output terminal of the first power supply filter circuit. The other end of capacitor C1 is grounded, and the other end of resistor R2 is grounded.

3. The broadband high-frequency low-harmonic-loss, high-harmonic-suppression frequency doubler chip as described in claim 1, characterized in that: The second power supply filter circuit includes resistors R3 and R4, capacitors C2 and C3; one end of resistor R3 forms the output terminal of the second power supply filter circuit, and the other end of resistor R3, one end of resistor R4, and one end of capacitor C2 are connected together to form the input terminal of the second power supply filter circuit. The other end of capacitor C2 is grounded, and the other end of resistor R4 is grounded.

4. The broadband high-frequency low-harmonic-loss, high-harmonic-suppression frequency doubler chip as described in claim 1, characterized in that: The output matching module includes capacitor C3 and fifth microstrip transmission line TL5; one end of the fifth microstrip transmission line TL5 forms the input terminal of the output matching network, and the other end of the fifth microstrip transmission line TL5 is connected to one end of capacitor C3, and the other end of capacitor C3 forms the output terminal of the output matching module.

5. The broadband high-frequency low-harmonic-loss, high-harmonic-suppression frequency doubler chip as described in claim 1, characterized in that, The balun transmission line is a Ruthroff structure.

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