A voltage detection circuit

Abstract

The application discloses a voltage detection circuit, a gate of a first switch tube, one end of a second switch tube and one end of a gate-source discharging resistor are connected, a source of the first switch tube, the other end of the second switch tube and the other end of the gate-source discharging resistor are connected, a common end thereof is used as a high-voltage input end, one end of the second switch tube is connected with an input end of an enabling module, an output end of the enabling module is grounded, a control end of the enabling module is connected with an enabling signal, a drain of the first switch tube is connected with an input end of a resistance module, a first output end of the resistance module is grounded, a second output end of the resistance module is connected with a positive input end of a comparator, when the enabling signal is at a low level, a gate-source voltage of the first switch tube is short-circuited by the gate-source discharging resistor, the first switch tube is not conductive, a branch in which the resistance module is located is open, and the power consumption of the resistance branch is 0 in the off state.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a voltage detection circuit. Background Technology

[0002] To detect the voltage at the high-voltage port, a resistor divider is typically used to convert the high voltage into a low voltage for detection.

[0003] However, during the process of reducing the high voltage to a low voltage for port voltage detection, a current of μA is often introduced when the voltage is turned off, resulting in power consumption in the resistor branch, and the power consumption increases with the increase of the input voltage.

[0004] Therefore, how to reduce the power consumption of the high-voltage resistor branch to zero when it is off, and achieve low power consumption of the chip, is an urgent problem to be solved in this field. Summary of the Invention

[0005] The purpose of this invention is to propose a voltage detection circuit that reduces the power consumption of the high-voltage resistor branch in the off state to 0, thereby achieving low power consumption of the chip.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] A voltage detection circuit includes: a first switching transistor, a second switching transistor, a gate-source discharge resistor, an enable module, a resistor module, and a comparator;

[0008] The gate of the first switch, one end of the second switch, and one end of the gate-source discharge resistor are connected, and the source of the first switch, the other end of the second switch, and the other end of the gate-source discharge resistor are connected, with their common terminal serving as the high-voltage input terminal;

[0009] One end of the second switching transistor is connected to the input terminal of the enable module, the output terminal of the enable module is grounded, and the control terminal of the enable module is connected to an enable signal.

[0010] The drain of the first switching transistor is connected to the input terminal of the resistor module, the first output terminal of the resistor module is grounded, and the second output terminal of the resistor module is connected to the positive input terminal of the comparator.

[0011] When the enable signal is low, the gate-source voltage of the first switch is shorted by the gate-source discharge resistor, the first switch is not turned on, and the branch where the resistor module is located is open.

[0012] Optionally, when the second switch is a high-voltage PMOS, the gate of the first switch, the gate of the second switch, and one end of the gate-source discharge resistor are connected, and the source of the first switch, the source of the second switch, and the other end of the gate-source discharge resistor are connected, with their common terminal serving as the high-voltage input terminal.

[0013] After the drain and gate of the second switching transistor are connected, they are connected to the input terminal of the enable module.

[0014] Optionally, when the second switching transistor is a diode, the negative terminal of the diode is connected to the source of the first switching transistor and the other end of the gate-source discharge resistor, and the positive terminal of the diode is connected to the gate of the first switching transistor, one end of the gate-source discharge resistor, and the input terminal of the enable module.

[0015] Optionally, it also includes voltage divider resistors;

[0016] One end of the diode is connected to the input terminal of the enable module through the voltage divider resistor.

[0017] Optionally, the enabling module includes a third switching transistor and a grounding resistor;

[0018] One end of the second switch is connected to the source of the third switch, the drain of the third switch is grounded through the grounding resistor, and the gate of the third switch is connected to the enable signal as a control terminal.

[0019] Optionally, the resistor module includes: a first resistor, a second resistor, and a third resistor;

[0020] The drain of the first switching transistor is connected to one end of the third resistor, the other end of the third resistor is connected to one end of the second resistor, the other end of the second resistor, one end of the first resistor, and the positive input terminal of the comparator are connected, and the other end of the first resistor is grounded.

[0021] Optionally, the resistor module further includes a diode;

[0022] The common terminal of the third resistor and the second resistor is connected to the negative terminal of the diode, and the positive terminal of the diode is grounded.

[0023] Optionally, the diode is a clamping protection diode.

[0024] Optionally, the first switch is a high-voltage PMOS and the third switch is a high-voltage NMOS.

[0025] Optionally, the input voltage at the negative input terminal of the comparator is a reference voltage.

[0026] As can be seen from the above technical solution, compared with the prior art, this application discloses a voltage detection circuit. The gate of the first switching transistor, one end of the second switching transistor, and one end of the gate-source discharge resistor are connected. The source of the first switching transistor, the other end of the second switching transistor, and the other end of the gate-source discharge resistor are connected. Their common terminal serves as a high-voltage input terminal. One end of the second switching transistor is connected to the input terminal of the enable module. The output terminal of the enable module is grounded. The control terminal of the enable module is connected to an enable signal. The drain of the first switching transistor is connected to the input terminal of the resistor module. The first output terminal of the resistor module is grounded. The second output terminal of the resistor module is connected to the positive input terminal of the comparator. When the enable signal is low, the gate-source voltage of the first switching transistor is short-circuited by the gate-source discharge resistor. The first switching transistor is not turned on, and the branch where the resistor module is located is an open circuit, so that the power consumption of the resistor branch is 0 when it is off. Attached Figure Description

[0027] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0028] Figure 1 This is a schematic diagram of a voltage detection circuit provided in the prior art;

[0029] Figure 2 This is a schematic diagram of another voltage detection circuit provided in the prior art;

[0030] Figure 3 A schematic diagram of a voltage detection circuit provided in an embodiment of this application;

[0031] Figure 4 This is a schematic diagram of another voltage detection circuit provided in an embodiment of this application;

[0032] Figure 5 This is a schematic diagram of another voltage detection circuit provided in an embodiment of this application. Detailed Implementation

[0033] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0034] To detect the voltage of the high-voltage port (the port with higher withstand voltage), the high voltage is usually converted into low voltage by means of resistor voltage division for detection.

[0035] However, this resistor voltage division will introduce a uA-level current in the off state, resulting in power consumption in the resistor branch, and the power consumption increases with the increase of the input voltage.

[0036] In circuits with low power consumption requirements, the power consumption of each branch to the ground is usually reduced as much as possible. In a low-power circuit, most modules in the circuit can be turned off through an enable pin to minimize the power consumption. The high-voltage port is reduced to low voltage through resistor voltage division, aiming to use low-voltage devices to detect high-voltage signals. This resistor branch has power consumption, and the power consumption increases with the increase of the input voltage.

[0037] The way to reduce the power consumption of the resistor branch is to insert an enable-controlled switch in the branch, as Figure 1 shown. By making the enable signal BG_OK = L, the resistor branch is cut off, reducing the power consumption introduced by the voltage-dividing resistor and achieving zero power consumption in the resistor branch. Through analysis, it can be seen that when the voltage at the VIN terminal in Figure 1 is low voltage, zero power consumption can be achieved. However, for high-voltage input, that is, when VIN is at high voltage, BG_OK = L, Figure 1 VDIV in Figure 1 will follow VIN to appear at high voltage, and there is a risk of breakdown at the gate of the comparator (input is VDIV, output is OV). It is necessary to add a clamping diode D1 for protection. Because there is leakage in the clamping, so

[0038] the circuit structure in Figure 2 still has power consumption in the high-voltage off state, that is, zero power consumption is not achieved.

[0038] As Figure 2 shown, the BG_OK low-voltage enable signal can clamp VDIV to avoid high voltage at the positive input of the comparator. However, the maximum value of the VDIV resistor voltage division < BG_OK - VGS, which has certain limitations. The closer VDIV is to the maximum value BG_OK - VGS, the greater the on-resistance of the HVFET. The increase in the on-resistance of the HVFET will cause deviation in the resistor voltage division VDIV, thus affecting the voltage detection accuracy. Therefore, Figure 2 the circuit shown in

[0039] can achieve zero power consumption, but it will affect the detection accuracy of the voltage detection circuit.

[0040] This application provides a voltage detection circuit. The gate of a first switching transistor, one end of a second switching transistor, and one end of a gate-source discharge resistor are connected. The source of the first switching transistor, the other end of the second switching transistor, and the other end of the gate-source discharge resistor are connected. Their common terminal serves as a high-voltage input terminal. One end of the second switching transistor is connected to the input terminal of an enable module. The output terminal of the enable module is grounded. An enable signal is connected to the control terminal of the enable module. The drain of the first switching transistor is connected to the input terminal of a resistor module. The first output terminal of the resistor module is grounded. The second output terminal of the resistor module is connected to the positive input terminal of a comparator. When the enable signal is low, the gate-source voltage of the first switching transistor is short-circuited by the gate-source discharge resistor, the first switching transistor is not turned on, and the branch containing the resistor module is open-circuited, making the power consumption of the resistor branch zero.

[0041] Reference Figure 3 The voltage detection circuit provided by the present invention may include:

[0042] The system comprises a first switch P1, a second switch P2, a gate-source discharge resistor R4, an enable module, a resistor module, and a comparator. The first switch P1 can be a high-voltage PMOS. The size ratio of the second switch P2 to the first switch P1 is 1:M.

[0043] The gate of the first switch P1, one end of the second switch P2, and one end of the gate-source discharge resistor R4 are connected. The source of the first switch P1, the other end of the second switch P2, and the other end of the gate-source discharge resistor R4 are connected. Their common terminal serves as the high-voltage input terminal VIN.

[0044] One end of the second switch P2 is connected to the input terminal of the enable module, the output terminal of the enable module is grounded, and the control terminal of the enable module is connected to the enable signal BG_OK.

[0045] The drain of the first switching transistor P1 is connected to the input terminal of the resistor module. The first output terminal of the resistor module is grounded. The second output terminal of the resistor module is connected to the positive input terminal VDIV of the comparator (output is 0V). The input voltage VREF of the negative input terminal of the comparator is the reference voltage, such as 1.2V.

[0046] When the enable signal BG_OK is low, the gate-source voltage of the first switch P1 is shorted by the gate-source discharge resistor R4, the first switch P1 is not turned on, and the branch where the resistor module is located is open, so as to achieve zero power consumption of the resistor branch in the off state.

[0047] In practical applications, refer to Figure 4The enabling module includes a third switch N1 and a grounding resistor R0. The third switch can be a high-voltage NMOS.

[0048] One end of the second switch P2 is connected to the source of the third switch N1, the drain of the third switch N1 is grounded through the grounding resistor R0, and the gate of the third switch N1 is connected to the enable signal BG_OK as the control terminal.

[0049] Additionally, refer to Figure 4 The resistor module includes: a first resistor R3, a second resistor R2, and a third resistor R1;

[0050] The drain of the first switching transistor P1 is connected to one end of the third resistor R3, the other end of the third resistor R3 is connected to one end of the second resistor R2, the other end of the second resistor R2, one end of the first resistor R1, and the positive input terminal VDIV of the comparator are connected, and the other end of the first resistor R1 is grounded.

[0051] When the enable signal BG_OK is low, the gate-source voltage of the first switch P1 is shorted by the gate-source discharge resistor R4, the first switch P1 is not turned on, and the branch containing the resistor module is open, thus achieving zero power consumption in the resistor branch. Simultaneously, the resistor divider voltage VDIV is pulled to ground by R1 to protect the comparator.

[0052] The resistor module also includes a diode D1;

[0053] Furthermore, the common terminal of the third resistor R3 and the second resistor R2 is connected to the negative terminal of the diode D1, and the positive terminal of the diode D1 is grounded.

[0054] In a typical implementation, diode D1 is a clamping protection diode used to prevent abnormal input high voltage from driving VDIV high, thus protecting the comparator. Under normal operating conditions, VDIV < 5V.

[0055] The above embodiments describe the structure of the voltage detection circuit. The specific implementation of the second switch P2 in the voltage detection circuit will now be described.

[0056] In practical applications, the second switch P2 can be implemented in two ways, as detailed below. Figure 4 and Figure 5 .

[0057] Specifically, refer to Figure 4When the second switch P2 is a high-voltage PMOS, the gates of the first switch P1, the second switch P2, and one end of the gate-source discharge resistor R4 are connected, and the sources of the first switch P1, the second switch P2, and the other end of the gate-source discharge resistor R4 are connected, with their common terminal serving as the high-voltage input terminal VIN.

[0058] After the drain and gate of the second switch P2 are connected, they are connected to the input terminal of the enable module.

[0059] When the enable signal BG_OK is high, the second switch P2 branch is turned on, and the current I0 is (V BG_OK -V GSN1 ) / R0, where V BG_OK The voltage of BG_OK, V GSN1 This represents the source-gate voltage difference of the third switch N1. The second switch P2 is selected with an inverted width, increasing the source-gate voltage difference V of the second switch P2. GSP2 This allows the first switch P1 to operate in the deep linear region, with a very small on-resistance of a few ohms. The impedance of the resistor branch is typically several hundred kilohms, and the impedance of P1 is negligible, thus protecting the comparator.

[0060] When the enable signal BG_OK is low, the gate-source voltage of the first switch P1 is shorted by the gate-source discharge resistor R4, the first switch P1 is not turned on, and the branch where the resistor module is located is open, so as to achieve zero power consumption of the resistor branch in the off state.

[0061] In this embodiment, the source-gate voltage difference V between the second switch P2 and the first switch P1 is respectively GS Depends on I0 and does not change with VIN. The first switching transistor P1 operates in the linear region with a very small on-resistance and a very small voltage drop across the resistor series. This has little impact on the voltage division of the resistors, thereby improving the detection accuracy of the voltage detection circuit.

[0062] In addition, refer to Figure 5 Another way to implement the second switch P2 is as follows:

[0063] When the second switch P2 is a diode D2, the negative terminal of the diode D2 is connected to the source of the first switch P1 and the other end of the gate-source discharge resistor R4, and the positive terminal of the diode D2 is connected to the gate of the first switch P1, one end of the gate-source discharge resistor R4, and the input terminal of the enable module.

[0064] In addition, the voltage detection circuit also includes a voltage divider resistor R5;

[0065] One end of the diode D2 is connected to the input terminal of the enable module through the voltage divider resistor R5.

[0066] In this embodiment, when the enable signal BG_OK is low, R4 short-circuit the gate and source of the first switch P1, turning off the first switch P1. There is no power consumption in the resistor branch, and VDIV is pulled to ground, so there is no high voltage and the low voltage comparator is protected.

[0067] When the enable signal BG_OK is high, the bias current of the third switch N1 generates a voltage drop across R4, turning on the first switch P1. The gate-source clamping protection transistor D1 of the first switch P1 protects the gate oxide of the first switch P1 to prevent breakdown.

[0068] This embodiment provides multiple implementation methods for the second switch P2, so that in practical applications, the appropriate circuit structure can be selected according to actual needs to meet user requirements.

[0069] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that an article or apparatus comprising a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such an article or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the article or apparatus that includes the aforementioned element.

[0070] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A voltage detection circuit, characterized in that, include: The system consists of a first switching transistor, a second switching transistor, a gate-source discharge resistor, an enable module, a resistor module, and a comparator. The gate of the first switch, one end of the second switch, and one end of the gate-source discharge resistor are connected, and the source of the first switch, the other end of the second switch, and the other end of the gate-source discharge resistor are connected, with their common terminal serving as the high-voltage input terminal; One end of the second switching transistor is connected to the input terminal of the enable module, the output terminal of the enable module is grounded, and the control terminal of the enable module is connected to an enable signal. The drain of the first switching transistor is connected to the input terminal of the resistor module, the first output terminal of the resistor module is grounded, and the second output terminal of the resistor module is connected to the positive input terminal of the comparator. When the enable signal is low, the gate-source voltage of the first switch is shorted by the gate-source discharge resistor, the first switch is not turned on, and the branch where the resistor module is located is open.

2. The voltage detection circuit according to claim 1, characterized in that, When the second switch is a high-voltage PMOS, the gate of the first switch, the gate of the second switch, and one end of the gate-source discharge resistor are connected, and the source of the first switch, the source of the second switch, and the other end of the gate-source discharge resistor are connected, with their common terminal serving as the high-voltage input terminal. After the drain and gate of the second switching transistor are connected, they are connected to the input terminal of the enable module.

3. The voltage detection circuit according to claim 1, characterized in that, When the second switching transistor is a diode, the negative terminal of the diode is connected to the source of the first switching transistor and the other end of the gate-source discharge resistor, and the positive terminal of the diode is connected to the gate of the first switching transistor, one end of the gate-source discharge resistor, and the input terminal of the enable module.

4. The voltage detection circuit according to claim 3, characterized in that, It also includes voltage divider resistors; One end of the diode is connected to the input terminal of the enable module through the voltage divider resistor.

5. The voltage detection circuit according to claim 1, characterized in that, The enabling module includes a third switching transistor and a grounding resistor; One end of the second switch is connected to the source of the third switch, the drain of the third switch is grounded through the grounding resistor, and the gate of the third switch is connected to the enable signal as a control terminal.

6. The voltage detection circuit according to claim 1, characterized in that, The resistor module includes: a first resistor, a second resistor, and a third resistor; The drain of the first switching transistor is connected to one end of the third resistor, the other end of the third resistor is connected to one end of the second resistor, the other end of the second resistor, one end of the first resistor, and the positive input terminal of the comparator are connected, and the other end of the first resistor is grounded.

7. The voltage detection circuit according to claim 6, characterized in that, The resistor module also includes diodes; The common terminal of the third resistor and the second resistor is connected to the negative terminal of the diode, and the positive terminal of the diode is grounded.

8. The voltage detection circuit according to claim 7, characterized in that, The diode is a clamping protection diode.

9. The voltage detection circuit according to claim 5, characterized in that, The first switch is a high-voltage PMOS, and the third switch is a high-voltage NMOS.

10. The voltage detection circuit according to claim 1, characterized in that, The input voltage at the negative input terminal of the comparator is the reference voltage.

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