A processor management method and a computing device

Abstract

Embodiments of the present application disclose a processor management method and a computing device, wherein the method comprises: obtaining running characteristic data of each processor core in a processor, the running characteristic data comprising one or more of current usage rate and service running condition; obtaining historical usage data of each processor core, and determining a management strategy of each processor core based on the running characteristic data and the historical usage data of each processor core, the management strategy comprising one or both of computing power adjustment strategy and frequency adjustment strategy; and adjusting the power supply state or running frequency of each processor core based on the management strategy, the power supply state comprising power-on state or power-off state. The processor can be effectively managed, thereby achieving the effect of reducing power consumption.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to a processor management method and a computing device. Background Technology

[0002] With the continuous evolution of computing power, reducing computer power consumption has always been a major concern in the industry. As the core component of a computer, the processor (Central Processing Unit, CPU) has a crucial impact on overall computer power consumption. Currently, most operating systems (OS) achieve power saving through processor frequency adjustment strategies, but these strategies usually require manual configuration by the user, which is quite cumbersome. Therefore, how to effectively manage the processor to reduce power consumption has become a current research hotspot. Summary of the Invention

[0003] This application provides a processor management method and a computing device that can effectively manage the processor, thereby reducing power consumption.

[0004] In a first aspect, embodiments of this application provide a processor management method, which may include:

[0005] Obtain the operational characteristic data of each processor core in the processor, wherein the operational characteristic data includes one or more of the following: current utilization rate and business operation status;

[0006] The historical usage data of each processor core is obtained, and the management strategy of each processor core is determined based on the operating characteristic data and historical usage data of each processor core. The management strategy includes one or both of computing power adjustment strategy and frequency adjustment strategy.

[0007] The power supply status or operating frequency of each processor core is adjusted based on the management strategy, wherein the power supply status includes power-on state or power-off state.

[0008] Secondly, embodiments of this application provide a processor management device, which may include:

[0009] The acquisition unit is used to acquire the operating characteristic data of each processor core in the processor, wherein the operating characteristic data includes one or more of the following: current utilization rate and business operation status;

[0010] The determining unit is used to acquire historical usage data of each processor core and determine the management strategy of each processor core based on the operating characteristic data and historical usage data of each processor core. The management strategy includes one or both of computing power adjustment strategy and frequency adjustment strategy.

[0011] The adjustment unit is used to adjust the power supply status or operating frequency of each processor core based on the management strategy, wherein the power supply status includes power-on state or power-off state.

[0012] Thirdly, embodiments of this application provide a computing device, which includes a processor configured to support the computing device in implementing the functions involved in the first aspect above. The computing device may further include a memory coupled to the processor, which stores necessary program instructions and data for the computing device. The computing device may also include a network interface for communicating with other devices or communication networks.

[0013] Fourthly, embodiments of this application provide a computer storage medium storing a computer program, the computer program including program instructions, which, when executed by a processor, are used to implement the functions involved in the first aspect above.

[0014] Fifthly, embodiments of this application provide a computer program product including program instructions that, when executed by a computing device, enable the computing device to perform the functions involved in the first aspect described above.

[0015] Sixthly, this application provides a chip system including a processor for supporting a computing device in implementing the functions involved in the first aspect above. This chip system may be composed of chips or may include chips and other discrete devices.

[0016] This application embodiment can acquire operational characteristic data of each processor core in the processor, which may include one or more of the current utilization rate and service operation status; it can also acquire historical usage data of each processor core to determine a management strategy for each processor core based on the operational characteristic data and historical usage data, which may include one or both of computing power adjustment strategy and frequency adjustment strategy; furthermore, it can adjust the power supply state or operating frequency of each processor core based on the management strategy, where the power supply state may include power-on state or power-off state. This method can effectively manage the processor, thereby achieving the effect of reducing power consumption. Attached Figure Description

[0017] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1 This is a flowchart illustrating a processor management scheme provided in an embodiment of this application;

[0019] Figure 2 This is a flowchart illustrating a processor management method provided in an embodiment of this application;

[0020] Figure 3 This is a schematic diagram of a process for determining the existence of a processor management request, provided in an embodiment of this application.

[0021] Figure 4 This is a flowchart illustrating another processor management method provided in an embodiment of this application;

[0022] Figure 5 This is a flowchart illustrating another processor management method provided in an embodiment of this application;

[0023] Figure 6 This is a flowchart illustrating another processor management method provided in an embodiment of this application;

[0024] Figure 7 This is a flowchart illustrating another processor management method provided in an embodiment of this application;

[0025] Figure 8 This is a schematic diagram of the structure of a processor management device provided in an embodiment of this application;

[0026] Figure 9 This is a schematic diagram of the structure of a computing device provided in an embodiment of this application. Detailed Implementation

[0027] The technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings.

[0028] This application provides a processor management scheme. See also... Figure 1As shown, the principle of this processor management scheme is as follows: First, the operating characteristic data of each processor core (CPU Core) can be obtained, such as current utilization rate, business operation status, or one or more other factors. Then, historical usage data of each processor core can be obtained. Based on the obtained operating characteristic data and historical usage data, management strategies for each processor core can be executed. These management strategies can include one or more of computing power adjustment strategies and frequency adjustment strategies. The computing power adjustment strategy is used to adjust the power supply state of the processor core, which can include power-on or power-off states. The frequency adjustment strategy is used to adjust the operating frequency of the processor core. After determining the management strategy for each processor core, the power supply state or operating frequency of each processor core can be adjusted based on the management strategy. By implementing the above scheme, different power management strategies (i.e., computing power adjustment strategies) can be matched according to the operating characteristic data of each processor core, thereby achieving the effect of dynamically adjusting the power supply state. This enables more refined and effective management of the processor core's power state (or power supply status), and ultimately achieves more refined processor power consumption reduction. At the same time, appropriate operating strategies (i.e. frequency adjustment strategies) can be matched based on the operating characteristic data of each processor core to achieve dynamic frequency adjustment and thus achieve more precise processor energy saving.

[0029] In practical implementation, the execution entity of the processor management scheme mentioned above can be a computing device, which includes, but is not limited to, a terminal or a server. In other words, the computing device can be a server or a terminal, or a system composed of a server and a terminal. The terminal mentioned above can be an electronic device, including but not limited to mobile phones, tablets, desktop computers, laptops, PDAs, in-vehicle devices, intelligent voice interaction devices, augmented reality / virtual reality (AR / VR) devices, and other mobile internet devices (MIDs) with network access capabilities. The server mentioned above can be an independent physical server, a server cluster or distributed system composed of multiple physical servers, or a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, vehicle-to-everything (V2X) communication, content delivery networks (CDNs), and big data and artificial intelligence platforms.

[0030] The implementation details of the technical solutions in the embodiments of this application are described in detail below:

[0031] Based on the processor management scheme provided above, this application embodiment provides a processor management method. Please refer to... Figure 2 , Figure 2 This is a flowchart illustrating a processor management method provided in an embodiment of this application. The embodiments of this application are mainly described using a computing device as the execution subject; please refer to... Figure 2 The processor management method may include the following steps:

[0032] S201, acquires the operating characteristic data of each processor core in the processor.

[0033] The operational characteristic data may include one or more of the following: current utilization rate and service operation status. Current utilization rate may refer to the utilization rate at the current moment, which could be the moment when an adjustment requirement for the power supply status or operating frequency of each processor core in the processor is detected. Service operation status may refer to the service operation status at the current moment, which may include process operation status, such as the number of processes and the processing time of each process.

[0034] In one implementation, the runtime characteristics of each processor core can be obtained through tools provided by the operating system (such as Linux) for collecting information about the processor and processes (e.g., ps / proc / and related interfaces) or user-space interfaces. The runtime characteristics of each processor core are acquired in real time. For example, if there is a management policy adjustment for each processor core at the current moment, the runtime characteristics data at that moment can be obtained. The understanding of the management policy can be found in the description of step S202.

[0035] In one implementation, step S201 may be triggered when there is a processor management requirement.

[0036] Optionally, the existence of a processor management need can be determined when the computing device receives a processor management request. For example, an administrator can send a processor management request to the computing device, causing the device to receive the request. Once the computing device receives the request, it confirms the existence of a processor management need. In one implementation, when an administrator needs to adjust the management policies for individual processor cores in the operating system's processor, the administrator can perform relevant operations through the user interface displayed on the terminal to send a processor management request to the computing device. See [example...] Figure 3As shown: The terminal used by the administrator can display a user interface on the terminal screen. This user interface may include at least a data setting area marked 301 and a confirmation control marked 302. If the administrator wants to adjust the management policy of each processor core in the processor, the administrator can enter the relevant information of the processor to be managed in the data setting area 301, and then perform a trigger operation (such as a click operation, a press operation, etc.) on the confirmation control 302. This triggers the terminal used by the administrator to determine the indicated processor based on the relevant information obtained in the data setting area 301, and send a processor management request for that processor to the computing device.

[0037] Optionally, processor management requirements can also be triggered by periodic management tasks, i.e., steps S201-S203 can be executed periodically. In a specific implementation, a periodic management task can be pre-set, indicating the adjustment cycle for adjusting the management strategy of each processor core. The adjustment cycle can be arbitrarily set, such as 4 seconds, 7 seconds, etc. The management cycle can differ for processors with different performance characteristics. It should be noted that the operating system can have one or more processors. When there are multiple processors, the adjustment cycle for each processor can be the same or different.

[0038] It should be noted that the embodiments of this application use a processor as an example to illustrate the processor management method.

[0039] S202: Obtain historical usage data for each processor core, and determine the management strategy for each processor core based on the operating characteristic data and historical usage data of each processor core.

[0040] Historical usage data can refer to usage data between the current moment and the present moment, including historical usage rates, historical business operation status, etc. Historical usage rates can include usage rates from multiple historical points in time; that is, historical usage rates here can be understood as multiple historical usage rates, and historical points in time can refer to moments prior to the current moment. Historical business operation status can include business operation status from multiple historical points in time. It is understood that historical usage data for each processor core can be stored in a specific storage area; that is, historical usage data is internally stored, and the required historical usage data can be directly retrieved from this storage area.

[0041] The management strategy may include one or both of the following: a computing power adjustment strategy and a frequency adjustment strategy. The computing power adjustment strategy can be used to adjust the power supply state of the processor core, which may include a power-on state or a power-off state; the frequency adjustment strategy can be used to adjust the operating frequency of the processor core.

[0042] In one implementation, the computing power adjustment strategy for each processor core can be determined based on the current utilization rate of the processor cores in the power-on state. This computing power adjustment strategy can adjust the power supply state of each processor core according to the current computing power requirements (or system load) of the operating system. Specifically, firstly, the current utilization rate of the processor cores in the power-on state can be obtained to determine the current system load. After determining the system load, a load threshold can be obtained, which is preset, such as 80% or 90%. Furthermore, the computing power adjustment strategy for each processor core can be determined based on the system load and the load threshold, thus determining whether the power supply state of each processor core should be adjusted to the power-on or power-off state.

[0043] In one implementation, the frequency adjustment strategy for each processor core can be determined based on the operational status and historical usage data of the processor cores currently powered on. Specifically, firstly, the operational status and historical usage data of the processor cores currently powered on can be obtained; then, based on this data, the frequency adjustment strategy for the processor cores currently powered on is determined, which essentially determines the operating frequency of the processor cores currently powered on.

[0044] S203 adjusts the power supply status or operating frequency of each processor core based on management policies.

[0045] In one implementation, if the management strategy is a computing power adjustment strategy, the power supply status of each processor core can be adjusted based on the computing power adjustment strategy; if the management strategy is a frequency adjustment strategy, the operating frequency of each processor core can be adjusted based on the frequency adjustment strategy; if the management strategy is both a computing power adjustment strategy and a frequency adjustment strategy, the power supply status and operating frequency of each processor core can be adjusted based on both the computing power adjustment strategy and the frequency adjustment strategy.

[0046] In this embodiment, different power management strategies (i.e., computing power adjustment strategies) can be matched based on the operational characteristic data of each processor core, thereby achieving dynamic adjustment of the power supply state. This enables more refined and effective management of the processor core's power state (or power supply status), resulting in more precise processor power consumption reduction. Simultaneously, appropriate operational strategies (i.e., frequency adjustment strategies) can be matched based on the operational characteristic data of each processor core, achieving dynamic frequency adjustment and thus more precise processor energy saving.

[0047] Please see Figure 4 This is a flowchart illustrating another processor management method provided in this application embodiment. This application embodiment primarily uses a computing device as the execution subject; please refer to... Figure 4 This application mainly uses the management strategy as a computing power adjustment strategy for related descriptions. The processor management method may include the following steps:

[0048] S401 acquires the operating characteristic data of each processor core in the processor.

[0049] Step S401 can be referred to the description in step S201 above, and will not be repeated here.

[0050] S402 retrieves the current utilization rate of the processor cores that are powered on.

[0051] S403 determines system load based on the current utilization of processor cores that are powered on.

[0052] In one implementation, the current utilization rates of all powered-on processor cores can be averaged, and the result of the average calculation can be determined as the system load. In this implementation, the computing device can calculate the system load using the following formula (1):

[0053] P = (CPU1 + CPU2 + ... + CPU) i +…+CPU M ) / M(1)

[0054] Where P represents system load, CPU i This represents the current utilization rate of the i-th processor core that is powered on, and M represents the number of processor cores that are powered on, or the number of processor cores that are currently online.

[0055] In another implementation, a subset of processor cores can be selected from all powered-on processor cores, and the current utilization of this subset can be averaged. The result of this average calculation is then used to determine the system load. The number of these processor cores can be k, where k is a positive integer greater than 1. Optionally, k processor cores can be randomly selected from all powered-on processor cores.

[0056] In another implementation, a reference processor core can be selected from the powered-on processor cores, and its current utilization rate can be determined as the system load. This reference processor core can be any of the powered-on processor cores, or its current utilization rate can be the median among all powered-on processor cores. Optionally, the powered-on processor cores can be sorted using their current utilization rates to obtain a sorting result; this sorting can be done in descending order of current utilization rate or in ascending order of current utilization rate. After obtaining the sorting result, a reference processor core can be determined based on this result; for example, the processor core in the middle of the sorted result can be used as the reference processor core. It should be noted that if the number M of powered-on processor cores is odd, then there is only one processor core in the middle position, and the current utilization rate of this middle processor core can be determined as the system load. If M is an even number, then there are two processor cores in the middle position. The average current utilization of these two processor cores in the middle position can be used to determine the system load.

[0057] S404 determines the computing power adjustment strategy for each processor core based on system load and load threshold.

[0058] In one implementation, if the system load is greater than or equal to a load threshold, a first processor core can be identified from the processor cores in the power-down state, and the computing power adjustment strategy for the first processor core can be determined to be to adjust its power supply state to the power-on state, so as to ensure that the operating system's processor has enough processor cores to meet the business computing power requirements in the next moment. If the system load is less than the load threshold, a second processor core can be identified from the processor cores in the power-on state, and the computing power adjustment strategy for the second processor core can be determined to be to adjust its power supply state to the power-down state.

[0059] In one implementation, the specific method for determining the first processor core from the processor cores in the power-off state can be described as follows: all processor cores in the power-off state can be determined as the first processor core; or, a portion of the processor cores in the power-off state can be selected as the first processor core. Optionally, when selecting a portion of the processor cores, the selection can be done randomly or according to a preset selection rule. The preset selection rule is a rule that satisfies a preset condition, which can be that the system load is below a load threshold, i.e., it needs to ensure that the system load of the selected first processor core and the processor cores in the power-on state is below a load threshold. In this implementation, the number of first processor cores can satisfy the relationship shown in the following formula (2):

[0060] (CPU1+CPU2+...+CPU) i +…+CPU M ) / (M+V) <S(2)

[0061] Where V represents the number of the first processor cores and S represents the load threshold.

[0062] In one implementation, the specific method for determining the second processor core from the processor cores in the power-on state can be described as follows: First, processor cores with marking information can be obtained from the processor cores in the power-on state. This marking information can be used to indicate that the power supply state can be adjusted to a power-off state. After obtaining these processor cores with marking information, the processor cores with marking information can be determined as the second processor core. Specifically, one or more of these processor cores with marking information can be determined as the second processor core.

[0063] In one implementation, the power supply state of the processor core can be adjusted using CPU Hot-Plug (Central Processing Unit Hot-plug) technology. This technology allows the processor core to be inserted or removed while the operating system is running normally without affecting its operation. Processor hot-plugging can be understood as power management of the processor, supporting the dynamic bringing the processor online (or powered on, online, etc.) or offline (or powered off, offline, etc.) from the operating system. For example, in this embodiment, the processor core can be dynamically brought online or offline from the operating system. If the CPU Hot-Plug technology is used to adjust the power-on or power-off state of the processor core, the power-on state can be understood as an inserted state, online state, or online state, and the power-off state can be understood as a removed state, offline state, or offline state. Similarly, the aforementioned label information can be understood as indicating a Hot-plug-Out state, meaning the processor core is in a removable state. Therefore, determining the second processor core can be achieved by iterating through all online processor cores that meet the Hot-plug-Out condition. This allows for the removal of these online processor cores that meet the Hot-plug-Out condition when adjusting the power supply status based on a computing power adjustment strategy. Here, meeting the Hot-plug-Out condition refers to processor cores with tagged information, and online processor cores are those that are powered on.

[0064] The tagging information can be generated based on one or both of the processor core's operational status and historical usage data. Optionally, if the tagging information is generated based on the processor core's operational status, the corresponding implementation method can be: identifying processor cores without operational status from those currently powered on, and adding tagging information to these processor cores. Alternatively, if the tagging information is generated based on both the processor core's operational status and historical usage data, the corresponding implementation method can be: identifying processor cores without operational status from those currently powered on; then, based on historical usage data, identifying the processor cores from the identified processor cores that need to have tagging information added; wherein the historical usage data can include one or more of historical utilization rates, historical operational status, etc., where historical utilization rates can include utilization rates at multiple historical times, and historical operational status can include operational status at multiple historical times.

[0065] For example, regarding historical utilization, if a preset number of historical utilization rates among multiple historical utilization rates of a processor core are less than or equal to a utilization threshold, then the processor core can be identified as a processor core for which tagged information needs to be added. Similarly, regarding historical service operation status, if a preset number of historical service operation statuses among multiple historical service operation statuses of a processor core indicate no service operation, then the processor core can be identified as a processor core for which tagged information needs to be added. Again, taking historical utilization and historical service operation status as examples, if a preset number of historical utilization rates among multiple historical utilization rates of a processor core are less than or equal to a utilization threshold, and a preset number of historical service operation statuses among multiple historical service operation statuses of the processor core indicate no service operation, then the processor core can be identified as a processor core for which tagged information needs to be added. The preset number can be pre-set. For example, taking the preset number in historical utilization rates as an example, the preset number can be any value between the number less than or equal to the number of historical utilization rates and greater than half of the number of historical utilization rates. In this implementation, the range of values ​​for the preset number can be expressed by the following formula (3):

[0066] [L / 2]+1 <H=<L(3)

[0067] Where H represents the preset quantity, L represents the historical usage rate, and [.] indicates rounding down. For example, if L is 10, then H ∈ [6, 10]; and if L is 7, then H ∈ [4, 7]. In summary, if more than half of the historical usage rates of a processor core are less than or equal to the usage rate threshold, then that processor core can be identified as a processor core requiring additional marking information. The preset quantity in historical operational scenarios and the preset quantity in historical usage rates can be understood in the same way.

[0068] Based on this, it can be seen that processor cores that are not running any business, or those with low long-term data usage (such as utilization rate or business operation status), can be identified as processor cores that need to have their tagging information added. It can be seen that by determining the above-mentioned computing power adjustment strategy, processor cores in an idle state (i.e., without business operation) can be powered down, thereby reducing the processor power consumption caused by these idle processor cores, and thus achieving the effect of reducing processor power consumption (energy consumption). It is understandable that if a processor core is not running any business, even if the processor core runs at a low frequency, there is still some energy waste. In this embodiment, to address the problem of processor cores still wasting power even when idle, more effective processor power saving can be achieved by introducing power supply state adjustments (such as through CPUHot-plug technology), thus avoiding processor energy waste beyond business needs.

[0069] S405 adjusts the power supply status of each processor core based on a computing power adjustment strategy.

[0070] The power supply status can include either a powered-on state or a powered-off state.

[0071] As mentioned above, when the system load is greater than or equal to the load threshold, the computing power adjustment strategy for the first processor core is to adjust the power supply state to the power-on state. Therefore, the specific implementation of step S405 is to adjust the power supply state of the first processor core from the power-off state to the power-on state. Optionally, CPU Hot-plug technology can be used to adjust the power supply state of the first processor core from the power-off state to the power-on state. That is, CPU Hot-plug technology can be used to perform a Hot-plug-In operation on an offline processor core to bring it back online. The Hot-plug-In operation can be understood as an insertion operation.

[0072] When the system load is less than the load threshold, the computing power adjustment strategy for the second processor core is to adjust its power supply state to a power-off state. Specifically, step S405 involves adjusting the power supply state of the second processor core from a power-on state to a power-off state. Optionally, CPU Hot-plug technology can be used to adjust the power supply state of the second processor core from a power-on state to a power-off state. In other words, CPU Hot-plug technology can be used to perform a Hot-plug-Out operation on an online processor core to convert it to an offline state. The Hot-plug-Out operation can be understood as a unplugging operation.

[0073] In this embodiment, different power management strategies (i.e., computing power adjustment strategies) can be matched according to the utilization rate and business operation status of each processor core to achieve more refined and effective power state (power supply status) management. It supports the operating system in disconnecting processor cores (i.e., adjusting the power supply status to power-off) when the system load is low, thereby saving static power consumption of the processor; and in reconnecting the processor cores (i.e., adjusting the power supply status to power-on) when the operating system needs them (i.e., when the system load is high), thus achieving the effect of dynamically bringing processor cores online or offline to the operating system. Furthermore, addressing the issue of power waste even when processor cores are idle, more effective processor power saving can be achieved by introducing power supply status adjustment to avoid processor energy waste beyond business needs.

[0074] Please see Figure 5 This is a flowchart illustrating another processor management method provided in this application. This application primarily uses a computing device as the execution subject; please refer to... Figure 5 This application mainly describes the frequency adjustment strategy as a management strategy. The processor management method may include the following steps:

[0075] S501 acquires the operational characteristic data of each processor core in the processor.

[0076] Step S501 can be referred to the description in step S201 above, and will not be repeated here.

[0077] S502 acquires the operational status and historical usage data of the processor cores that are powered on.

[0078] S503 determines the frequency adjustment strategy for processor cores that are powered on, based on the service operation status and historical usage data of the processor cores that are powered on.

[0079] In one implementation, the presence of running services on a powered-on processor core can be determined by first assessing its operational status. The result can be either "service is running" or "service is not running." Optionally, the determination can be based on the number of running processes. If the number of running processes on a processor core is zero, it can be determined that no service is running on that core; if the number of running processes is not zero, it can be determined that service is running on that core. After obtaining the determination results for the powered-on processor cores, different determination methods can be used to determine the corresponding processor core's frequency adjustment strategy, thereby achieving more precise processor power consumption management. Therefore, the frequency adjustment strategies will differ depending on the two different determination results, which will be explained below.

[0080] Historical usage data can include one or more of the following: historical usage rate, historical service operation data, etc. That is, a frequency adjustment strategy can be determined using historical usage rate, historical service operation data, or a combination of both. The following explanation uses examples of determining frequency adjustment strategies using historical usage rate and historical service operation data to illustrate this.

[0081] The specific implementation of determining the frequency adjustment strategy based on historical usage data, including historical usage rates, can be described as follows.

[0082] Case (1): For processor cores that are powered on but do not have any running services, the frequency adjustment strategy can be determined in the following way. For ease of description, the processor core here can be referred to as the third processor core.

[0083] In one implementation, the corresponding frequency adjustment strategy can be determined based on changes in the historical utilization rate (multiple historical utilization rates) of the third processor core. For example, the frequency adjustment strategy can be determined by comparing the historical utilization rate (multiple historical utilization rates) of the third processor core with a utilization rate threshold. Specifically, if a first preset number of historical utilization rates of the third processor core are less than a first utilization rate threshold, the frequency adjustment strategy for the third processor core can be determined to be adjusting the operating frequency to a first operating frequency. If a second preset number of historical utilization rates of the third processor core are greater than or equal to a second utilization rate threshold, the frequency adjustment strategy for the third processor core can be determined to be adjusting the operating frequency to a dynamic operating frequency.

[0084] Wherein, the first utilization rate threshold is less than or equal to the second utilization rate threshold; the first preset quantity and the second preset quantity can be the same or different, and the values ​​of the first preset quantity and the second preset quantity can refer to the values ​​of the preset quantity in step S404 above, which will not be repeated here.

[0085] The first operating frequency can be a constant frequency value, that is, a fixed value.

[0086] Optionally, the first operating frequency value can be determined based on the historical operating frequency of the third processor core. This historical operating frequency can include the operating frequencies corresponding to multiple historical moments, and for example, it can include the following determination methods:

[0087] Method (1): The average of multiple historical operating frequencies of the third processor core can be calculated, and the result of the average calculation can be used as the first operating frequency.

[0088] Method (2): Sort the multiple historical operating frequencies of the third processor core (descending or ascending order) to obtain the corresponding sorting results. The historical operating frequency in the middle of the sorting results is taken as the first operating frequency. It should be noted that if there is only one historical operating frequency in the middle, then this historical operating frequency can be taken as the first operating frequency. If there are two historical operating frequencies in the middle, then the average of these two historical operating frequencies can be taken as the first operating frequency.

[0089] It is understandable that the first operating frequency is determined based on the historical operating frequency of the third processor core. Since the historical utilization rate of the third processor core was low at multiple historical moments, the corresponding historical operating frequency at those multiple historical moments was also low, so the first operating frequency is also a low frequency value.

[0090] Optionally, the first operating frequency can be a pre-set lower frequency value.

[0091] By using the above settings, the operating frequency of processor cores that have no business processes running and have low long-term usage can be set to a relatively low constant frequency (which can be called a low constant frequency).

[0092] Dynamic operating frequency can refer to a dynamically changing operating frequency, such as automatically adjusting the operating frequency of the third processor core according to actual needs. For example, the operating frequency of the third processor core can dynamically change based on the processing requirements (such as load) of the third processor core. If the processing requirements of the third processor core become higher (such as a larger load), the operating frequency of the third processor core will also increase; if the processing requirements of the third processor core become lower (such as a smaller load), the operating frequency of the third processor core will also decrease.

[0093] In one implementation, if the historical utilization rate of a first preset number of third processor cores is less than a first utilization rate threshold, then a tagging information can be added to the third processor cores; this tagging information can be used to indicate that the power supply status can be adjusted to a power-off state. By adding tagging information to the third processor cores in this situation, it is beneficial to directly determine the second processor core based on this tagging information during the process of determining the computing power adjustment strategy for each processor core (as described in the relevant section of step S404).

[0094] Case (2): For processor cores that are powered on and have services running, the frequency adjustment strategy can be determined in the following way. For ease of description, this processor core can be referred to as the fourth processor core.

[0095] In one implementation, the corresponding frequency adjustment strategy can be determined based on the changes in the historical utilization rate (multiple historical utilization rates) of the fourth processor core. Specifically, if the historical utilization rate of the fourth processor core meets a preset change rule, the frequency adjustment strategy for the fourth processor core can be determined to be adjusting the operating frequency to a second operating frequency; if the historical utilization rate of the fourth processor core does not meet the preset change rule, the frequency adjustment strategy for the fourth processor core can be determined to be adjusting the operating frequency to a dynamic operating frequency.

[0096] The preset change rule can refer to the regularity of changes in multiple historical usage rates. Failure to meet the preset change rule can be understood as the irregularity of changes in multiple historical usage rates. Optionally, the determination of whether the change is regular can be made by comparing the historical usage rate of the fourth processor core with a usage rate threshold. For example, if there is a third preset number of historical usage rates less than the third usage rate threshold, or if there is a fourth preset number of historical usage rates greater than or equal to the fourth usage rate threshold, then the historical usage rate of the fourth processor core meets the preset change rule. Conversely, if the historical usage rate of the fourth processor core does not meet either of these two conditions, then the historical usage rate of the fourth processor core does not meet the preset change rule. The third usage rate threshold is less than or equal to the fourth usage rate threshold; the third and fourth preset numbers can be the same or different; the values ​​of the third and fourth preset numbers can refer to the values ​​of the preset numbers in step S403 above, and will not be repeated here.

[0097] The dynamic operating frequency can be understood as described above and will not be repeated here; the second operating frequency can be a constant frequency value, that is, a fixed value.

[0098] Optionally, the specific frequency value corresponding to the second operating frequency may differ when different preset change rules are met. For example, the preset change rules may include a first change rule and a second change rule. The first change rule may include: there exists a third preset number of historical utilization rates less than a third utilization rate threshold; the second change rule may include: there exists a fourth preset number of historical utilization rates greater than or equal to a fourth utilization rate threshold. Based on this, it can be seen that when the frequency adjustment strategy of the fourth processor core is determined to adjust the operating frequency to the second operating frequency, the specific frequency value corresponding to the second operating frequency can also be determined based on different preset change rules. In a specific implementation, if the historical utilization rate of the fourth processor core meets the first change rule, the second operating frequency can be determined as the first frequency value; if the historical utilization rate of the fourth processor core meets the second change rule, the second operating frequency can be determined as the second frequency value. The first frequency value may be lower than the second frequency value.

[0099] The determination of the first frequency value and the second frequency value is similar to the determination of the first operating frequency described above. The specific implementation can be referred to the above description, and will not be repeated here.

[0100] It is understandable that the first frequency value is determined based on the historical operating frequency of the fourth processor core. Since multiple historical operating frequencies of the fourth processor core were relatively low when the second operating frequency was determined to be the first frequency value, the first frequency value is also a relatively low frequency value. Therefore, through the above settings, the operating frequency of processor cores with running business processes and low long-term usage can be set to a relatively low constant frequency (e.g., a low constant frequency). Similarly, the second frequency value is determined based on the historical operating frequency of the fourth processor core. Since multiple historical operating frequencies of the fourth processor core were relatively high when the second operating frequency was determined to be the first frequency value, the second frequency value is also a relatively high frequency value. Therefore, through the above settings, the operating frequency of processor cores with running business processes and high long-term usage can be set to a relatively high constant frequency (e.g., a high constant frequency).

[0101] As can be seen, by setting the operating frequency in the above manner, the operating frequency of processor cores with no running business processes and low long-term usage can be set to a low constant frequency; the operating frequency of processor cores with no running business processes and relatively high long-term usage can be set to a dynamic operating frequency. The operating frequency of processor cores with running business processes and low long-term usage can be set to a low constant frequency; the operating frequency of processor cores with running business processes and high long-term usage can be set to a high constant frequency; and the operating frequency of processor cores with running business processes but irregular long-term usage can be set to a dynamic operating frequency. In summary, the embodiments of this application can match a more suitable operating strategy according to the operating characteristics of each processor core to achieve dynamic frequency adjustment, thereby achieving a more precise effect of saving processor power consumption.

[0102] The specific implementation of determining the frequency adjustment strategy based on historical usage data, including historical business operation data, can be described as follows.

[0103] Case (1): For a processor core that is powered on but does not have a third processor core running services, the frequency adjustment strategy can be determined in the following way.

[0104] In one implementation, the corresponding frequency adjustment strategy can be determined based on changes in the historical service operation data (multiple historical service operation data) corresponding to the third processor core. Specifically, if a first preset number of historical service operation data indicates no service operation for the third processor core, the frequency adjustment strategy for that third processor core can be determined to be adjusting the operating frequency to the first operating frequency. The first preset number can be any value that is less than or equal to the number of historical service operation data, and greater than half of the number of historical service operation data. If a second preset number of historical service operation data indicates service operation for the third processor core, the frequency adjustment strategy for that third processor core can be determined to be adjusting the operating frequency to a dynamic operating frequency.

[0105] The first preset quantity or the second preset quantity can be any value that is less than or equal to the number of historical business operations and greater than half of the number of historical business operations. The first preset quantity and the second preset quantity can be the same or different. The first operating frequency and the dynamic operating frequency can be referred to the above description and will not be repeated here.

[0106] Case (2): For a fourth processor core that is running services in a processor core that is powered on, the frequency adjustment strategy can be determined in the following way.

[0107] In specific implementation, if the historical service operation status of the fourth processor core meets the preset change rules, the frequency adjustment strategy of the fourth processor core can be determined to adjust the operating frequency to the second operating frequency; if the historical service operation status of the fourth processor core does not meet the preset change rules, the frequency adjustment strategy of the fourth processor core can be determined to adjust the operating frequency to the dynamic operating frequency.

[0108] Here, the preset change rule refers to the regularity of changes in multiple historical business operations. Failure to meet the preset change rule can be understood as the irregularity of changes in multiple historical business operations. Optionally, the determination of whether the changes are regular can be made by comparing the number of business processes in the historical business operations of the fourth processor core with a process number threshold. For example, if there is a third preset number of historical business operations where the number of business processes is less than the first process number threshold, or if there is a fourth preset number of historical business operations where the number of business processes is greater than or equal to the second process number threshold, then the historical business operations of the fourth processor core satisfy the preset change rule. Conversely, if the historical business operations of the fourth processor core do not satisfy either of these two conditions, then the historical business operations of the fourth processor core do not satisfy the preset change rule. The first process number threshold is less than or equal to the second process number threshold; the third and fourth preset numbers can be the same or different; the third or fourth preset number can be any value that is less than or equal to the number of historical business operations and greater than half of the number of historical business operations; the first and second preset numbers can be the same or different.

[0109] Optionally, the specific frequency value corresponding to the second operating frequency may differ when different preset change rules are met. For example, the preset change rules may include a first change rule and a second change rule. The first change rule may include: in a third preset number of historical business operation cases, the number of business processes is less than a first process number threshold; in a fourth preset number of historical business operation cases, the number of business processes is greater than or equal to a second process number threshold. Based on this, it can be seen that when the frequency adjustment strategy of the fourth processor core is determined to adjust the operating frequency to the second operating frequency, the specific frequency value corresponding to the second operating frequency can also be determined based on different preset change rules. In a specific implementation, if the historical utilization rate of the fourth processor core meets the first change rule, the second operating frequency can be determined as the first frequency value; if the historical utilization rate of the fourth processor core meets the second change rule, the second operating frequency can be determined as the second frequency value. The first frequency value may be lower than the second frequency value.

[0110] The method for determining the first and second frequency values ​​here is similar to the method described above when the historical usage data is the historical usage rate. The specific implementation can be found in the above description and will not be repeated here. It is understood that the first frequency value is a lower frequency value, and the second frequency value is a higher frequency value.

[0111] As can be seen, by setting the operating frequency in the above manner, the operating frequency of processor cores that have no business processes running, or have no business processes running for a long time, can be set to a low constant frequency; the operating frequency of processor cores that have no business processes running, or have not had no business processes running for a long time, can be set to a dynamic operating frequency. The operating frequency of processor cores that have business processes running, and have a small number of long-term business processes, can be set to a low constant frequency, while the operating frequency of processor cores that have business processes running, and have a large number of long-term business processes, can be set to a high constant frequency. The operating frequency of processor cores that have business processes running, but have an irregular number of long-term business processes, can be set to a dynamic operating frequency. In summary, the embodiments of this application can match a more suitable operating strategy according to the operating characteristics of each processor core to achieve a dynamic frequency adjustment effect, thereby achieving a more precise effect of saving processor power consumption.

[0112] S504 adjusts the operating frequency of each processor core based on a frequency adjustment strategy.

[0113] In one implementation, the operating frequency of each processor core can be adjusted based on the frequency adjustment strategy determined in step S503.

[0114] For example, when determining the frequency adjustment strategy based on historical utilization, as mentioned above, if there is no third processor core running services among the processor cores in the powered-on state, and the historical utilization rate of the third processor core is less than a first utilization rate threshold for a first preset number of cores, the operating frequency of the third processor core can be adjusted to the first operating frequency. If the historical utilization rate of the third processor core is greater than or equal to a second utilization rate threshold for a second preset number of cores, the operating frequency of the third processor core can be adjusted to a dynamic operating frequency.

[0115] When a fourth processor core is running services among the processor cores that are powered on, if the historical utilization rate of the fourth processor core meets a preset change rule, the operating frequency of the fourth processor core can be adjusted to a second operating frequency. Optionally, if the historical utilization rate of the fourth processor core meets a first change rule, the operating frequency of the fourth processor core can be adjusted to a first frequency value; if the historical utilization rate of the fourth processor core meets a second change rule, the operating frequency of the fourth processor core can be adjusted to a second frequency value. If the historical utilization rate of the fourth processor core does not meet the preset change rule, the operating frequency of the fourth processor core can be adjusted to a dynamic operating frequency.

[0116] In this embodiment, the service operation characteristics of the processor core can be analyzed based on the historical usage data and service operation status of the processor core, and a more suitable frequency adjustment strategy can be matched accordingly to achieve dynamic frequency adjustment, dynamically meet the energy efficiency requirements of different services, and thus achieve the goal of reducing processor power consumption.

[0117] To better understand the processor management method proposed in the embodiments of this application, the following will be combined with... Figure 6 and Figure 7 The processor management methods are further elaborated. Among them, the computing power adjustment strategy and the frequency adjustment strategy can be executed in parallel. The following description will use these two strategies in parallel as examples for further explanation.

[0118] In one implementation, such as Figure 6 As shown, this processor management method can be executed in two modules: a data collection module and a strategy calculation module. The following explanation of the processor management method will focus on these two modules. Specifically: First, the data collection module collects operational characteristic data of each CPU core in the processor. This operational characteristic data may include one or more of the following: current utilization rate and business operation status. Then, the strategy calculation module executes, in parallel, computational power adjustment strategies and frequency adjustment strategies for the processor cores based on the collected operational characteristic data and historical usage data. Based on these strategies, it adjusts the power supply status (e.g., power-on or power-off state) or operating frequency (e.g., constant operating frequency or dynamic operating frequency) of each processor core in the processor. As mentioned earlier, the strategy calculation module includes calculations for computing power adjustment strategies and frequency adjustment strategies. Specifically, the strategy calculation module can analyze the computing power requirements of each processor core based on the current utilization rate and load threshold of the collected processor cores, and execute computing power adjustment strategies for each processor core. The strategy calculation module can also analyze the operating characteristics of the services on each processor core based on the collected service operation status and historical usage data of the processor cores, and match appropriate frequency adjustment strategies for each processor core.

[0119] In one implementation, the processor management method proposed in this application can run periodically. In each cycle, a data collection module first collects operational characteristic data for each processor core; then, a strategy calculation module executes, in parallel, the processor core's computing power adjustment strategy and frequency adjustment strategy based on the collected operational characteristic data and historical usage data. After the strategy execution, the adjustment of the processor core's power supply state and operating frequency for that cycle ends. For example, see... Figure 7 The computing device may perform the following steps in each cycle:

[0120] S1, the data collection module can collect runtime characteristic data. For example, it can collect the utilization rate (such as current utilization rate and historical utilization rate) of each processor core and the business operation status on each processor core according to the tools or user-space interfaces provided by the operating system.

[0121] S2, the strategy calculation module predicts the power supply status and operating frequency of each processor core in the next cycle based on the acquired operational characteristic data and historical usage data. This means it can execute two strategies (computing power adjustment strategy and frequency adjustment strategy) in parallel to achieve prediction. Steps S21 and S22 are described below, with the adjustment of the processor core's power supply status illustrated using CPU Hot-plug technology as an example.

[0122] S21, Computing power adjustment strategy: This computing power adjustment strategy can adjust the power supply status of the processor core according to the current computing power demand (system load) of the system, or in other words, execute the hot-plug of the processor core, that is, perform an insertion operation or a removal operation on the processor core.

[0123] When the system load exceeds the load threshold (e.g., in an operating system with N processor cores and a load threshold of 80%), the following occurs: (CPU1 + CPU2 + ... + CPUi + ... CPU... M If the CPU cores are at a performance level of 0.8 or higher (e.g., M / M ≥ 0.8), CPU Hot-plug technology can be used to bring offline processor cores back online, ensuring that the operating system has enough processor cores to meet the computing power requirements of the business. The conditions for bringing processor cores back online can be: the system load is below the load threshold after adding the new cores, or all N processor cores are already online.

[0124] If the system load does not exceed the load threshold (e.g., (CPU1 + CPU2 ... + CPU...) i +…CPU M If M < 0.8, it can iterate through the processor cores that meet the Hot-plug-Out condition and are online (i.e., the processor cores with marked information among the power-on processor cores mentioned above), and perform the Hot-plug-Out operation on all these online processor cores to take them offline.

[0125] S22, Frequency Adjustment Strategy: This frequency adjustment strategy can be executed on each online processor core, that is, adjusting the operating frequency of processor cores that are powered on. In specific implementation, for any online processor core, firstly, it can be determined whether there is any service running on that processor core, and the operating frequency can be set based on the different service operations. Specifically, when setting the operating frequency of a processor core, different operating frequencies can be set according to the long-term usage data of the processor core (such as historical utilization rate, historical service operation status); the rules for setting the operating frequency of the processor core are described below.

[0126] When the processor core is not running any services, for example, using historical usage data as an example, if the processor core has a consistently low utilization rate (i.e., the aforementioned third processor core has a first preset number of historical utilization rates less than a first utilization rate threshold), the processor core can be set to a low constant frequency (e.g., a first operating frequency), and the processor core can be marked as Hot-plug-Out. If the processor core has a consistently low utilization rate (i.e., the aforementioned third processor core has a second preset number of historical utilization rates greater than or equal to a second utilization rate threshold), the processor core can be set to a dynamic operating frequency.

[0127] When the processor core is running services, for example, taking historical usage data as historical usage rate, if the long-term usage rate of the processor core is low (i.e., the historical usage rate of the fourth processor core mentioned above meets the first change rule), the operating frequency of the processor core can be set to a low constant frequency (such as the first frequency value). If the long-term usage rate of the processor core is high (i.e., the historical usage rate of the fourth processor core mentioned above meets the second change rule), the operating frequency of the processor core can be set to a high constant frequency (such as the second frequency value). If the long-term usage rate of the processor core is irregular (i.e., the historical usage rate of the fourth processor core mentioned above does not meet the preset change rule), the operating frequency of the processor core can be set to a dynamic frequency.

[0128] In summary, by introducing power supply status adjustments, it is possible to dynamically bring processor cores online or offline to the operating system. Furthermore, it addresses the issue of wasted power consumption even when processor cores are idle, enabling more effective processor power saving to avoid energy waste beyond business requirements. Additionally, it allows for dynamic frequency adjustment based on the operating characteristics of each processor core, achieving a more precise processor computing power utilization mechanism and ultimately more accurate processor energy saving.

[0129] Please see Figure 8 , Figure 8 This is a schematic diagram of a processor management device provided in an embodiment of this application. The processor management device described in this embodiment includes:

[0130] The acquisition unit 801 is used to acquire the operating characteristic data of each processor core in the processor, wherein the operating characteristic data includes one or more of the current utilization rate and business operation status;

[0131] The determining unit 802 is used to acquire historical usage data of each processor core, and determine the management strategy of each processor core based on the operating characteristic data and historical usage data of each processor core. The management strategy includes one or both of computing power adjustment strategy and frequency adjustment strategy.

[0132] The adjustment unit 803 is used to adjust the power supply status or operating frequency of each processor core based on the management strategy, wherein the power supply status includes power-on state or power-off state.

[0133] In one implementation, the determining unit 802 is specifically used for:

[0134] Get the current utilization of the processor cores that are powered on;

[0135] The system load is determined based on the current utilization of the processor cores that are powered on.

[0136] The computing power adjustment strategy for each processor core is determined based on the system load and load threshold.

[0137] In one implementation, the determining unit 802 is specifically used for:

[0138] Acquire the operational status and historical usage data of the processor cores that are powered on;

[0139] Based on the service operation status and historical usage data of the processor core in the power-on state, a frequency adjustment strategy for the processor core in the power-on state is determined.

[0140] In one implementation, the determining unit 802 is specifically used for:

[0141] If the system load is greater than or equal to the load threshold, then the first processor core is determined from the processor cores that are in the power-down state, and the computing power adjustment strategy of the first processor core is determined to adjust the power supply state to the power-on state.

[0142] If the system load is less than the load threshold, then a second processor core is determined from the processor cores that are in the power-on state, and the computing power adjustment strategy of the second processor core is determined to be to adjust the power supply state to the power-off state.

[0143] In one implementation, the determining unit 802 is specifically used for:

[0144] The processor core with tagged information is obtained from the processor core in the power-on state. The tagged information is used to indicate that the power supply state can be adjusted to the power-off state. The tagged information is generated based on one or two of the processor core's business operation status and historical usage data.

[0145] The processor core with the marking information is identified as the second processor core.

[0146] In one implementation, the historical usage data includes historical usage rates; the determining unit 802 is specifically used for:

[0147] For a third processor core that is not running any business among the processor cores that are in the power-on state, if the third processor core has a first preset number of historical utilization rates that are less than a first utilization rate threshold, then the frequency adjustment strategy for the third processor core is to adjust the operating frequency to the first operating frequency.

[0148] If the third processor core has a second preset number of historical usage rates that are greater than or equal to a second usage rate threshold, then the frequency adjustment strategy for the third processor core is determined to be to adjust the operating frequency to a dynamic operating frequency.

[0149] Wherein, the first utilization rate threshold is less than or equal to the second utilization rate threshold.

[0150] In one implementation, the determining unit 802 is further configured to:

[0151] If a first preset number of historical usage rates of the third processor core are less than a first usage rate threshold, then a marker is added to the third processor core; the marker is used to indicate that the power supply status can be adjusted to a power-off state.

[0152] In one implementation, the historical usage data includes historical usage rates; the determining unit 802 is specifically used for:

[0153] For the fourth processor core that is running services among the processor cores that are in the power-on state, if the historical utilization rate of the fourth processor core meets the preset change rule, then the frequency adjustment strategy of the fourth processor core is determined to be to adjust the operating frequency to the second operating frequency.

[0154] If the historical utilization rate of the fourth processor core does not meet the preset change rule, then the frequency adjustment strategy of the fourth processor core is determined to be to adjust the operating frequency to a dynamic operating frequency.

[0155] In one implementation, the preset change rule includes a first change rule and a second change rule. The first change rule includes: there exists a third preset number of historical usage rates that are less than a third usage rate threshold. The second change rule includes: there exists a fourth preset number of historical usage rates that are greater than or equal to a fourth usage rate threshold. The third usage rate threshold is less than or equal to the fourth usage rate threshold. The determining unit 802 is specifically used for:

[0156] If the historical utilization rate of the fourth processor core satisfies the first change rule, then the second operating frequency is determined to be the first frequency value;

[0157] If the historical utilization rate of the fourth processor core meets the second change rule, then the second operating frequency is determined to be the second frequency value;

[0158] Wherein, the first frequency value is lower than the second frequency value.

[0159] This application embodiment acquires operational characteristic data of each processor core in the processor through an acquisition unit, and acquires historical usage data of each processor core through a determination unit. Based on the operational characteristic data and historical usage data of each processor core, a management strategy for each processor core is determined. The management strategy includes one or both of computing power adjustment strategies and frequency adjustment strategies. Furthermore, an adjustment unit can adjust the power supply state or operating frequency of each processor core based on the management strategy. This method effectively manages the processor, thereby reducing power consumption.

[0160] Please see Figure 9 , Figure 9 This is a schematic diagram of the structure of a computing device provided in an embodiment of this application. The computing device described in this embodiment includes: a processor 901, a memory 902, and a network interface 903. The processor 901, the memory 902, and the network interface 903 can exchange data.

[0161] The processor 901 described above can be a Central Processing Unit (CPU), but it can also be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor.

[0162] The aforementioned memory 902 may include read-only memory and random access memory, and provides program instructions and data to the processor 901. A portion of the memory 902 may also include non-volatile random access memory. The processor 901 executes the program instructions by calling them:

[0163] Obtain the operational characteristic data of each processor core in the processor, wherein the operational characteristic data includes one or more of the following: current utilization rate and business operation status;

[0164] The historical usage data of each processor core is obtained, and the management strategy of each processor core is determined based on the operating characteristic data and historical usage data of each processor core. The management strategy includes one or both of computing power adjustment strategy and frequency adjustment strategy.

[0165] The power supply status or operating frequency of each processor core is adjusted based on the management strategy, wherein the power supply status includes power-on state or power-off state.

[0166] In one implementation, the processor 901 is specifically used for:

[0167] Get the current utilization of the processor cores that are powered on;

[0168] The system load is determined based on the current utilization of the processor cores that are powered on.

[0169] The computing power adjustment strategy for each processor core is determined based on the system load and load threshold.

[0170] In one implementation, the processor 901 is specifically used for:

[0171] Acquire the operational status and historical usage data of the processor cores that are powered on;

[0172] Based on the service operation status and historical usage data of the processor core in the power-on state, a frequency adjustment strategy for the processor core in the power-on state is determined.

[0173] In one implementation, the processor 901 is specifically used for:

[0174] If the system load is greater than or equal to the load threshold, then the first processor core is determined from the processor cores that are in the power-down state, and the computing power adjustment strategy of the first processor core is determined to adjust the power supply state to the power-on state.

[0175] If the system load is less than the load threshold, then a second processor core is determined from the processor cores that are in the power-on state, and the computing power adjustment strategy of the second processor core is determined to be to adjust the power supply state to the power-off state.

[0176] In one implementation, the processor 901 is specifically used for:

[0177] The processor core with tagged information is obtained from the processor core in the power-on state. The tagged information is used to indicate that the power supply state can be adjusted to the power-off state. The tagged information is generated based on one or two of the processor core's business operation status and historical usage data.

[0178] The processor core with the marking information is identified as the second processor core.

[0179] In one implementation, the historical usage data includes historical usage rates; the processor 901 is specifically used for:

[0180] For a third processor core that is not running any business among the processor cores that are in the power-on state, if the third processor core has a first preset number of historical utilization rates that are less than a first utilization rate threshold, then the frequency adjustment strategy for the third processor core is to adjust the operating frequency to the first operating frequency.

[0181] If the third processor core has a second preset number of historical usage rates that are greater than or equal to a second usage rate threshold, then the frequency adjustment strategy for the third processor core is determined to be to adjust the operating frequency to a dynamic operating frequency.

[0182] Wherein, the first utilization rate threshold is less than or equal to the second utilization rate threshold.

[0183] In one implementation, the processor 901 is further configured to:

[0184] If a first preset number of historical usage rates of the third processor core are less than a first usage rate threshold, then a marker is added to the third processor core; the marker is used to indicate that the power supply status can be adjusted to a power-off state.

[0185] In one implementation, the historical usage data includes historical usage rates; the processor 901 is specifically used for:

[0186] For the fourth processor core that is running services among the processor cores that are in the power-on state, if the historical utilization rate of the fourth processor core meets the preset change rule, then the frequency adjustment strategy of the fourth processor core is determined to be to adjust the operating frequency to the second operating frequency.

[0187] If the historical utilization rate of the fourth processor core does not meet the preset change rule, then the frequency adjustment strategy of the fourth processor core is determined to be to adjust the operating frequency to a dynamic operating frequency.

[0188] In one implementation, the preset change rule includes a first change rule and a second change rule. The first change rule includes: there exists a third preset number of historical usage rates that are less than a third usage rate threshold. The second change rule includes: there exists a fourth preset number of historical usage rates that are greater than or equal to a fourth usage rate threshold. The third usage rate threshold is less than or equal to the fourth usage rate threshold. The processor 901 is specifically used for:

[0189] If the historical utilization rate of the fourth processor core satisfies the first change rule, then the second operating frequency is determined to be the first frequency value;

[0190] If the historical utilization rate of the fourth processor core meets the second change rule, then the second operating frequency is determined to be the second frequency value;

[0191] Wherein, the first frequency value is lower than the second frequency value.

[0192] This application embodiment obtains the operational characteristic data of each processor core in the processor and can also obtain the historical usage data of each processor core. Based on the operational characteristic data and historical usage data of each processor core, a management strategy for each processor core is determined. The management strategy includes one or both of computing power adjustment strategies and frequency adjustment strategies. Furthermore, the power supply state or operating frequency of each processor core can be adjusted based on the management strategy. In this way, the processor can be effectively managed, thereby achieving the effect of reducing power consumption.

[0193] Embodiments of this application also provide a chip disposed in a computing device. This chip is used to execute the methods described in the corresponding embodiments above, which will not be repeated here. This chip system may consist of a chip or may include chips and other discrete components.

[0194] Those skilled in the art will also understand that the various illustrative logical blocks and steps listed in the embodiments of this application can be implemented by electronic hardware, computer software, or a combination of both. Whether such functionality is implemented through hardware or software depends on the specific application and the overall system design requirements. Those skilled in the art can implement the described functionality using various methods for each specific application, but such implementation should not be construed as exceeding the scope of protection of the embodiments of this application.

[0195] This application also provides a computer storage medium storing a computer program thereon, the computer program including program instructions that, when executed by a computing device, implement the functions of any of the above method embodiments.

[0196] The aforementioned computer storage media include, but are not limited to, flash memory, hard disks, and solid-state drives.

[0197] This application also provides a computer program product that, when executed by a computer device, implements the functions of any of the above method embodiments.

[0198] The solutions described in this application can be implemented in various ways. For example, these technologies can be implemented in hardware, software, or a combination of hardware. For hardware implementation, the processing unit performing the related technologies described above can be implemented in one or more general-purpose processors, digital signal processors (DSPs), digital signal processing devices, application-specific integrated circuits (ASICs), programmable logic devices, field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic, discrete hardware components, or any combination thereof. The general-purpose processor can be a microprocessor; alternatively, it can also be any conventional processor, controller, microcontroller, or state machine. The processor can also be implemented through a combination of computing devices, such as a digital signal processor and a microprocessor, multiple microprocessors, one or more microprocessors combined with a digital signal processor core, or any other similar configuration.

[0199] In the above embodiments, implementation can be achieved, in whole or in part, through software, hardware, firmware, or any combination thereof. When implemented in software, it can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded and executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer instructions can be stored in a computer storage medium or transferred from one computer storage medium to another.

[0200] It should be understood that in this application, "at least one (item)" means one or more, and "more than" means two or more. "And / or" is used to describe the relationship between related objects, indicating that three relationships can exist. For example, "A and / or B" can represent three cases: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple.

[0201] In this application, presets (such as preset cycles) can be understood as definitions, pre-defined, stored, pre-stored, pre-negotiated, pre-configured, solidified, or pre-burned.

[0202] It will be understood by those skilled in the art that, for the sake of convenience and brevity, the specific working process of the computing device and unit described above can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0203] The same or similar parts between the various embodiments in this application can be referred to mutually. In the various embodiments of this application, and in the various implementation methods / methods / implementations within each embodiment, unless otherwise specified or logically conflicting, the terminology and / or descriptions between different embodiments and between the various implementation methods / methods / implementations within each embodiment are consistent and can be mutually referenced. The technical features in different embodiments and the various implementation methods / methods / implementations within each embodiment can be combined according to their inherent logical relationships to form new embodiments, implementation methods, methods, or implementation approaches. The above-described embodiments of this application do not constitute a limitation on the scope of protection of this application.

Claims

1. A processor management method, characterized in that, include: Obtain the operational characteristic data of each processor core in the processor, wherein the operational characteristic data includes one or more of the following: current utilization rate and business operation status; Based on the operational characteristic data of each processor core, processor cores without service operation or processor cores with low long-term usage data are identified. Marking information is added to the identified processor cores. The long-term usage data includes historical usage rate and historical service operation status. The marking information is used to indicate that the power supply status can be adjusted to the power-off state. The process involves acquiring historical usage data for each processor core and determining management strategies for each processor core based on its operational characteristics and historical usage data. These management strategies include one or both of computing power adjustment strategies and frequency adjustment strategies. Determining the management strategies based on the operational characteristics and historical usage data includes: determining system load based on the current utilization rate of processor cores in a power-on state; if the system load is greater than or equal to a load threshold, identifying a first processor core from the processor cores in a power-off state and determining its computing power adjustment strategy as adjusting its power supply state to a power-on state; if the system load is less than the load threshold, acquiring processor cores with the marked information from the processor cores in a power-on state, identifying the processor cores with the marked information as second processor cores, and determining their computing power adjustment strategy as adjusting their power supply state to a power-off state. The power supply status or operating frequency of each processor core is adjusted based on the management strategy, wherein the power supply status includes power-on state or power-off state.

2. The method according to claim 1, characterized in that, The method of determining the management strategy for each processor core based on the operational characteristic data and historical usage data of each processor core also includes: Acquire the operational status and historical usage data of the processor cores that are powered on; Based on the service operation status and historical usage data of the processor core in the power-on state, a frequency adjustment strategy for the processor core in the power-on state is determined.

3. The method according to claim 2, characterized in that, The historical usage data includes historical usage rates; the determination of the frequency adjustment strategy for the processor core in the power-on state based on the service operation status of the processor core in the power-on state and the historical usage data includes: For a third processor core that is not running any business among the processor cores that are in the power-on state, if the third processor core has a first preset number of historical utilization rates that are less than a first utilization rate threshold, then the frequency adjustment strategy for the third processor core is to adjust the operating frequency to the first operating frequency. If the third processor core has a second preset number of historical usage rates that are greater than or equal to a second usage rate threshold, then the frequency adjustment strategy for the third processor core is determined to be to adjust the operating frequency to a dynamic operating frequency. Wherein, the first utilization rate threshold is less than or equal to the second utilization rate threshold.

4. The method according to claim 3, characterized in that, Also includes: If a first preset number of historical usage rates of the third processor core are less than a first usage rate threshold, then mark information is added to the third processor core. The marking information is used to indicate that the power supply status can be adjusted to the power-off state.

5. The method according to claim 2, characterized in that, The historical usage data includes historical usage rates; the determination of the frequency adjustment strategy for the processor core in the power-on state based on the service operation status of the processor core in the power-on state and the historical usage data includes: For the fourth processor core that is running services among the processor cores that are in the power-on state, if the historical utilization rate of the fourth processor core meets the preset change rule, then the frequency adjustment strategy of the fourth processor core is determined to be to adjust the operating frequency to the second operating frequency. If the historical utilization rate of the fourth processor core does not meet the preset change rule, then the frequency adjustment strategy of the fourth processor core is determined to be to adjust the operating frequency to a dynamic operating frequency.

6. The method according to claim 5, characterized in that, The preset change rules include a first change rule and a second change rule. The first change rule includes: there exists a third preset number of historical usage rates that are less than a third usage rate threshold. The second change rule includes: there exists a fourth preset number of historical usage rates that are greater than or equal to a fourth usage rate threshold. The third usage rate threshold is less than or equal to the fourth usage rate threshold. The determination of the frequency adjustment strategy for the fourth processor core is to adjust the operating frequency to a second operating frequency, including: If the historical utilization rate of the fourth processor core satisfies the first change rule, then the second operating frequency is determined to be the first frequency value; If the historical utilization rate of the fourth processor core meets the second change rule, then the second operating frequency is determined to be the second frequency value; Wherein, the first frequency value is lower than the second frequency value.

7. A computing device, characterized in that, The device includes a processor and a memory, wherein the memory is used to store a computer program, the computer program including program instructions, and the processor is configured to invoke the program instructions to perform the method as described in any one of claims 1-6.

Images