一种用于多核CPU原子操作内存的装置及方法
By introducing a processing module and a status register to manage atomic operation commands in a multi-core CPU, the problems of mutual interference and low efficiency during atomic operations in multi-core CPUs are solved, and efficient execution of atomic operations is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- SHANDONG YUNHAI GUOCHUANG CLOUD COMPUTING EQUIP IND INNOVATION CENT CO LTD
- Filing Date
- 2022-12-06
- Publication Date
- 2026-07-17
AI Technical Summary
Multi-core CPUs suffer from mutual interference and low operating efficiency when performing atomic operations. Existing technologies use spinlocks to cause other CPU cores that have not acquired the lock to be blocked, resulting in long waiting times.
An atomic operation memory device and method for multi-core CPUs is proposed. The processing module communicates with each CPU core and memory, uses a status register to monitor and manage the sequential execution of atomic operation commands, and uses a hardware processing module to perform the calculations, thereby freeing up CPU computing time and ensuring the order and efficiency of atomic operations.
It effectively solves the mutual interference of multi-core CPUs when performing atomic operations, improves operating efficiency, reduces CPU waiting time, and ensures the order and execution efficiency of atomic operations.
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