Chip register design file generation method and device, equipment and storage medium

Abstract

Embodiments of the present disclosure disclose a chip register design file generation method and device, computer equipment and a storage medium. The method comprises: obtaining a description file of a register, and parsing description information of the register in the description file; generating a description document of the register according to the description information of the register and a preset register document template; and generating a code file associated with the register according to the description information of the register and a preset register code template. The method saves manpower and time for chip development, and facilitates secondary development and maintenance of register design.

Description

Technical Field

[0001] This disclosure relates to, but is not limited to, the field of semiconductor technology, and in particular to a method and apparatus for generating chip register design files, a computer device, and a storage medium. Background Technology

[0002] In digital chips, registers serve as the window for information exchange between hardware and software. Throughout the entire chip design cycle, the definition, design, and verification of registers are among the top tasks. Only by ensuring the correct functioning of registers can the information exchange between hardware and software proceed smoothly.

[0003] Currently, most chip design companies rely on manual design or semi-automated script generation for the design and verification of register-related functions during chip development. These tasks can take several days to more than a week to complete. Furthermore, the design and verification processes for registers may vary between different teams or projects within the same company, which is detrimental to future maintenance. Summary of the Invention

[0004] In view of this, the present disclosure provides at least one method and apparatus for generating chip register design files, a computer device, and a storage medium.

[0005] In a first aspect, embodiments of this disclosure provide a method for generating a chip register design file, the method comprising:

[0006] Obtain the register description file and parse it to obtain the description information of the registers in the description file;

[0007] Based on the description information of the register and the preset register document template, generate a description document for the register;

[0008] Based on the description information of the register and the preset register code template, a code file associated with the register is generated.

[0009] In some embodiments, obtaining the register description file and parsing the description information of the registers in the description file includes:

[0010] The description file is loaded using a first code language, and the description information of the registers in the description file is obtained by parsing.

[0011] The method further includes:

[0012] The register document template was generated using a second code language;

[0013] The step of generating a description document for the register based on the register's description information and a preset register document template includes:

[0014] The register document template is invoked using the first code language, and the register document template is filled with the description information to generate the description document of the register.

[0015] In some embodiments, the method further includes:

[0016] The register code template is generated using a third-party code language;

[0017] The step of generating a code file associated with the register based on the register's description information and a preset register code template includes:

[0018] The register code template is invoked using the first code language, and the register code file is generated by filling the register code template with the description information.

[0019] In some embodiments, the step of using the first code language to call the register document template and filling the register document template with the description information to generate the description document of the register includes:

[0020] The register document template is invoked using the first code language, and the field names in the register document template are analyzed.

[0021] The description document is generated by finding the information associated with the field name in the description information of the register and assigning a value to the field name using the information.

[0022] In some embodiments, the step of calling the register code template using the first code language and filling the register code template with the description information to generate the register code file includes:

[0023] The register code template is invoked using the first code language, and the variable names in the register code template are analyzed.

[0024] The code file is generated by finding the information associated with the variable name in the description information of the register, assigning a value to the variable name using the information.

[0025] In some embodiments, generating the code file associated with the register includes:

[0026] Generate register-transfer level RTL code, verification code, software driver code, and verification stimulus code associated with the aforementioned registers.

[0027] In some embodiments, generating the description document for the register includes:

[0028] Generate a description document in at least one of the following formats: PDF document, HTML document, DOC document, or IP-XACT XML document.

[0029] Secondly, embodiments of this disclosure provide an apparatus for generating chip register design files, the apparatus comprising:

[0030] The acquisition module is configured to acquire the description file of the registers and parse the description information of the registers in the description file;

[0031] The first generation module is configured to generate a description document for the register based on the register's description information and a preset register document template.

[0032] The second generation module is configured to generate a code file associated with the register based on the register description information and a preset register code template.

[0033] In some embodiments, the acquisition module is configured to load the description file using a first code language and parse it to obtain the description information of the registers in the description file;

[0034] The device further includes:

[0035] The third generation module is configured to generate the register document template using a second code language;

[0036] The first generation module is configured to call the register document template using the first code language and fill the register document template with the description information to generate the description document of the register.

[0037] In some embodiments, the apparatus further includes:

[0038] The fourth generation module is configured to generate the register code template using a third code language;

[0039] The second generation module is configured to call the register code template using the first code language and fill the register code template with the description information to generate the register code file.

[0040] In some embodiments, the first generation module is configured to call the register document template using the first code language and analyze the field names in the register document template; find information associated with the field names in the register description information, and generate the description document by assigning values ​​to the field names using the information.

[0041] In some embodiments, the second generation module is configured to call the register code template using the first code language and analyze the variable names in the register code template; find information associated with the variable names in the description information of the register, and generate the code file by assigning values ​​to the variable names using the information.

[0042] In some embodiments, the second generation module is configured to generate register transfer level RTL code, verification code, software driver code, and verification stimulus code associated with the register.

[0043] In some embodiments, the first generation module is configured to generate a description document in at least one of the following formats: PDF document, HTML document, DOC document, or IP-XACT XML document.

[0044] Thirdly, embodiments of this disclosure provide a computer device, including: a processor; and a memory for storing processor-executable instructions; wherein the processor is configured to perform the method described in the first aspect.

[0045] Fourthly, embodiments of this disclosure provide a storage medium having a computer program stored thereon, which, when executed by a processor, implements the method described in the first aspect.

[0046] The technical solutions provided by the embodiments of this disclosure may include the following beneficial effects:

[0047] In this embodiment of the disclosure, after the computer device parses the register description file to obtain the description information, it generates the register description document by combining it with a preset register document template, and generates the code file of the associated register by combining it with a preset register code template. On the one hand, it can generate a one-stop solution including code and documentation in an automated way without relying on commercial EDA tools, which can effectively solve the register design-related needs and save manpower and time for chip development. On the other hand, if there are new register design needs in the future, the solution of this embodiment of the disclosure can facilitate secondary development and maintenance.

[0048] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0049] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this disclosure and, together with the specification, serve to illustrate the technical solutions of this disclosure.

[0050] Figure 1 This is a schematic diagram illustrating the implementation process of a method for generating a chip register design file according to an embodiment of the present disclosure.

[0051] Figure 2 An example diagram of a register description document in PDF format provided for embodiments of this disclosure;

[0052] Figure 3 An example diagram of a register HTML format description document provided for embodiments of this disclosure;

[0053] Figure 4 A flowchart illustrating a method for generating a chip register design file provided in this embodiment of the disclosure;

[0054] Figure 5 A schematic diagram of a device for generating chip register design files provided in this embodiment of the present disclosure;

[0055] Figure 6 This is a schematic diagram of the hardware entity of a computer device provided in an embodiment of this disclosure. Detailed Implementation

[0056] To make the objectives, technical solutions, and advantages of this disclosure clearer, the technical solutions of this disclosure are further described in detail below with reference to the accompanying drawings and embodiments. The described embodiments should not be regarded as limitations on this disclosure. All other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0057] The terms “first / second / third” used in this disclosure are merely to distinguish similar objects and do not represent a specific ordering of objects. It is understood that “first / second / third” may be interchanged in a specific order or sequence where permitted, so that the embodiments of this disclosure described herein can be implemented in an order other than that illustrated or described herein.

[0058] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. The terminology used herein is for descriptive purposes only and is not intended to limit the scope of this disclosure.

[0059] Currently, many chip design companies in the industry use IP-XACT XML format register function definition description files. IP-XACT is an IEEE (IEEE-1685) standard register definition format. The advantage of using IP-XACT to define register information is its seamless integration with many EDA tools, such as Synopsys' ralgen tool, Cadence's ireggen tool, and Mentor's Register Assistant tool. These tools can automatically generate UVM (Universal Verification Methodology) register model code for the corresponding module using IP-XACT XML format register description files as input. However, the disadvantages of IP-XACT XML format register information are poor readability and inconvenience for later modification, updates, and retrieval of register information. Most importantly, the aforementioned EDA tools cannot generate register design-related RTL (Register Transfer Level) code or register function documentation. Furthermore, using EDA tools requires corresponding licenses, such as commercial tool licenses.

[0060] It is evident that commercial EDA tools cannot adequately support the code and documentation requirements involved in register design. Furthermore, the learning curve, cost of the tools themselves, and the associated license fees are considerable, making the design of chip registers based on commercial EDA tools too limiting.

[0061] To address this, this disclosure provides a method for generating a chip register design file, which can be executed by a processor of a computer device. The computer device can refer to a server, laptop, tablet, or other device with data processing capabilities.

[0062] Figure 1 This is a schematic diagram illustrating the implementation flow of a method for generating a chip register design file according to an embodiment of this disclosure, such as... Figure 1 As shown, the method includes the following steps:

[0063] S11. Obtain the register description file and parse it to obtain the description information of the registers in the description file;

[0064] S12. Generate a description document for the register based on the register description information and the register document template;

[0065] S13. Generate a code file associated with the register based on the register description information and the register code template.

[0066] In this embodiment of the disclosure, the computer device obtains a description file of the registers, which is a file that is easy for users to edit and view, such as an Excel or Word document. The description file includes descriptive information about the registers, which may include: the register name, register comment, register address, offset address, register bit width, read / write permission type, initial value, and register field information, etc. The register field information includes the field name, field comment, field offset address, field read / write permission type, and field initial value, etc. Common read / write permission types include Read-Write (RW), Read-Only (RO), Write-Only (WO), Read-Clear (RC), Write-Clear (W1C), etc.

[0067] It should be noted that a chip may include one or more registers. The concatenation of one or more bits of a register is called a register field, and a register may be divided into one or more register fields. In the embodiments of this disclosure, the description file may include description information of one or more registers, and may also include description information of one or more register fields of a register.

[0068] In this embodiment of the disclosure, the computer device parses and obtains the description information of the registers in the description file. In one embodiment, the computer device searches for the key fields in the description file according to the pre-stored key fields, and obtains the content corresponding to the key fields in a known format, thereby establishing a mapping between the key fields and the content.

[0069] For example, Table 1 is a sample of a portion of the description file in Excel format, as shown in Table 1:

[0070] Table 1. Contents of the register description file

[0071]

[0072] In this context, “Register Name” is the name of the register, “Register Description” is the description of the register, “Register Address” is the address of the register, “Register Width” is the width of the register, “Register Access” is the read and write permissions of the register, and “Register Reset Value” is the initial value of the register.

[0073] In a typical Excel file, the content in the first row and each column represents a key field. In subsequent rows, the corresponding content is filled in based on the key fields of each column. Therefore, a computer can parse the file based on this known format and pre-stored key fields to obtain the mapping between the key fields and the content.

[0074] In another embodiment, the content of the description file can be parsed based on a deep learning model to establish a mapping between key fields and content, thereby obtaining the register description information. In this embodiment, the deep learning model can be obtained by training and parameter tuning networks such as Convolutional Neural Networks (CNN) and Deep Neural Networks (DNN) based on training sample data and label values. The training sample data includes different field names of registers and their description content; the label values ​​represent the correspondence between field names and description content. It should be noted that field names representing the same meaning in the training sample data can include different descriptive forms. For example, the name of a register can be expressed as "Register Name" or simply "Register Name"; similarly, register read / write permissions can be expressed as "Register Access" or simply "Register Permissions," and the corresponding read / write permission types can be expressed as "RW," "Read / Write," or "Readable / Writable."

[0075] Based on a trained deep learning model, the content of the description file is input into the deep learning model, and the model can obtain the description information of the registers. It is understood that, based on this method, there are fewer constraints on the layout format and description form of the content in the description file. Users do not need to edit the description file according to a fixed format. Therefore, the solution based on deep learning model parsing in this embodiment has higher flexibility and better universality.

[0076] In this embodiment of the disclosure, the parsed register description information can be stored in a computer device in the following format: [{'regName':'REG_HEAD','regDescription':'register header','regAddr':'0x00','regWidth':'32','regAccess':'RW','regResetVal':'0x0'}]. For example, 'regName':'REG_HEAD' is a mapping between a set of key fields and content.

[0077] In this embodiment of the disclosure, after parsing and obtaining the register description information, the computer device can generate a register description document by combining it with a preset register document template. The register document template can be a code file stored internally in the computer. The register document template includes common field names associated with the register description information, as well as a layout style for the register description information. The layout style includes the position of each field name, the position to be filled for the field content, and may also include the field name, the font, font size, font color, etc., but this embodiment of the disclosure does not impose any limitations.

[0078] It should be noted that, in the embodiments disclosed herein, the register document template is a template without specific register information, while the register description document is a document rendered and filled with register information. The register description document is a document saved in a file format, not a code file format.

[0079] In this embodiment of the disclosure, after parsing and obtaining the register description information, the computer device can also generate a code file associated with the register by combining it with a preset register code template. The register code template can be a code file stored internally in the computer. The register code template includes field names associated with the register description information, as well as a logical description of the register's function, such as the register's writable function, which includes writing data to the register. The register code template may also include functional verification code, such as determining whether the content stored in the register is consistent with the content written. Furthermore, the register code template may also include C / C++ model code and hardware / software simulation stimulus code, etc., which are not limited in this embodiment of the disclosure.

[0080] It should be noted that the preset register documentation templates and register code templates can be developed in advance by developers, for example, by collecting and analyzing the type requirements of register definitions and corresponding functional implementation requirements in chip design. The template library can encapsulate register-related common data structures and methods to the greatest extent possible, and the register documentation template library can encapsulate the document generation style to the greatest extent possible, thereby saving the workload of register development and improving the efficiency of register development. Furthermore, if the general requirements of registers are upgraded, developers can update and upgrade the register documentation templates and register code templates to meet the evolving needs of registers; in addition, if there are personalized requirements for register development, developers can also define their own required classes by extending, for example, the base class in the register code template, and add specific register information.

[0081] It is understood that in this embodiment of the disclosure, after the computer device parses the register description file to obtain the description information, it generates the register description document by combining it with a preset register document template, and generates the code file of the associated register by combining it with a preset register code template. On the one hand, it does not rely on commercial EDA tools and generates a one-stop solution including code and documentation in an automated way, which can effectively solve the register design-related needs and save manpower and time for chip development. On the other hand, if there are new register design needs in the future, the solution of this embodiment of the disclosure can facilitate secondary development and maintenance.

[0082] As mentioned above, in this embodiment of the disclosure, the description file can be in Excel format. Compared to the IP-XACT XML format description file, since IP-XACT XML is a standard format defined by IEEE, it is a format that does not support human editing, and its visualization effect is very poor for users if opened directly. Excel spreadsheet format is simpler for users to use than XML format. Therefore, it is understandable that choosing Excel format as the format of the register description file will have better readability and usability.

[0083] In some embodiments, obtaining the register description file and parsing the description information of the registers in the description file includes:

[0084] The description file is loaded using a first code language, and the description information of the registers in the description file is obtained by parsing.

[0085] The method further includes:

[0086] The register document template was generated using a second code language;

[0087] The step of generating a description document for the register based on the register's description information and a preset register document template includes:

[0088] The register document template is invoked using the first code language, and the register document template is filled with the description information to generate the description document of the register.

[0089] In this embodiment, the first code language can be Python, or other code languages ​​such as Ruby or Perl. Since the register design file generation method in this embodiment is a software-based approach, considering cross-platform portability, ease of use of the code language (e.g., memory management or standard library usage), and code scalability, Python can be selected as the first code language.

[0090] In this embodiment, the second code language may include Java, C / C++, etc. Considering the widespread use of Python and Java, and Java's cross-platform advantage (allowing it to run on different operating systems), this embodiment may also utilize Java to generate a register document template, use Python to load and parse the description file to obtain description information, and use Python to call the Java register document template to fill the register document template with the description information to generate the register description document.

[0091] It is understood that, in this embodiment of the disclosure, by combining excellent software development concepts, on the one hand, registers are modeled by software to generate register document templates, which facilitates subsequent maintenance and upgrades; on the other hand, different code languages ​​are used to execute their respective functions, and the computer device uses the first code language to make cross-platform interface calls (i.e., call the register document template generated by the second code language), so that different functional modules are decoupled from each other, which can reduce the technical restrictions on developers, facilitate collaborative development, and make the chip register design file generation method provided by this embodiment of the disclosure more widely applicable.

[0092] In some embodiments, the method further includes:

[0093] The register code template is generated using a third-party code language;

[0094] The step of generating a code file associated with the register based on the register's description information and a preset register code template includes:

[0095] The register code template is invoked using the first code language, and the register code file is generated by filling the register code template with the description information.

[0096] In this embodiment, the third code language may include code template languages ​​such as Mako and Jinja2, and may also include hardware description languages ​​such as Verilog. Both Mako and Jinja2 are Python-based template engines. Considering that Mako supports more code template language features, this embodiment may use Python as the first code language and Mako as the third code language. A register code template is generated using Mako, and Python is used to call the register document template generated based on Mako to fill the register code template with description information and generate the register code file.

[0097] It is understood that, in this embodiment of the disclosure, by combining excellent software development concepts, on the one hand, registers are modeled by software to generate register code templates, which facilitates subsequent maintenance and upgrades; on the other hand, different code languages ​​each perform their own functions, and computer devices use the first code language to make cross-platform interface calls (i.e., call the register code templates generated by the third code language), so that different functional modules are decoupled from each other, reducing technical restrictions on developers, facilitating collaborative development, and making the chip register design file generation method provided in this embodiment of the disclosure more widely applicable.

[0098] In some embodiments, the step of using the first code language to call the register document template and filling the register document template with the description information to generate the description document of the register includes:

[0099] The register document template is invoked using the first code language, and the field names in the register document template are analyzed.

[0100] The description document is generated by finding the information associated with the field name in the description information of the register and assigning a value to the field name using the information.

[0101] In this embodiment of the disclosure, after the computer device calls the register document template using the first coding language, it analyzes the field names in the register document template. For example, the computer device finds field names such as "Address", "Register Name", and "Description" in the register document template. It should be noted that the field names in the register document template are not limited to English characters; they can be described in any language, such as Chinese. This embodiment of the disclosure does not impose any restrictions.

[0102] After analyzing and obtaining the field names in the register document template, the computer device can query the information associated with the field names in the register's description information, assign values ​​to the field names using this information, and then generate the description document. It should be noted that when querying the description information for information associated with the field names, the computer device prioritizes finding the key fields corresponding to the field names and uses the content corresponding to these key fields to assign values ​​to the field names.

[0103] For example, for the "Address" field in the register document template, the computer device first looks up the key field "regAddr" corresponding to the "Address" field in the description information, and then uses the content '0x00' corresponding to 'regAddr' to assign a value to the "Address" field.

[0104] In some embodiments, the computer device may pre-store the mapping relationship between field names in the register document template and key fields in the description information, and based on the mapping relationship, the computer device can conveniently query the information associated with the field name and assign values.

[0105] In other embodiments, the computer device also includes a semantic analysis model. This model allows the computer device to identify the semantics of field names in the register document template and the semantics of key fields in the descriptive information, and to establish a mapping between field names and key fields whose semantic similarity is greater than a preset similarity threshold. Subsequently, the computer device can query and assign values ​​to information associated with the field names based on this mapping.

[0106] It should be noted that, in this embodiment of the disclosure, the semantic analysis model is a model capable of extracting important tags based on text content. For example, if the text content is "address of a register" or "address," then the extracted tag is "address." This semantic analysis model can also be obtained based on training a neural network model, for example, by training and tuning a network such as a CNN based on training sample data and tag values. The training sample data includes different text contents, and the tag values ​​are the tags corresponding to the text contents.

[0107] Understandably, the semantic analysis model-based approach eliminates the need to pre-store the mapping relationship between field names in the register document template and key fields in the description information. This reduces the constraints on developers, facilitates collaborative development between different teams, and makes the chip register design file generation method provided in this disclosure embodiment more intelligent.

[0108] In this embodiment of the disclosure, the computer device analyzes the field names in the register document template, and then passes the parsed description information to the corresponding field names in the register document template to render and generate a document. The solution is simple and effective.

[0109] In some embodiments, the step of calling the register code template using the first code language and filling the register code template with the description information to generate the register code file includes:

[0110] The register code template is invoked using the first code language, and the variable names in the register code template are analyzed.

[0111] The code file is generated by finding the information associated with the variable name in the description information of the register, assigning a value to the variable name using the information.

[0112] In this embodiment of the disclosure, after the computer device calls the register code template using the first coding language, it analyzes the variable names in the register code template. For example, the computer device finds variable names such as "fieldName", "width", and "offset" in the register code template. Then, it queries the description information of the register for information associated with the variable names, assigns values ​​to the variable names using the information, and generates a code file. It should be noted that when querying the description information for information associated with the variable names, the computer device first searches for key fields corresponding to the variable names in the description information and assigns values ​​to the variable names using the content corresponding to the key fields.

[0113] For example, for the variable name "width" in the register code template, the computer device first looks up the key field "Register Width" corresponding to the variable name "width" in the description information, and then uses the content '32' corresponding to 'Register Width' to assign a value to the variable name "width".

[0114] It should be noted that computer devices can also pre-store the mapping relationship between variable names in register code templates and key fields in description information. Based on this mapping relationship, it is convenient for computer devices to query information associated with variable names and assign values.

[0115] In this embodiment of the disclosure, the computer device analyzes the variable names in the register code template and generates a code file based on the parsed description information passed to the corresponding variable names in the register code template. The solution is simple and effective.

[0116] In some embodiments, generating the code file associated with the register includes:

[0117] Generate register-transfer level RTL code, verification code, software driver code, and verification stimulus code associated with the aforementioned registers.

[0118] In embodiments of this disclosure, the code file generated by the computer device based on the register description information and register code template includes RTL code, verification code, software driver code, and verification stimulus code, and may also include RTL interrupt code. The RTL code is a register-transfer level code description of the specific circuit implementation of the register, used to describe the function of the register itself and the logical functions between registers; the verification code is used to verify the function of the register, such as UVM model code or SV verification code; the software driver code can be C / C++ driver code (i.e., C / C++ model code); the verification stimulus code can be hardware / software simulation verification stimulus code, which is used to stimulate the aforementioned UVM model and register respectively, comparing whether the output value of the UVM model and the output value of the register are consistent, to verify whether the function of the register is correct.

[0119] In the embodiments of this disclosure, the code file for the associated register may include a Verilog file, a Python file, a VHDL file, a C / C++ file, etc., and this disclosure does not impose any limitations.

[0120] It is understood that, in the embodiments of this disclosure, the computer device generates RTL code, verification code, software driver code, and verification stimulus code based on the register description information and the preset register code template. This provides a complete solution from register requirement definition to automated generation of design code and then to automated generation of functional verification stimulus code. Compared with the solution based on EDA tools that can only automatically generate UVM register model code, the solution provided by the embodiments of this disclosure has a higher degree of automation and can effectively solve the needs of register design verification, saving manpower and time for chip development.

[0121] In some embodiments, generating the description document for the register includes:

[0122] Generate a description document in at least one of the following formats: PDF document, HTML document, DOC document, or IP-XACT XML document.

[0123] In this embodiment of the disclosure, the computer device can support the generation of documents in multiple formats. Figure 2 Example diagram of a register PDF format description document provided for embodiments of this disclosure; Figure 3 This is an example diagram of a register HTML format description document provided for embodiments of this disclosure. For example... Figure 2 and Figure 3As shown, the description documents all include the register's address, name, and description information. For the same register, the content in the description documents of different formats is the same, only the layout style may be different.

[0124] It should be noted that in this embodiment of the disclosure, the computer device also supports the generation of IP-XACT XML documents, which makes the generated description documents compatible with third-party EDA tools. This reduces the trouble caused by the inability to import register documents generated by self-developed tools into third-party EDA tools, thus requiring secondary development and conversion.

[0125] It is understandable that computer devices support the generation of documents in multiple formats. On the one hand, compared with the solution based on EDA tools that only supports the generation of UVM model code and cannot automatically generate register description documents, the solution provided by the embodiments of this disclosure has a higher degree of automation. On the other hand, the embodiments of this disclosure also support IP-XACT XML format documents, which are also easy to access EDA tools and can accelerate the speed of chip function development.

[0126] Figure 4 This is a flowchart illustrating a method for generating a chip register design file according to an embodiment of the present disclosure. Figure 4 As shown, it includes the following steps:

[0127] S21. Obtain the register function requirement table in Excel format;

[0128] In this embodiment of the disclosure, the register function requirement table in Excel format is a description file of the registers obtained by the computer device.

[0129] S22. Register Function Analysis;

[0130] In this embodiment of the disclosure, the computer device performs register function parsing to obtain the descriptive information of the registers in the register function requirement table.

[0131] S23. Establish a register information database;

[0132] In this embodiment of the disclosure, the computer device establishes a register information database, that is, it saves the parsed descriptive information according to the mapping between key fields and content.

[0133] S24a-S24f, Generate Register RTL Design Code, Generate Register SV / UVM Verification Code, Generate Register C / C++ Model Code, Generate Register Hardware and Software Simulation Verification Stimulus Code, Generate Register DOC / PDF / HTML Documents, Generate Register IP-XACT Information Files.

[0134] In this embodiment of the disclosure, the RTL design code, register SV / UVM verification code, C / C++ model code, and register hardware and software simulation verification stimulus code are all code files associated with the registers; the DOC / PDF / HTML documents and the register IP-XACT information file are all description documents of the registers.

[0135] In this embodiment of the disclosure, after the computer device parses the register functional requirements table to obtain register information, it automatically generates a description document of the register and a code file of the associated register. On the one hand, it does not rely on commercial EDA tools and generates a one-stop solution including code and documentation in an automated manner, which can effectively solve the register design-related requirements and save manpower and time for chip development. On the other hand, if there are new register design requirements in the future, the solution of this embodiment of the disclosure can facilitate secondary development and maintenance.

[0136] Figure 5 This is a schematic diagram of the structure of a chip register design file generation device provided in an embodiment of the present disclosure, as shown below. Figure 5 As shown, the chip register design file generation device 500 includes:

[0137] The acquisition module 501 is configured to acquire the description file of the registers and parse the description information of the registers in the description file;

[0138] The first generation module 502 is configured to generate a description document for the register based on the description information of the register and a preset register document template.

[0139] The second generation module 503 is configured to generate a code file associated with the register based on the description information of the register and a preset register code template.

[0140] In some embodiments, the acquisition module 501 is configured to load the description file using a first code language and parse it to obtain the description information of the registers in the description file;

[0141] The device further includes:

[0142] The third generation module is configured to generate the register document template using a second code language;

[0143] The first generation module 502 is configured to call the register document template using the first code language and fill the register document template with the description information to generate the description document of the register.

[0144] In some embodiments, the apparatus further includes:

[0145] The fourth generation module is configured to generate the register code template using a third code language;

[0146] The second generation module 503 is configured to call the register code template using the first code language and fill the register code template with the description information to generate the register code file.

[0147] In some embodiments, the first generation module 502 is configured to call the register document template using the first code language and analyze the field names in the register document template; find information associated with the field names in the description information of the register, and generate the description document by assigning values ​​to the field names with the information.

[0148] In some embodiments, the second generation module 503 is configured to call the register code template using the first code language and analyze the variable names in the register code template; find information associated with the variable names in the description information of the register, and generate the code file by assigning values ​​to the variable names using the information.

[0149] In some embodiments, the second generation module 503 is configured to generate register transfer level RTL code, verification code, software driver code, and verification stimulus code associated with the register.

[0150] In some embodiments, the first generation module 502 is configured to generate a description document in at least one of the following formats: PDF document, HTML document, DOC document, IP-XACT XML document.

[0151] The descriptions of the apparatus embodiments above are similar to those of the method embodiments above, and have similar beneficial effects. In some embodiments, the functions or modules included in the apparatus provided by this disclosure can be used to perform the methods described in the method embodiments above. For technical details not disclosed in the apparatus embodiments of this disclosure, please refer to the descriptions of the method embodiments of this disclosure for understanding.

[0152] It should be noted that, in the embodiments of this disclosure, if the above-described method for generating chip register design files is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the embodiments of this disclosure, or the part that contributes to related technologies, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this disclosure. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), magnetic disks, or optical disks. Thus, the embodiments of this disclosure are not limited to any specific hardware, software, or firmware, or any combination of hardware, software, and firmware.

[0153] This disclosure provides a computer device including a memory and a processor. The memory stores a computer program that can run on the processor. When the processor executes the program, it implements some or all of the steps in the above-described method.

[0154] This disclosure provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements some or all of the steps in the above-described method. The computer-readable storage medium may be transient or non-transient.

[0155] This disclosure provides a computer program including computer-readable code, wherein when the computer-readable code is executed in a computer device, a processor in the computer device performs some or all of the steps in the above-described method.

[0156] This disclosure provides a computer program product, which includes a non-transitory computer-readable storage medium storing a computer program. When the computer program is read and executed by a computer, it implements some or all of the steps in the above-described method. This computer program product can be implemented specifically through hardware, software, or a combination thereof. In some embodiments, the computer program product is specifically embodied as a computer storage medium; in other embodiments, the computer program product is specifically embodied as a software product, such as a software development kit (SDK), etc.

[0157] It should be noted that the descriptions of the various embodiments above tend to emphasize the differences between them, while their similarities or commonalities can be referenced interchangeably. The descriptions of the above embodiments of the device, storage medium, computer program, and computer program product are similar to the descriptions of the above method embodiments and have similar beneficial effects. For technical details not disclosed in the embodiments of the device, storage medium, computer program, and computer program product of this disclosure, please refer to the descriptions of the method embodiments of this disclosure for understanding.

[0158] Figure 6 This is a schematic diagram of the hardware entity of a computer device provided in an embodiment of the present disclosure, such as... Figure 6 As shown, the hardware entity of the computer device 600 includes: a processor 601, a communication interface 602, and a memory 603, wherein:

[0159] Processor 601 typically controls the overall operation of computer device 600.

[0160] Communication interface 602 enables computer devices to communicate with other terminals or servers via a network.

[0161] The memory 603 is configured to store instructions and applications executable by the processor 601, and can also cache data to be processed or already processed (e.g., image data, audio data, voice communication data, and video communication data) of the processor 601 and various modules in the computer device 600. It can be implemented using flash memory or random access memory (RAM). Data transfer between the processor 601, the communication interface 602, and the memory 603 can be performed via bus 604.

[0162] It should be understood that the phrase "an embodiment" or "one embodiment" throughout the specification means that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this disclosure. Therefore, "in one embodiment" or "one embodiment" appearing throughout the specification does not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. Moreover, in the various embodiments of this disclosure, the sequence numbers of the above steps / processes do not imply a sequential order of execution; the execution order of each step / process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this disclosure. The sequence numbers of the above embodiments of this disclosure are merely descriptive and do not represent the superiority or inferiority of the embodiments.

[0163] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0164] In the several embodiments provided in this disclosure, it should be understood that the disclosed devices and methods can be implemented in other ways. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and in actual implementation, there may be other division methods, such as: multiple units or components may be combined, or integrated into another system, or some features may be ignored or not executed. In addition, the coupling, direct coupling, or communication connection between the various components shown or discussed may be through some interfaces, and the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0165] The units described above as separate components may or may not be physically separate. The components shown as units may or may not be physical units. They may be located in one place or distributed across multiple network units. Some or all of the units may be selected to achieve the purpose of this embodiment according to actual needs.

[0166] In addition, each functional unit in the various embodiments of this disclosure can be integrated into one processing unit, or each unit can be a separate unit, or two or more units can be integrated into one unit; the integrated unit can be implemented in hardware or in the form of hardware plus software functional units.

[0167] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as mobile storage devices, ROMs, magnetic disks, or optical disks.

[0168] Alternatively, if the integrated units described above are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this disclosure, or the part that contributes to related technologies, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this disclosure. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, magnetic disks, or optical disks.

[0169] The above description is merely an embodiment of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure.

Claims

1. A method for generating a chip register design file, characterized in that, The method includes: The description file of the register is loaded using a first code language, and the contents of the description file are parsed based on a deep learning model to establish a mapping between key fields and contents, thereby obtaining the description information of the register in the description file; the description file is in a file format that can be edited and viewed by the user; the description file is in Excel or Word format. The register document template is invoked using the first code language, and the semantics of the field names in the register document template and the semantics of the key fields in the description information are identified based on a semantic analysis model. A mapping is established between field names and key fields with semantic similarity greater than a preset similarity threshold. Based on the mapping, information associated with the field names is queried and assigned values ​​to generate the description document of the register. The register document template is generated using a second code language. The generation of the description document of the register includes generating a description document in IP-XACT XML format. The register code template is invoked using the first code language, and the variable names in the register code template are analyzed; information associated with the variable names is found in the description information of the registers, and the variable names are assigned values ​​using the information to generate a code file associated with the registers; the register code template is generated using a third code language. The register document template and the register code template are both developed by collecting and analyzing the type requirements of register definitions and the corresponding functional implementation requirements in chip design.

2. The method according to claim 1, characterized in that, The generation of the code file associated with the register includes: Generate register-transfer level RTL code, verification code, software driver code, and verification stimulus code associated with the aforementioned registers.

3. The method according to claim 1, characterized in that, The description document for generating the register also includes: Generate a description document in at least one of the following formats: PDF document, HTML document, or DOC document.

4. A device for generating chip register design files, characterized in that, The device is configured to perform operations using a first coding language, including: The acquisition module is configured to load the register description file using a first coding language and parse the contents of the description file based on a deep learning model, thereby establishing a mapping between key fields and content to obtain the description information of the register in the description file; the description file is in a file format that can be edited and viewed by the user; the description file is in Excel or Word format. The first generation module is configured to call a register document template using the first code language, and identify the semantics of field names in the register document template and the semantics of key fields in the description information based on a semantic analysis model, and establish a mapping between field names and key fields with semantic similarity greater than a preset similarity threshold; query information associated with the field names based on the mapping and assign values ​​to generate a description document for the register; the register document template is generated using a second code language; wherein, generating the description document for the register includes generating a description document in IP-XACT XML format; The second generation module is configured to call the register code template using the first code language, analyze the variable names in the register code template, find the information associated with the variable names in the description information of the registers, and generate a code file associated with the registers after assigning values ​​to the variable names using the information; the register code template is generated using a third code language; wherein, both the register document template and the register code template are developed by collecting and analyzing the type requirements of register definitions and the corresponding functional implementation requirements in chip design.

5. A computer device comprising a memory and a processor, the memory storing a computer program executable on the processor, characterized in that, When the processor executes the program, it implements the steps of the method according to any one of claims 1 to 3.

6. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the computer program implements the steps of the method according to any one of claims 1 to 3.

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