Power semiconductor device package structure

Abstract

The application provides a power semiconductor device packaging structure, which comprises, from top to bottom, a tube cover, a thyristor chip, a diode chip, a GCT chip and a tube base, wherein a tube wall is arranged between the tube cover and the tube base, the thyristor chip, the diode chip and the GCT chip are both provided with molybdenum sheets, a first copper bar is arranged on the molybdenum sheet on the upper side of the thyristor chip, a second copper bar is arranged on the molybdenum sheet on the upper side of the diode chip, a third copper bar is arranged on the molybdenum sheet on the upper side of the GCT chip, one end of the first copper bar and one end of the third copper bar extend from the same side of the tube wall, a gate pin is arranged on the thyristor chip, and a gate line connected with the gate pin and one end of the second copper bar extend from the other side of the tube wall. The power semiconductor device packaging structure combines the thyristor chip, the diode chip and the GCT chip for packaging, so that the volume of the whole module is greatly reduced.

Description

Technical Field

[0001] This invention relates to the field of multiple power semiconductor chip combination packaging structure technology, and specifically to a power semiconductor device packaging structure. Background Technology

[0002] For the combined packaging structure of multiple power semiconductor chips, in the traditional structure, the electrical circuit consists of three independent devices (IGCT, thyristor and diode) fastened together by structural components and then connected by copper busbars. The resulting module is large in size and has a long circuit. The stray inductance of the entire system is large, which reduces the turn-off capability of the IGCT device. Summary of the Invention

[0003] The technical problem to be solved by the present invention is to overcome the shortcomings of the prior art and provide a power semiconductor device packaging structure that packages three chips together, thereby greatly reducing the size of the entire module.

[0004] To solve the above-mentioned technical problems, the technical solution proposed by this invention is as follows:

[0005] A power semiconductor device packaging structure includes a tube cover, a thyristor chip, a diode chip, a GCT chip, and a tube socket arranged sequentially from top to bottom. A tube wall is provided between the tube cover and the tube socket. Molybdenum sheets are provided on both sides of the thyristor chip, the diode chip, and the GCT chip. A first copper busbar is provided on the molybdenum sheet above the thyristor chip, a second copper busbar is provided on the molybdenum sheet above the diode chip, and a third copper busbar is provided on the molybdenum sheet above the GCT chip. One end of the first copper busbar and the third copper busbar extends from the same side of the tube wall. A gate pin is provided on the thyristor chip, and a gate wire connected to the gate pin and one end of the second copper busbar extend from the other side of the tube wall.

[0006] According to the power semiconductor device packaging structure of the present invention, the thyristor chip, diode chip and GCT chip are packaged together, which greatly reduces the size of the entire module.

[0007] The above technical solution can be further improved as described below.

[0008] In a preferred embodiment of the power semiconductor device packaging structure according to the present invention, the tube wall comprises two sets of semi-annular structures.

[0009] The power semiconductor device packaging structure of the present invention abandons the traditional magnetic ring tube wall and replaces it with two sets of semi-ring tube walls, which facilitates the installation of copper busbars connecting chips, as well as the assembly and adjustment of other internal structures.

[0010] Specifically, in a preferred embodiment, a copper busbar outlet groove and a gate wire groove are provided on the cross-section of the pipe wall.

[0011] By machining copper busbar outlet grooves and gate wire grooves on the cross-section of the semi-ring structure, the entire packaging structure is easy to assemble and more stable and reliable.

[0012] Furthermore, in a preferred embodiment, an annular groove is provided on the outer surface of the pipe wall.

[0013] By machining annular grooves on the outer surface, the creepage distance can be effectively increased.

[0014] Furthermore, in a preferred embodiment, the ends of the first and third copper busbars extending from the tube wall are connected to each other to form a loop.

[0015] The above connection loop minimizes the path, greatly reducing stray inductance compared to traditional structures.

[0016] Furthermore, in a preferred embodiment, the second copper busbar is connected to the bottom of the tube seat to form a circuit.

[0017] The loop formed by the connection between the second copper busbar and the bottom of the tube socket also narrows the loop path and reduces stray inductance.

[0018] Specifically, in a preferred embodiment, the pipe wall is made of epoxy material.

[0019] Using epoxy material to make the pipe wall ensures good insulation, heat resistance and corrosion resistance.

[0020] Furthermore, in a preferred embodiment, potting is performed within the encapsulation structure.

[0021] After the module is packaged, it is potted with glue to seal it. This not only ensures the module's airtightness but also maintains a certain pressure at the top and bottom of the module, ensuring good contact between the internal chips and other structures.

[0022] Specifically, in a preferred embodiment, the first copper busbar, the second copper busbar, and the third copper busbar are all positioned and connected to the molybdenum sheet by positioning pins, and the first copper busbar and the molybdenum sheet located on the upper side of the thyristor chip are provided with through holes for arranging gate pins.

[0023] The aforementioned method of fixing the copper busbar and the gate pin are simple, stable, reliable, and easy to assemble.

[0024] Specifically, in a preferred embodiment, both ends of the pipe wall are connected to the pipe seat and the pipe cap respectively by screws.

[0025] The threaded connection between the pipe cap, pipe seat, and pipe wall is simple, compact, and easy to assemble.

[0026] Compared with the prior art, the advantages of the present invention are: by combining and packaging the thyristor chip, diode chip and GCT chip together, the size of the entire module is greatly reduced. Attached Figure Description

[0027] The invention will now be described in more detail with reference to embodiments and the accompanying drawings.

[0028] Figure 1 The schematic diagram illustrates the electrical circuit of a power semiconductor device package structure according to an embodiment of the present invention;

[0029] Figure 2 The schematic diagram illustrates the overall structure of the power semiconductor device packaging structure according to an embodiment of the present invention;

[0030] Figure 3 The schematic diagram shows the main view structure of the pipe wall in an embodiment of the present invention;

[0031] Figure 4 The schematic diagram shows the top view of the pipe wall in an embodiment of the present invention.

[0032] In the accompanying drawings, the same parts use the same reference numerals. The drawings are not drawn to scale. Detailed Implementation

[0033] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments, but this does not limit the scope of protection of the present invention.

[0034] Figure 1 The diagram schematically illustrates the electrical circuit of a power semiconductor device package structure 10 according to an embodiment of the present invention. Figure 2 The schematic diagram shows the overall structure of the power semiconductor device package structure 10 according to an embodiment of the present invention. Figure 3 The schematic diagram shows the main view structure of the pipe wall 6 in an embodiment of the present invention. Figure 4 The schematic diagram shows the top view of the pipe wall 6 in an embodiment of the present invention.

[0035] like Figure 2As shown, the power semiconductor device packaging structure 10 of this embodiment includes a tube cover 1, a thyristor chip 2, a diode chip 3, a GCT chip 4, and a tube socket 5 arranged sequentially from top to bottom. A tube wall 6 is provided between the tube cover 1 and the tube socket 5. Molybdenum sheets 7 are provided on both sides of the thyristor chip 2, the diode chip 3, and the GCT chip 4. A first copper busbar 8 is provided on the molybdenum sheet 7 located on the upper side of the thyristor chip 2. A second copper busbar 9 is provided on the molybdenum sheet 7 located on the upper side of the diode chip 3. A third copper busbar 101 is provided on the molybdenum sheet 7 located on the upper side of the GCT chip 4. One end of the first copper busbar 8 and the third copper busbar 101 extends from the same side of the tube wall 6. A gate pin 102 is provided on the thyristor chip 2. A gate line 103 connected to the gate pin 102 and one end of the second copper busbar 9 extend from the other side of the tube wall 6.

[0036] According to the power semiconductor device packaging structure of the present invention, the thyristor chip, diode chip and GCT chip are packaged together, which greatly reduces the size of the entire module.

[0037] like Figures 1 to 3 As shown, specifically in this embodiment, the tube wall 6 includes two sets of semi-annular structures. The power semiconductor device packaging structure of the present invention abandons the traditional magnetic ring tube wall and replaces it with a tube wall of two sets of semi-annular structures, facilitating the installation of copper busbars connecting chips, as well as the assembly and adjustment of other internal structures.

[0038] like Figure 3 As shown, specifically in this embodiment, a copper busbar outlet groove 61 and a gate wire groove 62 are provided on the cross-section of the tube wall 6. By machining the copper busbar outlet groove and the gate wire groove on the cross-section of the semi-annular structure, the entire packaging structure is easy to assemble and the packaging structure is more stable and reliable. Furthermore, in this embodiment, an annular groove 63 is provided on the outer side of the tube wall 6. By machining the annular groove on the outer side, the creepage distance can be effectively increased.

[0039] like Figure 2 As shown, further, in this embodiment, the ends of the first copper busbar 8 and the third copper busbar 101 extending from the pipe wall 6 are connected to each other to form a loop, that is... Figure 1 Ls1 in the above-mentioned connection loop minimizes the path and greatly reduces stray inductance compared to traditional structures. Furthermore, in this embodiment, the second copper busbar 9 is connected to the bottom of the tube socket 5 to form a loop, i.e. Figure 1 Ls2 in the middle. The loop formed by the connection between the second copper busbar and the bottom of the tube socket also narrows the loop path and reduces stray inductance. Specifically, as Figure 1 As shown, a is the thyristor cathode, b is the connection point between the thyristor anode and the diode cathode, c is the connection point between the diode anode and the IGCT anode, and d is the IGCT cathode.

[0040] Specifically, in this embodiment, the tube wall 6 is made of epoxy material. Using epoxy material for the tube wall ensures good insulation, heat resistance, and corrosion resistance. Furthermore, in this embodiment, the encapsulation structure 10 undergoes potting treatment. After the module is encapsulated, the entire module is potted to seal it, ensuring both the module's airtightness and maintaining a certain pressure at both ends, resulting in good contact between the internal chips and other structures.

[0041] like Figure 2 As shown, specifically in this embodiment, the first copper busbar 8, the second copper busbar 9, and the third copper busbar 101 are all positioned and connected to the molybdenum sheet 7 via positioning pins. Both the first copper busbar 8 and the molybdenum sheet 7 located on the upper side of the thyristor chip 2 are provided with through holes for arranging the gate pin 102. The aforementioned method of fixing the copper busbars and the gate pins is simple, stable, reliable, and easy to assemble. Specifically, blind holes are opened on the three identical molybdenum sheets 7 in the middle section, and through holes are opened in the center of the second copper busbar 9 and the third copper busbar 101. The diameter of the through holes is the same as the diameter of the blind holes in the molybdenum sheets 7, and the diameter of the through holes matches the outer diameter of the gate pins. The copper busbars extend out through copper busbar outlet grooves on the tube wall and connect to the outside.

[0042] like Figure 1 and Figure 3 As shown, specifically in this embodiment, both ends of the tube wall 6 are connected to the tube seat 5 and the tube cap 1 respectively by screws. The threaded connection between the tube cap, tube seat, and tube wall is simple, compact, and easy to assemble. Specifically, threaded holes 64 are evenly spaced along the circumference of the tube wall 6. Specifically, in this embodiment, the tube cap 1 adopts an existing prototype of a thyristor device tube cap, and through holes are machined on the skirt of the tube cap 1. The positions of the through holes correspond to the positions of the threaded holes 64 on the tube wall 6. During assembly, screws are used to fasten the tube seat 5, tube wall 6, and tube cap 1 together. The tube seat 5 adopts an existing mature tube seat structure for IGCT device packaging, eliminating the need for the original upper magnetic ring during the manufacturing process.

[0043] As can be seen from the above embodiments, the power semiconductor device packaging structure of the present invention combines the thyristor chip, diode chip and GCT chip into a single package, which greatly reduces the size of the entire module.

[0044] Although the invention has been described with reference to preferred embodiments, various modifications can be made and components can be replaced with equivalents without departing from the scope of the invention. In particular, the technical features mentioned in the various embodiments can be combined in any manner as long as there is no structural conflict. The invention is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A power semiconductor device packaging structure, characterized in that, It includes, from top to bottom, a tube cap, a thyristor chip, a diode chip, a GCT chip, and a tube socket; among which... A pipe wall is provided between the pipe cover and the pipe seat; the pipe wall includes two sets of semi-annular structures; a copper busbar outlet groove and a gate wire groove are provided on the cross-section of the pipe wall; Molybdenum sheets are provided on both sides of the thyristor chip, the diode chip, and the GCT chip. A first copper busbar is provided on the molybdenum sheet on the upper side of the thyristor chip, a second copper busbar is provided on the molybdenum sheet on the upper side of the diode chip, and a third copper busbar is provided on the molybdenum sheet on the upper side of the GCT chip. One end of the first copper busbar and the third copper busbar extends from the same side of the tube wall. The thyristor chip is provided with a gate pin, and the gate line connected to the gate pin and one end of the second copper busbar extend from the other side of the tube wall. The ends of the first and third copper busbars extending from the tube wall are connected to each other to form a loop; the second copper busbar is connected to the bottom of the tube seat to form a loop. The first copper busbar, the second copper busbar, and the third copper busbar are all positioned and connected to the molybdenum sheet via positioning pins; the first copper busbar and the molybdenum sheet located on the upper side of the thyristor chip are both provided with through holes for arranging the gate pins; Both ends of the pipe wall are connected to the pipe seat and the pipe cap respectively by screws.

2. The power semiconductor device packaging structure according to claim 1, characterized in that, The outer surface of the pipe wall is provided with an annular groove.

3. The power semiconductor device packaging structure according to claim 1, characterized in that, The pipe wall is made of epoxy material.

4. The power semiconductor device packaging structure according to claim 1, characterized in that, The encapsulation structure is potted with adhesive.

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