Display device

Abstract

According to an aspect of the present disclosure, a display device includes a plurality of substrates arranged in a plurality of subpixels and each constituted by one of a transparent conductive oxide layer or an oxide semiconductor layer; a plurality of transistors each arranged on the plurality of substrates and each provided in the plurality of subpixels; a plurality of data lines extending in a column direction between the plurality of subpixels and configured to transmit a data voltage to the plurality of subpixels; and a plurality of light emitting elements each arranged in the plurality of subpixels and electrically connected to the plurality of transistors, wherein the plurality of substrates are arranged to be spaced apart from each other, and wherein the plurality of data lines are arranged in a region in which the plurality of substrates are spaced apart from each other.

Description

[0001] Cross-references to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2021-0117763, filed on September 3, 2021, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. Technical Field

[0003] This disclosure relates to display devices, and more specifically, to display devices that do not use plastic substrates, thereby improving moisture transport characteristics and reducing parasitic capacitance. Background Technology

[0004] As display devices used in computer monitors, televisions, mobile phones, etc., there are organic light-emitting displays (OLEDs) that are configured to emit light independently and liquid crystal displays (LCDs) that require a separate light source.

[0005] The applications of display devices have diversified from computer monitors and televisions to personal mobile devices, and research is underway on display devices with wide display areas and reduced size and weight.

[0006] In addition, flexible display devices have recently attracted attention as the next generation of display devices. These flexible display devices are made by forming display elements, lines, etc. on a substrate made of flexible plastic material, and therefore can even display images by folding or rolling. Summary of the Invention

[0007] The purpose of this disclosure is to provide a display device that uses a substrate configured as one of a transparent conductive oxide layer and an oxide semiconductor layer, rather than a plastic substrate.

[0008] Another objective of this disclosure is to provide a display device that minimizes the penetration of moisture and oxygen.

[0009] Another objective of this disclosure is to provide a display device that simplifies the process and reduces manufacturing costs by removing the plastic substrate.

[0010] Another objective of this disclosure is to provide a display device that minimizes noise by reducing the parasitic capacitance applied to signal lines used to transmit AC voltage.

[0011] Another objective of this disclosure is to provide a display device that can operate stably by increasing the capacity of the storage capacitor.

[0012] The purpose of this disclosure is not limited to the purposes mentioned above, and other purposes not mentioned above will be clearly understood by those skilled in the art from the following description.

[0013] According to one aspect of this disclosure, a display device includes: a plurality of substrates disposed in a plurality of sub-pixels and formed of one of a transparent conducting oxide layer or an oxide semiconductor layer; a plurality of transistors disposed on the plurality of substrates and disposed in the plurality of sub-pixels; a plurality of data lines extending in a column direction between the plurality of sub-pixels and configured to transmit data voltage to the plurality of sub-pixels; and a plurality of light-emitting elements disposed in the plurality of sub-pixels and electrically connected to the plurality of transistors, wherein the plurality of substrates are arranged to be spaced apart from each other, and wherein the plurality of data lines are arranged in the regions where the plurality of substrates are spaced apart from each other.

[0014] According to another aspect of this disclosure, a display device includes: a plurality of substrates formed of one of a transparent conductive oxide layer or an oxide semiconductor layer, and having pixel regions in which a plurality of sub-pixels are disposed; a plurality of transistors electrically connected to the plurality of sub-pixels respectively; a plurality of signal lines extending in a column direction between the plurality of sub-pixels and configured to transmit an alternating current voltage; and a plurality of light-emitting elements disposed in the plurality of sub-pixels and electrically connected to the plurality of transistors, wherein the plurality of substrates are arranged to be spaced apart from each other, and wherein the plurality of signal lines are arranged in the regions in which the plurality of substrates are spaced apart from each other.

[0015] Further details of exemplary embodiments are included in the detailed description and accompanying drawings.

[0016] According to this disclosure, moisture permeability can be easily controlled by using a transparent conductive oxide layer or an oxide semiconductor layer as the substrate of the display device.

[0017] According to this disclosure, the flexibility of a display device can be improved by using a thin-film transparent conductive oxide layer or a thin-film oxide semiconductor layer as the substrate of the display device.

[0018] According to this disclosure, a thin-film transparent conductive oxide layer or a thin-film oxide semiconductor layer is used as the substrate of the display device. Therefore, stress occurring when the display device is bent or rolled can be reduced, thereby reducing cracks in the display device.

[0019] According to this disclosure, the structure of a display device can be simplified and manufacturing costs reduced by using a transparent conductive oxide layer or an oxide semiconductor layer as the substrate of the display device.

[0020] According to this disclosure, static electricity on the substrate can be reduced and display quality improved by using a transparent conductive oxide layer or an oxide semiconductor layer as the substrate of the display device.

[0021] According to this disclosure, the substrate for the display device can be manufactured through a deposition process in a vacuum environment. Therefore, substrate manufacturing time can be shortened and the number of particles and particle-induced defects on the substrate can be reduced.

[0022] According to this disclosure, the substrate of a display device configured as a transparent conductive oxide layer or an oxide semiconductor layer can be arranged so as not to overlap with signal lines used to transmit AC voltage, thereby minimizing the occurrence of parasitic capacitance.

[0023] According to this disclosure, a substrate made of transparent conductive oxide can be used as a capacitor, thereby improving the capacity of the storage capacitor and operating the display device more stably.

[0024] The effects of this disclosure are not limited to those exemplified above, and include many more effects as described in this specification. Attached Figure Description

[0025] The above and other aspects, features and advantages of this disclosure will become more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0026] Figure 1 This is a top plan view of a display device according to an embodiment of the present disclosure;

[0027] Figure 2 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure;

[0028] Figure 3 This is a circuit diagram of a sub-pixel of a display device according to an embodiment of the present disclosure;

[0029] Figure 4A This is an enlarged top view of a display device according to an embodiment of the present disclosure;

[0030] Figure 4B yes Figure 4A Enlarged top view of multiple substrates in the image;

[0031] Figure 5 It is along Figure 4A A cross-sectional view taken from line V-V' in the diagram;

[0032] Figure 6 This is a cross-sectional view of a display device according to another embodiment of the present disclosure;

[0033] Figure 7AThis is an enlarged top view of a display device according to yet another embodiment of the present disclosure;

[0034] Figure 7B yes Figure 7A Enlarged top view of multiple substrates in the image;

[0035] Figure 8 This is a cross-sectional view of a display device according to another embodiment of the present disclosure;

[0036] Figure 9A This is an enlarged top view of a display device according to yet another embodiment of the present disclosure;

[0037] Figure 9B yes Figure 9A Enlarged top view of multiple substrates in the diagram; and

[0038] Figure 10 This is a cross-sectional view of a display device according to another embodiment of the present disclosure. Detailed Implementation

[0039] The advantages and features of this disclosure, as well as methods for achieving these advantages and features, will become clear from the exemplary embodiments described in detail below with reference to the accompanying drawings. However, this disclosure is not limited to the exemplary embodiments disclosed herein, but can be implemented in various forms. The exemplary embodiments are provided merely as examples to enable those skilled in the art to fully understand the disclosure and scope of this disclosure. Therefore, this disclosure will be limited only by the scope of the appended claims.

[0040] The shapes, dimensions, ratios, angles, numbers, etc., shown in the accompanying drawings to describe exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Throughout the specification, similar reference numerals generally denote similar elements. Furthermore, in the following description of this disclosure, detailed descriptions of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of this disclosure. Terms such as “comprising,” “having,” and “consisting of” as used herein are generally intended to allow for the addition of additional components, unless these terms are used in conjunction with the term “only.” Unless otherwise expressly stated, any reference to the singular may include the plural.

[0041] Even without explicit explanation, components are interpreted as including a normal tolerance range.

[0042] When using terms such as “above,” “over,” “below,” and “beside” to describe the positional relationship between two parts, one or more parts may be located between the two parts, unless the term is used with the terms “immediately adjacent” or “directly.”

[0043] When a component or layer is placed "on" another component or layer, the component or layer can be placed directly on the other component or layer, or other layers or other components can be placed in between.

[0044] Although the terms "first," "second," etc., are used to describe individual components, these components are not limited by these terms. These terms are merely used to distinguish one component from others. Therefore, the first component mentioned below can be a second component within the technical concept of this disclosure.

[0045] Throughout the specification, the same reference numerals generally denote the same elements.

[0046] For ease of description, the dimensions and thickness of each component shown in the accompanying drawings are illustrated, but this disclosure is not limited to the dimensions and thickness of the components shown.

[0047] Features of various embodiments of this disclosure may be partially or completely adhered to or combined with each other and may be interlocked and operated in technically different ways, and the embodiments may be implemented independently of each other or in relation to each other.

[0048] In the following, a scalable display device according to an exemplary embodiment of the present disclosure will be described in detail with reference to the accompanying drawings.

[0049] Figure 1 This is a top plan view of a display device according to an embodiment of the present disclosure. Figure 2 This is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure. For ease of description, Figure 1 Only the substrate 110, multiple flexible films 160 and multiple printed circuit boards 170 among the various constituent elements of the display device 100 are shown.

[0050] Reference Figure 1 and Figure 2 The substrate 110 is a support member for supporting other constituent elements of the display device 100. For ease of description, Figure 1 and Figure 2 The substrate 110 is shown to have a single pattern. A plurality of substrates 110 are arranged. That is, multiple substrates 110 spaced apart from each other can be arranged to support other constituent elements of the display device 100. (Refer to...) Figures 4A to 5 The multiple substrates 110 are described in more detail.

[0051] The substrate 110 can be made of any of transparent conductive oxides and oxide semiconductors. For example, the substrate 110 can be made of transparent conductive oxides (TCOs), such as indium tin oxide (ITO), indium zinc oxide (IZO), and indium tin zinc oxide (ITZO).

[0052] Furthermore, substrate 110 can be made of oxide semiconductor materials containing indium (In) and gallium (Ga), such as transparent oxide semiconductors like indium gallium zinc oxide (IGZO), indium gallium oxide (IGO), and indium tin zinc oxide (ITZO). However, transparent conductive oxide and oxide semiconductor materials and types are provided by way of example. Substrate 110 can be made of other transparent conductive oxide and oxide semiconductor materials not disclosed in this specification. However, this disclosure is not limited thereto.

[0053] Simultaneously, the substrate 110 can be formed by depositing a transparent conductive oxide or oxide semiconductor with a very small thickness. Therefore, the substrate 110 can be flexible because it has a very small thickness. Furthermore, the display device 100 including the flexible substrate 110 can be implemented as a flexible display device 100 that can display images even when the display device 100 is folded or rolled up. For example, in the case where the display device 100 is a foldable display device, the substrate 110 can be folded or unfolded around a folding axis. As another example, in the case where the display device 100 is a rollable display device, the display device can be rolled up around a roller and stored. Therefore, by using the flexible substrate 110, the display device 100 according to embodiments of the present disclosure can be implemented as a flexible display device 100 such as a foldable display device or a rollable display device.

[0054] Furthermore, the display device 100 according to embodiments of this disclosure can perform a laser lift-off (LLO) process using a substrate 110 made of transparent conductive oxide or oxide semiconductor. The LLO process refers to the process of separating a temporary substrate disposed beneath the substrate 110 from the substrate 110 during the manufacturing process of the display device 100 using a laser. Therefore, the substrate 110 is a layer used to further facilitate the LLO process, and thus the substrate 110 can be referred to as a functional thin film, a functional thin film layer, or a functional substrate. The LLO process will be described in more detail below.

[0055] The substrate 110 includes a display area AA and a non-display area NA.

[0056] The display area AA is the area for displaying an image. To display the image, pixel portions 120, comprising multiple sub-pixels, can be arranged within the display area AA. For example, pixel portions 120 may include multiple sub-pixels having light-emitting elements and driving circuitry, thereby displaying the image.

[0057] The non-display area NA is the area where no image is displayed. Various lines and driver ICs used to operate the sub-pixels located in the display area NA are placed there. For example, various driver ICs such as gate driver ICs and data driver ICs can be placed in the non-display area NA.

[0058] A plurality of flexible films 160 are disposed at one end of a substrate 110. The plurality of flexible films 160 are electrically connected to the aforementioned end of the substrate 110. Each of the plurality of flexible films 160 is a film having various types of components disposed on a base film with elasticity, for supplying signals to a plurality of sub-pixels in a display area AA. Each of the plurality of flexible films 160 has an end disposed in a non-display area NA of the substrate 110 and supplies data voltage, etc., to the plurality of sub-pixels in the display area AA. Figure 1 Four flexible membranes 160 are shown. However, the number of flexible membranes 160 can be varied according to the design. However, this disclosure is not limited thereto.

[0059] Driver ICs, such as gate driver ICs and data driver ICs, can be disposed on multiple flexible films 160. The driver IC is a component configured to process data for displaying images and to process drive signals for processing that data. Depending on the mounting method, the driver IC can be disposed using methods such as chip-on-glass (COG), chip-on-film (COF), and tape-on-package (TCP). In this specification, for ease of description, a configuration in which the driver IC is mounted on multiple flexible films 160 using the chip-on-film method has been described. However, this disclosure is not limited thereto.

[0060] Printed circuit board 170 is connected to multiple flexible films 160. Printed circuit board 170 is a component for supplying signals to a driver IC. Various types of components for supplying various drive signals to the driver IC, such as drive signals and data voltages, can be arranged on printed circuit board 170. Figure 1 Two printed circuit boards 170 are shown. However, the number of printed circuit boards 170 can be varied depending on the design. This disclosure is not limited thereto.

[0061] Reference Figure 2 An insulating layer IN is disposed on the substrate 110. The insulating layer IN can suppress the diffusion of moisture and / or oxygen that permeates from the outside of the substrate 110. The moisture transport characteristics of the display device 100 can be controlled by controlling the thickness or layering structure of the insulating layer IN. In addition, the insulating layer IN prevents the substrate 110, which is made of transparent conductive oxide or oxide semiconductor, from short-circuiting when in contact with other components, such as the pixel portion 120. The insulating layer IN can be made of a single layer or multiple layers of inorganic material, for example, configured as silicon oxide (SiOx) or silicon nitride (SiNx). However, this disclosure is not limited thereto.

[0062] Pixel portion 120 is disposed on insulating layer IN. Pixel portion 120 can be disposed corresponding to display area AA. Pixel portion 120 includes a plurality of sub-pixels and is configured to display an image. The plurality of sub-pixels of pixel portion 120 are the smallest units constituting display area AA. Light-emitting elements and driving circuitry can be disposed in each of the plurality of sub-pixels. For example, the light-emitting element of each of the plurality of sub-pixels can be an organic light-emitting element including an anode, an organic light-emitting layer, and a cathode, or an LED including N-type and P-type semiconductor layers and a light-emitting layer. However, this disclosure is not limited thereto. Furthermore, the driving circuitry for operating the plurality of sub-pixels can include driving elements, such as thin-film transistors and storage capacitors. However, this disclosure is not limited thereto. Hereinafter, for ease of description, it is assumed that the light-emitting element of each of the plurality of sub-pixels is an organic light-emitting element. However, this disclosure is not limited thereto.

[0063] Depending on the direction of light emitted from the light-emitting element, the display device 100 can be a top-emitting type display device or a bottom-emitting type display device.

[0064] Top-emitting display devices allow light emitted from light-emitting elements to propagate toward the upper side of a substrate 110 on which the light-emitting elements are disposed. In order to allow light emitted from light-emitting elements to propagate toward the upper side of the substrate 110, i.e. toward the cathode, the top-emitting display device may have a reflective layer formed on the lower part of the anode.

[0065] Bottom-emitting display devices allow light emitted from the light-emitting elements to propagate toward the underside of the substrate 110 on which the light-emitting elements are disposed. In the case of a bottom-emitting display device, in order to allow light emitted from the light-emitting elements to propagate toward the underside of the substrate 110, the anode can be made of only a transparent conductive material, while the cathode can be made of a metallic material with high reflectivity.

[0066] In the following description, for ease of description, the display device 100 according to the embodiments of the present disclosure will be described as a bottom-emitting display device. However, the present disclosure is not limited thereto.

[0067] A sealing layer 130 is provided to cover the pixel portion 120. The sealing layer 130 seals the pixel portion 120 and protects the light-emitting element of the pixel portion 120 from external moisture, oxygen, impact, etc. The sealing layer 130 can be formed by alternately stacking multiple inorganic material layers and multiple organic material layers. For example, the inorganic material layers can be made of inorganic materials, such as silicon nitride (SiNx), silicon oxide (SiOx), or aluminum oxide (AlOx). The organic material layers can be made of epoxy polymers or acrylic polymers. However, this disclosure is not limited thereto. Furthermore, the sealing layer 130 can be configured as a surface-sealing type sealing layer. For example, the sealing layer 130 can be formed by applying a UV-curable or thermosetting sealant to the entire surface of the pixel portion 120. However, the sealing layer 130 can have various structures and be made of various materials. However, this disclosure is not limited thereto.

[0068] Furthermore, a sealing substrate can be further disposed on the sealing layer 130. The sealing substrate can be made of a metallic material with high modulus and high corrosion resistance. For example, the sealing substrate can be made of a material with a modulus of up to about 200 MPa to 900 MPa. The sealing substrate can be made of metallic materials such as aluminum (Al), nickel (Ni), chromium (Cr), iron (Fe), and nickel alloys that are easy to process into foil or thin film form and have high corrosion resistance. Therefore, since the sealing substrate is made of a metallic material, the sealing substrate can be realized in the form of an ultrathin film and has protective properties sufficient to resist external impacts and scratches.

[0069] A sealing member 140 is arranged to surround the side surfaces of the pixel portion 120 and the sealing layer 130. The sealing member 140 may be disposed in the non-display area NA and arranged to surround the pixel portion 120 disposed in the display area AA. The sealing member 140 may be arranged to surround the side surfaces of the pixel portion 120 and the sealing layer 130, thereby minimizing the penetration of moisture into the pixel portion 120. For example, the sealing member 140 may be arranged to cover a portion of the top surface of the insulating layer IN that overlaps with the non-display area NA protruding outside the pixel portion 120. The sealing member 140 may be arranged to cover a portion of the side surface of the sealing layer 130 and be arranged to surround the pixel portion 120. The sealing member 140 may be arranged to cover a portion of the top surface of the sealing layer 130.

[0070] The sealing member 140 may be made of a resilient, non-conductive material to seal the side surface of the pixel portion 120 and increase the rigidity of the side surface of the display device 100. Furthermore, the sealing member 140 may be made of an adhesive material. Additionally, the sealing member 140 may include a desiccant to absorb moisture and oxygen from the outside and minimize moisture penetration through the lateral portions of the display device 100. For example, the sealing member 140 may be made of materials such as polyimide (PI), polyurethane, epoxy resin, or acrylic. However, this disclosure is not limited thereto.

[0071] A polarizing plate 150 is disposed below the substrate 110. The polarizing plate 150 selectively transmits light and reduces the reflection of external light entering the substrate 110. Specifically, the display device 100 has various metallic materials formed on the substrate 110 and applied to semiconductor elements, wires, and light-emitting elements. Therefore, external light entering the substrate 110 can be reflected by the metallic materials. The reflection of external light can reduce the visibility of the display device 100. In this case, the polarizing plate 150 for suppressing the reflection of external light can be disposed below the substrate 110, thereby improving the outdoor visibility of the display device 100. The polarizing plate 150 can be removed depending on the implementation of the display device 100.

[0072] Although not shown in the accompanying drawings, the barrier film can be disposed together with the polarizing plate 150 below the substrate 110. The barrier film minimizes the penetration of moisture and oxygen present outside the substrate 110 into the substrate 110, thereby protecting the pixel portion 120 including the light-emitting element. However, the barrier film can be removed depending on the implementation of the display device 100. However, this disclosure is not limited thereto.

[0073] In the following text, reference will be made to Figures 3 to 5 A more detailed description of the multiple sub-pixels of pixel portion 120.

[0074] Figure 3 This is a circuit diagram of a sub-pixel of a display device according to an embodiment of the present disclosure.

[0075] Reference Figure 3 The driving circuit for operating each of the multiple sub-pixels SP in the OLED light-emitting element includes a first transistor TR1, a second transistor TR2, a third transistor TR3, and a storage capacitor SC. Furthermore, multiple lines for operating the driving circuit are arranged on the substrate 110, and these multiple lines include a gate line GL, a data line DL, a high-potential power line VDD, a sensing line SL, and a reference line RL.

[0076] The first transistor TR1, the second transistor TR2, and the third transistor TR3 included in the driving circuit of a single sub-pixel SP each include a gate electrode, a source electrode, and a drain electrode.

[0077] Furthermore, the first transistor TR1, the second transistor TR2, and the third transistor TR3 can each be either a P-type thin-film transistor or an N-type thin-film transistor. For example, in a P-type thin-film transistor, positive holes flow from the source electrode to the drain electrode, allowing current to flow from the source electrode to the drain electrode. In an N-type thin-film transistor, electrons flow from the source electrode to the drain electrode, allowing current to flow from the drain electrode to the source electrode. In the following description, it is assumed that the first transistor TR1, the second transistor TR2, and the third transistor TR3 can each be an N-type thin-film transistor with current flowing from the drain electrode to the source electrode. However, this disclosure is not limited thereto.

[0078] The first transistor TR1 includes a first active layer, a first gate electrode, a first source electrode, and a first drain electrode. The first gate electrode is connected to a first node N1. The first source electrode is connected to the anode of the light-emitting element OLED. The first drain electrode is connected to a high-potential power supply line VDD. The first transistor TR1 can be turned on when the voltage at the first node N1 is higher than a threshold voltage. The first transistor TR1 can be turned off when the voltage at the first node N1 is lower than the threshold voltage. Furthermore, when the first transistor TR1 is turned on, a drive current can be transmitted to the light-emitting element OLED through the first transistor TR1. Therefore, the first transistor TR1, configured to control the drive current to be supplied to the light-emitting element OLED, can be referred to as a drive transistor.

[0079] The second transistor TR2 includes a second active layer, a second gate electrode, a second source electrode, and a second drain electrode. The second gate electrode is connected to gate line GL. The second source electrode is connected to the first node N1. The second drain electrode is connected to the data line DL. The second transistor TR2 can be turned on or off based on the gate voltage from gate line GL. When the second transistor TR2 is turned on, the first node N1 can be charged with the data voltage from the data line DL. Therefore, the second transistor TR2, configured to be turned on or off by gate line GL, can be called a switching transistor.

[0080] The third transistor TR3 includes a third active layer, a third gate electrode, a third source electrode, and a third drain electrode. The third gate electrode is connected to the sensing line SL. The third source electrode is connected to the second node N2. The third drain electrode is connected to the reference line RL. The third transistor TR3 can be turned on or off based on the sensed voltage from the sensing line SL. Furthermore, when the third transistor TR3 is turned on, the reference voltage can be transferred from the reference line RL to the second node N2 and the storage capacitor SC. Therefore, the third transistor TR3 can be referred to as a sensing transistor.

[0081] in, Figure 3The diagram shows that the gate line GL and the sensing line SL are separate lines. However, the gate line GL and the sensing line SL can be implemented as a single line. However, this disclosure is not limited thereto.

[0082] The storage capacitor SC is connected between the first gate electrode and the first source electrode of the first transistor TR1. That is, the storage capacitor SC can be connected between the first node N1 and the second node N2. The storage capacitor SC can supply a predetermined driving current to the OLED by maintaining the potential difference between the first gate electrode and the first source electrode of the first transistor TR1 when the OLED emits light. The storage capacitor SC includes multiple capacitor electrodes. For example, one of the multiple capacitor electrodes can be connected to the first node N1, while another capacitor electrode can be connected to the second node N2.

[0083] The OLED (Optical Display Cell) includes an anode, an emissive layer, and a cathode. The anode of the OLED is connected to a second node N2, and the cathode is connected to a low-potential power line VSS. The OLED can emit light by receiving a drive current from a first transistor TR1.

[0084] in, Figure 3 The driving circuit for the sub-pixel SP of the display device 100 according to an embodiment of the present disclosure is shown to have a 3T1C structure including three transistors and a single storage capacitor SC. However, the number of transistors, the number of storage capacitors SC, and the connection relationship between the transistors and the storage capacitors can be varied according to the design. The present disclosure is not limited thereto.

[0085] Figure 4A This is an enlarged top view of a display device according to an embodiment of the present disclosure. Figure 4B yes Figure 4A Enlarged top view of multiple substrates in the diagram. Figure 5 It is along Figure 4A The cross-sectional view taken from line V-V' in the diagram. Figure 4A This is a magnified top-view plan view of the red subpixel SPR, white subpixel SPW, blue subpixel SPB, and green subpixel SPG that make up a single pixel. For ease of description, in Figure 4A The embankment section 115 is not shown. For ease of description... Figure 4B Only a plurality of substrates 110 among the various constituent elements of the display device 100 are shown.

[0086] Reference Figures 4A to 5The display device 100 according to an embodiment of the present disclosure includes a plurality of substrates 110, an insulating layer IN, a buffer layer 111, a gate insulating layer 112, a passivation layer 113, a planarization layer 114, a dam 115, a first transistor TR1, a second transistor TR2, a third transistor TR3, a storage capacitor SC, a light-emitting element OLED, a gate line GL, a sensing line SL, a data line DL, a reference line RL, a high-potential power line VDD, and a plurality of color filters CF.

[0087] Reference Figures 4A to 5 Multiple substrates 110 can extend along a column direction and be arranged spaced apart from each other. In this case, the multiple substrates can be arranged so as not to overlap with signal lines such as data lines DL and reference lines RL that transmit AC voltage. That is, the data lines DL and reference lines RL can be arranged in areas where the multiple substrates 110 are spaced apart from each other. Therefore, the multiple substrates 110 can be arranged so as not to overlap with the data lines DL and reference lines RL. For example, each of the multiple substrates 110 can have an edge corresponding to the extension shape of the data lines DL and reference lines RL, such that the multiple substrates 110 do not overlap with the data lines DL and reference lines RL arranged between the multiple substrates 110. However, the shape of the multiple substrates 110 is not limited to this.

[0088] Reference Figure 4A Multiple sub-pixels SP are arranged on multiple substrates 110.

[0089] Multiple subpixels (SPs) include red subpixels (SPRs), green subpixels (SPGs), blue subpixels (SPBs), and white subpixels (SPWs). For example, red subpixels (SPRs), white subpixels (SPWs), blue subpixels (SPBs), and green subpixels (SPGs) can be arranged sequentially along the row direction. However, the arrangement order of multiple subpixels (SPs) is not limited to this.

[0090] Each of the multiple sub-pixels SP includes a light-emitting region and a circuit region. The light-emitting region is an area capable of independently emitting light of a single type of color. The light-emitting element OLED can be disposed within the light-emitting region. Specifically, the light-emitting region can be defined as the area where multiple color filters CF and anode AN overlap, exposed from the embankment 115 and configured such that light emitted from the light-emitting element OLED can propagate to the outside. For example, see also... Figure 4A and Figure 5The emitting area of ​​the red sub-pixel SPR can be the area exposed from the embankment 115 within the overlapping area of ​​the red color filter CFR and the anode AN. The emitting area of ​​the green sub-pixel SPG can be the area exposed from the embankment 115 within the overlapping area of ​​the green color filter CFG and the anode AN. The emitting area of ​​the blue sub-pixel SPB can be a blue emitting area emitting blue light within the overlapping area of ​​the blue color filter CF and the anode AN, exposed from the embankment 115. In this case, the emitting area of ​​the white sub-pixel SPW, which does not have a separate color filter CF, can be a white emitting area emitting white light within the area overlapping with a portion of the anode AN exposed from the embankment 115.

[0091] The circuit region is the area excluding the light-emitting region. Multiple lines can be arranged in the circuit region to transmit various types of signals to the driving circuit DP used to operate multiple light-emitting elements (OLEDs). Furthermore, the circuit region containing the driving circuit DP, multiple lines, and the retaining wall 115 can be a non-light-emitting region. For example, the circuit region may contain the driving circuit DP including a first transistor TR1, a second transistor TR2, a third transistor TR3, and a storage capacitor SC, multiple high-potential power lines VDD, multiple data lines DL, multiple reference lines RL, multiple gate lines GL, a sensing line SL, and the retaining wall 115.

[0092] Refer to together Figures 3 to 5 An insulating layer IN is disposed on multiple substrates 110. Multiple high-potential power lines VDD, multiple data lines DL, multiple reference lines RL, and a light-blocking layer LS are disposed on the insulating layer IN.

[0093] Multiple high-potential power lines VDD, multiple data lines DL, multiple reference lines RL, and a photoblocking layer LS can be disposed on the same layer on multiple substrates 110 and made of the same conductive material. For example, the multiple high-potential power lines VDD, multiple data lines DL, multiple reference lines RL, and the photoblocking layer LS can each be made of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0094] Multiple high-potential power lines VDD are lines used to transmit high-potential power voltage to multiple sub-pixels SP. Multiple high-potential power lines VDD can extend along the column direction between the multiple sub-pixels SP. Two sub-pixels SP that are adjacent to each other along the row direction can share a single high-potential power line VDD. For example, one high-potential power line VDD can be positioned to the left of the red sub-pixel SPR and supply high-potential power voltage to the first transistor TR1 of each of the red sub-pixel SPR and the white sub-pixel SPW. Another high-potential power line VDD can be positioned to the right of the green sub-pixel SPG and supply high-potential power voltage to the first transistor TR1 of each of the blue sub-pixel SPB and the green sub-pixel SPG.

[0095] Multiple data lines DL include a first data line DL1, a second data line DL2, a third data line DL3, and a fourth data line DL4. These multiple data lines DL extend along the column direction between multiple sub-pixels SP and transmit data voltage to the multiple sub-pixels SP. The first data line DL1 can be positioned between the red sub-pixel SPR and the white sub-pixel SPW, transmitting data voltage to the second transistor TR2 of the red sub-pixel SPR. The second data line DL2 can be positioned between the first data line DL1 and the white sub-pixel SPW, transmitting data voltage to the second transistor TR2 of the white sub-pixel SPW. The third data line DL3 can be positioned between the blue sub-pixel SPB and the green sub-pixel SPG, transmitting data voltage to the second transistor TR2 of the blue sub-pixel SPB. The fourth data line DL4 can be positioned between the third data line DL3 and the green sub-pixel SPG, transmitting data voltage to the second transistor TR2 of the green sub-pixel SPG. In this case, the data lines DL can be signal lines used to transmit AC voltage. Therefore, the signal transmitted to the data lines DL may have an oscillating shape.

[0096] Multiple reference lines RL are lines extending along the column direction between multiple sub-pixels SP and transmitting reference voltage to the multiple sub-pixels SP. Multiple sub-pixels SP constituting a single pixel can share a single reference line RL. For example, a reference line RL can be positioned between a white sub-pixel SPW and a blue sub-pixel SPB, transmitting reference voltage to the third transistor TR3 of each of the red sub-pixel SPR, white sub-pixel SPW, blue sub-pixel SPB, and green sub-pixel SPG. In this case, the reference line RL can be a signal line used to transmit AC voltage. Therefore, the signal transmitted to the reference line RL may have an oscillating shape.

[0097] Refer to together Figure 4A and Figure 5A light-blocking layer LS is disposed on an insulating layer IN. The light-blocking layer LS can be disposed to overlap with the first active layer ACT1 of at least the first transistor TR1 among a plurality of transistors TR1, TR2, and TR3, and prevent light from entering the first active layer ACT1. If light is emitted to the first active layer ACT1, leakage current occurs, which may reduce the reliability of the first transistor TR1 as a driving transistor. In this case, when the light-blocking layer LS, made of an opaque conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof, is disposed to overlap with the first active layer ACT1, the light-blocking layer LS can suppress light from entering the first active layer ACT1 from the underside of the substrate 110, thereby improving the reliability of the first transistor TR1. However, this disclosure is not limited thereto. The light-blocking layer LS can be disposed to overlap with the second active layer ACT2 of the second transistor TR2 and the third active layer ACT3 of the third transistor TR3.

[0098] The accompanying drawing shows that the light-blocking layer LS is a single layer. However, the light-blocking layer LS can be configured as multiple layers. For example, the light-blocking layer LS can be configured as multiple layers arranged in an overlapping manner, wherein at least one of the insulating layer IN, the buffer layer 111, the gate insulating layer 112, and the passivation layer 113 is placed therebetween.

[0099] A buffer layer 111 is disposed on multiple high-potential power lines VDD, multiple data lines DL, multiple reference lines RL, and a light-blocking layer LS. The buffer layer 111 can suppress the penetration of moisture or impurities through the substrate 110. For example, the buffer layer 111 can be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, this disclosure is not limited thereto. Furthermore, the buffer layer 111 may be removed depending on the type of substrate 110 or the type of transistor, but this specification is not limited thereto.

[0100] The first transistor TR1, the second transistor TR2, the third transistor TR3, and the storage capacitor SC are disposed on the buffer layer 111 of each of the multiple sub-pixels SP.

[0101] First, the first transistor TR1 includes a first active layer ACT1, a first gate electrode GE1, a first source electrode SE1, and a first drain electrode DE1.

[0102] The first active layer ACT1 is disposed on the buffer layer 111. The first active layer ACT1 may be made of a semiconductor material such as oxide semiconductor, amorphous silicon, or polycrystalline silicon, but this disclosure is not limited thereto. For example, if the first active layer ACT1 is made of oxide semiconductor, the first active layer ACT1 may include a channel region, a source region, and a drain region. The source region and drain region may be conductive regions. However, this disclosure is not limited thereto.

[0103] A gate insulating layer 112 is disposed on the first active layer ACT1. The gate insulating layer 112 may be a layer used to insulate the first gate electrode GE1 and the first active layer ACT1 and may be made of an insulating material. For example, the gate insulating layer 112 may be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx), but this disclosure is not limited thereto.

[0104] The first gate electrode GE1 is disposed on the gate insulating layer 112 to overlap with the first active layer ACT1. The first gate electrode GE1 may be made of a conductive material, such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0105] The first source electrode SE1 and the first drain electrode DE1 are disposed on the gate insulating layer 112 and spaced apart from each other. The first source electrode SE1 and the first drain electrode DE1 can be electrically connected to the first active layer ACT1 through contact holes formed in the gate insulating layer 112. The first source electrode SE1 and the first drain electrode DE1 can be disposed on the same layer as the first gate electrode GE1 and made of the same conductive material. However, this disclosure is not limited thereto. For example, the first source electrode SE1 and the first drain electrode DE1 can be made of copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0106] The first drain electrode DE1 is electrically connected to the high-potential power line VDD. For example, the first drain electrode DE1 of the red sub-pixel SPR and the first drain electrode DE1 of the white sub-pixel SPW can be electrically connected to the high-potential power line VDD located to the left of the red sub-pixel SPR. The first drain electrode DE1 of the blue sub-pixel SPB and the first drain electrode DE1 of the green sub-pixel SPG can be electrically connected to the high-potential power line VDD located to the right of the green sub-pixel SPG.

[0107] In this configuration, an auxiliary high-potential power line VDDa can be provided to electrically connect the first drain electrode DE1 to the high-potential power line VDD. One end of the auxiliary high-potential power line VDDa is electrically connected to the high-potential power line VDD, while the other end is electrically connected to the first drain electrode DE1 of each of the plurality of sub-pixels SP. For example, if the auxiliary high-potential power line VDDa and the first drain electrode DE1 are disposed on the same layer and made of the same material, one end of the auxiliary high-potential power line VDDa can be electrically connected to the high-potential power line VDD through contact holes formed in the gate insulating layer 112 and the buffer layer 111, while the other end of the auxiliary high-potential power line VDDa can extend to the first drain electrode DE1 and form an integral part thereof.

[0108] In this configuration, the first drain electrode DE1 of the red sub-pixel SPR and the first drain electrode DE1 of the white sub-pixel SPW, both electrically connected to the same high-potential power line VDD, can be connected to the same auxiliary high-potential power line VDDa. Similarly, the first drain electrode DE1 of the blue sub-pixel SPB and the first drain electrode DE1 of the green sub-pixel SPG can also be connected to the same auxiliary high-potential power line VDDa. However, the first drain electrode DE1 and the high-potential power line VDD can be electrically connected using other methods. However, this disclosure is not limited to these methods.

[0109] The first source electrode SE1 can be electrically connected to the light-blocking layer LS through contact holes formed in the gate insulating layer 112 and the buffer layer 111. Furthermore, the portion of the first active layer ACT1 connected to the first source electrode SE1 can be electrically connected to the light-blocking layer LS through contact holes formed in the buffer layer 111. If the light-blocking layer LS is floating, the threshold voltage of the first transistor TR1 changes, which may affect the operation of the display device 100. Therefore, the light-blocking layer LS can be electrically connected to the first source electrode SE1, allowing voltage to be applied to the light-blocking layer LS without affecting the operation of the first transistor TR1. In this specification, a configuration in which both the first active layer ACT1 and the first source electrode SE1 are in contact with the light-blocking layer LS has been described. However, only either the first source electrode SE1 or the first active layer ACT1 can be in direct contact with the light-blocking layer LS. This disclosure is not limited thereto.

[0110] in, Figure 5 The diagram shows that the gate insulating layer 112 is patterned to overlap only with the first gate electrode GE1, the first source electrode SE1, and the first drain electrode DE1. However, the gate insulating layer 112 can be formed on the entire surface of the substrate 110. This disclosure is not limited thereto.

[0111] The second transistor TR2 includes a second active layer ACT2, a second gate electrode GE2, a second source electrode SE2, and a second drain electrode DE2.

[0112] The second active layer ACT2 is disposed on the buffer layer 111. The second active layer ACT2 may be made of a semiconductor material such as oxide semiconductor, amorphous silicon, or polycrystalline silicon, but this disclosure is not limited thereto. For example, if the second active layer ACT2 is made of oxide semiconductor, the second active layer ACT2 may include a channel region, a source region, and a drain region. The source region and drain region may be conductive regions. However, this disclosure is not limited thereto.

[0113] The second source electrode SE2 is disposed on the buffer layer 111. The second source electrode SE2 can be integrally formed with and electrically connected to the second active layer ACT2. For example, the second source electrode SE2 can be formed by forming a semiconductor material on the buffer layer 111 and making a portion of the semiconductor material conductive. Therefore, the non-conductive portion of the semiconductor material can be the second active layer ACT2. The conductive portion of the semiconductor material can be the second source electrode SE2. However, the second active layer ACT2 and the second source electrode SE2 can be formed separately. However, this disclosure is not limited thereto.

[0114] The second source electrode SE2 is electrically connected to the first gate electrode GE1 of the first transistor TR1. The first gate electrode GE1 can be electrically connected to the second source electrode SE2 through a contact hole formed in the gate insulating layer 112. Therefore, the first transistor TR1 can be turned on or off in response to a signal from the second transistor TR2.

[0115] The gate insulating layer 112 is disposed on the second active layer ACT2 and the second source electrode SE2. The second drain electrode DE2 and the second gate electrode GE2 are disposed on the gate insulating layer 112.

[0116] The second gate electrode GE2 is disposed on the gate insulating layer 112 to overlap with the second active layer ACT2. The second gate electrode GE2 can be electrically connected to the gate line GL. The second transistor TR2 can be turned on or off based on the gate voltage delivered to the second gate electrode GE2. The second gate electrode GE2 can be made of a conductive material such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0117] The second gate electrode GE2 can extend from the gate line GL. That is, the second gate electrode GE2 can be integrally formed with the gate line GL. The second gate electrode GE2 and the gate line GL can be made of the same conductive material. For example, the gate line GL can be made of copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0118] Gate line GL is a line used to deliver gate voltage to multiple sub-pixels SP. Gate line GL can extend in the row direction while traversing the circuit area of ​​multiple sub-pixels SP. Gate line GL can extend in the row direction and intersect with multiple high-potential power lines VDD, multiple data lines DL, and multiple reference lines RL extending in the column direction.

[0119] The second drain electrode DE2 is disposed on the gate insulating layer 112. The second drain electrode DE2 can be electrically connected to the second active layer ACT2 through contact holes formed in the gate insulating layer 112. The second drain electrode DE2 can be electrically connected to one of the multiple data lines DL through contact holes formed in the gate insulating layer 112 and the buffer layer 111. For example, the second drain electrode DE2 of the red sub-pixel SPR can be electrically connected to the first data line DL1. The second drain electrode DE2 of the white sub-pixel SPW can be electrically connected to the second data line DL2. For example, the second drain electrode DE2 of the blue sub-pixel SPB can be electrically connected to the third data line DL3. The second drain electrode DE2 of the green sub-pixel SPG can be electrically connected to the fourth data line DL4. The second drain electrode DE2 can be made of a conductive material, such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0120] The third transistor TR3 includes a third active layer ACT3, a third gate electrode GE3, a third source electrode SE3, and a third drain electrode DE3.

[0121] The third active layer ACT3 is disposed on the buffer layer 111. The third active layer ACT3 may be made of a semiconductor material such as oxide semiconductor, amorphous silicon, or polycrystalline silicon, but this disclosure is not limited thereto. For example, if the third active layer ACT3 is made of oxide semiconductor, the third active layer ACT3 may include a channel region, a source region, and a drain region. The source region and drain region may be conductive regions. However, this disclosure is not limited thereto.

[0122] The gate insulating layer 112 is disposed on the third active layer ACT3. The third gate electrode GE3, the third source electrode SE3, and the third drain electrode DE3 are disposed on the gate insulating layer 112.

[0123] The third gate electrode GE3 is disposed on the gate insulating layer 112 to overlap with the third active layer ACT3. The third gate electrode GE3 can be electrically connected to the sensing line SL. The third transistor TR3 can be turned on or off based on the sensing voltage transmitted to the third transistor TR3. The third gate electrode GE3 can be made of a conductive material, such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0124] The third gate electrode GE3 can extend from the sensing line SL. That is, the third gate electrode GE3 can be integrally formed with the sensing line SL. The third gate electrode GE3 and the sensing line SL can be made of the same conductive material. For example, the sensing line SL can be made of copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0125] A sensing line SL is a line that transmits the sensed voltage to multiple sub-pixels SP and extends along the row direction between the multiple sub-pixels SP. For example, the sensing line SL may extend along the row direction at the boundary between multiple sub-pixels SP and intersect with multiple high-potential power lines VDD, multiple data lines DL, and multiple reference lines RL extending along the column direction.

[0126] The third source electrode SE3 can be electrically connected to the third active layer ACT3 through a contact hole formed in the gate insulating layer 112. The third source electrode SE3 can be made of a conductive material, such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0127] Specifically, the portion of the third active layer ACT3 that contacts the third source electrode SE3 can be electrically connected to the light-blocking layer LS through contact holes formed in the buffer layer 111. In other words, the third source electrode SE3 can be electrically connected to the light-blocking layer LS when the third active layer ACT3 is positioned between the third source electrode SE3 and the light-blocking layer LS. Therefore, the third source electrode SE3 and the first source electrode SE1 can be electrically connected to each other through the light-blocking layer LS.

[0128] The third drain electrode DE3 can be electrically connected to the third active layer ACT3 through a contact hole formed in the gate insulating layer 112. The third drain electrode DE3 can be made of a conductive material, such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or alloys thereof. However, this disclosure is not limited thereto.

[0129] The third drain electrode DE3 can be electrically connected to the reference line RL. For example, the third drain electrode DE3 of the red sub-pixel SPR, white sub-pixel SPW, blue sub-pixel SPB, and green sub-pixel SPG that make up a single pixel can be electrically connected to the same reference line RL. That is, multiple sub-pixels SP that make up a single pixel can share a single reference line RL.

[0130] In this configuration, an auxiliary reference line RLa can be deployed to transmit signals to multiple sub-pixels SP arranged side-by-side in the row direction via a reference line RL extending along the column direction. The auxiliary reference line RLa can extend along the row direction and electrically connect the reference line RL to the third drain electrode DE3 of each of the multiple sub-pixels SP. One end of the auxiliary reference line RLa can be electrically connected to the reference line RL via a contact hole formed in the buffer layer 111 and the gate insulating layer 112. Furthermore, the other end of the auxiliary reference line RLa can be electrically connected to the third drain electrode DE3 of each of the multiple sub-pixels SP. In this configuration, the auxiliary reference line RLa can be integrally formed with the third drain electrode DE3 of each of the multiple sub-pixels SP. A reference voltage can be transmitted from the reference line RL to the third drain electrode DE3 via the auxiliary reference line RLa. However, the auxiliary reference line RLa can be formed separately from the third drain electrode DE3. However, this disclosure is not limited to this.

[0131] Storage capacitors SC are disposed in the circuit regions of multiple sub-pixels SP. Storage capacitors SC can store the voltage between the first gate electrode GE1 and the first source electrode SE1 of the first transistor TR1, allowing the OLED light-emitting element to continuously maintain the same state during a single frame. Storage capacitors SC include a first capacitor electrode SC1, a second capacitor electrode SC2, and a third capacitor electrode SC3.

[0132] The first capacitor electrode SC1 is disposed in each of the plurality of sub-pixels SP and between the insulating layer IN and the buffer layer 111. Among the conductive constituent elements disposed on the substrate 110, the first capacitor electrode SC1 can be disposed closest to the substrate 110. The first capacitor electrode SC1 can be made of the same material as the light-blocking layer LS or formed integrally with the light-blocking layer LS. The first capacitor electrode SC1 can be electrically connected to the first source electrode SE1 through the light-blocking layer LS.

[0133] A buffer layer 111 is disposed on the first capacitor electrode SC1. A second capacitor electrode SC2 is disposed on the buffer layer 111. The second capacitor electrode SC2 may be disposed overlapping the first capacitor electrode SC1. The second capacitor electrode SC2 may be integrally formed with the second source electrode SE2 and electrically connected to the second source electrode SE2 or the first gate electrode GE1. For example, the second source electrode SE2 and the second capacitor electrode SC2 may be formed by forming a semiconductor material on the buffer layer 111 and making a portion of the semiconductor material conductive. Therefore, the non-conductive portion of the semiconductor material may be used as the second active layer ACT2. The conductive portion of the semiconductor material may be used as the second source electrode SE2 or the second capacitor electrode SC2. Furthermore, as described above, the first gate electrode GE1 is electrically connected to the second source electrode SE2 through a contact hole formed in the gate insulating layer 112. Therefore, the second capacitor electrode SC2 may be integrally formed with the second source electrode SE2 and electrically connected to both the second source electrode SE2 and the first gate electrode GE1.

[0134] A passivation layer 113 is disposed on the second capacitor electrode SC2. A third capacitor electrode SC3 is disposed on the passivation layer 113. The third capacitor electrode SC3 can be disposed overlapping with the first capacitor electrode SC1 and the second capacitor electrode SC2. The third capacitor electrode SC3 can be integrally formed with the anode AN and electrically connected to the first source electrode SE1.

[0135] In summary, the first capacitor electrode SC1 of the storage capacitor SC can be integrally formed with the light-blocking layer LS and electrically connected to the light-blocking layer LS, the first source electrode SE1, and the third source electrode SE3. Furthermore, the second capacitor electrode SC2 can be integrally formed with the second source electrode SE2 or the second active layer ACT2 and electrically connected to the second source electrode SE2 and the first gate electrode GE1. Additionally, the third capacitor electrode SC3 can be integrally formed with the anode AN and electrically connected to the first source electrode SE1 and the third source electrode SE3. Therefore, the overlapping first capacitor electrode SC1 and the second capacitor electrode SC2 with the buffer layer 111 placed between them, and the overlapping second capacitor electrode SC2 and the third capacitor electrode SC3 with the passivation layer 113 placed between them, can maintain the light-emitting element OLED in a constant state by constantly maintaining the voltage of the first gate electrode GE1 and the first source electrode SE1 of the first transistor TR1 when the OLED emits light.

[0136] Passivation layer 113 is disposed on the first transistor TR1, the second transistor TR2, the third transistor TR3, and the storage capacitor SC. Passivation layer 113 is an insulating layer used to protect components disposed beneath it. For example, passivation layer 113 may be configured as a single layer or multiple layers made of silicon oxide (SiOx) or silicon nitride (SiNx). However, this disclosure is not limited thereto. Additionally, passivation layer 113 may be removed according to embodiments.

[0137] Multiple color filters CF are disposed in the light-emitting region of each of the multiple sub-pixels SP and are disposed on the passivation layer 113. As described above, the display device 100 according to the embodiments of the present disclosure is a bottom-emitting type display device that allows light emitted from the light-emitting element OLED to propagate to the underside of the light-emitting element OLED and the substrate 110. Therefore, multiple color filters CF can be disposed below the light-emitting element OLED. Light emitted from the light-emitting element OLED can be realized in the form of beams having various colors by passing through the multiple color filters CF.

[0138] The multiple color filters (CFs) include a red color filter (CFR), a blue color filter (CFB), and a green color filter (CFG). The red color filter (CFR) can be placed within the light-emitting area of ​​the red sub-pixel (SPR) among the multiple sub-pixels (SPs). The blue color filter (CFB) can be placed within the light-emitting area of ​​the blue sub-pixel (SPB). The green color filter (CFG) can be placed within the light-emitting area of ​​the green sub-pixel (SPG).

[0139] A planarization layer 114 is disposed on the passivation layer 113 and multiple color filters CF. The planarization layer 114 is an insulating layer used to flatten the upper portion of multiple substrates 110, on which a first transistor TR1, a second transistor TR2, a third transistor TR3, a storage capacitor SC, multiple high-potential power lines VDD, multiple data lines DL, multiple reference lines RL, multiple gate lines GL, and multiple sensing lines SL are disposed. The planarization layer 114 can be configured as a single layer or multiple layers made of organic materials, such as polyimide or photopolymer acrylic. However, this disclosure is not limited thereto.

[0140] The light-emitting element (OLED) is disposed in the light-emitting region of each of the multiple sub-pixels (SP). The OLED is disposed on the planarization layer 114 of each of the multiple sub-pixels (SP). The OLED includes an anode (AN), a light-emitting layer (EL), and a cathode (CA).

[0141] An anode AN is disposed on the planarization layer 114 in the light-emitting region EA. Since the anode AN supplies holes to the light-emitting layer EL, the anode AN can be made of a conductive material with a high work function and can also be referred to as the anode AN. For example, the anode AN can be made of a transparent conductive material, such as indium tin oxide (ITO) or indium zinc oxide (IZO), but this disclosure is not limited thereto.

[0142] The anode AN can extend toward the circuit region. A portion of the anode AN can extend from the light-emitting region toward the first source electrode SE1 of the circuit region and be electrically connected to the first source electrode SE1 through contact holes formed in the planarization layer 114 and the passivation layer 113. Therefore, the anode AN of the light-emitting element OLED can extend to the circuit region and be electrically connected to the first source electrode SE1 of the first transistor TR1 or the second capacitor electrode SC2 of the storage capacitor SC.

[0143] An emitting layer (EL) is disposed on the anode (AN) in the light-emitting region and the circuit region. The EL can be configured as a single layer in multiple sub-pixels (SPs). That is, the ELs of multiple sub-pixels (SPs) can be interconnected and form a single unit. The EL can be configured as a single emitting layer. The EL can have a structure in which multiple emitting layers configured to emit light beams of different colors are stacked. The EL can also include organic layers, such as hole injection layers, hole transport layers, electron transport layers, and electron injection layers.

[0144] The cathode CA is disposed on the light-emitting layer EL in the light-emitting region and the circuit region. Since the cathode CA supplies electrons to the light-emitting layer EL, the cathode CA can be made of a conductive material with a low work function. The cathode CA can be configured as a single layer in multiple sub-pixels SP. That is, the cathode CAs of multiple sub-pixels SP can be interconnected and form a single unit. For example, the cathode CA can be made of a transparent conductive material, such as indium tin oxide (ITO) or indium zinc oxide (IZO), or it can be made of an alloy of ytterbium (Yb). The cathode CA may also include a metal-doped layer, but this specification is not limited thereto. Although not explicitly stated... Figures 4A to 5 As shown, however, the cathode CA of the OLED light-emitting element can be electrically connected to the low-potential power line VSS and receive the low-potential power supply voltage.

[0145] A dam 115 is disposed between the anode AN and the light-emitting layer EL. The dam 115 is disposed to overlap with the display area AA and cover the edge of the anode AN. The dam 115 may be disposed at the boundary between adjacent sub-pixels SP and reduce the mixing of colors of the light beams emitted from the light-emitting elements OLED of each of the multiple sub-pixels SP. The dam 115 may be made of an insulating material. For example, the dam 115 may be made of a polyimide-based resin, an acrylic-based resin, or a benzocyclobutene (BCB)-based resin. However, this disclosure is not limited thereto.

[0146] The substrate 110 of the display device 100 according to an embodiment of the present disclosure is made of either a transparent conductive oxide or an oxide semiconductor. Therefore, the thickness of the display device 100 can be reduced. In related technologies, plastic or glass substrates are primarily used as substrates for display devices. For this purpose, plastic or glass substrates are rarely formed to a thickness of a predetermined level or less. In contrast, transparent conductive oxides and oxide semiconductors can allow the display device to have a very small thickness through deposition processes such as sputtering. Therefore, in the display device 100 according to an embodiment of the present disclosure, the substrate 110 for supporting several components of the display device 100 is made of a transparent conductive oxide layer or an oxide semiconductor layer. Therefore, the thickness of the display device 100 can be reduced, and a slim design can be achieved.

[0147] Flexible display devices are formed by forming light-emitting elements and driving circuits on a plastic substrate, which is more flexible than a glass substrate. However, if the display device is excessively deformed, it may be damaged by the stress caused by the deformation. Therefore, even though it is more advantageous to reduce the thickness of the display device to further improve flexibility and reduce stress on the display device, it is difficult to reduce the thickness of the plastic substrate to a predetermined level or less, as described above.

[0148] Therefore, in the display device 100 according to the embodiments of the present disclosure, the substrate 110 is made of a transparent conductive oxide or an oxide semiconductor, which improves the flexibility of the display device 100 or reduces stress caused by deformation of the display device 100. Specifically, when the substrate 110 is made of a transparent conductive oxide layer or an oxide semiconductor, the substrate 110 can be formed as having a very thin film. In this case, the substrate 110 can be referred to as a first transparent thin film layer. Therefore, the display device 100 including the substrate 110 can have high flexibility. Therefore, the display device 100 can be easily bent or rolled. Therefore, in the display device 100 according to the embodiments of the present disclosure, the substrate 110 is made of either a transparent conductive oxide layer or an oxide semiconductor layer, which improves the flexibility of the display device 100 and reduces stress caused by deformation of the display device 100. Therefore, cracks formed in the display device 100 can be minimized.

[0149] Flexible display devices are achieved by using plastic substrates instead of glass substrates. However, compared to glass substrates, plastic substrates increase the likelihood of static electricity. Static electricity can affect various types of lines and driving components on the plastic substrate, potentially damaging some components or degrading the display quality. Therefore, a separate component is needed to block and discharge static electricity from display devices using plastic substrates.

[0150] In the display device 100 according to an embodiment of the present disclosure, the substrate 110 may be made of either a transparent conductive oxide layer or an oxide semiconductor layer, thereby reducing the possibility of static electricity occurring on the substrate 110. If the substrate 110 is made of plastic and static electricity occurs, various types of lines and driving elements on the substrate 110 may be damaged by static electricity, or static electricity may affect the operation of lines and components, which may degrade display quality. Instead, the substrate 110 is made of a transparent conductive oxide layer or an oxide semiconductor layer, which minimizes the static electricity occurring on the substrate 110 and simplifies the construction for blocking and discharging static electricity. Therefore, in the display device 100 according to an embodiment of the present disclosure, the substrate 110 is made of either a transparent conductive oxide layer or an oxide semiconductor layer, which has a low probability of static electricity occurring. Therefore, damage or degradation of display quality caused by static electricity can be minimized.

[0151] When a plastic substrate is used as the substrate for a display device, particles may appear during the process of forming the plastic substrate. For example, particles may appear during the process of coating and curing substrate material to form the plastic substrate. Furthermore, due to the particles, moisture and oxygen may more easily penetrate into the display device. Additionally, due to the particles, several components may form unevenly on the substrate. Therefore, in the case of a plastic substrate formed by coating and curing substrate material, particles may degrade the light-emitting elements in the display device or worsen the characteristics of the transistors.

[0152] In contrast, in the display device 100 according to an embodiment of the present disclosure, the substrate 110 is made of either a transparent conductive oxide or an oxide semiconductor. Therefore, the penetration of external moisture or oxygen into the display device 100 through the substrate 110 can be minimized. When the substrate 110 is made of a transparent conductive oxide layer or an oxide semiconductor layer, the substrate 110 is formed in a vacuum environment, making the likelihood of particle formation extremely low. Furthermore, even if particles do appear, their size is very small. Therefore, the penetration of moisture and oxygen into the display device 100 can be minimized. Therefore, in the display device 100 according to an embodiment of the present disclosure, the substrate 110 is made of a transparent conductive oxide or an oxide semiconductor that reduces the likelihood of particle formation and has excellent moisture transport performance. Therefore, the reliability of the display device 100 and the light-emitting element OLED including the organic layer can be improved.

[0153] Furthermore, in the display device 100 according to the embodiments of the present disclosure, the substrate 110 is made of either a transparent conductive oxide or an oxide semiconductor. Additionally, the substrate 110 can be used with a thin, inexpensive barrier film attached to its lower portion. When the substrate 110 is made of a material such as a plastic material with low moisture transport performance, moisture transport performance can be improved by attaching a thick, expensive barrier film with high performance. However, in the display device 100 according to the embodiments of the present disclosure, the substrate 110 is made of a transparent conductive oxide or an oxide semiconductor, which has excellent moisture transport performance. Therefore, a thin, inexpensive barrier film can be attached to the lower portion of the substrate 110. Therefore, in the display device 100 according to the embodiments of the present disclosure, the substrate 110 is made of either a transparent conductive oxide or an oxide semiconductor, which has excellent moisture transport performance. Therefore, the manufacturing cost of the display device can be reduced.

[0154] In the display device 100 according to an embodiment of the present disclosure, the substrate 110 is made of either a transparent conductive oxide or an oxide semiconductor. Therefore, a laser lift-off (LLO) process can be performed. During the manufacturing process of the display device 100, pixel portions 120 can be formed on the substrate 110 by attaching a temporary substrate having a sacrificial layer to the lower portion of the substrate 110. The sacrificial layer can be made of, for example, hydrogenated amorphous silicon or hydrogenated and doped amorphous silicon. Furthermore, when a laser beam is emitted to the lower portion of the temporary substrate after the display device 100 has been fully manufactured, the sacrificial layer can be dehydrogenated, and the sacrificial layer and the temporary substrate can be separated from the substrate 110. In this case, transparent conductive oxides and oxide semiconductors are materials that can undergo the LLO process together with the sacrificial layer and the temporary substrate. Therefore, even if the substrate 110 is made of either a transparent conductive oxide or an oxide semiconductor, the substrate 110 and the temporary substrate can be easily separated. Therefore, in the display device 100 according to the embodiments of the present disclosure, the substrate 110 is made of either a transparent conductive oxide layer or an oxide semiconductor that can undergo the LLO process. Therefore, the display device 100 can be easily manufactured even using processes and equipment from the related art.

[0155] Furthermore, in the display device 100 according to the embodiments of this disclosure, the signal lines for transmitting AC voltage are arranged so as not to overlap with the substrate 110. Therefore, parasitic capacitance appearing in the signal lines for transmitting AC voltage can be reduced.

[0156] Specifically, when the substrate 110 is made of transparent conductive oxide or oxide semiconductor, parasitic capacitance may occur between the substrate 110 and the signal lines. In particular, a large amount of parasitic capacitance may occur in signal lines used to transmit AC voltage, such as data lines DL or reference lines RL, which may cause noise in the signal lines. When parasitic capacitance occurs in signal lines such as data lines DL or reference lines RL as described above, RC delay may occur.

[0157] Therefore, in the display device 100 according to the embodiment of the present disclosure, a plurality of substrates 110 are arranged to be spaced apart from each other, and signal lines for transmitting AC voltage are arranged in the areas where the plurality of substrates 110 are spaced apart from each other. Therefore, the substrates 110 made of transparent conductive oxide or oxide semiconductor are arranged so as not to overlap with the signal lines for receiving AC voltage. Therefore, parasitic capacitance appearing in the signal lines for transmitting AC voltage can be minimized. Therefore, in the display device 100 according to the embodiment of the present disclosure, the signal lines for transmitting AC voltage are arranged so as not to overlap with the plurality of substrates 110. Therefore, parasitic capacitance appearing in the signal lines for transmitting AC voltage can be reduced and RC delay caused by noise appearing in the signal lines can be minimized.

[0158] Figure 6 This is a cross-sectional view of a display device according to another embodiment of the present disclosure. In addition to the storage capacitor SC, it also includes a fourth capacitor electrode SC4. Figure 6 The display device 600 shown in the figure and Figures 1 to 5 The display devices 100 shown are substantially identical in configuration. Therefore, repeated descriptions of the same components will be omitted.

[0159] Reference Figure 6 The storage capacitor SC includes a first capacitor electrode SC1, a second capacitor electrode SC2, a third capacitor electrode SC3, and a fourth capacitor electrode SC4. The first capacitor electrode to the third capacitor electrode SC1, SC2, and SC3 are connected to... Figures 1 to 5 The first capacitor electrode to the third capacitor electrode SC1, SC2 and SC3 shown are essentially the same.

[0160] The fourth capacitor electrode SC4 can be a substrate 110 electrically connected to the second capacitor electrode SC2. That is, the substrate 110 can be used as the fourth capacitor electrode SC4 of the storage capacitor SC. In this case, the fourth capacitor electrode SC4 can be electrically connected to the second capacitor electrode SC2 through contact holes formed in the insulating layer IN and the buffer layer 111.

[0161] According to another embodiment of this disclosure, the display device 600 includes a first capacitor electrode SC1, a second capacitor electrode SC2, a third capacitor electrode SC3, and a fourth capacitor electrode SC4. Therefore, when the light-emitting element OLED emits light, the voltage between the first gate electrode GE1 and the first source electrode SE1 of the first transistor TR1 can be constantly maintained to keep the light-emitting element OLED in a constant state.

[0162] Specifically, the first capacitor electrode SC1 of the storage capacitor SC can be integrally formed with the light-blocking layer LS and electrically connected to the light-blocking layer LS, the first source electrode SE1, and the third source electrode SE3. The second capacitor electrode SC2 can be integrally formed with the second source electrode SE2 or the second active layer ACT2 and electrically connected to the second source electrode SE2 and the first gate electrode GE1. Furthermore, the third capacitor electrode SC3 can extend from the anode AN of the light-emitting element OLED and be electrically connected to the second capacitor electrode SC2. The fourth capacitor electrode SC4 can be a substrate 110 electrically connected to the second capacitor electrode SC2 through a contact hole formed in the insulating layer IN and the buffer layer 111. In this case, the fourth capacitor electrode SC4 and the first capacitor electrode SC1 can overlap with the insulating layer IN placed between them, and the fourth capacitor electrode SC4 together with the first capacitor electrode SC1 defines a capacitor. Therefore, since the display device 600 according to the embodiments of the present disclosure includes a first capacitor electrode SC1, a second capacitor electrode SC2, a third capacitor electrode SC3, and a fourth capacitor electrode SC4, a capacitor constituting the storage capacitor SC can be additionally provided, for example, a capacitor including the first capacitor electrode SC1 and the fourth capacitor electrode SC4. Therefore, the display device 600 according to the embodiments of the present disclosure can reduce parasitic capacitance in the signal lines used to transmit AC voltage, increase the capacitance of the storage capacitor SC, and operate the light-emitting element OLED more stably.

[0163] Figure 7A This is an enlarged top view of a display device according to yet another embodiment of the present disclosure. Figure 7B yes Figure 7A An enlarged top view of multiple substrates in the diagram. For ease of description, Figure 7B Only the plurality of substrates 710 among the various constituent elements of the display device 700 are shown. Besides the arrangement of the plurality of substrates 710, Figure 7A and Figure 7B The display device 700 shown is Figure 6 The display devices 600 shown are substantially identical in configuration. Therefore, repeated descriptions of identical components will be omitted.

[0164] Reference Figure 7A and Figure 7B Multiple substrates 710 can be arranged in a matrix to correspond to multiple sub-pixels SP. That is, each substrate 710 can be patterned and arranged to correspond to a single sub-pixel SP. Therefore, in the display area AA, the number of substrates 710 can be equal to the number of sub-pixels SP.

[0165] In the display device 700 according to an embodiment of the present disclosure, a plurality of substrates 710 may be arranged in a matrix shape to correspond to a plurality of sub-pixels SP respectively. Therefore, the plurality of sub-pixels SP for receiving different signals can be operated more stably.

[0166] Specifically, multiple substrates 710 are arranged to be spaced apart from each other, and signal lines, such as data lines DL or reference lines RL for transmitting AC voltage, are arranged in the areas where the multiple substrates 710 are spaced apart. Therefore, the substrates 710 made of transparent conductive oxide or oxide semiconductor are arranged so as not to overlap with the signal lines for receiving AC voltage. Thus, parasitic capacitance appearing in the signal lines for transmitting AC voltage can be minimized.

[0167] Furthermore, in the display device 700 according to the embodiments of the present disclosure, a plurality of substrates 710 can be arranged in a matrix shape to correspond to a plurality of sub-pixels SP. That is, the plurality of substrates 710 can be patterned and arranged to correspond to a plurality of sub-pixels SP. Therefore, the plurality of substrates 710 respectively disposed in the plurality of sub-pixels SP can be electrically isolated from each other. The plurality of fourth capacitor electrodes SC4 disposed in the plurality of sub-pixels SP can also be electrically isolated from each other. Therefore, in the display device 700 according to the embodiments of the present disclosure, a plurality of substrates 710 can be arranged in a matrix shape to correspond to a plurality of sub-pixels SP. Therefore, the plurality of sub-pixels SP used for receiving different signals can be operated more stably.

[0168] Figure 8 This is a cross-sectional view of a display device according to another embodiment of the present disclosure. In addition to the light-blocking layer connection portion LSa, Figure 8 The display device 800 shown is Figures 1 to 5 The display devices 100 shown are substantially identical in configuration. Therefore, repeated descriptions of the same components will be omitted.

[0169] Reference Figure 8 The first source electrode SE1 can be electrically connected to the light-blocking layer LS through contact holes formed in the gate insulating layer 112 and the buffer layer 111. Additionally, a portion of the first active layer ACT1 connected to the first source electrode SE1 can be electrically connected to the light-blocking layer LS through contact holes formed in the buffer layer 111. However, this specification has already described the configuration of connecting the light-blocking layer LS to the first source electrode SE1. However, the light-blocking layer LS can also be connected to the first drain electrode DE1. This disclosure is not limited thereto.

[0170] Furthermore, a light-blocking layer connection portion LSa can be disposed on the light-blocking layer LS. The light-blocking layer connection portion LSa extends from the light-blocking layer LS and is connected to the substrate 110 through a contact hole formed in the insulating layer IN. Therefore, the light-blocking layer LS can be electrically connected to the substrate 110 through the light-blocking layer connection portion LSa.

[0171] In the display device 800 according to an embodiment of the present disclosure, a light-blocking layer connection portion LSa is also provided on the light-blocking layer LS. Therefore, the substrate 110 and the light-blocking layer LS can be electrically connected. Therefore, the first source electrode SE1 can be electrically connected to the substrate 110, thereby operating the first transistor TR1 more stably.

[0172] Specifically, when a substrate made of transparent conductive oxide or oxide semiconductor is floated, the threshold voltage of the first transistor changes, which may affect the operation of the display device. Therefore, the light-blocking layer LS connected to the first source electrode SE1 can be electrically connected to the substrate 110, thereby applying a voltage equal to the voltage of the first source electrode SE1 to the substrate 110. Therefore, the influence of the substrate 110, which is disposed on the lower part of the light-blocking layer LS, on the operation of the first transistor TR1 can be minimized. Therefore, in the display device 800 according to the embodiment of the present disclosure, a light-blocking layer connection portion LSa is also disposed on the light-blocking layer LS. Therefore, the substrate 110 and the light-blocking layer LS can be electrically connected. Therefore, the first source electrode SE1 can be electrically connected to the substrate 110, thereby operating the first transistor TR1 more stably.

[0173] Figure 9A This is an enlarged top view of a display device according to another embodiment of the present disclosure. Figure 9B yes Figure 9A An enlarged top view of multiple substrates in the diagram. For ease of description, Figure 9B Only the plurality of substrates 910 among the various constituent elements of the display device 900 are shown. Besides the arrangement of the plurality of substrates 910, Figure 9A and Figure 9B The display device 900 shown in the figure and Figure 8 The display devices 800 shown are substantially identical in configuration. Therefore, repeated descriptions of the same components will be omitted.

[0174] Reference Figure 9A and Figure 9B Multiple substrates 910 can be arranged in a matrix to correspond to multiple sub-pixels SP. That is, each substrate 910 can be patterned and arranged to correspond to a single sub-pixel SP. Therefore, in the display area AA, the number of substrates 910 can be equal to the number of sub-pixels SP.

[0175] In the display device 900 according to an embodiment of the present disclosure, a plurality of substrates 910 may be arranged in a matrix shape to correspond to a plurality of sub-pixels SP respectively. Therefore, the plurality of sub-pixels SP for receiving different signals can be operated more stably.

[0176] Specifically, multiple substrates 910 are arranged to be spaced apart from each other, and signal lines, such as data lines DL or reference lines RL for transmitting AC voltage, are arranged in the areas where the multiple substrates 910 are spaced apart. Therefore, the substrates 910 made of transparent conductive oxide or oxide semiconductor are arranged so as not to overlap with the signal lines for receiving AC voltage. Thus, parasitic capacitance appearing in the signal lines for transmitting AC voltage can be minimized.

[0177] Furthermore, in the display device 900 according to the embodiments of the present disclosure, a plurality of substrates 910 can be arranged in a matrix shape to correspond to a plurality of sub-pixels SP. That is, the plurality of substrates 910 can be patterned and arranged to correspond to a plurality of sub-pixels SP. Therefore, the plurality of substrates 910 arranged in the plurality of sub-pixels SP can be electrically isolated from each other. Therefore, in the display device 900 according to the embodiments of the present disclosure, a plurality of substrates 910 can be arranged in a matrix shape to correspond to a plurality of sub-pixels SP. Therefore, the plurality of sub-pixels SP used for receiving different signals can be operated more stably.

[0178] Figure 10 This is a cross-sectional view of a display device according to another embodiment of the present disclosure. Except for the third capacitor electrode SC3, Figure 10 The display device 1000 shown is Figures 1 to 5 The display devices 100 shown are substantially identical in configuration. Therefore, repeated descriptions of the same components will be omitted.

[0179] Reference Figure 10 The storage capacitor SC includes a first capacitor electrode SC1, a second capacitor electrode SC2, and a third capacitor electrode SC3. The first capacitor electrode SC1 and the second capacitor electrode SC2 are connected to... Figures 1 to 5 The first capacitor electrode SC1 and the second capacitor electrode SC2 shown are essentially the same.

[0180] Reference Figure 10The gate insulating layer 112 can be disposed on the second capacitor electrode SC2. A third capacitor electrode SC3, made of the same material as the first gate electrode GE1, can be disposed on the gate insulating layer 112. The third capacitor electrode SC3 can be disposed overlapping the first capacitor electrode SC1 and the second capacitor electrode SC2. Therefore, the third capacitor electrode SC3, together with the first capacitor electrode SC1 and the second capacitor electrode SC2, can define a capacitor. In this case, the anode AN of the light-emitting element OLED can be disposed so as not to overlap with the third capacitor electrode SC3. Therefore, the anode AN and the third capacitor electrode SC3 will not electrically interfere with each other.

[0181] The display device 1000 according to an embodiment of the present disclosure includes a first capacitor electrode SC1, a second capacitor electrode SC2, and a third capacitor electrode SC3. Therefore, when the light-emitting element OLED emits light, the voltage of the first gate electrode GE1 and the first source electrode SE1 of the first transistor TR1 can be constantly maintained to keep the light-emitting element OLED in a constant state.

[0182] Specifically, the first capacitor electrode SC1 of the storage capacitor SC can be integrally formed with the light-blocking layer LS and electrically connected to the light-blocking layer LS, the first source electrode SE1, and the third source electrode SE3. Furthermore, the second capacitor electrode SC2 can be integrally formed with the second source electrode SE2 or the second active layer ACT2 and electrically connected to the second source electrode SE2 and the first gate electrode GE1. Additionally, the third capacitor electrode SC3 can be made of the same material as the first gate electrode GE1 and is arranged to overlap with the second capacitor electrode SC2, thereby defining a capacitor together with the second capacitor electrode SC2, wherein the gate insulating layer 112 is disposed between the third capacitor electrode SC3 and the second capacitor electrode SC2. Therefore, the overlapping first capacitor electrode SC1 and the second capacitor electrode SC2, with the buffer layer 111 disposed between them, and the overlapping second capacitor electrode SC2 and the third capacitor electrode SC3, with the gate insulating layer 112 disposed between them, can maintain the light-emitting element OLED in a constant state by constantly maintaining the voltage of the first gate electrode GE1 and the first source electrode SE1 of the first transistor TR1 when the light-emitting element OLED emits light. Therefore, the display device 1000 according to the embodiments of this disclosure includes a first capacitor electrode SC1, a second capacitor electrode SC2, and a third capacitor electrode SC3. Therefore, when the light-emitting element OLED emits light, the voltage between the first gate electrode GE1 and the first source electrode SE1 of the first transistor TR1 can be constantly maintained to keep the light-emitting element OLED in a constant state. Therefore, the light-emitting element OLED can be operated more stably.

[0183] Exemplary embodiments of this disclosure can also be described as follows:

[0184] According to one aspect of this disclosure, a display device may include: a plurality of substrates disposed in a plurality of sub-pixels and composed of one of a transparent conductive oxide layer or an oxide semiconductor layer; a plurality of transistors disposed on the plurality of substrates and disposed in the plurality of sub-pixels; a plurality of data lines extending in a column direction between the plurality of sub-pixels and configured to transmit data voltage to the plurality of sub-pixels; and a plurality of light-emitting elements disposed in the plurality of sub-pixels and electrically connected to the plurality of transistors, wherein the plurality of substrates are disposed spaced apart from each other, and wherein the plurality of data lines are disposed in the regions where the plurality of substrates are spaced apart from each other.

[0185] Multiple substrates can extend along the column direction.

[0186] The display device may further include: a light-blocking layer disposed on a plurality of substrates to overlap with a plurality of transistors; and a storage capacitor including a fourth capacitor electrode serving as a plurality of substrates, a first capacitor electrode made of the same material as the light-blocking layer, and a second capacitor electrode made of the same material as the active layer of the plurality of transistors, wherein the fourth capacitor electrode and the second capacitor electrode are connected to each other.

[0187] The storage capacitor may also include a third capacitor electrode, which is made of the same material as the anode of the plurality of light-emitting elements, or of the same material as the gate electrode of the plurality of transistors.

[0188] Multiple substrates can be spaced apart from each other to correspond to multiple sub-pixels respectively.

[0189] The display device may also include a light-blocking layer disposed on multiple substrates to overlap with multiple transistors.

[0190] The photoblocking layer can be connected to the source or drain electrodes of multiple transistors, and multiple substrates can be connected to the photoblocking layer.

[0191] Multiple transistors can be driving transistors.

[0192] Multiple substrates can be arranged in a matrix shape to correspond to multiple sub-pixels.

[0193] The display device may also include multiple reference lines that extend along the column direction between multiple sub-pixels and are configured to transmit a reference voltage to the multiple sub-pixels.

[0194] Multiple reference lines can be laid out in areas where multiple substrates are spaced apart from each other.

[0195] The edges of multiple substrates that face multiple data lines and multiple reference lines can be parallel to the multiple data lines and multiple reference lines.

[0196] According to another aspect of this disclosure, the display device may include: a plurality of substrates formed of one of a transparent conductive oxide layer or an oxide semiconductor layer, and having pixel regions in which a plurality of sub-pixels are disposed; a plurality of transistors electrically connected to the plurality of sub-pixels respectively; a plurality of signal lines extending in a column direction between the plurality of sub-pixels and configured to transmit an alternating current voltage; and a plurality of light-emitting elements disposed in the plurality of sub-pixels and electrically connected to the plurality of transistors, wherein the plurality of substrates are disposed spaced apart from each other, and wherein the plurality of signal lines are disposed in the regions in which the plurality of substrates are spaced apart from each other.

[0197] The display device may also include: a light-blocking layer arranged to overlap with a plurality of transistors; and a storage capacitor including a plurality of capacitor electrodes.

[0198] The multiple capacitor electrodes may include: a fourth capacitor electrode serving as a plurality of substrates; a first capacitor electrode made of the same material as the light-blocking layer; and a second capacitor electrode made of the same material as the active layer of a plurality of transistors.

[0199] The storage capacitor may also include a third capacitor electrode, which is made of the same material as the anode of the plurality of light-emitting elements, or of the same material as the gate electrode of the plurality of transistors.

[0200] Multiple substrates can be spaced apart from each other to correspond to multiple sub-pixels respectively.

[0201] The display device may also include a light-blocking layer disposed on multiple substrates to overlap with multiple transistors.

[0202] The photoblocking layer can be connected to the source or drain electrodes of multiple transistors, and multiple substrates can be connected to the photoblocking layer.

[0203] Although exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be embodied in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are illustrative in all respects and do not limit the present disclosure. The scope of protection of the present disclosure should be interpreted based on the appended claims, and all technical concepts within the equivalent scope thereof should be interpreted as falling within the scope of the present disclosure.

Claims

1. A display device, comprising: Multiple substrates are disposed in multiple sub-pixels and are composed of one of a transparent conductive oxide layer or an oxide semiconductor layer, and the multiple substrates are disposed on the same layer. Multiple transistors are disposed on multiple substrates and are disposed in multiple sub-pixels; Multiple data lines extend along the column direction between the multiple sub-pixels and are configured to transmit data voltage to the multiple sub-pixels; as well as Multiple light-emitting elements are disposed in the multiple sub-pixels and electrically connected to the multiple transistors. The plurality of substrates are arranged to be spaced apart from each other, and The multiple data lines are arranged in the areas where the multiple substrates are spaced apart from each other.

2. The display device according to claim 1, wherein, The plurality of substrates extend along the column direction.

3. The display device according to claim 1, further comprising: A light-blocking layer is disposed on the plurality of substrates to overlap with the plurality of transistors; as well as Multiple storage capacitors are disposed in the multiple sub-pixels. Each storage capacitor includes: a fourth capacitor electrode serving as the multiple substrates; a first capacitor electrode made of the same material as the light-blocking layer; and a second capacitor electrode made of the same material as the active layer of the multiple transistors. The fourth capacitor electrode and the second capacitor electrode are connected to each other.

4. The display device according to claim 3, wherein, Each storage capacitor also includes a third capacitor electrode, which is made of the same material as the anode of the plurality of light-emitting elements, or the same material as the gate electrode of the plurality of transistors.

5. The display device according to claim 3, wherein, The plurality of substrates are spaced apart from each other to correspond to the plurality of sub-pixels respectively.

6. The display device according to claim 1, further comprising: A light-blocking layer is disposed on the plurality of substrates to overlap with the plurality of transistors. The light-blocking layer is connected to the source or drain electrodes of the plurality of transistors, and the plurality of substrates are connected to the light-blocking layer.

7. The display device according to claim 6, wherein, Each of the plurality of transistors is a driving transistor.

8. The display device according to claim 6, wherein, The plurality of substrates are arranged in a matrix shape to correspond to the plurality of sub-pixels respectively.

9. The display device according to claim 1, further comprising: Multiple reference lines extend along the column direction between the multiple sub-pixels and are configured to transmit a reference voltage to the multiple sub-pixels. The multiple reference lines are arranged in the regions where the multiple substrates are spaced apart from each other.

10. The display device according to claim 9, wherein, The edge of one of the edges of the plurality of substrates facing the plurality of data lines and the plurality of reference lines is parallel to the plurality of data lines and the plurality of reference lines.

11. A display device, comprising: Multiple substrates, the multiple substrates being composed of one of a transparent conductive oxide layer or an oxide semiconductor layer, and having a pixel region with multiple sub-pixels disposed thereon, the multiple substrates being disposed on the same layer; Multiple transistors are electrically connected to the multiple sub-pixels respectively; Multiple signal lines extend along the column direction between the multiple sub-pixels and are configured to transmit AC voltage; as well as Multiple light-emitting elements are disposed in the multiple sub-pixels and electrically connected to the multiple transistors. The plurality of substrates are arranged to be spaced apart from each other, and The multiple signal lines are arranged in the areas where the multiple substrates are spaced apart from each other.

12. The display device according to claim 11, further comprising: A light-blocking layer is arranged to overlap with the plurality of transistors; as well as Multiple storage capacitors, each storage capacitor including multiple capacitor electrodes, The plurality of capacitor electrodes include: As the fourth capacitor electrode of the plurality of substrates; A first capacitor electrode made of the same material as the light-blocking layer; and A second capacitor electrode made of the same material as the active layer of the plurality of transistors.

13. The display device according to claim 12, wherein, Each storage capacitor also includes a third capacitor electrode, which is made of the same material as the anode of the plurality of light-emitting elements, or the same material as the gate electrode of the plurality of transistors.

14. The display device according to claim 11, wherein, The plurality of substrates are spaced apart from each other to correspond to the plurality of sub-pixels respectively.

15. The display device according to claim 11, further comprising: A light-blocking layer is disposed on the plurality of substrates to overlap with the plurality of transistors. The light-blocking layer is connected to the source or drain electrodes of the plurality of transistors, and the plurality of substrates are connected to the light-blocking layer.

Images