Voltage compensation control method and device based on unified power quality controller

Abstract

This invention provides a voltage compensation control method and apparatus based on a unified power quality controller. The unified power quality controller includes a front-end parallel converter and a back-end series converter. The series converter includes three single-phase full-bridge inverters, and the output terminals of the three single-phase full-bridge inverters are respectively connected to the three phase lines of the load. The voltage compensation control method includes the following steps: obtaining the voltage of the phase line to be compensated, and obtaining a reference voltage of the phase line to be compensated based on the voltage of the phase line to be compensated; subtracting the reference voltage from the voltage of the phase line to be compensated to obtain a compensation reference voltage, and performing voltage outer loop control based on the compensation reference voltage to obtain a reference current of the phase line to be compensated; obtaining the current of the phase line to be compensated, and performing current inner loop control based on the difference between the reference current and the current of the phase line to be compensated to obtain a compensation voltage; and controlling the single-phase full-bridge inverter connected to the phase line to be compensated based on the compensation voltage.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, specifically to a voltage compensation control method and a voltage compensation control device based on a unified power quality controller. Background Technology

[0002] An active distribution network consists of distributed generation, flexible loads, energy storage systems, and control devices. Unlike traditional distribution networks, which include distributed generation, active distribution networks incorporate smaller-capacity distributed generation devices in addition to the distribution equipment, power grid, and loads found in traditional networks. While actively distribution networks fully leverage the advantages of various clean energy sources, they also face the increasingly prominent challenge of power quality issues. The increasing number of nonlinear loads, such as power electronic devices, negatively impacts the power quality of active distribution networks, exacerbating existing power quality problems in traditional distribution networks.

[0003] Currently, voltage sags are a common power quality problem, especially frequent voltage sags. A reliable and effective compensation method is needed to achieve real-time voltage compensation. Summary of the Invention

[0004] To address the aforementioned technical problems, this invention provides a voltage compensation control method and device based on a unified power quality controller. This method can instantaneously compensate for voltage dips, protect sensitive loads, and has high reliability. Furthermore, since the compensation is performed based on the original power supply relationship, it only needs to compensate for the portion of the voltage amplitude reduction, eliminating the need to configure full-power power electronic devices according to load requirements. Consequently, the corresponding equipment is smaller in size and has relatively higher reliability.

[0005] The technical solution adopted in this invention is as follows:

[0006] A voltage compensation control method based on a unified power quality controller, wherein the unified power quality controller includes a front-end parallel converter and a back-end series converter, the series converter including three single-phase full-bridge inverters, the output terminals of the three single-phase full-bridge inverters being respectively connected to three phase lines of the load, the voltage compensation control method comprising the following steps: obtaining the voltage of the phase line to be compensated, and obtaining a reference voltage of the phase line to be compensated based on the voltage of the phase line to be compensated; subtracting the reference voltage from the voltage of the phase line to be compensated to obtain a compensation reference voltage, and performing voltage outer loop control based on the compensation reference voltage to obtain a reference current of the phase line to be compensated; obtaining the current of the phase line to be compensated, and performing current inner loop control based on the difference between the reference current and the current of the phase line to be compensated to obtain a compensation voltage; and controlling the single-phase full-bridge inverter connected to the phase line to be compensated based on the compensation voltage.

[0007] Obtaining the reference voltage of the phase line to be compensated based on its voltage specifically includes: obtaining the positive and negative sequence fundamental frequency components of the voltage of the phase line to be compensated in the αβ coordinate system through a phase-locked loop based on a generalized second-order integrator; transforming the positive sequence fundamental frequency component of the voltage of the phase line to be compensated in the αβ coordinate system to the abc coordinate system through an inverse clack transform to obtain the reference voltage of the phase line to be compensated.

[0008] The voltage outer loop transfer function for voltage outer loop control is designed using a multiple quasi-PR resonant controller. The transfer function of the single quasi-PR resonant controller is as follows:

[0009]

[0010] Where, k p k is the proportional gain coefficient. r ω is the resonance enhancement coefficient. c Let ω be the cutoff frequency and ω0 be the fundamental frequency. By combining multiple quasi-PR controllers at specified frequencies, the resulting voltage outer loop transfer function is:

[0011] G U (s)=(k p +G qPR1 +G qPR3 +G qPR7 +G qPR9 +…+G qPRi )G I (s)(i=2n+1,n∈N + )

[0012] Among them, G I (s) represents the current inner loop transfer function for performing current inner loop control.

[0013] The transfer function of the inner current loop is:

[0014]

[0015] Among them, K c T is the proportional gain coefficient of the current loop. d The sampling period is This represents the sampling delay stage, where L and C are the inductance and capacitance of the LC filter circuit between the phase line to be compensated and the single-phase full-bridge inverter connected thereto, respectively, and R... L The equivalent resistance of the inductor is given.

[0016] Controlling the single-phase full-bridge inverter connected to the phase line to be compensated according to the compensation voltage specifically includes: calculating the duty cycle of the switching transistor drive signal in the single-phase full-bridge inverter connected to the phase line to be compensated according to the compensation voltage.

[0017] A voltage compensation control device based on a unified power quality controller, wherein the unified power quality controller includes a front-end parallel converter and a back-end series converter, the series converter including three single-phase full-bridge inverters, the output terminals of the three single-phase full-bridge inverters being respectively connected to three phase lines of a load, the voltage compensation control device comprising: an acquisition module for acquiring the voltage of the phase line to be compensated, and acquiring a reference voltage of the phase line to be compensated based on the voltage of the phase line to be compensated; a first control module for subtracting the reference voltage of the phase line to be compensated from the voltage to obtain a compensation reference voltage, and performing voltage outer loop control based on the compensation reference voltage to obtain a reference current of the phase line to be compensated; a second control module for acquiring the current of the phase line to be compensated, and performing current inner loop control based on the difference between the reference current of the phase line to be compensated and the current to obtain a compensation voltage; and a third control module for controlling the single-phase full-bridge inverters connected to the phase line to be compensated based on the compensation voltage.

[0018] The acquisition module is specifically used to: acquire the positive and negative sequence fundamental frequency components of the voltage of the phase line to be compensated in the αβ coordinate system through a phase-locked loop based on a generalized second-order integrator; transform the positive sequence fundamental frequency component of the voltage of the phase line to be compensated in the αβ coordinate system to the abc coordinate system through an inverse clack transform to obtain the reference voltage of the phase line to be compensated.

[0019] The voltage outer loop transfer function for voltage outer loop control is designed using a multiple quasi-PR resonant controller. The transfer function of the single quasi-PR resonant controller is as follows:

[0020]

[0021] Where, k p k is the proportional gain coefficient. r ω is the resonance enhancement coefficient. c Let ω be the cutoff frequency and ω0 be the fundamental frequency. By combining multiple quasi-PR controllers at specified frequencies, the resulting voltage outer loop transfer function is:

[0022] G U (s)=(k p +G qPR1 +G qPR3 +G qPR7 +G qPR9 +…+G qPRi )G I (s)(i=2n+1,n∈N + )

[0023] Among them, G I (s) represents the current inner loop transfer function for performing current inner loop control.

[0024] The transfer function of the inner current loop is:

[0025]

[0026] Among them, K c T is the proportional gain coefficient of the current loop. d The sampling period is This represents the sampling delay stage, where L and C are the inductance and capacitance of the LC filter circuit between the phase line to be compensated and the single-phase full-bridge inverter connected thereto, respectively, and R... L The equivalent resistance of the inductor is given.

[0027] The third control module is specifically used to: calculate the duty cycle of the switching transistor drive signal in the single-phase full-bridge inverter connected to the phase line to be compensated based on the compensation voltage.

[0028] The beneficial effects of this invention are:

[0029] This invention uses dual closed-loop control of the voltage outer loop and the current inner loop to instantaneously compensate for voltage dips, protect sensitive loads, and has high reliability. Furthermore, since the compensation is based on the original power supply relationship, it only needs to compensate for the portion of the voltage amplitude reduction, without the need to configure full-power power electronic devices according to load requirements. The corresponding equipment is smaller in size and has relatively higher reliability. Attached Figure Description

[0030] Figure 1 This is a topology diagram of a power grid system with a unified power quality controller according to an embodiment of the present invention;

[0031] Figure 2 This is a flowchart of a voltage compensation control method based on a unified power quality controller according to an embodiment of the present invention;

[0032] Figure 3 This is a schematic diagram of the topology and voltage compensation control structure of a single-phase full-bridge inverter in a series converter according to an embodiment of the present invention;

[0033] Figure 4 This is a schematic diagram of a dual closed-loop control structure consisting of an outer voltage loop and an inner current loop, according to an embodiment of the present invention.

[0034] Figure 5 This is a block diagram of a voltage compensation control device based on a unified power quality controller, according to an embodiment of the present invention. Detailed Implementation

[0035] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0036] like Figure 1 As shown, the power grid system of this embodiment includes a three-phase power grid, loads, and a unified power quality controller located between the three-phase power grid and the loads. It also includes a multi-winding transformer and necessary bypass switches. The unified power quality controller includes a front-end parallel converter and a rear-end series converter, as well as a DC link between them. The multi-winding transformer has three windings: winding 1 is the primary-side three-phase input winding, connected to the three-phase input power grid; windings 2 and 3 are secondary-side output windings. Winding 2 is used to connect to the load, and winding 3, as the input winding of the series / parallel converter, provides power input to the power electronic converter via a filter inductor. The AC side of the front-end parallel converter is connected to the output side of winding 3 via a filter inductor, essentially acting as a three-phase full-bridge rectifier to achieve AC-to-DC rectification. A corresponding detection mechanism can determine whether real-time reactive current compensation is needed. The subsequent series converter consists of three single-phase full-bridge inverters. The outputs of these three inverters are connected to the three phases of the load via corresponding LC filter circuits. These inverters can be connected in series with the three-phase power grid via capacitive coupling for real-time voltage dip compensation. The intermediate DC-DC link maintains voltage stability through capacitor energy storage and serves as the site for energy exchange and AC-DC conversion.

[0037] like Figure 2 As shown, the voltage compensation control method based on a unified power quality controller according to an embodiment of the present invention includes the following steps:

[0038] S1, obtain the voltage of the phase line to be compensated, and obtain the reference voltage of the phase line to be compensated based on the voltage of the phase line to be compensated.

[0039] Figure 3 Taking any single-phase full-bridge inverter as an example, a single-phase full-bridge inverter includes four switching transistors: T1, T2, T3, and T4. Its AC side is connected in series with an LC filter circuit in the corresponding phase line to provide voltage compensation to the power grid. The variables in the diagram represent the following: L and C are the inductance and capacitance of the LC filter circuit, respectively; R... L I is the equivalent resistance of the inductor. L I is the current in the inductor. Z U is the load current, Z is the equivalent impedance of the load, and U is the load current. g U is the voltage of that phase line. oU is the output voltage of a single-phase full-bridge inverter. dc This is the DC voltage of the energy storage capacitor in the intermediate stage DC link.

[0040] The phase line to be compensated can be any phase line that the system determines needs to be compensated, such as... Figure 3 As shown, after acquiring the voltage U of the phase line to be compensated... g Then, the positive and negative sequence fundamental frequency components of the voltage of the phase line to be compensated in the αβ coordinate system can be obtained through a phase-locked loop (SOGI-PLL) based on a generalized second-order integrator. The positive sequence fundamental frequency component of the voltage of the phase line to be compensated in the αβ coordinate system is then transformed to the abc coordinate system using an inverse Clack transform to obtain the reference voltage U of the phase line to be compensated. ref *

[0041] In one embodiment of the present invention, the positive and negative sequence fundamental frequency components of the voltage of the phase line to be compensated output by the phase-locked loop of the generalized second-order integrator in the αβ coordinate system are:

[0042]

[0043]

[0044] Where uα and uβ are the voltage components of the phase line to be compensated on the α and β axes, respectively, the superscripts + and - represent the corresponding positive and negative sequence fundamental frequency components, k is the gain coefficient of the generalized second-order integrator, ω is the angular frequency of the power grid system, and s is the Laplace operator.

[0045] By using a phase-locked loop with a generalized second-order integrator to obtain the positive and negative sequence fundamental frequency components of the voltage, the drawback of traditional software-implemented phase-locked loops that cannot accurately lock the phase when the grid voltage is unbalanced or contains large harmonics is overcome, thus enabling the unified power quality controller to have a larger voltage compensation range.

[0046] S2, the difference between the reference voltage of the phase line to be compensated and the voltage is calculated to obtain the compensation reference voltage, and the voltage outer loop control is performed based on the compensation reference voltage to obtain the reference current of the phase line to be compensated.

[0047] S3: Obtain the current of the phase line to be compensated, and obtain the compensation voltage by controlling the difference between the reference current and the current of the phase line to be compensated through the inner current loop.

[0048] The dual closed-loop control structure, which performs voltage outer loop control and current inner loop control, can be described as follows: Figure 4 As shown.

[0049] In one embodiment of the present invention, the voltage outer loop transfer function G for voltage outer loop control is... U (s) can be designed using a multi-quasi-PR resonant controller.

[0050] The transfer function of the single quasi-PR resonant controller is:

[0051]

[0052] Where, k p k is the proportional gain coefficient. r ω is the resonance enhancement coefficient. c ω is the cutoff frequency, and ω0 is the fundamental frequency.

[0053] By combining multiple quasi-PR controllers at specified frequencies, the voltage outer loop transfer function can be obtained as follows:

[0054] G U (s)=(k p +G qPR1 +G qPR3 +G qPR7 +G qPR9 +…+G qPRi )G I (s)(i=2n+1,n∈N + )

[0055] Among them, G I (s) represents the current inner loop transfer function for current inner loop control, and the current inner loop transfer function is:

[0056]

[0057] Among them, K c T is the proportional gain coefficient of the current loop. d The sampling period is This represents the sampling delay stage, where L and C are the inductance and capacitance of the LC filter circuit between the phase line to be compensated and the single-phase full-bridge inverter connected thereto, respectively, and R... L This is the equivalent resistance of the inductor.

[0058] Reference Figure 3 and Figure 4 The reference voltage U of the phase line to be compensated can be... ref *and voltage U g By subtracting the values, we obtain the compensated reference voltage U. c * will compensate reference voltage U c *and compensation voltage U c The difference between the feedback values ​​is used as the voltage outer loop transfer function G. U The input of (s) is determined by the voltage outer loop transfer function G. U (s) Output the reference current I of the phase line to be compensated L * Then, the reference current I of the phase line to be compensated... L *and current I L The difference in input current inner loop transfer function GI (s), after sampling delay and SPWM, the output voltage U of the single-phase full-bridge inverter is obtained. o After passing through various stages of the LC filter circuit, the final compensation voltage U is obtained. c .

[0059] The SPWM stage represents the gain of the equivalent linear stage in a single-phase full-bridge inverter. The mathematical model of the LC filter circuit is as follows:

[0060]

[0061] S4 controls the single-phase full-bridge inverter connected to the phase line to be compensated based on the compensation voltage.

[0062] It should be understood that the output voltage U of a single-phase full-bridge inverter o and the final compensation voltage U c The magnitude of is determined by the duty cycle of the drive signal of the switching transistor (such as IGBT) in the single-phase full-bridge inverter, i.e., the PWM signal. Therefore, it can be determined based on the compensation voltage U. c Calculate the duty cycle of the switching transistor drive signal in the single-phase full-bridge inverter with the phase line to be compensated, implement SPWM, and realize instantaneous compensation for voltage drop of the phase line to be compensated.

[0063] According to the voltage compensation control method based on a unified power quality controller according to the present invention, the voltage sag can be instantaneously compensated through dual closed-loop control of the voltage outer loop and the current inner loop, protecting sensitive loads and exhibiting high reliability. Furthermore, since the compensation is performed based on the original power supply relationship, only the portion of the voltage amplitude reduction needs to be compensated, and there is no need to configure full-power power electronic devices according to load requirements. The corresponding equipment is smaller in size and has relatively higher reliability.

[0064] Corresponding to the voltage compensation control method based on a unified power quality controller in the above embodiments, the present invention also proposes a voltage compensation control device based on a unified power quality controller.

[0065] like Figure 5As shown, the voltage compensation control device based on a unified power quality controller according to an embodiment of the present invention includes an acquisition module 10, a first control module 20, a second control module 30, and a third control module 40. The acquisition module 10 acquires the voltage of the phase line to be compensated and acquires a reference voltage for the phase line to be compensated based on the voltage of the phase line to be compensated. The first control module 20 calculates the difference between the reference voltage and the voltage of the phase line to be compensated to obtain a compensation reference voltage, and performs voltage outer loop control based on the compensation reference voltage to obtain a reference current for the phase line to be compensated. The second control module 30 acquires the current of the phase line to be compensated and performs current inner loop control on the difference between the reference current and the current of the phase line to be compensated to obtain a compensation voltage. The third control module 40 controls the single-phase full-bridge inverter connected to the phase line to be compensated based on the compensation voltage.

[0066] The phase line to be compensated can be any phase line that the system determines needs to be compensated, as shown in the reference. Figure 3 The acquisition module 10 acquires the voltage U of the phase line to be compensated. g Then, the positive and negative sequence fundamental frequency components of the voltage of the phase line to be compensated in the αβ coordinate system can be obtained through a phase-locked loop (SOGI-PLL) based on a generalized second-order integrator. The positive sequence fundamental frequency component of the voltage of the phase line to be compensated in the αβ coordinate system is then transformed to the abc coordinate system using an inverse Clack transform to obtain the reference voltage U of the phase line to be compensated. ref *

[0067] In one embodiment of the present invention, the positive and negative sequence fundamental frequency components of the voltage of the phase line to be compensated output by the phase-locked loop of the generalized second-order integrator in the αβ coordinate system are:

[0068]

[0069]

[0070] Where uα and uβ are the voltage components of the phase line to be compensated on the α and β axes, respectively, the superscripts + and - represent the corresponding positive and negative sequence fundamental frequency components, k is the gain coefficient of the generalized second-order integrator, ω is the angular frequency of the power grid system, and s is the Laplace operator.

[0071] By using a phase-locked loop with a generalized second-order integrator to obtain the positive and negative sequence fundamental frequency components of the voltage, the drawback of traditional software-implemented phase-locked loops that cannot accurately lock the phase when the grid voltage is unbalanced or contains large harmonics is overcome, thus enabling the unified power quality controller to have a larger voltage compensation range.

[0072] The dual closed-loop control structure, in which the first control module 20 and the second control module 30 perform voltage outer loop control and current inner loop control, can be described as follows: Figure 4 As shown.

[0073] In one embodiment of the present invention, the first control module 20 performs voltage outer loop transfer function G for voltage outer loop control. U (s) can be designed using a multi-quasi-PR resonant controller.

[0074] The transfer function of the single quasi-PR resonant controller is:

[0075]

[0076] Where, k p k is the proportional gain coefficient. r ω is the resonance enhancement coefficient. c ω is the cutoff frequency, and ω0 is the fundamental frequency.

[0077] By combining multiple quasi-PR controllers at specified frequencies, the voltage outer loop transfer function can be obtained as follows:

[0078] G U (s)=(k p +G qPR1 +G qPR3 +G qPR7 +G qPR9 +…+G qPRi )G I (s)(i=2n+1,n∈N + )

[0079] Among them, G I (s) represents the inner current loop transfer function of the second control module 30 for inner current loop control. The inner current loop transfer function is:

[0080]

[0081] Among them, K c T is the proportional gain coefficient of the current loop. d The sampling period is This represents the sampling delay stage, where L and C are the inductance and capacitance of the LC filter circuit between the phase line to be compensated and the single-phase full-bridge inverter connected thereto, respectively, and R... L This is the equivalent resistance of the inductor.

[0082] Reference Figure 3 and Figure 4 The reference voltage U of the phase line to be compensated can be... ref *and voltage U g By subtracting the values, we obtain the compensated reference voltage U. c * will compensate reference voltage U c *and compensation voltage U c The difference between the feedback values ​​is used as the voltage outer loop transfer function G. U The input of (s) is determined by the voltage outer loop transfer function G.U (s) Output the reference current I of the phase line to be compensated L * Then, the reference current I of the phase line to be compensated... L *and current I L The difference in input current inner loop transfer function G I (s), after sampling delay and SPWM, the output voltage U of the single-phase full-bridge inverter is obtained. o After passing through various stages of the LC filter circuit, the final compensation voltage U is obtained. c .

[0083] The SPWM stage represents the gain of the equivalent linear stage in a single-phase full-bridge inverter. The mathematical model of the LC filter circuit is as follows:

[0084]

[0085] It should be understood that the output voltage U of a single-phase full-bridge inverter o and the final compensation voltage U c The magnitude of the value is determined by the duty cycle of the switching transistor (such as IGBT) drive signal in the single-phase full-bridge inverter, i.e., the PWM signal. Therefore, the third control module 40 can adjust the value based on the compensation voltage U. c Calculate the duty cycle of the switching transistor drive signal in the single-phase full-bridge inverter with the phase line to be compensated, implement SPWM, and realize instantaneous compensation for voltage drop of the phase line to be compensated.

[0086] The voltage compensation control device based on a unified power quality controller according to an embodiment of the present invention can instantaneously compensate for voltage dips and protect sensitive loads through dual closed-loop control of the voltage outer loop and the current inner loop. It has high reliability. Furthermore, since the compensation is performed on the basis of the original power supply relationship, it only needs to compensate for the portion of the voltage amplitude reduction, and there is no need to configure full-power power electronic devices according to the load requirements. The corresponding equipment is smaller in size and has relatively high reliability.

[0087] In the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. "A plurality of" means two or more, unless otherwise explicitly specified.

[0088] In this invention, unless otherwise explicitly specified and limited, the terms "installation," "connection," "linking," and "fixing," etc., should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral part; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0089] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on top" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.

[0090] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Furthermore, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0091] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing a particular logical function or process, and the scope of the preferred embodiments of the invention includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as will be understood by those skilled in the art to which embodiments of the invention pertain.

[0092] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0093] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0094] Those skilled in the art will understand that all or part of the steps of the methods described in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, it includes one or a combination of the steps of the method embodiments.

[0095] Furthermore, the functional units in the various embodiments of the present invention can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.

[0096] Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions and variations to the above embodiments within the scope of the present invention.

Claims

1. A voltage compensation control method based on a unified power quality controller, characterized in that, The unified power quality controller includes a front-end parallel converter and a rear-end series converter. The series converter includes three single-phase full-bridge inverters, and the output terminals of the three single-phase full-bridge inverters are respectively connected to the three phase lines of the load. The voltage compensation control method includes the following steps: Obtain the voltage of the phase line to be compensated, and obtain the reference voltage of the phase line to be compensated based on the voltage of the phase line to be compensated; The difference between the reference voltage and the voltage of the phase line to be compensated is used to obtain the compensation reference voltage. The voltage outer loop control is then performed based on the compensation reference voltage to obtain the reference current of the phase line to be compensated. The current of the phase line to be compensated is obtained, and the difference between the reference current and the current of the phase line to be compensated is controlled by the inner current loop to obtain the compensation voltage; The single-phase full-bridge inverter connected to the phase line to be compensated is controlled according to the compensation voltage. The voltage outer loop transfer function for voltage outer loop control is designed using a multiple quasi-PR resonant controller. The transfer function of the single quasi-PR resonant controller is as follows: Where, k p k is the proportional gain coefficient. r ω is the resonance enhancement coefficient. c Let ω be the cutoff frequency and ω0 be the fundamental frequency. By combining multiple quasi-PR controllers at specified frequencies, the resulting voltage outer loop transfer function is: Among them, G I (s) represents the current inner loop transfer function for current inner loop control. The transfer function of the inner current loop is: Among them, K c T is the proportional gain coefficient of the current loop. d The sampling period is This represents the sampling delay stage, where L and C are the inductance and capacitance of the LC filter circuit between the phase line to be compensated and the single-phase full-bridge inverter connected thereto, respectively, and R... L The equivalent resistance of the inductor is given.

2. The voltage compensation control method based on a unified power quality controller according to claim 1, characterized in that, Obtaining the reference voltage of the phase line to be compensated based on its voltage specifically includes: The positive and negative sequence fundamental frequency components of the voltage of the phase line to be compensated in the αβ coordinate system are obtained by a phase-locked loop based on a generalized second-order integrator. The positive-sequence fundamental frequency component of the voltage of the phase line to be compensated in the αβ coordinate system is transformed into the abc coordinate system by the inverse clack transform to obtain the reference voltage of the phase line to be compensated.

3. The voltage compensation control method based on a unified power quality controller according to claim 2, characterized in that, Controlling the single-phase full-bridge inverter connected to the phase line to be compensated according to the compensation voltage specifically includes: The duty cycle of the switching transistor drive signal in the single-phase full-bridge inverter connected to the phase line to be compensated is calculated based on the compensation voltage.

4. A voltage compensation control device based on a unified power quality controller, characterized in that, The unified power quality controller includes a front-end parallel converter and a rear-end series converter. The series converter includes three single-phase full-bridge inverters, and the output terminals of the three single-phase full-bridge inverters are respectively connected to the three phase lines of the load. The voltage compensation control device includes: An acquisition module is used to acquire the voltage of the phase line to be compensated, and to acquire a reference voltage of the phase line to be compensated based on the voltage of the phase line to be compensated; The first control module is used to calculate the difference between the reference voltage and the voltage of the phase line to be compensated to obtain the compensation reference voltage, and to perform voltage outer loop control based on the compensation reference voltage to obtain the reference current of the phase line to be compensated. The second control module is used to acquire the current of the phase line to be compensated, and to obtain the compensation voltage by controlling the difference between the reference current and the current of the phase line to be compensated through the current inner loop. The third control module is used to control the single-phase full-bridge inverter connected to the phase line to be compensated according to the compensation voltage. The voltage outer loop transfer function for voltage outer loop control is designed using a multiple quasi-PR resonant controller. The transfer function of the single quasi-PR resonant controller is as follows: Where, k p k is the proportional gain coefficient. r ω is the resonance enhancement coefficient. c Let ω be the cutoff frequency and ω0 be the fundamental frequency. By combining multiple quasi-PR controllers at specified frequencies, the resulting voltage outer loop transfer function is: Among them, G I (s) represents the current inner loop transfer function for current inner loop control. The transfer function of the inner current loop is: Among them, K c T is the proportional gain coefficient of the current loop. d The sampling period is This represents the sampling delay stage, where L and C are the inductance and capacitance of the LC filter circuit between the phase line to be compensated and the single-phase full-bridge inverter connected thereto, respectively, and R... L The equivalent resistance of the inductor is given.

5. The voltage compensation control device based on a unified power quality controller according to claim 4, characterized in that, The acquisition module is specifically used for: The positive and negative sequence fundamental frequency components of the voltage of the phase line to be compensated in the αβ coordinate system are obtained by a phase-locked loop based on a generalized second-order integrator. The positive-sequence fundamental frequency component of the voltage of the phase line to be compensated in the αβ coordinate system is transformed into the abc coordinate system by the inverse clack transform to obtain the reference voltage of the phase line to be compensated.

6. The voltage compensation control device based on a unified power quality controller according to claim 5, characterized in that, The third control module is specifically used for: The duty cycle of the switching transistor drive signal in the single-phase full-bridge inverter connected to the phase line to be compensated is calculated based on the compensation voltage.

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