An automatic control circuit for fast and slow charging and discharging of capacitors and a method for power-off storage.

Abstract

This invention relates to an automatic control circuit for fast and slow charging and discharging of capacitors and a power-off data storage method. It achieves rapid power supply, automatic charging and discharging control, data storage after power failure, and data uploading, facilitating the master station's monitoring of circuit breaker status and in-depth fault analysis, including switch position changes, voltage and current values ​​at the time of the fault, and waveform recordings before and after the fault. This invention enables rapid power supply, automatic charging and discharging control, data storage after power failure, and data uploading, facilitating the master station's monitoring of circuit breaker status and in-depth fault analysis, including switch position changes, voltage and current values ​​at the time of the fault, and waveform recordings before and after the fault. It avoids the problem of lacking key data for fault analysis and solves the problem of slow charging speed of supercapacitors leading to failure to trip during faults.

Description

Technical Field

[0001] This invention relates to the field of power distribution automation, and in particular to an automatic control circuit based on fast and slow charging and discharging of capacitors and a method for storing data after power failure. Background Technology

[0002] After a power outage, a smart circuit breaker needs to store and upload data to facilitate the main station's monitoring of the circuit breaker's status and in-depth fault analysis. This includes changes in switch position, voltage and current values ​​at the time of the fault, and waveform recordings before and after the fault. Supercapacitors charge slowly, typically taking over 20 minutes to fully charge. When the circuit breaker loses power, should the storage operation be performed unconditionally? If power is lost during the read / write process, new data writing will fail and existing data will be lost; if no data is written, critical data will be missing, hindering fault analysis.

[0003] Current transformers (CTs) have limited power draw capacity, while supercapacitors charge slowly. When a circuit breaker is closed in a fault state, the mains power is also faulty and cannot be drawn from the mains voltage; power is drawn solely from the current transformer. The challenge is to quickly power on the circuit to ensure stable system operation and to complete fault diagnosis and shunt tripping within a short time. Speeding up protection can reduce customer losses and decrease the instantaneous impact force when the moving and stationary contacts disconnect. Summary of the Invention

[0004] The purpose of this invention is to address the shortcomings and deficiencies of existing technologies by providing an automatic control circuit for fast and slow charging and discharging of capacitors and a power-off storage method. This enables rapid power access, automatic charging and discharging control, power-off storage, and data uploading, facilitating the main station's monitoring of circuit breaker status and in-depth fault analysis. This includes changes in switch position, voltage and current values ​​at the time of the fault, and waveform recordings before and after the fault. This avoids the problem of missing key data that prevents fault analysis and solves the problem of slow charging speed of supercapacitors leading to the inability to trip the circuit breaker during a fault.

[0005] To achieve the above objectives, the technical solution of the present invention is: an automatic control circuit based on fast and slow charging and discharging of a capacitor, including a mains voltage supply circuit, a CT supply circuit, an input power supply / power failure detection circuit, a charging and discharging control circuit, a supercapacitor power failure detection circuit, and an LDO circuit. The input power supply / power failure detection circuit is connected to the mains voltage supply circuit, the CT supply circuit, the supercapacitor power failure detection circuit, and the LDO circuit. The input power supply / power failure detection circuit is used to detect the output voltage of the mains voltage supply circuit and the output voltage of the CT supply circuit to detect whether the input power supply has failed. The charging and discharging control circuit includes a small-capacity fast charging and discharging circuit and a large-capacity slow charging and discharging circuit. The small-capacity fast charging and discharging circuit supplies power to the 3.3V system for power failure storage, and the large-capacity slow charging and discharging circuit supplies power to the 12V system for power failure storage and fault reporting. The supercapacitor power failure detection circuit is used to detect the supercapacitor voltage in the small-capacity fast charging and discharging circuit. When the supercapacitor voltage in the small-capacity fast charging and discharging circuit is lower than a threshold, the 3.3V system is controlled to complete the power failure storage as quickly as possible.

[0006] In one embodiment of the present invention, the input power supply / power-down detection circuit uses a power-on / power-down detection chip with hysteresis to form a two-way input power supply / power-down detection loop, which is powered by 3.3V. One input is the output of the mains voltage power supply circuit, which is connected to the input of the power-on / power-down detection chip with hysteresis via a diode, a Zener diode, a bleeder resistor, and a filter capacitor. The output of the power-on / power-down detection chip with hysteresis is connected to a large-capacity slow charge / discharge circuit via a second filter capacitor, a second diode, and a pull-up resistor to control the charging and discharging operation of the large-capacity slow charge / discharge circuit. The other input is the output of the CT power supply circuit, which is connected to the input of the power-on / power-down detection chip with hysteresis via a delay RC, a second bleeder resistor, a third diode, a second Zener diode, a bleeder resistor, and a filter capacitor. The output of the power-on / power-down detection chip with hysteresis is connected to a small-capacity fast charge / discharge circuit via a second filter capacitor, a fourth diode, and a second pull-up resistor to control the charging and discharging operation of the small-capacity fast charge / discharge circuit.

[0007] In one embodiment of the present invention, the small-capacity fast-charging amplifier circuit is powered by 5V. The 5V is used to fast charge the small-capacity fast-charging supercapacitor through two parallel resistors and a transistor. The small-capacity fast-charging supercapacitor supplies power to the 3.3V system through a diode and an LDO circuit. The conduction and cutoff of the transistor are controlled by the input power supply / power-down detection circuit.

[0008] In one embodiment of the present invention, the large-capacity slow-charge and discharge circuit is powered by 5V. The 5V is used to slowly charge the large-capacity slow-charge supercapacitor through a resistor and a MOSFET. The large-capacity slow-charge supercapacitor is used to power the 12V system through a DC / DC boost circuit. The discharge enable of the DC / DC boost circuit is controlled by the input power supply / power-down detection circuit.

[0009] In one embodiment of the present invention, the supercapacitor power-down detection circuit adopts a power-on / power-down detection chip with hysteresis, which is powered by 3.3V. The 3.3V is stably powered to the power-on / power-down detection chip with hysteresis through a diode. The supercapacitor of the small-capacity fast charge-discharge circuit is connected to the input of the power-on / power-down detection chip with hysteresis through a second diode, a bleeder resistor R, and a filter capacitor C. The output of the power-on / power-down detection chip with hysteresis is connected to the MCU of the 3.3V system through a second filter capacitor C, a third diode, and a pull-up resistor.

[0010] The present invention also provides a power-off storage method using an automatic control circuit for fast and slow charging and discharging of a capacitor as described above. (1) When the mains voltage is abnormal, the input power supply / power failure detection circuit does not detect the mains voltage power supply circuit power signal, and draws power from the CT to temporarily shut down the supercapacitor charging. The system starts up quickly. When a millisecond-level instantaneous protection fault occurs, the CT draws power to realize the fault protection trip. (2) When the mains voltage is normal, the input power supply / power failure detection circuit detects the mains voltage power supply circuit power supply signal, draws power from the mains voltage, the system starts normally, and turns on the small capacity fast charging and discharging circuit and the large capacity slow charging and discharging circuit to charge the small capacity fast charging supercapacitor and the large capacity slow charging supercapacitor. Fast charging takes 2 seconds to fully charge and slow charging takes 20 minutes to fully charge. (3) When the mains voltage is abnormal, the input power supply / power failure detection circuit does not detect the mains voltage power supply circuit power signal, and draws power from CT, temporarily shuts down the supercapacitor charging, and the system starts up quickly. If no instantaneous protection fault of millisecond level occurs, after a millisecond level delay, the CT power supply circuit power signal is detected, the system starts up normally, and the small capacity fast charging discharge circuit and the large capacity slow charging discharge circuit are turned on to charge the small capacity fast charging supercapacitor and the large capacity slow charging supercapacitor. Fast charging takes 2 seconds to fully charge and slow charging takes 20 minutes to fully charge. (4) When a fault occurs, if the input power supply / power failure detection circuit does not detect the mains voltage power supply circuit and the CT power supply circuit power supply signal, and the voltage of the small-capacity fast-charging supercapacitor is greater than threshold B and the voltage of the large-capacity slow-charging supercapacitor is greater than threshold A, it means that the system can be maintained for a relatively long time. In this case, the large-capacity slow-charging supercapacitor and the small-capacity fast-charging supercapacitor will discharge together to achieve power failure reporting and power failure storage. If the voltage of the small-capacity fast-charging supercapacitor is greater than threshold B and the voltage of the large-capacity slow-charging supercapacitor is less than threshold A, it means that the system can be maintained for a relatively short time. In this case, the small-capacity fast-charging supercapacitor will discharge to achieve power failure storage. If the voltage of the small-capacity fast-charging supercapacitor is less than threshold B, it means that the system will stop running at any time. In this case, the erase and write operation of the memory is prohibited.

[0011] Compared with the prior art, the present invention has the following beneficial effects: 1. This invention relates to an automatic control circuit for fast and slow charging and discharging of a supercapacitor and a method for storing data after power failure. It enables rapid power intake, automatic charging and discharging control, data storage after power failure, and data uploading for the main station to view circuit breaker status and conduct in-depth fault analysis, including switch position changes, voltage and current values ​​at the time of the fault, and waveform recordings before and after the fault.

[0012] 2. This invention uses pure hardware circuitry to achieve automatic control of supercapacitor charging and discharging. When the mains voltage or CT power is drawn, the power signal is detected by the hardware circuitry, and the supercapacitor charging and discharging is automatically controlled by the logic circuitry. It includes two stages of capacitors for fast charging and slow charging. Fast charging is completed within 2 seconds to support abnormal power-on and power-off storage, and slow charging is completed in 20 minutes for normal power-off storage and fault reporting.

[0013] 3. This invention detects the status of the supercapacitor through hardware circuitry and notifies the MCU in the form of an interrupt signal. The remaining energy must be used to immediately complete the storage operation before power failure and then read and write are prohibited. This ensures that new data is written smoothly and avoids the loss of original data due to power failure during the erase and write process.

[0014] 4. When the circuit breaker is closed in a fault state, it draws power from the pure current transformer. Its power-on signal is delayed by RC. It will not charge the supercapacitor for a short time, but can provide stable power to the system within 10ms to accelerate the system startup and support the completion of short circuit fault protection within 80ms. If no short circuit fault is detected during the delay period, and the power draw of the CT is sufficient to charge the supercapacitor, the hardware circuit will automatically start charging. Attached Figure Description

[0015] Figure 1 This is a block diagram of an automatic control circuit based on fast and slow charging and discharging of a capacitor according to the present invention.

[0016] Figure 2 This is a flowchart of the charging and discharging control and power-off storage process of the present invention.

[0017] Figure 3 This is a schematic diagram of the power supply / power failure detection circuit for the present invention.

[0018] Figure 4 This is a schematic diagram of the charging and discharging control circuit of the present invention.

[0019] Figure 5 This is a schematic diagram of the supercapacitor power failure detection circuit of the present invention.

[0020] Figure 6 This is the schematic diagram of the LDO circuit of the present invention. Detailed Implementation

[0021] The technical solution of the present invention will now be described in detail with reference to the accompanying drawings.

[0022] The purpose of this invention is to provide an automatic control circuit for fast and slow charging and discharging of a supercapacitor based on a circuit breaker and a method for storing data after power failure. This enables rapid power intake, automatic charging and discharging control, data storage after power failure, and data uploading, facilitating the main station's monitoring of the circuit breaker's status and in-depth fault analysis, including changes in switch position, voltage and current values ​​at the time of the fault, and waveform recordings before and after the fault.

[0023] The intelligent circuit breaker must have automatic control of supercapacitor charging and discharging. When the mains voltage or CT power is drawn, the power signal is detected by the hardware circuit and the supercapacitor charging is automatically controlled. It includes two levels of supercapacitors: small capacity fast charging and large capacity slow charging. Fast charging can be completed within 2 seconds to support abnormal power-on and power-off storage, and slow charging can be completed in 20 minutes for normal power-on and power-off storage and fault reporting.

[0024] After a power outage, the system immediately and automatically switches to supercapacitor power supply. The hardware circuit detects the status of the supercapacitor and notifies the MCU in the form of an interrupt signal. The remaining energy must be used to immediately complete the storage operation before the power outage and then read and write are prohibited to ensure that new data is written smoothly and to avoid the loss of original data due to power failure during the erase and write process.

[0025] The current transformer (CT) has limited power extraction capacity, while the supercapacitor charges slowly. When the circuit breaker is closed in a fault state, the mains power is also faulty and cannot be drawn from the mains voltage. Power is drawn from the pure current transformer, and its power-on signal is delayed by RC. It will not charge the supercapacitor for a short time, but can provide stable power to the system within 10ms to accelerate system startup and support the completion of short-circuit fault protection within 80ms. If no short-circuit fault is detected during the delay period, and the CT's power extraction capacity is sufficient to charge the supercapacitor, the hardware circuit will automatically start charging.

[0026] like Figure 1 As shown, this invention discloses an automatic control circuit based on fast and slow charging and discharging of a capacitor, including a mains voltage supply circuit, a CT supply circuit, an input power supply / power failure detection circuit, a charging and discharging control circuit, a supercapacitor power failure detection circuit, and an LDO circuit. The input power supply / power failure detection circuit is connected to the mains voltage supply circuit, the CT supply circuit, the supercapacitor power failure detection circuit, and the LDO circuit. The input power supply / power failure detection circuit detects the output voltage of the mains voltage supply circuit and the output voltage of the CT supply circuit to detect whether the input power has failed. The charging and discharging control circuit includes a small-capacity fast charging and discharging circuit and a large-capacity slow charging and discharging circuit. The small-capacity fast charging and discharging circuit supplies power to the 3.3V system for power failure storage, and the large-capacity slow charging and discharging circuit supplies power to the 12V system for power failure storage and fault reporting. The supercapacitor power failure detection circuit detects the supercapacitor voltage in the small-capacity fast charging and discharging circuit. When the supercapacitor voltage in the small-capacity fast charging and discharging circuit is lower than a threshold, it controls the 3.3V system to complete power failure storage as quickly as possible. The supercapacitor charging and discharging automatic control system is implemented entirely by hardware circuitry. Fast charging and slow charging are two parallel circuits, differing in the following ways: 1) Small-capacity fast charging completes charging in 2 seconds, while large-capacity slow charging completes charging in 20 minutes. 2) Small-capacity fast charging only supplies power to the 3.3V system for power-off storage, while large-capacity slow charging supplies power to the 12V system for power-off storage and fault reporting.

[0027] The system draws power from AC / DC mains voltage, identifies the power-on signal, and controls the activation of fast and slow charging switches to charge the 5V small-capacity fast-charging supercapacitor and the 2.5V large-capacity slow-charging supercapacitor, respectively, while simultaneously controlling the deactivation switch to turn off.

[0028] When the input power fails, the system recognizes the power failure signal, controls the fast charging and slow charging switches to shut down, stopping the charging of the 5V small-capacity fast charging supercapacitor and the 2.5V large-capacity slow charging supercapacitor, and simultaneously controls the discharge switch to turn on to supply power to the system.

[0029] When a fault occurs during closing, the mains voltage is abnormal. The pure current transformer (CT) draws power directly to supply power to the system without charging the supercapacitor. Within 80ms, the system voltage quickly stabilizes and the MCU starts performing fault judgment and shunt tripping. Its power-on signal is delayed by RC, preventing charging of the supercapacitor for a short period, allowing for a stable power supply to the system within 10ms to accelerate system startup and support the completion of closing the short-circuit fault protection within 80ms. If no short-circuit fault is detected during the delay period, and the CT's power-drawing capacity is sufficient to charge the supercapacitor, the hardware circuit automatically starts charging.

[0030] Furthermore, the main circuit principle of the automatic control circuit for fast and slow charging and discharging of capacitors according to the present invention will be explained as follows: 1. Input power on / off detection circuit 1.1 Inputs: 3.3V power supply, V_ACDC AC mains voltage, V_CT current transformer power supply 1.2 Circuit: V3 (can use R3111H421A) is a power-on / power-off detection chip with hysteresis, a threshold voltage of 4.2V, a hysteresis voltage of 0.2V, an open-drain output, a high-impedance output on power-on, and a grounded output on power-off. A 3.3V supply provides stable power to V3 via a diode; V_ACDC is connected to the V3 input via a diode, a Zener diode, a bleeder resistor (R), and a filter capacitor (C). V_CT is connected to the V3 input via a delay RC circuit, a bleeder resistor (R), a diode, a Zener diode, another bleeder resistor (R), and a filter capacitor (C).

[0031] The output of V3 is connected to V_down, Ctl_Charge, and Ctl_Discharge via a filter, diode, and pull-up resistor.

[0032] 1.3 Outputs: V_down (power off), Ctl_Charge (charge controllable), Ctl_Discharge (discharge controllable) 1.4 Logic: When powered by mains electricity, V_ACDC-V1-D3>4.2V→V_down, Ctl_Charge, and Ctl_Discharge are set high; When the mains power fails, V_ACDC-V1-D3<4V → V_down, Ctl_Charge, and Ctl_Discharge are set low.

[0033] CT power supply, V_CT is delayed by the RC delay circuit composed of R4 and C3, and a judgment is made after 50ms. V_CT×R6 / (R4+R6)-V2-D5>4.2V→V_down,Ctl_Charge,Ctl_Discharge are set high; When the CT is powered off, V_CT×R6 / (R4+R6)-V2-D5<4V→V_down, Ctl_Charge, and Ctl_Discharge are set low.

[0034] 2. Charge and discharge control circuit 2.1 Input: 5V 2.2 Circuit: 1) Small capacity fast charging amplifier: 5V is used to fast charge the rated 5.5V EC2 via R12, R13, and V5. EC2 supplies power to the 3.3V system via D8 and LDO (D12 uses an NMD53U33 chip); the conduction and cutoff of the V5 switch are controlled by Ctl_Charge. 2) High-capacity slow charge and discharge: 5V is slowly charged to EC1 (rated 2.7V) via R7 and V4. EC1 is boosted to supply power to the 12V system via a DC-DC converter consisting of U1 (which can be SGM6623) and peripheral components. The conduction and cutoff of the V5 switch are controlled by Ctl_Charge and a three-terminal voltage regulator circuit consisting of V6, R8, R15, and R19. The discharge enable control transistor V7 is controlled by Ctl_Discharge.

[0035] 2.3 Output: 5V, 12V 2.4 Logic: When drawing power for a short period of time, it operates with small-capacity fast charging and discharging: Normal power supply from V_ACDC or V_CT (with V_CT delayed by 50ms for judgment) → Ctl_Charge and Ctl_Discharge set high → V5 turns on to start charging → EC2 charges and automatically stops when fully charged → Power supply error V_ACDC-V1-D3<4V → Ctl_Charge and Ctl_Discharge set low → V5 turns off to stop charging, while EC2 supplies power to the 3.3V system through D8 and LDO.

[0036] When drawing power for extended periods, small-capacity fast charging / discharging and large-capacity slow charging / discharging work together: V_ACDC or V_CT draws power normally (V_CT is judged with a 50ms delay) → Ctl_Charge and Ctl_Discharge are set high AND (simultaneously) V6 is cut off → V5 is turned on to start charging, V7 is turned on to stop discharging → EC2 and EC1 are charged → V6 is turned on after full charge OR (or) Power draw is abnormal V_ACDC-V1-D3<4V → Ctl_Charge and Ctl_Discharge are set low → V5 is turned off to stop charging, V7 is turned off to start discharging → EN is enabled, EC1 supplies power to the 12V system through the DC-DC converter composed of U1 → EC1 discharge ends → EC2 supplies power to the 3.3V system through D8 and LDO. 3. Supercapacitor power failure detection circuit 3.1 Input: 3.3V power supply, small-capacity fast-charging supercapacitor VCAP1 voltage 3.2 Circuit: V8 (R3111H421A can be used) is a power-on / power-down detection chip with hysteresis, a threshold voltage of 4.2V, a hysteresis voltage of 0.2V, and an open-drain output. The power-on output has high impedance, and the power-down output is grounded. 3.3V provides stable power to V3 via a diode; VCAP1 is connected to the input of V8 via a diode, a bleeder resistor R, and a filter capacitor C. The output of V8 is connected to VCAP1_down via a filter capacitor C, a diode, and a pull-up resistor.

[0037] 3.3 Output: VCAP1_down Small Capacity Fast Charging Supercapacitor Detection 3.4 Logic: Both V_ACDC and V_CT input power supplies are down, but the small-capacity supercapacitor EC2 is charged. When VCAP1-D11 > 4.2V, VCAP1_down is set high, allowing for normal power-down storage. When the detection level changes, i.e., the supercapacitor loses power, VCAP1-D11 < 4V, VCAP1_down is set low. The MCU immediately completes the storage before the system voltage drops and then prohibits read / write operations to ensure that new data is written smoothly and to avoid the loss of original data due to power failure during the erase / write process.

[0038] like Figure 2 The diagram shown is a flowchart of the charging / discharging control and power-down storage process of this invention. The charging / discharging control and power-down storage process is explained below: When the mains voltage is abnormal, power is drawn from the CT. If no power signal is detected, the supercapacitor charging is temporarily shut off, and the system starts up quickly. When a millisecond-level instantaneous protection fault occurs, power is drawn from the CT to achieve fault protection tripping.

[0039] When the mains voltage is normal, the system draws power from the mains voltage. After detecting the power draw signal, the system starts normally and begins charging the large and small capacity supercapacitors. Fast charging takes 2 seconds to fully charge, and slow charging takes 20 minutes to fully charge. When the mains voltage is abnormal, power is drawn from the CT. If no power signal is detected, the supercapacitor charging is temporarily shut down and the system starts up quickly. If no instantaneous protection fault of millisecond level occurs, the power signal is detected after a millisecond-level delay. The system starts up normally and starts charging the large and small capacity supercapacitors. Fast charging takes 2 seconds to fully charge and slow charging takes 20 minutes to fully charge. When a fault occurs, the input power supply is detected to be down. If the voltage of the small-capacity fast-charging supercapacitor is greater than threshold B (VCAP1_down set high) and the voltage of the large-capacity supercapacitor is greater than threshold A, it indicates that the system can continue to operate for a relatively long time. In this case, both the large and small-capacity supercapacitors discharge together to achieve power outage reporting and power-down storage. Otherwise, if the voltage of the small-capacity fast-charging supercapacitor is greater than threshold B (VCAP1_down set high), it indicates that the system can continue to operate for a relatively short time. In this case, the small-capacity fast-charging supercapacitor discharges to achieve power-down storage. Otherwise, if the voltage of the small-capacity fast-charging supercapacitor is less than threshold B (VCAP1_down set low), it indicates that the system will stop operating at any time. In this case, erase and write operations on the memory are prohibited.

[0040] The above are preferred embodiments of the present invention. Any changes made to the technical solution of the present invention that do not exceed the scope of the technical solution of the present invention shall fall within the protection scope of the present invention.

Claims

1. A kind of automatic control circuit based on capacitance fast and slow charge-discharge, it is characterized in that, The system includes a mains voltage supply circuit, a CT power supply circuit, an input power supply / power failure detection circuit, a charge / discharge control circuit, a supercapacitor power failure detection circuit, and an LDO circuit. The input power supply / power failure detection circuit is connected to the mains voltage supply circuit, CT power supply circuit, supercapacitor power failure detection circuit, and LDO circuit. The input power supply / power failure detection circuit detects the output voltages of the mains voltage supply circuit and the CT power supply circuit to detect whether the input power has failed. The charge / discharge control circuit includes a small-capacity fast charge / discharge circuit and a large-capacity slow charge / discharge circuit. The small-capacity fast charge / discharge circuit supplies power to the 3.3V system for power failure storage, while the large-capacity slow charge / discharge circuit supplies power to the 12V system for power failure storage and fault reporting. The supercapacitor power failure detection circuit detects the supercapacitor voltage in the small-capacity fast charge / discharge circuit. When the supercapacitor voltage in the small-capacity fast charge / discharge circuit falls below a threshold, it controls the 3.3V system to quickly... Complete power-down storage; the input power supply / power-down detection circuit uses a hysteresis-based power-on / power-down detection chip to form a two-way input power supply / power-down detection loop, which is powered by 3.3V. One input is the output of the mains voltage circuit, which is connected to the hysteresis-based power-on / power-down detection chip input via a diode, Zener diode, bleeder resistor, and filter capacitor. The output of the hysteresis-based power-on / power-down detection chip is connected to a large-capacity slow charge / discharge circuit via a second filter capacitor, a second diode, and a pull-up resistor to control the charging and discharging operation of the large-capacity slow charge / discharge circuit. The other input is the output of the CT power supply circuit, which is connected to the hysteresis-based power-on / power-down detection chip input via a delay RC, a second bleeder resistor, a third diode, a second Zener diode, bleeder resistor, and filter capacitor. The output of the hysteresis-based power-on / power-down detection chip is connected to a small-capacity fast charge / discharge circuit via a second filter capacitor, a fourth diode, and a second pull-up resistor to control the charging and discharging operation of the small-capacity fast charge / discharge circuit.

2. The automatic control circuit based on fast and slow charging and discharging of a capacitor according to claim 1, characterized in that, The small-capacity fast-charging amplifier circuit is powered by 5V. The 5V is used to fast charge the small-capacity fast-charging supercapacitor through two parallel resistors and a transistor. The small-capacity fast-charging supercapacitor supplies power to the 3.3V system through a diode and an LDO circuit. The conduction and cutoff of the transistor are controlled by the input power supply / power-down detection circuit.

3. The automatic control circuit based on fast and slow charging and discharging of a capacitor according to claim 1, characterized in that, The large-capacity slow-charge discharge circuit is powered by 5V. The 5V voltage is used to slowly charge the large-capacity slow-charge supercapacitor through resistors and MOSFETs. The large-capacity slow-charge supercapacitor is used to power the 12V system through a DC / DC boost circuit. The discharge enable of the DC / DC boost circuit is controlled by the input power supply / power-down detection circuit.

4. The automatic control circuit based on fast and slow charging and discharging of a capacitor according to claim 1, characterized in that, The supercapacitor power-down detection circuit uses a power-on / power-down detection chip with hysteresis, which is powered by 3.3V. The 3.3V is supplied to the power-on / power-down detection chip with hysteresis through a diode. The supercapacitor of the small-capacity fast charge / discharge circuit is connected to the input of the power-on / power-down detection chip with hysteresis through a second diode, a bleeder resistor R, and a filter capacitor C. The output of the power-on / power-down detection chip with hysteresis is connected to the MCU of the 3.3V system through a second filter capacitor C, a third diode, and a pull-up resistor.

5. A power-off storage method based on an automatic capacitor fast / slow charge / discharge control circuit as described in any one of claims 1-4, characterized in that, The implementation is as follows: (1) When the mains voltage is abnormal, the input power supply / power failure detection circuit does not detect the mains voltage power supply circuit power signal, and draws power from the CT to temporarily shut down the supercapacitor charging. The system starts up quickly. When a millisecond-level instantaneous protection fault occurs, the CT draws power to realize the fault protection trip. (2) When the mains voltage is normal, the input power supply / power failure detection circuit detects the mains voltage power supply circuit power supply signal, draws power from the mains voltage, the system starts normally, and turns on the small capacity fast charging and discharging circuit and the large capacity slow charging and discharging circuit to charge the small capacity fast charging supercapacitor and the large capacity slow charging supercapacitor. Fast charging takes 2 seconds to fully charge and slow charging takes 20 minutes to fully charge. (3) When the mains voltage is abnormal, the input power supply / power failure detection circuit does not detect the mains voltage power supply circuit power signal, and draws power from CT, temporarily shuts down the supercapacitor charging, and the system starts up quickly. If no instantaneous protection fault of millisecond level occurs, after a millisecond level delay, the CT power supply circuit power signal is detected, the system starts up normally, and the small capacity fast charging discharge circuit and the large capacity slow charging discharge circuit are turned on to charge the small capacity fast charging supercapacitor and the large capacity slow charging supercapacitor. Fast charging takes 2 seconds to fully charge and slow charging takes 20 minutes to fully charge. (4) When a fault occurs, if the input power supply / power failure detection circuit does not detect the mains voltage power supply circuit and the CT power supply circuit power supply signal, and the voltage of the small-capacity fast-charging supercapacitor is greater than threshold B and the voltage of the large-capacity slow-charging supercapacitor is greater than threshold A, it means that the system can be maintained for a relatively long time. In this case, the large-capacity slow-charging supercapacitor and the small-capacity fast-charging supercapacitor will discharge together to achieve power failure reporting and power failure storage. If the voltage of the small-capacity fast-charging supercapacitor is greater than threshold B and the voltage of the large-capacity slow-charging supercapacitor is less than threshold A, it means that the system can be maintained for a relatively short time. In this case, the small-capacity fast-charging supercapacitor will discharge to achieve power failure storage. If the voltage of the small-capacity fast-charging supercapacitor is less than threshold B, it means that the system will stop running at any time. In this case, the erase and write operation of the memory is prohibited.

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