Power conversion circuit
Patent Information
- Application Number
- CN202111477540.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-12-06
- Publication Date
- 2026-09-01
- Estimated Expiration
- 2041-12-06
AI Technical Summary
然而,传统供电系统的电压源所提供给电压调节模块的电压较高,例如为54V,而使得电压调节模块无法直接由供电系统的电压源接收较低的输入电压,而仅能接收供电系统的电压源所提供的较高的输入电压,进而导致电压调节模块的整体体积无法下降、功率变换密度无法上升且变换效率无法上升
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Figure CN115765438B_ABST
Abstract
Description
Technical Field
[0001] This case relates to a power conversion circuit, and more particularly to a buck power conversion circuit. Background Technology
[0002] As chips (such as CPUs, GPUs, or ASICs) consume increasingly more power, the miniaturization requirements for voltage regulation modules supplying power to these chips are also rising. To achieve this miniaturization, voltage regulation modules need to use lower input voltages, such as 5V, to significantly reduce the size of the inductors within the module. This would result in a smaller overall size, increased power conversion density, and improved conversion efficiency. However, traditional power supply systems provide higher voltages to voltage regulation modules, such as 54V. This prevents the modules from directly receiving lower input voltages from the power supply system's voltage source; they can only receive higher input voltages. Consequently, the overall size, power conversion density, and conversion efficiency of the voltage regulation modules cannot be reduced.
[0003] Therefore, how to develop a power conversion circuit to solve the problems faced by existing technologies is an urgent issue that needs to be addressed in this field. Summary of the Invention
[0004] The purpose of this invention is to provide a power conversion circuit that can achieve the function of step-down.
[0005] To achieve the above objectives, this invention provides a power conversion circuit, comprising an input positive terminal, an input negative terminal, an output positive terminal, an output negative terminal, a switch bridge arm, a first grounding switch, a first bridging energy storage capacitor, and a first floating ground drive circuit. The input negative terminal and the output negative terminal are electrically connected to ground. The switch bridge arm includes at least one three-switch unit, which includes a first terminal, a second terminal, a third terminal, an upper switch, a middle switch, and a lower switch. The upper switch, middle switch, and lower switch are connected in series between the first terminal and the third terminal. The first terminal is electrically connected to the input positive terminal, and the upper switch and the lower switch are synchronously turned on and off. The first grounding switch is coupled to the third terminal and the input negative terminal. One end of the first bridging energy storage capacitor is electrically connected between the upper switch and the middle switch, and the other end of the first bridging energy storage capacitor is electrically connected to the third terminal. The first floating ground drive circuit includes a first floating ground drive diode, a first floating ground drive capacitor, and a first floating ground drive unit. The first floating ground drive diode, the first floating ground drive capacitor, and the first floating ground drive unit are connected in series between the second pole of the upper switch and the second pole of the lower switch. The connection point between the first floating ground drive diode and the first floating ground drive capacitor is further connected to the drive pole of the upper switch, and the connection point between the first floating ground drive capacitor and the first floating ground drive unit is further connected to the drive pole of the lower switch. Attached Figure Description
[0006] Figure 1 This is a schematic diagram of the circuit topology of the power conversion circuit in the first embodiment of this case.
[0007] Figure 2 for Figure 1 The waveform timing diagram of some components of the power conversion circuit shown is shown.
[0008] Figure 3 This is a schematic diagram of the circuit topology of the power conversion circuit in the second embodiment of this case.
[0009] Figure 4 for Figure 3 The waveform timing diagram of some components of the power conversion circuit shown is shown.
[0010] Figure 5 This is a schematic diagram of the circuit topology of the power conversion circuit in the third embodiment of this case.
[0011] Figure 6 for Figure 5 The waveform timing diagram of some components of the power conversion circuit shown is shown.
[0012] Figure 7 This is a schematic diagram of the circuit topology of the power conversion circuit in the fourth embodiment of this case.
[0013] Figure 8 This is a schematic diagram of the circuit topology of the power conversion circuit in the fifth embodiment of this case.
[0014] The reference numerals in the attached figures are explained as follows:
[0015] 1, 1a, 1b, 1c, 1d: Power conversion circuits
[0016] 11: Voltage source
[0017] Vin: Input voltage
[0018] Vo: Output voltage
[0019] Vin+: Input positive terminal
[0020] Vin-: Negative input terminal
[0021] Vo+: Positive output terminal
[0022] Vo-: Negative output terminal
[0023] Lin: Input inductance
[0024] Cin: Input capacitance
[0025] 12: Switch Control Set
[0026] 121: First End
[0027] 122: Second End
[0028] 123: Third end
[0029] 124: Switch bridge arm
[0030] 124a: Three-switch unit
[0031] C1: First energy storage capacitor
[0032] C2: Second energy storage capacitor
[0033] C3: Third energy storage capacitor
[0034] C4: Clamping capacitor
[0035] Lo1: First output inductor
[0036] Lo2: Second output inductor
[0037] M1: First switch
[0038] M2: Second switch
[0039] M3: Third Switch
[0040] M4: Fourth Switch
[0041] M5: First grounding switch
[0042] M6: Second grounding switch
[0043] Co: Output capacitor
[0044] A: First connection point
[0045] B: Second connection point
[0046] C: Third connection point
[0047] D: Fourth connection point
[0048] E: Fifth connection point
[0049] Vgs_M1: Gate-source voltage of the first switch
[0050] Vgs_M2: Gate-source voltage of the second switch
[0051] Vgs_M3: Gate-source voltage of the third switch
[0052] Vgs_M4: Gate-source voltage of the fourth switch
[0053] Vgs_M5: Gate-source voltage of the first grounding switch
[0054] Vgs_M6: Gate-source voltage of the second grounding switch
[0055] VA: Voltage at the first connection point
[0056] VB: Voltage at the second connection point
[0057] iC1: The current flowing through the first energy storage capacitor
[0058] iC2: The current flowing through the first energy storage capacitor
[0059] iC3: Current flowing through the third energy storage capacitor
[0060] The current flowing through the first output inductor iLo1
[0061] The current flowing through the second output inductor iLo2
[0062] Duty: Duty cycle
[0063] 21: First driving circuit
[0064] Da: First driving diode
[0065] Ca: First driving capacitor
[0066] 211: First drive unit
[0067] 22: Second drive circuit
[0068] Db: Second driving diode
[0069] Cb: Second driving capacitor
[0070] 221: Second drive unit
[0071] 23: Third drive circuit
[0072] 24: Fourth driving circuit
[0073] Ls1: First leakage inductance
[0074] Lm1: First magnetizing inductor
[0075] Ls2: Second leakage inductance
[0076] Lm2: Second magnetizing inductor
[0077] iLm1: Current flowing through the first magnetized inductor
[0078] iLm2: Current flowing through the second magnetizing inductor
[0079] t0-t7: Time points
[0080] Ts: Switching cycle Detailed Implementation
[0081] Some typical embodiments that embody the features and advantages of this invention will be described in detail in the following description. It should be understood that this invention can have various variations in different forms, all of which do not depart from the scope of this invention, and the descriptions and drawings therein are for illustrative purposes only and not for limiting this invention.
[0082] Please see Figure 1 This is a circuit topology diagram of the power conversion circuit in the first embodiment of this case. The power conversion circuit 1 in this embodiment is a switch capacitor buck converter and is electrically connected between the voltage source 11 of the power supply system and the load (not shown). The load can be, but is not limited to, a voltage regulation module. The power conversion circuit 1 is used to convert the input voltage Vin provided by the voltage source 11 to generate an output voltage Vo to the load. The power conversion circuit 1 includes an input positive terminal Vin+, an input negative terminal Vin-, an output positive terminal Vo+, an output negative terminal Vo-, an input inductor Lin, an input capacitor Cin, a switch control assembly 12, a first output inductor Lo1, a second output inductor Lo2, a first grounding switch M5, a second grounding switch M6, and an output capacitor Co. The input positive terminal Vin+ and the input negative terminal Vin- are electrically connected to the two ends of the voltage source 11. The power conversion circuit 1 receives the input voltage Vin through the input positive terminal Vin+ and the input negative terminal Vin-. The positive output terminal Vo+ and the negative output terminal Vo- are electrically connected to the load. The power conversion circuit 1 outputs the output voltage Vo to the load via the positive output terminal Vo+ and the negative output terminal Vo-. The negative output terminal Vo- is electrically connected to the negative input terminal Vin- to ground. The first terminal of the input inductor Lin is electrically connected to the positive input terminal Vin+. The two terminals of the input capacitor Cin are electrically connected between the second terminal of the input inductor Lin and the negative input terminal Vo-.
[0083] The switch control set 12 includes a first terminal 121, a second terminal 122, a third terminal 123, and a switch bridge arm 124, namely n+1 switches (M1, M2, M3, M4), n energy storage capacitors (C1, C2, C3), and a clamping capacitor C4. In this embodiment, n=3 is taken as an example. The first terminal 121 of the switch control set 12 is electrically connected to the positive input terminal Vin+. The second terminal 122 of the switch control set 12 is electrically connected to the input terminal of the first output inductor Lo1 to form a first connection point A. The third terminal 123 of the switch control set 12 is electrically connected to the input terminal of the second output inductor Lo2 to form a second connection point B. The switch bridge arm 124 is electrically connected between the first terminal 121 and the third terminal 123 of the switch control set 12, and includes a first switch M1, a second switch M2, a third switch M3, and a fourth switch M4 connected in series in sequence. Each switch switches between an on state and an off state. The first switch M1 is electrically connected to the first terminal 121 of the switch control set 12. The first switch M1 and the second switch M2 are connected in series to form a third connection point C. The second switch M2 and the third switch M3 are connected in series to form a fourth connection point D. The third switch M3 and the fourth switch M4 are connected in series to form a fifth connection point E. All switches in the switch bridge arm 124 can be, for example, but not limited to, metal oxide semiconductor field-effect transistors (MOSFETs), gallium nitride field-effect transistors (GaN FETs), or insulated gate bipolar transistors (IGBTs). In this embodiment, all switches are MOSFETs.
[0084] The switch control assembly 12 includes multiple energy storage capacitors, including a first energy storage capacitor C1, a second energy storage capacitor C2, and a third energy storage capacitor C3. The first energy storage capacitor C1 is electrically connected between a first connection point A and a third connection point C to store electrical energy. The second energy storage capacitor C2 is electrically connected between a second connection point B and a fourth connection point D to store electrical energy. The third energy storage capacitor C3 is electrically connected between a first connection point A and a fifth connection point E to store electrical energy. A clamping capacitor C4 is electrically connected between a third connection point C and a fifth connection point E.
[0085] In this embodiment, the second switch M2 and the third switch M3 are electrically connected between the two ends of the clamping capacitor C4. When the second switch M2 and the third switch M3 switch, the clamping capacitor C4 is used to clamp the drain-source voltage of the second switch M2 and the drain-source voltage of the third switch M3. The third switch M3 and the fourth switch M4 are electrically connected between the two ends of the second energy storage capacitor C2. In addition to storing electrical energy, the second energy storage capacitor C2 can also clamp the drain-source voltage of the third switch M3 and the drain-source voltage of the fourth switch M4 when the third switch M3 and the fourth switch M4 switch are switched. The two ends of the first switch M1 are electrically connected to the input capacitor Cin and the clamping capacitor C4, respectively. The first grounding switch M5 is connected to the input capacitor Cin and the second energy storage capacitor C2 at both ends. When the first switch M1 and the first grounding switch M5 are switched, the clamping capacitor C4, the input capacitor Cin, and the second energy storage capacitor C2 clamp the first switch M1 and the first grounding switch M5 together. The first switch M1 is connected to the input capacitor Cin and the first energy storage capacitor C1 at both ends. The second grounding switch M6 is connected to the input capacitor Cin and the first energy storage capacitor C1 at both ends. When the first switch M1 and the second grounding switch M6 are switched, the input capacitor Cin and the first energy storage capacitor C1 clamp the first switch M1 and the second grounding switch M6 together.
[0086] The first output inductor Lo1 and the second output inductor Lo2 are independently configured. The input terminal of the first output inductor Lo1 is electrically connected to the second terminal 122 of the switch control set 12, and the output terminal of the first output inductor Lo1 is electrically connected to the positive output terminal Vo+. The input terminal of the second output inductor Lo2 is electrically connected to the third terminal 123 of the switch control set 12, and the output terminal of the second output inductor Lo2 is electrically connected to the positive output terminal Vo+. The first grounding switch M5 is electrically connected between the second connection point B and the negative output terminal Vo-, and the second grounding switch M6 is electrically connected between the first connection point A and the negative output terminal Vo-. The first grounding switch M5 and the second grounding switch M6 can be, for example, but not limited to, a metal-oxide-semiconductor field-effect transistor (MOSFET), a gallium nitride field-effect transistor (GaN FET), or an insulated-gate bipolar transistor (IGBT). The output capacitor Co is electrically connected between the positive output terminal Vo+ and the negative output terminal Vo-.
[0087] In this embodiment, the power conversion circuit 1 further includes multiple drive units (not shown) and a control circuit (not shown). The number of drive units is equal to the number of switches, for example, six drive units. Each of the six drive units is electrically connected to a first switch M1, a second switch M2, a third switch M3, a fourth switch M4, a first grounding switch M5, and a second grounding switch M6. The control circuit is electrically connected to the six drive units that drive the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6. The control circuit generates six sets of drive switch signals so that each drive unit generates a PWM switch signal according to the corresponding drive switch signal to drive the corresponding switch. Therefore, the power conversion circuit 1 uses the PWM switch signal to drive the corresponding switch to achieve the function of stepping down the input voltage Vin to the output voltage Vo. The following will further illustrate the operation mode of the power conversion circuit 1 using the waveform diagram of the switch.
[0088] Please see Figure 2 and cooperate Figure 1 ,in Figure 2 for Figure 1 The waveform timing diagram shows some components of the power conversion circuit. Figure 2 In the diagram, Vgs_M1, Vgs_M2, Vgs_M3, Vgs_M4, Vgs_M5, and Vgs_M6 are the gate-source voltages of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6, respectively. VA and VB are the voltages of the first connection point and the second connection point, respectively. iC1, iC2, and iC3 are the currents flowing through the first energy storage capacitor C1, the second energy storage capacitor C2, and the third energy storage capacitor C3, respectively. iLo1 and iLo2 are the currents flowing through the first output inductor Lo1 and the second output inductor Lo2, respectively.
[0089] like Figure 2As shown, time 0 to t3 constitutes one switching cycle Ts. The first switch M1 and the third switch M3 receive the first drive signal (taking a MOSFET as an example, the first drive signal corresponds to Vgs_M1 and Vgs_M3) and synchronously turn on and off. The duty cycle of the first drive signal is Duty (i.e., the duty cycle of power conversion circuit 1), which is less than or equal to 50%. That is, within one switching cycle, the on-time of the first switch M1 and the third switch M3 is Duty*Ts. The second drive signal received by the second grounding switch M6 (taking a MOSFET as an example, the second drive signal corresponds to Vgs_M6) is complementary to the first drive signal. The duty cycle of the second drive signal is 1-Duty. That is, within one switching cycle, the on-time of the second grounding switch M6 is (1-Duty)*Ts. The second switch M2 and the fourth switch M4 receive the third driving signal (taking a MOSFET as an example, the third driving signal corresponds to Vgs_M2 and Vgs_M4) and are synchronously turned on and off. The duty cycle of the third driving signal is Duty, which is less than or equal to 50%. That is, within one switching cycle, the conduction time of the second switch M2 and the fourth switch M4 is Duty*Ts. In this embodiment, the third driving signal is 180 degrees out of phase with the first driving signal, and the duty cycle of the third driving signal is the same as that of the first driving signal. The fourth driving signal received by the fifth switch M5 (taking a MOSFET as an example, the fourth driving signal corresponds to Vgs_M5) is complementary to the third driving signal. The duty cycle of the fourth driving signal is 1-Duty. That is, within one switching cycle, the conduction time of the fifth switch M5 is (1-Duty)*Ts.
[0090] according to Figure 2 Waveform timing diagram and in conjunction with Figure 1 As shown in the circuit topology diagram, during the interval from time 0 to t0, the first switch M1 and the third switch M3 are turned on, while the second switch M2 and the fourth switch M4 are turned off. This causes the input capacitor Cin to be connected in series with the first energy storage capacitor C1 to provide current to the first output inductor Lo1. The second energy storage capacitor C2 and the third energy storage capacitor C3 are also connected in series to provide current to the first output inductor Lo1. The current amplitudes flowing through the first energy storage capacitor C1, the second energy storage capacitor C2, and the third energy storage capacitor C3 are all equal, which is 0.5 times the current amplitude of the first output inductor Lo1. The direction of the current flowing through the second energy storage capacitor C2 is opposite to the direction of the current flowing through the first energy storage capacitor C1 and the direction of the current flowing through the third energy storage capacitor C3. At this time, the voltage amplitude at the first connection point A of the first output inductor Lo1 is the difference in amplitude of the DC component of the voltage between the input capacitor Cin and the first energy storage capacitor C1, which is connected in parallel with the difference in amplitude of the DC component of the voltage between the second energy storage capacitor C2 and the third energy storage capacitor C3. Figure 2As shown, the voltage amplitude VA at the first connection point A is applied to the first output inductor Lo1, causing the current iLo1 flowing through the first output inductor Lo1 to gradually increase. Furthermore, the voltage amplitude at the second connection point B of the second output inductor Lo2 is 0, therefore the voltage VB at the second connection point B is not applied to the second output inductor Lo2, causing the current iLo2 flowing through the second output inductor Lo2 to gradually decrease.
[0091] During the interval from time t0 to t1, the first switch M1, the second switch M2, the third switch M3, and the fourth switch M4 are all turned off, which is the dead time. During this dead time, the current amplitudes flowing through the first energy storage capacitor C1, the second energy storage capacitor C2, and the third energy storage capacitor C3 are all 0. As a result, the voltage amplitudes at the first connection point A of the first output inductor Lo1 and the second connection point B of the second output inductor Lo2 are all 0. Therefore, the voltage VA at the first connection point A is not applied to the first output inductor Lo1, causing the current iLo1 flowing through the first output inductor Lo1 to gradually decrease. Similarly, the voltage VB at the second connection point B is not applied to the second output inductor Lo2, causing the current iLo2 flowing through the second output inductor Lo2 to gradually decrease as well.
[0092] During the interval from time t1 to t2, the first switch M1 and the third switch M3 are turned off, while the second switch M2 and the fourth switch M4 are turned on. This connects the first energy storage capacitor C1 and the second energy storage capacitor C2 in series to provide current to the second output inductor Lo2. Simultaneously, the third energy storage capacitor C3 also provides current to the second output inductor Lo2. The current amplitudes flowing through the first energy storage capacitor C1, the second energy storage capacitor C2, and the third energy storage capacitor C3 are all equal, being 0.5 times the current amplitude of the second output inductor Lo2. Furthermore, the direction of the current flowing through the second energy storage capacitor C2 is opposite to the direction of the current flowing through the first energy storage capacitor C1 and the direction of the current flowing through the third energy storage capacitor C3. At this time, the voltage amplitude at the second connection point B of the second output inductor Lo2 is the difference between the DC component amplitude of the voltage of the third energy storage capacitor C3 and the DC component amplitude of the voltage between the first energy storage capacitor C1 and the second energy storage capacitor C2. Figure 2 As shown, the voltage VB at the second connection point B is applied to the second output inductor Lo2, causing the current iLo2 flowing through the second output inductor Lo2 to gradually increase. Furthermore, the voltage amplitude at the first connection point A of the first output inductor Lo1 is 0, therefore the voltage VA at the first connection point A is not applied to the first output inductor Lo1, causing the current iLo1 flowing through the first output inductor Lo1 to gradually decrease.
[0093] During the interval from time t2 to t3, the first switch M1, the second switch M2, the third switch M3, and the fourth switch M4 are all turned off, which is the dead time. During this dead time, the current amplitudes flowing through the first energy storage capacitor C1, the second energy storage capacitor C2, and the third energy storage capacitor C3 are all 0. As a result, the voltage amplitudes at the first connection point A of the first output inductor Lo1 and the second connection point B of the second output inductor Lo2 are all 0. Therefore, the voltage VA at the first connection point A is not applied to the first output inductor Lo1, causing the current iLo1 flowing through the first output inductor Lo1 to gradually decrease. Similarly, the voltage VB at the second connection point B is not applied to the second output inductor Lo2, causing the current iLo2 flowing through the second output inductor Lo2 to gradually decrease as well.
[0094] Based on the circuit topology diagram of the power conversion circuit 1 described above, and in conjunction with... Figure 2 As can be seen from the waveform diagram, the input voltage of the first output inductor Lo1 (i.e., the voltage at the first connection point A) and the input voltage of the second output inductor Lo2 (i.e., the voltage at the second connection point B) are switching voltages. The period of the switching voltage is the same as the switching period of the power conversion circuit 1. In the interval from time 0 to t0, the high input voltage of the first output inductor Lo1 (i.e., the high voltage amplitude at the first connection point A) is equal to the voltage difference between the DC component of the input voltage Vin and the DC component of the voltage of the first energy storage capacitor C1, or equal to the voltage difference between the DC component of the voltage of the second energy storage capacitor C2 and the DC component of the voltage of the third energy storage capacitor C3. The low input voltage of the second output inductor Lo2 (i.e., the low voltage amplitude at the second connection point B) is the voltage of the output negative terminal Vo-. During the interval from time t1 to t2, the high input voltage of the second output inductor Lo2 (i.e., the high voltage amplitude at the second connection point B) is the amplitude of the DC component of the voltage of the third energy storage capacitor C3, or the voltage difference between the amplitude of the DC component of the voltage of the first energy storage capacitor C1 and the amplitude of the DC component of the voltage of the second energy storage capacitor C2, while the low input voltage of the first output inductor Lo1 (i.e., the low voltage amplitude at the first connection point A) is the voltage at the output negative terminal Vo-. Furthermore... Figure 1It can be seen that the output terminal of the first output inductor Lo1 is short-circuited with the output terminal of the second output inductor Lo2. Therefore, the average input voltage of the first output inductor Lo1 is equal to the average input voltage of the second output inductor Lo2. Thus, it can be known that the voltage difference between the magnitude of the DC component of the input voltage Vin and the magnitude of the DC component of the voltage of the first energy storage capacitor C1, the voltage difference between the magnitude of the DC component of the voltage of the second energy storage capacitor C2 and the magnitude of the DC component of the voltage of the third energy storage capacitor C3, and the voltage difference between the magnitude of the DC component of the voltage of the first energy storage capacitor C1 and the magnitude of the DC component of the voltage of the second energy storage capacitor C3 are also related to the voltage difference between the magnitude of the DC component of the input voltage Vin and the magnitude of the DC component of the voltage of the second energy storage capacitor C1. The voltage difference between the DC components of the voltage of capacitor C2 and the DC component of the voltage of the third energy storage capacitor C3 are equal. Based on the above relationship, it can be deduced that the DC component of the voltage of the second energy storage capacitor C2 is equal to twice the DC component of the voltage of the third energy storage capacitor C3, the DC component of the voltage of the first energy storage capacitor C1 is equal to three times the DC component of the voltage of the third energy storage capacitor C3, and the DC component of the input voltage Vin is equal to four times the DC component of the voltage of the third energy storage capacitor C3.
[0095] Furthermore, based on the above relationships, it can be concluded that the amplitude of the DC component of the voltage of the first energy storage capacitor C1 is equal to 3 / 4 times the amplitude of the DC component of the input voltage Vin; the amplitude of the DC component of the voltage of the second energy storage capacitor C2 is equal to 1 / 2 times the amplitude of the DC component of the input voltage Vin; the amplitude of the DC component of the voltage of the third energy storage capacitor C3 is equal to 1 / 4 times the amplitude of the DC component of the input voltage Vin; and the amplitude of the DC component of the high voltage amplitude at the first connection point A and the second connection point B is equal to Vin / (n+1). The power conversion circuit 1 is based on the first energy storage capacitor C1... The energy storage capacitor with the lowest DC component amplitude of its voltage among the second energy storage capacitor C2 and the third energy storage capacitor C3 (i.e., the third energy storage capacitor C3) obtains the output voltage Vo. The expression for the output voltage Vo is as follows: Vo = Duty * VC3 = Duty * Vin / (n + 1), where Vo is the voltage amplitude of the output voltage, Duty is the duty cycle of the first drive signal, VC3 is the amplitude of the DC component of the voltage of the third energy storage capacitor C3, Vin is the amplitude of the DC component of the input voltage, and n is the number of energy storage capacitors, where n is a positive integer greater than or equal to 2. For example... Figure 1As shown, the power conversion circuit 1 in this embodiment has three energy storage capacitors (first energy storage capacitor C1, second energy storage capacitor C2, and third energy storage capacitor C3). Therefore, the output voltage Vo in this embodiment is Duty * VC3 = Duty * Vin / 4. In this embodiment, the voltage gain ratio between the output voltage Vo and the input voltage Vin of the power conversion circuit 1 is Duty / (n + 1), where Duty is the duty cycle of the power conversion circuit 1. In some embodiments, the voltage amplitude at the first connection point A or the voltage amplitude at the second connection point B is the voltage difference between two of the three energy storage capacitors (first energy storage capacitor C1, second energy storage capacitor C2, and third energy storage capacitor C3), or the voltage amplitude of one of the three energy storage capacitors (first energy storage capacitor C1, second energy storage capacitor C2, and third energy storage capacitor C3), or the voltage difference between the input voltage Vin and the voltage amplitude of one of the three energy storage capacitors (first energy storage capacitor C1, second energy storage capacitor C2, and third energy storage capacitor C3). Of course, in some embodiments, the number of energy storage capacitors in the power conversion circuit 1 is not limited to three, but can be any number greater than or equal to two, as will be further explained later.
[0096] As can be seen from the above, this case is based on the circuit topology diagram of the power conversion circuit 1 mentioned above, in conjunction with... Figure 2 The waveform diagram shows that the output voltage of power conversion circuit 1 is Vo = Duty * Vin / 4, which means that the output voltage of power conversion circuit 1 drops significantly compared to the input voltage to achieve the function of voltage reduction. Figure 1 Taking the power conversion circuit 1 as an example, which has three energy storage capacitors, the duty cycle of the power conversion circuit 1 is expanded by four times, and the output voltage is reduced by four times. Furthermore, the product of the voltage and time across the first output inductor Lo1 and the second output inductor Lo2 is significantly reduced. Therefore, the inductance, size, and losses of the first output inductor Lo1 and the second output inductor Lo2 are significantly reduced. This allows the load (i.e., the voltage regulation module) to receive a lower output voltage from the power conversion circuit 1, thereby reducing the overall size of the voltage regulation module and improving the power conversion density and conversion efficiency of the voltage regulation module.
[0097] In some embodiments, in order to reduce the current surge between the input capacitor Cin, the first energy storage capacitor C1, the second energy storage capacitor C2, and the third energy storage capacitor C3 during switch switching, and to reduce the switching losses of all switches within the switch bridge arm 124, the capacitances of the input capacitor Cin, the first energy storage capacitor C1, the second energy storage capacitor C2, and the third energy storage capacitor C3 must satisfy the following two expressions, the first expression being: The second expression is In the above expression, Cin is the capacitance of the input capacitor, C1 is the capacitance of the first energy storage capacitor, C2 is the capacitance of the second energy storage capacitor, C3 is the capacitance of the third energy storage capacitor, and Duty is the duty cycle of the first drive signal.
[0098] In some embodiments, to reduce the output current ripple of the first output inductor Lo1 and the second output inductor Lo2 and to improve the efficiency of the power conversion circuit, the first output inductor Lo1 and the second output inductor Lo2 may be composed of coupled inductors. Please refer to [link to relevant documentation]. Figure 3 and Figure 4 ,in Figure 3 This is a schematic diagram of the circuit topology of the power conversion circuit in the second embodiment of this case. Figure 4 for Figure 3 The waveform timing diagrams of some components of the power conversion circuit are shown. Figure 3 As shown, compared to Figure 1 The power conversion circuit 1 shown in this embodiment has a first output inductor Lo1 and a second output inductor Lo2 that are mutually coupled, meaning that the first output inductor Lo1 and the second output inductor Lo2 can be wound on the same magnetic core (not shown). The input terminal of the first output inductor Lo1 (i.e., the end where the first output inductor Lo1 is connected to the first connection point A) and the output terminal of the second output inductor Lo2 (i.e., the end where the second output inductor Lo2 is connected to the positive output terminal Vo+) are of the same name. In this embodiment, the coupling coefficients of the first output inductor Lo1 and the second output inductor Lo2 are greater than or equal to 0.33. In other embodiments, the coupling coefficients of the first output inductor Lo1 and the second output inductor Lo2 are greater than or equal to 0.66. In still other embodiments, the coupling coefficients of the first output inductor Lo1 and the second output inductor Lo2 are greater than or equal to 0.9.
[0099] according to Figure 4 Waveform timing diagram and in conjunction with Figure 3As shown in the circuit topology diagram, since the first output inductor Lo1 and the second output inductor Lo2 are coupled together, the voltage VA at the first connection point A is simultaneously applied to both the first output inductor Lo1 and the second output inductor Lo2, and the voltage VB at the second connection point B is also simultaneously applied to both the first output inductor Lo1 and the second output inductor Lo2. During the time intervals 0 to t0 and t1 to t2, the current iLo1 flowing through the first output inductor Lo1 gradually increases, and the current iLo2 flowing through the second output inductor Lo2 gradually increases. However, during the time intervals t0 to t1 and t2 to t3, the current iLo1 flowing through the first output inductor Lo1 gradually decreases, and the current iLo2 flowing through the second output inductor Lo2 gradually decreases. Based on the coupling relationship between the first output inductor Lo1 and the second output inductor Lo2, the current ripple frequency of the first output inductor Lo1 and the second output inductor Lo2 doubles, and the ripple amplitude decreases significantly, further improving the efficiency of the power conversion circuit 1a.
[0100] Please see Figure 5 and Figure 6 ,in Figure 5 This is a schematic diagram of the circuit topology of the power conversion circuit in the third embodiment of this case. Figure 6 for Figure 5 The waveform timing diagrams of some components of the power conversion circuit are shown. Compared to... Figure 1 The power conversion circuit 1 shown in this embodiment has a first output inductor that is equivalent to a first leakage inductance Ls1 and a first magnetizing inductance Lm1 connected in series, and a second output inductor that is equivalent to a second leakage inductance Ls2 and a second magnetizing inductance Lm2 connected in series. The second output inductor is coupled to the first output inductor, meaning they can be wound on the same magnetic core (not shown). The input terminal of the first magnetizing inductor Lm1 and the output terminal of the second magnetizing inductor Lm2 are of the same name, and the equivalent inductance of the first magnetizing inductor Lm1 is equal to the equivalent inductance of the second magnetizing inductor Lm2. In this embodiment, the coupling coefficient between the first and second output inductors is greater than or equal to 0.66; in other embodiments, the coupling coefficient is greater than or equal to 0.9.
[0101] In this embodiment, the first output inductor and the second output inductor resonate with the first energy storage capacitor C1, the second energy storage capacitor C2, the third energy storage capacitor C3, and the input capacitor Cin, respectively, so that the current waveforms of the first output inductor and the second output inductor are approximately sinusoidal (assuming iLm1 = iLm2 = 0). The power conversion circuit 1b can use the sinusoidal currents of the first output inductor and the second output inductor to realize the zero-current switching of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6, that is, to achieve the zero-current switching of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6. Furthermore, when the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6 are all turned off, the first magnetizing inductance Lm1 of the first output inductor and the second magnetizing inductance Lm2 of the second output inductor continuously draw the junction capacitance charge of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6, respectively, so as to achieve zero-voltage switching of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6. The control method for achieving zero-current switching and zero-voltage switching of the power conversion circuit 1b in this embodiment will be further explained below.
[0102] At Figure 6 In the diagram, Vgs_M1, Vgs_M2, Vgs_M3, Vgs_M4, Vgs_M5, and Vgs_M6 are the gate-source voltages of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6, respectively (corresponding to the drive signals of switches M1 to M6, and the duty cycle of these drive signals is approximately 50%), and VA and VB are the voltage at the first connection point and the voltage at the second connection point, respectively. The voltage is given by iC1, iC2 and iC3, which are the currents flowing through the first energy storage capacitor C1, the second energy storage capacitor C2 and the third energy storage capacitor C3, respectively. iLo1 is the current flowing through the first output inductor formed by the first leakage inductance Ls1 and the first magnetizing inductance Lm1. iLo2 is the current flowing through the second output inductor formed by the second leakage inductance Ls2 and the second magnetizing inductance Lm2. iLm1 and iLm2 are the currents flowing through the first magnetizing inductance Lm1 and the second magnetizing inductance Lm2, respectively.
[0103] according to Figure 6 Waveform timing diagram and in conjunction with Figure 5As can be seen from the circuit topology diagram, since the first output inductor and the second output inductor are coupled to each other, the voltage VA at the first connection point A is simultaneously applied to the first output inductor, the second output inductor and the output capacitor Co, and the voltage VB at the second connection point B is also simultaneously applied to the first output inductor, the second output inductor and the output capacitor Co.
[0104] During the time intervals from 0 to t0 and from t1 to t2, the current iLo1 flowing through the first output inductor first increases resonantly and then decreases resonantly. When the current iLo1 flowing through the first output inductor decreases to be equal to the current iLm1 flowing through the first magnetizing inductor Lm1, the first switch M1, the third switch M3, and the first grounding switch M5 switch from the on state to the off state, and the second switch M2, the fourth switch M4, and the second grounding switch M6 switch from the off state to the on state. This means that during the time intervals from 0 to t0 and from t1 to t2, the power conversion circuit 1b can achieve zero-current switching of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6. During the time intervals t0 to t1 and t2 to t3, the current iLo1 flowing through the first output inductor is equal to the current iLm1 flowing through the first magnetizing inductor Lm1. This allows the current iLo1 flowing through the first output inductor to draw the junction capacitance charge of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6, thereby achieving zero-voltage turn-on of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6.
[0105] Similarly, during the time intervals from 0 to t0 and from t1 to t2, the current iLo2 flowing through the second output inductor first increases resonantly and then decreases resonantly. When the current iLo2 flowing through the second output inductor decreases to be equal to the current iLm2 flowing through the second magnetizing inductor Lm2, the first switch M1, the third switch M3, and the first grounding switch M5 are prepared to switch from the on state to the off state, and the second switch M2, the fourth switch M4, and the second grounding switch M6 are prepared to switch from the off state to the on state. This means that during the time intervals from 0 to t0 and from t1 to t2, the power conversion circuit 1b can achieve zero-current switching of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6. During the time intervals t0 to t1 and t2 to t3, the current iLo2 flowing through the second output inductor is equal to the current iLm2 flowing through the second magnetizing inductor Lm2. This allows the current iLo2 flowing through the second output inductor to draw the junction capacitance charge from the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6, thereby achieving zero-voltage switching on the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6.
[0106] In this embodiment, the power conversion circuit 1b operates in a resonant state, causing the current waveforms of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6 to be approximately sinusoidal. The power conversion circuit 1b has a resonant period and a resonant frequency based on its resonant operating state. The resonant period is formed by the series resonance of the equivalent inductance formed by the first leakage inductance Ls1 connected in series with the second leakage inductance Ls2 and the equivalent capacitance formed by the first energy storage capacitor C1, the second energy storage capacitor C2, and the third energy storage capacitor C3. It is composed of (Ls1 + Ls2) and... The following parameters are jointly determined: Ls1 is the inductance value of the first leakage inductor, Ls2 is the inductance value of the second leakage inductor, C1 is the capacitance value of the first energy storage capacitor, C2 is the capacitance value of the second energy storage capacitor, and C3 is the capacitance value of the third energy storage capacitor. The resonant frequency is the reciprocal of the resonant period, and when the switching frequency of the power conversion circuit 1c is greater than or equal to the resonant frequency, zero-current turn-off of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6 can be achieved. When the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6 are all turned off, the current iLm1 flowing through the first magnetizing inductor Lm1 and the current iLm2 flowing through the second magnetizing inductor Lm2 continuously draw charge from the junction capacitances of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6, thereby achieving zero-voltage turn-on of the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6. Therefore, the power conversion circuit 1b of this embodiment can significantly reduce the switching losses of all switches, thereby improving the efficiency of the power conversion circuit 1b.
[0107] In some embodiments, the number of energy storage capacitors in the power conversion circuit is not limited to, for example... Figure 1 The number shown is three, but it can be any number greater than two. See also... Figure 7 This is a schematic diagram of the circuit topology of the power conversion circuit in the fourth embodiment of this case. Figure 7 As shown, compared to Figure 1 The switch control assembly 12 shown has a switch bridge arm 124 with four switches, three energy storage capacitors, and a clamping capacitor. The power conversion circuit 1c of this embodiment has a switch bridge arm 124 with only three switches (i.e., the second switch M2, the third switch M3, and the fourth switch M4) and two energy storage capacitors (i.e., the second energy storage capacitor C2 and the third energy storage capacitor C3). Their connection methods are similar to those shown below. Figure 1 The second switch M2, third switch M3, fourth switch M4, second energy storage capacitor C2, and third energy storage capacitor C3 shown are not described in detail here. In this embodiment, the second switch M2, third switch M3, and fourth switch M4 of the switch bridge arm 124 can constitute a three-switch unit 124a, wherein the second switch M2, third switch M3, and fourth switch M4 can be regarded as the upper switch, middle switch, and lower switch of the switch bridge arm 124, and in this embodiment, the second energy storage capacitor C2 can be regarded as the first bridging energy storage capacitor.
[0108] Based on the circuit topology diagram of the power conversion circuit 1c described above, and in conjunction with... Figure 2The waveform diagram shows that, during the interval from time 0 to t0, the high input voltage of the first output inductor Lo1 (i.e., the high voltage amplitude at the first connection point A) is the voltage difference between the DC component of the input voltage Vin and the DC component of the voltage of the second energy storage capacitor C2, or the DC component of the voltage of the third energy storage capacitor C3. During the interval from time t1 to t2, the high input voltage of the second output inductor Lo2 (i.e., the high voltage amplitude at the second connection point B) is the voltage difference between the DC component of the voltage of the second energy storage capacitor C2 and the DC component of the voltage of the third energy storage capacitor C3. Furthermore, from... Figure 7 It can be seen that the output terminal of the first output inductor Lo1 is short-circuited with the output terminal of the second output inductor Lo2. Therefore, the average input voltage of the first output inductor Lo1 is equal to the average input voltage of the second output inductor Lo2. Thus, it can be seen that the voltage difference between the DC component of the input voltage Vin and the DC component of the second energy storage capacitor C2, the voltage difference between the DC component of the second energy storage capacitor C2 and the DC component of the third energy storage capacitor C3, and the DC component of the third energy storage capacitor C3 are all equal. Based on the above relationship, it can be deduced that the DC component of the input voltage Vin is equal to three times the DC component of the third energy storage capacitor C3, and the DC component of the second energy storage capacitor C2 is equal to twice the DC component of the third energy storage capacitor C3.
[0109] Furthermore, based on the above relationships, it can be deduced that the amplitude of the DC component of the voltage of the second energy storage capacitor C2 is equal to 2 / 3 times the amplitude of the DC component of the input voltage Vin, and the amplitude of the DC component of the voltage of the third energy storage capacitor C3 is equal to 1 / 3 times the amplitude of the DC component of the input voltage Vin. The power conversion circuit 1c obtains the output voltage Vo based on the energy storage capacitor (i.e., the third energy storage capacitor C3) with the lowest amplitude of its DC component voltage. The expression for the output voltage Vo is as follows: Vo = Duty * VC3 = Duty * Vin / (n + 1), where Vo is the amplitude of the output voltage, Duty is the duty cycle of the first drive signal, VC3 is the amplitude of the DC component of the voltage of the third energy storage capacitor C3, Vin is the amplitude of the DC component of the input voltage, and n is the number of energy storage capacitors, where n is a positive integer greater than or equal to 2. For example... Figure 7 As shown, the power conversion circuit 1c of this embodiment has two energy storage capacitors (second energy storage capacitor C2 and third energy storage capacitor C3), therefore, the output voltage Vo of this embodiment is Duty * VC3 = Duty * Vin / 3. According to Figure 1 and Figure 3As shown in the circuit topology diagram of power conversion circuit 1, the power conversion circuit includes multiple floating switches and multiple grounded switches, for example... Figure 1 and Figure 3 The first switch M1, the second switch M2, the third switch M3, and the fourth switch M4 shown are floating switches, and the first grounding switch M5 and the second grounding switch M6 are grounding switches. Figure 1 and Figure 3 The power conversion circuit 1 shown requires six drive units to drive the first switch M1, the second switch M2, the third switch M3, the fourth switch M4, the first grounding switch M5, and the second grounding switch M6, respectively. To reduce the size of the power conversion circuit, in some embodiments, the power conversion circuit drives the switches with a smaller number of drive units. Please refer to... Figure 8 This is a circuit topology diagram of the power conversion circuit in the fifth embodiment of this case. The power conversion circuit 1b in this embodiment includes a first driving circuit 21, a second driving circuit 22, a third driving circuit 23, and a fourth driving circuit 24. In this embodiment, all switches are MOSFETs, with the first electrode being the drain, the second electrode being the source, and the driving electrode being the gate. The first driving circuit 21 is electrically connected between the third connection point C and the fifth connection point E, and is also electrically connected to the gate of the first switch M1 and the gate of the third switch M3. In this embodiment, the first driving circuit 21 includes a first driving diode Da, a first driving capacitor Ca, and a first driving unit 211. The first driving diode Da, the first driving capacitor Ca, and the first driving unit 211 are connected in series between the third connection point C and the fifth connection point E. The anode of the first driving diode Da is electrically connected to the third connection point C (i.e., the source of the first switch M1). The connection point between the cathode of the first driving diode Da and the first driving capacitor Ca is further electrically connected to the gate of the first switch M1. The connection point between the first driving capacitor Ca and the first driving unit 211 is further electrically connected to the gate of the third switch M3.
[0110] According to the component connection relationship of the aforementioned first driving circuit 21, when the driving signal of the third switch M3 is low voltage, the first energy storage capacitor C1 is connected in series with the third energy storage capacitor C3 to charge the first driving capacitor Ca through the first driving diode Da. At this time, when the first driving switch signal output by the first driving unit 211 is high level, the first driving unit 211 can directly charge the parasitic capacitance Cgs of the third switch M3, and can simultaneously charge the parasitic capacitance Cgs of the first switch M1 through the first driving capacitor Ca, the first energy storage capacitor C1 and the third energy storage capacitor C3. When the first driving switch signal output by the first driving unit 211 is low level, the first driving unit 211 directly discharges the parasitic capacitance Cgs of the third switch M3, and can simultaneously discharge the parasitic capacitance Cgs of the first switch M1 through the first driving capacitor Ca, the first energy storage capacitor C1 and the third energy storage capacitor C3, so as to achieve the function of simultaneously driving the first switch M1 and the third switch M3 using the same first driving circuit 21. In some embodiments, the capacitance value of the first driving capacitor Ca is greater than or equal to five times the capacitance value of the parasitic capacitance Cgs of the first switch M1.
[0111] The second driving circuit 22 is electrically connected between the fourth connection point D and the second connection point B, and is also electrically connected to the gate of the second switch M2 and the gate of the fourth switch M4. In this embodiment, the second driving circuit 22 includes a second driving diode Db, a second driving capacitor Cb, and a second driving unit 221. The second driving diode Db, the second driving capacitor Cb, and the second driving unit 221 are connected in series between the fourth connection point D and the second connection point B. The anode of the second driving diode Db is electrically connected to the source of the second switch M2. The connection point between the cathode of the second driving diode Db and the second driving capacitor Cb is further electrically connected to the gate of the second switch M2, and the connection point between the second driving capacitor Cb and the second driving unit 221 is further electrically connected to the gate of the fourth switch M4. The third driving circuit 23 is electrically connected between the gate of the first grounding switch M5 and the output negative terminal Vo-, and the third driving circuit 23 is composed of a single driving unit. The fourth drive circuit 24 is electrically connected between the gate of the second grounding switch M6 and the output negative terminal Vo-, and the fourth drive circuit 23 is composed of a single drive unit.
[0112] According to the component connection relationship of the aforementioned second driving circuit 22, when the driving signal of the fourth switch M4 is low voltage, the second energy storage capacitor C2 charges the second driving capacitor Cb through the second driving diode Db. At this time, when the second driving switch signal output by the second driving unit 221 is high level, the second driving unit 221 can directly charge the parasitic capacitance Cgs of the fourth switch M4, and can simultaneously charge the parasitic capacitance Cgs of the second switch M2 through the second driving capacitor Cb and the second energy storage capacitor C2. When the second driving switch signal output by the second driving unit 221 is low level, the second driving unit 221 directly discharges the parasitic capacitance Cgs of the fourth switch M4, and can simultaneously discharge the parasitic capacitance Cgs of the second switch M2 through the second driving capacitor Cb and the second energy storage capacitor C2, so as to achieve the function of simultaneously driving the second switch M2 and the fourth switch M4 using the same second driving circuit 22. In some embodiments, the capacitance value of the second driving capacitor Cb is greater than or equal to five times the capacitance value of the parasitic capacitance Cgs of the second switch M2. In this embodiment, the second switch M2, the third switch M3, and the fourth switch M4 of the switch bridge arm 124 can constitute a three-switch unit, wherein the second switch M2, the third switch M3, and the fourth switch M4 can be regarded as the upper switch, the middle switch, and the lower switch, respectively. In this embodiment, the second energy storage capacitor C2 can be regarded as the first bridging energy storage capacitor, the first switch M1 can be regarded as the series switch, the first energy storage capacitor C1 can be regarded as the second bridging energy storage capacitor, the second driving circuit 22 can be regarded as the first floating ground driving circuit, and correspondingly, the second driving diode Db can be regarded as the first floating ground driving diode, the second driving capacitor Cb can be regarded as the first floating ground driving capacitor, and the second driving unit 221 can be regarded as the first floating ground driving unit. In this embodiment, the first switch M1, the second switch M2, and the third switch M3 of the switch bridge arm 124 can also be regarded as a three-switch unit. The first switch M1, the second switch M2, and the third switch M3 can be regarded as the upper switch, the middle switch, and the lower switch, respectively. Simultaneously, the first energy storage capacitor C1 can be regarded as the first bridging energy storage capacitor, the first driving circuit 21 can be regarded as the first floating ground driving circuit, and correspondingly, the first driving diode Da can be regarded as the first floating ground driving diode, the first driving capacitor Ca can be regarded as the first floating ground driving capacitor, and the first driving unit 211 can be regarded as the first floating ground driving unit. That is, any three switches connected in series on the switch bridge arm can form a three-switch unit, and the first and / or the third end of the three-switch unit can be connected in series with multiple switches.
[0113] Of course, the switch bridge arm can also be like this Figure 7 The diagram shows a three-switch unit with only three switches (i.e., the second switch M2, the third switch M3, and the fourth switch M4). The upper switch (the second switch M2) and the lower switch (the fourth switch M4) are driven by the first floating ground drive circuit. Their driving methods are similar to those described above and will not be repeated here.
[0114] In summary, based on the circuit topology and control method of the power conversion circuit, the output voltage of the power conversion circuit is Vo = Duty * Vin / (n + 1), which means that the output voltage of the power conversion circuit is significantly lower than the input voltage to achieve the function of voltage reduction. Furthermore, the product of the voltage and time across the first and second output inductors is also significantly reduced. Therefore, the inductance, size, and losses of the first and second output inductors are significantly reduced, allowing the load (i.e., the voltage regulation module) to receive the lower output voltage from the power conversion circuit. This, in turn, reduces the overall size of the voltage regulation module and improves its power conversion density and efficiency.
Claims
1. A power conversion circuit, comprising: A positive input terminal, a negative input terminal, a positive output terminal, and a negative output terminal, wherein the negative input terminal and the negative output terminal are electrically connected to ground; A switch bridge arm includes at least one three-switch unit, which includes a first terminal, a second terminal, a third terminal, an upper switch, a middle switch and a lower switch. The upper switch, the middle switch and the lower switch are connected in series between the first terminal and the third terminal. The first terminal is electrically connected to the positive input terminal. The upper switch and the lower switch are turned on and off synchronously. A first grounding switch is coupled to the third terminal and the negative input terminal; A first bridging energy storage capacitor, one end of which is electrically connected between the upper switch and the middle switch, and the other end of which is electrically connected to the third terminal; and A first floating ground drive circuit includes a first floating ground drive diode, a first floating ground drive capacitor, and a first floating ground drive unit. The first floating ground drive diode, the first floating ground drive capacitor, and the first floating ground drive unit are connected in series between a second terminal of an upper switch and a second terminal of a lower switch. The connection point between the first floating ground drive diode and the first floating ground drive capacitor is further connected to a drive terminal of the upper switch, and the connection point between the first floating ground drive capacitor and the first floating ground drive unit is further connected to a drive terminal of the lower switch.
2. The power conversion circuit as described in claim 1, wherein the upper switch and the lower switch jointly receive a first drive signal and are synchronously turned on and off.
3. In the power conversion circuit as described in claim 2, the duty cycle of the first drive signal is less than or equal to 50%.
4. The power conversion circuit as claimed in claim 1, wherein the power conversion circuit further comprises a first output inductor, a second output inductor, and a second grounding switch, the input terminal of the first output inductor is coupled to the second terminal of the three-switch unit to form a first connection point, the output terminal of the first output inductor is electrically connected to the positive output terminal, the input terminal of the second output inductor is electrically connected to the third terminal of the three-switch unit to form a second connection point, the output terminal of the second output inductor is electrically connected to the positive output terminal, the first grounding switch is electrically connected between the second connection point and the negative output terminal, and the second grounding switch is electrically connected between the first connection point and the negative output terminal.
5. The power conversion circuit as described in claim 4, wherein the power conversion circuit comprises n+1 switches and n energy storage capacitors, wherein the upper switch, the middle switch, and the lower switch are three of the n+1 switches, the first bridging energy storage capacitor is one of the n energy storage capacitors, and the voltage gain ratio between an output voltage and an input voltage of the power conversion circuit is [value missing]. , where Duty is the duty cycle of the power conversion circuit, and n is a positive integer greater than or equal to 2.
6. The power conversion circuit as claimed in claim 4, wherein the power conversion circuit further comprises a third driving circuit and a fourth driving circuit, the third driving circuit being electrically connected between the first grounding switch and the output negative terminal, and the fourth driving circuit being electrically connected between the second grounding switch and the output negative terminal.
7. The power conversion circuit as claimed in claim 4, wherein the drive signal of the second grounding switch is complementary to the drive signal of the upper switch, and the drive signal of the first grounding switch is complementary to the drive signal of the middle switch.
8. The power conversion circuit as described in claim 4, wherein the power conversion circuit further comprises n+1 switches and n energy storage capacitors, the first bridging energy storage capacitor is one of the n energy storage capacitors, wherein the magnitude of the DC component of the voltage of the first bridging energy storage capacitor and one of the remaining n-1 energy storage capacitors is equal to the magnitude of the DC component of an input voltage divided by n+1, where n is a positive integer greater than or equal to 2.
9. The power conversion circuit as claimed in claim 4, wherein the first output inductor and the second output inductor are coupled to each other.
10. The power conversion circuit of claim 9, wherein the coupling coefficient between the first output inductor and the second output inductor is greater than or equal to 0.
33.
11. The power conversion circuit of claim 9, wherein the coupling coefficient between the first output inductor and the second output inductor is greater than or equal to 0.
66.
12. The power conversion circuit of claim 9, wherein the coupling coefficient between the first output inductor and the second output inductor is greater than or equal to 0.
9.
13. The power conversion circuit as described in any one of claims 4-12, wherein the switching bridge arm further comprises a series switch and a second bridging energy storage capacitor, the series switch being electrically connected between the positive input terminal and the first terminal of the three-switch unit, one end of the second bridging energy storage capacitor being electrically connected between the series switch and the upper switch, and the other end of the second bridging energy storage capacitor being coupled between the middle switch and the lower switch.
14. The power conversion circuit of claim 13 further includes a first driving circuit, the first driving circuit including a first driving diode, a first driving capacitor and a first driving unit, the first driving diode, the first driving capacitor and the first driving unit being connected in series between the second pole of the series switch and the second pole of the intermediate switch, the connection point between the first driving diode and the first driving capacitor being further connected to a driving pole of the series switch, and the connection point between the first driving capacitor and the first driving unit being further connected to a driving pole of the intermediate switch.
15. The power conversion circuit of claim 13, wherein the upper switch and the lower switch receive a third driving signal and are synchronously turned on and off, and wherein the middle switch and the series switch receive a first driving signal and are synchronously turned on and off, and the duty cycle of the first driving signal is less than or equal to 50%, and the duty cycles of the first driving signal and the third driving signal are the same and out of phase by 180 degrees.
16. The power conversion circuit of claim 13, wherein the power conversion circuit further comprises an input capacitor and a third energy storage capacitor, one end of the third energy storage capacitor is electrically connected to the second terminal of the three-switch unit, and the other end of the third energy storage capacitor is electrically connected between the intermediate switch and the lower switch, wherein the capacitance of the input capacitor, the capacitance of the first bridging energy storage capacitor, the capacitance of the second bridging energy storage capacitor, and the capacitance of the third energy storage capacitor satisfy the following two expressions: ; ; Where Cin is the capacitance of the input capacitor, C1 is the capacitance of the second bridging energy storage capacitor, C2 is the capacitance of the first bridging energy storage capacitor, C3 is the capacitance of the third energy storage capacitor, and Duty is the duty cycle of a first drive signal.
17. The power conversion circuit of claim 13, wherein the power conversion circuit further comprises a third energy storage capacitor, one end of the third energy storage capacitor being electrically connected to the second terminal of the three-switch unit, and the other end of the third energy storage capacitor being electrically connected between the middle switch and the lower switch, the power conversion circuit having a resonant period, the resonant period being formed by the series resonance of the equivalent inductance formed by the leakage inductance of the first output inductor in series with the leakage inductance of the second output inductor and the equivalent capacitance formed by the first bridging energy storage capacitor, the second bridging energy storage capacitor and the third energy storage capacitor, wherein the resonant period is formed by the series resonance of the equivalent inductance formed by the leakage inductance of the first output inductor in series with the leakage inductance of the second output inductor, and the first bridging energy storage capacitor, the second bridging energy storage capacitor and the third energy storage capacitor, wherein the resonant period is formed by the series resonance of the first bridging energy storage capacitor, the second bridging energy storage capacitor and the third energy storage capacitor. and A joint decision, in which, The inductance value is the leakage inductance of the first output inductor. The inductance value is the leakage inductance of the second output inductor. This is the capacitance value of the second bridging energy storage capacitor. Let this be the capacitance value of the first bridging energy storage capacitor. This is the capacitance value of the third energy storage capacitor.
18. The power conversion circuit of claim 17, wherein the power conversion circuit has a resonant frequency that is the reciprocal of the resonant period, and the switching frequency of the power conversion circuit is greater than or equal to the resonant frequency.
19. The power conversion circuit of claim 1, wherein the capacitance value of the first floating ground drive capacitor is greater than or equal to the capacitance value of the parasitic capacitance between the drive electrode and the second electrode of the upper switch.
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