Image sensor and method of manufacturing the same

Abstract

The application discloses an image sensor and a manufacturing method thereof. The manufacturing method comprises the following steps: manufacturing a circuit connecting layer on a first semiconductor substrate; manufacturing a plurality of first medium structure units which are arranged at intervals on the surface of the first semiconductor substrate away from the circuit connecting layer, the surface width of the first medium structure unit towards the first semiconductor substrate is greater than the surface width of the first medium structure unit away from the first semiconductor substrate; forming a second semiconductor substrate on the first semiconductor substrate; the semiconductor structure layer has a plurality of photosensitive pixel areas, and the photosensitive pixel areas correspond to the first medium structure units; and manufacturing an optical structure layer on the surface of the second semiconductor substrate away from the first semiconductor substrate. The medium structure units are arranged between the two semiconductor substrates and used for light path modulation, so that the optical path of the light in the semiconductor structure layer can be improved, the detection efficiency of the light can be enhanced, and a greater degree of freedom is provided for the design of the image sensor.

Description

Technical Field

[0001] This invention relates to the field of image sensor technology, and in particular to an image sensor and its manufacturing method. Background Technology

[0002] Image sensors are devices that convert light signals into electrical signals. Commercially available image sensor chips typically fall into two main categories: charge-coupled device (CCD) and complementary metal-oxide-semiconductor (CMOS) image sensor chips.

[0003] Compared to traditional CCD sensors, CMOS image sensors offer advantages such as low power consumption, low cost, and compatibility with CMOS processes, leading to their increasingly widespread application. Currently, CMOS image sensors are not only used in consumer electronics, such as miniature digital cameras (DSCs), mobile phone cameras, camcorders, and digital SLRs (DSLRs), but also extensively in automotive electronics, surveillance, biotechnology, and medicine.

[0004] The pixel unit of a CMOS image sensor is the core component that enables the sensor to sense light. The most commonly used pixel unit is an active pixel structure that includes a photodiode and multiple transistors. In these devices, the photodiode is the photosensitive unit, which collects light and performs photoelectric conversion, while the other MOS transistors are control units, mainly responsible for controlling the selection, reset, signal amplification, and readout of the photodiode.

[0005] CMOS image sensors can be divided into two types based on the different paths through which incident light enters the photodiode: front-illuminated and back-illuminated. Front-illuminated sensors are those where incident light enters the photodiode from the side closest to the circuit connection layer, while back-illuminated sensors are those where incident light enters the photodiode from the side furthest from the circuit connection layer.

[0006] To increase the area of ​​the photodiode in a CMOS image sensor and reduce the loss of incident light by the dielectric layer, we can use a back-illuminated CMOS image sensor process, in which the incident light enters the photodiode from the back of the silicon wafer, thereby reducing the loss of incident light by the dielectric layer and improving the sensitivity of the pixel unit.

[0007] The absorption coefficient of silicon for incident light decreases with increasing wavelength. Conventional pixel units typically use filter layers for the three primary colors: red, green, and blue. Red light is absorbed most deeply within the silicon wafer, while blue light is absorbed least deeply. Blue light is absorbed closest to the silicon surface, exhibiting the highest absorption coefficient; red light penetrates the deepest part of the wafer, resulting in the lowest absorption coefficient; the absorption coefficient of green light falls between that of blue and red light. Therefore, existing back-illuminated CMOS image sensors have poor performance in receiving red and near-infrared light, leading to poor light capture and imaging capabilities in dark environments.

[0008] To enhance the reception of red and near-infrared light, existing back-illuminated CMOS image sensors typically increase the thickness of the photosensitive element and then incorporate a deep trench isolation (DTI) structure within the silicon substrate to reduce crosstalk. The DTI acts as a separator between the photosensitive element and the light source, reflecting incident light from all directions back into the substrate, increasing the optical path length and thus improving absorption. However, this structure does not increase the optical path length for all directions. Only light rays at large angles can benefit from the increased path length and absorption due to the DTI's reflection effect. The DTI has limited effect on most perpendicularly incident or small-angle incident light. For visible light, the short wavelength results in a short path length within the silicon substrate, minimizing the impact. However, for infrared light, with its longer wavelength, insufficient increase in the optical path length within the silicon substrate will affect the absorption rate, thereby impacting the overall sensor's detection efficiency for infrared light (primarily the near-infrared band of 780nm–1100nm). Summary of the Invention

[0009] In order to overcome the shortcomings and deficiencies of the existing technology, the purpose of this invention is to provide an image sensor and its manufacturing method, so as to solve the problem of poor light detection efficiency of image sensors in the existing technology.

[0010] The objective of this invention is achieved through the following technical solution:

[0011] This invention provides a method for manufacturing an image sensor, the method comprising:

[0012] Provide a first semiconductor substrate;

[0013] A circuit connection layer is fabricated on the first surface of the first semiconductor substrate;

[0014] A first dielectric structure layer is fabricated on a second surface of the first semiconductor substrate away from the first surface; the first dielectric structure layer includes a plurality of first dielectric structure units arranged at intervals, and the surface width of the first dielectric structure unit facing the first semiconductor substrate is greater than the surface width of the first dielectric structure unit away from the first semiconductor substrate, so as to realize optical path modulation based on the first dielectric structure unit.

[0015] A second semiconductor substrate is formed on the second surface of the first semiconductor substrate, and the second semiconductor substrate fills at least the gap between adjacent first dielectric structure units. The first semiconductor substrate and the second semiconductor substrate together form a semiconductor structure layer.

[0016] The semiconductor structure layer has a plurality of photosensitive pixel regions arranged in an array, and each photosensitive pixel region is provided with a photosensitive element. Each photosensitive pixel region corresponds to the first dielectric structure unit.

[0017] An optical structure layer is fabricated on the surface of the second semiconductor substrate away from the first semiconductor substrate.

[0018] Furthermore, the specific steps for forming the second semiconductor substrate include:

[0019] A semiconductor material layer is formed on the second surface of the first semiconductor substrate using an epitaxial growth process to obtain the second semiconductor substrate, wherein the temperature of the epitaxial process is less than 500°C.

[0020] Furthermore, the second semiconductor substrate is made of a different material than the first semiconductor substrate.

[0021] Furthermore, the second semiconductor substrate is made of doped single-crystal silicon or germanium-silicon single crystal, and the process after forming the second semiconductor substrate further includes the following steps:

[0022] The second semiconductor substrate is annealed to activate the doped elements.

[0023] Furthermore, the step of forming the second semiconductor substrate is further included:

[0024] Etching is performed on the surface of the second semiconductor substrate away from the first semiconductor substrate to form a first trench on both the second semiconductor substrate and the first semiconductor substrate.

[0025] A first reflective material structure is filled into the first trench to form a trench isolation structure.

[0026] Furthermore, before fabricating the circuit connection layer on the first surface of the first semiconductor substrate, the method further includes the following steps:

[0027] The first semiconductor substrate is etched on its first surface to form a second trench;

[0028] A second reflective material structure is filled into the second trench to form a first trench isolation structure;

[0029] The first semiconductor substrate is ground on the second surface to expose the first trench isolation structure;

[0030] Forming a first dielectric material layer on a second surface of the first semiconductor substrate, etching the first dielectric material layer to form the first dielectric structure layer, and further forming a second trench isolation structure when etching the first dielectric material layer, wherein the second trench isolation structure corresponds to the first trench isolation structure, and the first trench isolation structure and the second trench isolation structure together form a trench isolation structure.

[0031] Further, before forming the circuit connection layer on the first surface of the first semiconductor substrate, the method further comprises the step of: forming a first insulating layer on the first surface of the first semiconductor substrate;

[0032] or / or before forming the optical structure layer on the surface of the second semiconductor substrate away from the first semiconductor substrate, the method further comprises the step of: forming a second insulating layer on the surface of the second semiconductor substrate away from the first semiconductor substrate.

[0033] Further, the planar shape of the first dielectric structure unit corresponding to the photosensitive pixel region comprises a plurality of circular structures, a combination of a circular structure and an annular structure, a "tic-tac-toe" shaped structure, a "#" shaped structure, a "rice" shaped structure or a net-shaped structure.

[0034] Further, after forming the second semiconductor substrate, the method further comprises the steps of:

[0035] removing the first dielectric structure layer and forming a groove structure in a region of the second semiconductor substrate corresponding to the first dielectric structure layer;

[0036] forming a negatively charged modulation layer on a surface of the second semiconductor substrate away from the first semiconductor substrate, wherein the negatively charged modulation layer covers the surface of the second semiconductor substrate away from the first semiconductor substrate and inner walls of the groove structure, and the metal oxide structure layer is negatively charged;

[0037] covering a surface of the negatively charged modulation layer away from the second semiconductor substrate with a second dielectric material layer, wherein the second dielectric material layer covers the surface of the negatively charged modulation layer away from the second semiconductor substrate and fills the inside of the groove structure to obtain a second dielectric structure layer, the second dielectric structure layer comprises a plurality of second dielectric structure units corresponding to the first dielectric structure units, so that optical path modulation is implemented based on the second dielectric structure units.

[0038] Further, the negatively charged modulation layer comprises a metal oxide structure layer prepared by an atomic layer deposition process, the metal oxide structure layer comprises at least an alumina layer formed simultaneously on the exposed surfaces of the first semiconductor substrate and the second semiconductor substrate, wherein the preparation temperature of the alumina layer is less than 300°C and the thickness thereof is less than 50 nm.

[0039] Further, at least one of TaOx and HfO2 is further prepared on the alumina layer, wherein the preparation temperature of TaOx is less than 300°C and the thickness thereof is less than 150 nm; the preparation temperature of HfO2 is less than 300°C and the thickness thereof is less than 120 nm.

[0040] The present invention further provides an image sensor comprising a circuit connection layer, an optical structure layer, and a semiconductor structure layer located between the circuit connection layer and the optical structure layer;

[0041] a plurality of photosensitive pixel regions distributed in an array is disposed in the semiconductor structure layer, and a photosensitive element is arranged in each photosensitive pixel region;

[0042] the semiconductor structure layer comprises a first semiconductor substrate and a second semiconductor substrate which are stacked, and the second semiconductor substrate is arranged on a side of the first semiconductor substrate away from the circuit connection layer;

[0043] a patterned dielectric structure layer is disposed in the second semiconductor substrate, the dielectric structure layer comprises a plurality of dielectric structure units arranged at intervals, and the surface width of the dielectric structure unit on a side facing the first semiconductor substrate is greater than that on a side away from the first semiconductor substrate, so that optical path modulation is realized based on the dielectric structure units;

[0044] a plurality of photosensitive pixel regions distributed in an array is disposed in the semiconductor structure layer, a photosensitive element is arranged in each photosensitive pixel region, and each photosensitive pixel region corresponds to one dielectric structure unit.

[0045] Further, the second semiconductor substrate and the first semiconductor substrate are made of different materials.

[0046] Further, the planar shape of the dielectric structure unit corresponding to the photosensitive pixel region comprises a plurality of circular structures, a combination of a circular structure and a circular annular structure, a #-shaped structure, a #-shaped (Chinese character jing) structure, a *-shaped (Chinese character mi) structure or a net-shaped structure.

[0047] Furthermore, the semiconductor structure layer is also provided with trench isolation structures that separate the plurality of photosensitive pixel areas. The trench isolation structures include a first trench isolation structure that penetrates the first semiconductor substrate and a second trench isolation structure that penetrates the second semiconductor substrate, with the first trench isolation structure corresponding to the second trench isolation structure.

[0048] Furthermore, a negatively charged metal oxide structure layer is provided between the second semiconductor substrate and the dielectric structure layer, and the metal oxide structure layer covers the surface of the second semiconductor substrate away from the first semiconductor substrate and the inner wall of the groove structure.

[0049] Furthermore, the metal oxide structure layer includes at least an aluminum oxide layer, and the aluminum oxide layer is simultaneously prepared on the exposed surfaces of the first semiconductor substrate and the second semiconductor substrate, wherein the preparation temperature of the aluminum oxide layer is less than 300°C and the thickness is less than 50 nm; and at least one of TaOx and HfO2 is also prepared on the aluminum oxide layer, wherein the preparation temperature of TaOx is less than 300°C and the thickness is less than 150 nm; and the preparation temperature of HfO2 is less than 300°C and the thickness is less than 120 nm.

[0050] The beneficial effects of this invention are as follows: by setting two semiconductor substrates together as a semiconductor structure layer, and providing a dielectric structure unit between the two semiconductor substrates for optical path modulation, the optical path of light in the semiconductor structure layer can be increased, thereby enhancing the detection efficiency of light and increasing the light absorption rate. Moreover, the semiconductor structure layer is fabricated in two layers, which provides greater freedom for the design of image sensors, provides greater design space for the dielectric structure unit, and also provides greater design space for the semiconductor structure layer. Attached Figure Description

[0051] Figure 1 This is a schematic diagram of the longitudinal cross-sectional structure of the image sensor in Embodiment 1 of the present invention;

[0052] Figure 2 This is one of the schematic diagrams of the cross-sectional structure of the image sensor in Embodiment 1 of the present invention;

[0053] Figure 3 This is the second schematic diagram of the cross-sectional structure of the image sensor in Embodiment 1 of the present invention;

[0054] Figure 4 This is the third schematic diagram of the cross-sectional structure of the image sensor in Embodiment 1 of the present invention;

[0055] Figure 5 This is the fourth schematic diagram of the cross-sectional structure of the image sensor in Embodiment 1 of the present invention;

[0056] Figure 6 This is the fifth schematic diagram of the cross-sectional structure of the image sensor in Embodiment 1 of the present invention;

[0057] Figures 7a-7i This is a structural flowchart of the image sensor manufacturing method in Embodiment 1 of the present invention;

[0058] Figure 8 This is a schematic diagram of the longitudinal cross-sectional structure of the image sensor in Embodiment 2 of the present invention;

[0059] Figures 9a-9j This is a structural flowchart of the image sensor manufacturing method in Embodiment 2 of the present invention;

[0060] Figure 10 This is a schematic diagram of the longitudinal cross-sectional structure of the image sensor in Embodiment 3 of the present invention;

[0061] Figures 11a-11j This is a flowchart illustrating the fabrication method of the image sensor in Embodiment 3 of the present invention. Detailed Implementation

[0062] To further illustrate the technical means and effects adopted by the present invention to achieve the intended purpose, the following detailed description, in conjunction with the accompanying drawings and preferred embodiments, details the specific implementation methods, structures, features, and effects of the image sensor and its manufacturing method according to the present invention:

[0063] [Example 1]

[0064] Figure 1 This is a schematic diagram of the longitudinal cross-sectional structure of the image sensor in Embodiment 1 of the present invention. Figure 2 This is one of the schematic diagrams of the cross-sectional structure of the image sensor in Embodiment 1 of the present invention. Figure 3 This is the second schematic diagram of the cross-sectional structure of the image sensor in Embodiment 1 of the present invention. Figure 4 This is the third schematic diagram of the cross-sectional structure of the image sensor in Embodiment 1 of the present invention. Figure 5 This is the fourth schematic diagram of the cross-sectional structure of the image sensor in Embodiment 1 of the present invention. Figure 6 This is the fifth schematic diagram of the cross-sectional structure of the image sensor in Embodiment 1 of the present invention. Figures 7a-7i This is a structural flowchart of the image sensor manufacturing method in Embodiment 1 of the present invention.

[0065] like Figures 1 to 6As shown, an image sensor provided in Embodiment 1 of the present invention includes a circuit connection layer 10, an optical structure layer 30, and a semiconductor structure layer 20 located between the circuit connection layer 10 and the optical structure layer 30. The semiconductor structure layer 20 has a plurality of photosensitive pixel regions 21 arranged in an array and trench isolation structures 22 that separate the plurality of photosensitive pixel regions 21. Each photosensitive pixel region 21 contains a photosensitive element (such as a photodiode). The trench isolation structure 22 serves to separate the plurality of photosensitive elements and reflect light, thereby increasing the optical path length of light within the semiconductor structure layer 20 and improving light absorption efficiency. A transmission transistor (TX), a reset transistor (RST), and a source follower transistor (SF) are formed in each photosensitive pixel region 21 within the semiconductor structure layer 20. The circuit connection layer 10 has multiple connection lines that connect the multiple transistors. The optical structure layer 30 includes a color filter layer 31 and a microlens array structure 32. The color filter layer 31 includes red (R), green (G), and blue (B) color filter layers, and multiple color filter layers 31 are arranged in an array, with each color filter layer 31 corresponding to a pixel unit. The microlens array structure 32 has a light-focusing effect, converging light onto the photosensitive element to increase the light-receiving performance of the photosensitive element. The specific structures of the circuit connection layer 10 and the optical structure layer 30 can be found in existing technologies and will not be described in detail here.

[0066] The semiconductor structure layer 20 includes a first semiconductor substrate 20a and a second semiconductor substrate 20b stacked on top of each other. The second semiconductor substrate 20b is located on the side of the first semiconductor substrate 20a away from the circuit connection layer 10. It can be understood that the second semiconductor substrate 20b has a groove structure 201, which is filled with a dielectric structure layer (first dielectric structure layer 51 or second dielectric structure layer 52). The dielectric structure layer includes a plurality of spaced dielectric structure units (first dielectric structure units or second dielectric structure units), thereby achieving optical path modulation through the dielectric structure units. Each photosensitive pixel area 21 corresponds to one dielectric structure unit. Light passing through the dielectric structure units undergoes diffraction, converting light (such as small-angle light) into large-angle light that enters the semiconductor structure layer 20, increasing the optical path length within the semiconductor structure layer 20, and thus improving the light absorption efficiency. The size of the second semiconductor substrate 20b can be adjusted to improve the diffraction effect of the dielectric structure unit on infrared light, thereby increasing the optical path length of infrared light in the semiconductor structure layer 20. This can be achieved by changing the width of the groove structure or the spacing between adjacent groove structures, thus altering the size of the dielectric structure unit. Alternatively, the size of the dielectric structure unit can be designed to improve the diffraction effect of the grating structure on light sources such as green or blue light.

[0067] In this embodiment, the second semiconductor substrate 20b and the first semiconductor substrate 20a are made of the same material, such as single-crystal silicon. However, in other embodiments, the second semiconductor substrate 20b and the first semiconductor substrate 20a are made of different materials. For example, the first semiconductor substrate 20a is made of single-crystal silicon, while the second semiconductor substrate 20b is made of doped single-crystal silicon, thereby reducing the dark current of the image sensor. The second semiconductor substrate 20b can be made of P-type doped single-crystal silicon, with boron as the dopant element and a doping concentration of 5.00E+13 / cm³. 2 In other designs, the second semiconductor substrate 20b can also be made of SiGe single crystal with a Ge content of 10%, thereby improving the image sensor's detection efficiency for infrared light. Of course, the first semiconductor substrate 20a can also be made of doped single-crystal silicon. By using a double-layer semiconductor substrate (first semiconductor substrate 20a and second semiconductor substrate 20b) to fabricate the semiconductor structure layer 20, greater design flexibility is provided. For example, the second semiconductor substrate 20b and the first semiconductor substrate 20a can be made of different materials. By using doped single-crystal silicon for the second semiconductor substrate 20b, the dark current of the image sensor can be reduced, and the image sensor's detection efficiency for infrared light can be improved.

[0068] In this embodiment, the dielectric structure layer is the first dielectric structure layer 51 within the groove structure 201, and the dielectric structure unit is the first dielectric structure unit. A second insulating layer 60 is also formed between the second semiconductor substrate 20b and the optical structure layer 30. The first dielectric structure layer 51 and the second insulating layer 60 are made of the same material, for example, both are composed of one or more materials such as silicon oxide, aluminum oxide, silicon nitride, and tantalum oxide. Of course, the first dielectric structure layer 51 and the second insulating layer 60 can also be made of different materials.

[0069] In this embodiment, the surface width of the dielectric structure unit facing the first semiconductor substrate 20a is greater than the surface width of the dielectric structure unit away from the first semiconductor substrate 20a. That is, the width of the groove structure 201 facing the first semiconductor substrate 20a is greater than the width of the groove structure 201 away from the first semiconductor substrate 20a. In other words, the longitudinal section of the groove structure 201 is narrower at the top and wider at the bottom. In this embodiment, both the first dielectric structure layer 51 and the groove structure 201 have trapezoidal longitudinal sections. Of course, in other embodiments, the longitudinal sections of the first dielectric structure layer 51 and the groove structure 201 can also be other narrower-at-the-top and wider-at-the-bottom structures, for example... Figure 10A combined trapezoid and rectangle structure as shown. The semiconductor structure layer 20 is made of a double-layer semiconductor substrate (a first semiconductor substrate 20a and a second semiconductor substrate 20b), which can provide a larger design space for the design of the second semiconductor substrate 20b. For example, the groove structure 201 can be designed as a structure that is narrow at the top and wide at the bottom. If the semiconductor structure layer 20 does not adopt a double-layer semiconductor substrate structure, the groove structure 201 etched from the semiconductor structure layer 20 can only be a rectangular structure or a structure that is wide at the top and narrow at the bottom, and cannot achieve the structure that is narrow at the top and wide at the bottom.

[0070] Further, the planar shape of the dielectric structure unit corresponding to the photosensitive pixel region 21 includes a plurality of circular structures ( Figure 2 ), a combination of circular structures and circular ring structures ( Figure 3 ), a "grid-of-nine" shaped structure ( Figure 4 ), a "井" shaped structure ( Figure 5 ), a "rice" shaped structure ( Figure 6 ) or a mesh structure (not shown). When there are a plurality of circular structures, the plurality of circular structures may be arranged in an array, or may be arranged in a "cross" shape, and two adjacent circular structures are connected to each other. Of course, the planar shape of the dielectric structure unit corresponding to the photosensitive pixel region 21 may also be a plurality of square structures, the planar shape thereof can be set according to actual needs, and is not limited thereto.

[0071] In other embodiments, reference may be made to the third embodiment and Figure 10 as shown, a negatively charged modulation layer may also be provided between the second semiconductor substrate 20b and the dielectric structure layer, which may be a negatively charged metal oxide structure layer 70. The metal oxide structure layer 70 covers the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a and the inner wall of the groove structure 201, thereby reducing the dark current of the image sensor. The metal oxide structure layer 70 may be made of materials such as Al2O3, Ta2O5, HfO2 or a multi-layer combination of these materials. Or in other embodiments, the metal oxide structure layer 70 includes at least an aluminum oxide layer, and the aluminum oxide layer is simultaneously formed on the exposed surfaces of the first semiconductor substrate 20a and the second semiconductor substrate 20b, that is, the surface of the first semiconductor substrate 20a facing the second semiconductor substrate 20b and the side of the second semiconductor substrate 20b facing the optical structure layer 30 are both provided with the metal oxide structure layer 70. Wherein, the preparation temperature of the aluminum oxide layer is less than 300°C, and the thickness is less than 50 nm; and at least one of TaOx and HfO2 is further formed on the aluminum oxide layer, wherein the preparation temperature of TaOx is less than 300°C, and the thickness is less than 150 nm; the preparation temperature of HfO2 is less than 300°C, and the thickness is less than 120 nm.

[0072] In this embodiment, the trench isolation structure 22 penetrates the second semiconductor substrate 20b and partially extends into the first semiconductor substrate 20a, but does not penetrate the first semiconductor substrate 20a. The trench isolation structure 22 can be made of a high-dielectric material such as oxides (e.g., hafnium oxide, aluminum oxide, tantalum oxide, silicon oxide), silicon nitride (SiN), silicon dioxide (SiO2), or air, or a material with a refractive index lower than that of the semiconductor structure layer 20. This allows total internal reflection to occur between the trench isolation structure 22 and the semiconductor structure layer 20, increasing the optical path length of light within the semiconductor structure layer 20 and thus improving light absorption efficiency. Of course, in other embodiments, please refer to Embodiment 2 and... Figure 8 As shown, the trench isolation structure 22 includes a first trench isolation structure 221 penetrating the first semiconductor substrate 20a and a second trench isolation structure 222 penetrating the second semiconductor substrate 20b, with the first trench isolation structure 221 corresponding to the second trench isolation structure 222. The first trench isolation structure 221 can be made of a high-dielectric material such as oxide (OX), silicon nitride (SiN), silicon dioxide (SiO2), or air, with a refractive index lower than that of the semiconductor structure layer 20. The second trench isolation structure 222 can be composed of one or more materials such as silicon oxide, aluminum oxide, silicon nitride, or tantalum oxide; that is, the second trench isolation structure 222 and the dielectric structure layer are made of the same material. The first trench isolation structure 221 and the second trench isolation structure 222 can be made of different materials, or they can be made of the same material, such as silicon dioxide (SiO2).

[0073] In other embodiments, a metal layer, such as W or Pt, may also be disposed within the trench isolation structure 22 to increase the reflectivity of the trench isolation structure 22. Alternatively, a polycrystalline silicon layer may also be disposed within the trench isolation structure 22.

[0074] like Figures 7a-7i As shown, this embodiment also provides a method for manufacturing an image sensor. This method is used to manufacture the image sensor described above, and the method includes:

[0075] like Figures 7a-7cAs shown, a first semiconductor substrate 20a is provided, and a circuit connection layer 10 is then fabricated on the first surface of the first semiconductor substrate 20a. The semiconductor substrate 20a has opposing first and second surfaces, wherein the second surface is typically formed by thinning the first semiconductor substrate 20a through chemical mechanical polishing after flipping it. The first semiconductor substrate 20a can be made of single-crystal silicon or doped single-crystal silicon. In an optional example, an insulating film is first deposited on the first surface of the first semiconductor substrate 20a to form a first insulating layer 40, and then a circuit connection layer 10 is fabricated on the side of the first insulating layer 40 away from the first semiconductor substrate 20a. The circuit connection layer 10 is made of multiple conductive layers and multiple insulating layers. The semiconductor structure layer 20 forms various transistors such as a transmission transistor (TX), a reset transistor (RST), and a source follower transistor (SF) within each photosensitive pixel region 21. The specific structure and fabrication method of the circuit connection layer 10 can be found in existing technologies and will not be elaborated here.

[0076] like Figures 7d-7e As shown, a first dielectric material layer 51a is covered on the second surface of the first semiconductor substrate 20a away from the first surface. The first dielectric material layer 51a is etched to form a patterned first dielectric structure layer 51, and the second surface of the first semiconductor substrate 20a is exposed from the area where the first dielectric material layer 51a is etched away.

[0077] Specifically, the first semiconductor substrate 20a, after the circuit connection layer 10 is fabricated, is flipped so that the second surface of the first semiconductor substrate 20a is on top. At this time, the second surface of the first semiconductor substrate 20a can be polished to make the first semiconductor substrate 20a thinner, or it can be left unpolished. Then, a first dielectric material layer 51a is covered on the second surface of the first semiconductor substrate 20a, and the first dielectric material layer 51a is etched to form a patterned first dielectric structure layer 51. During the etching of the first dielectric material layer 51a, the second surface of the first semiconductor substrate 20a is exposed in the area where the first dielectric material layer 51a is etched away, that is, the first dielectric material layer 51a is etched through, and the portion of the first dielectric material layer 51a remaining on the second surface of the first semiconductor substrate 20a forms the first dielectric structure layer 51. The first dielectric material layer 51a can be composed of one or more materials such as silicon oxide, aluminum oxide, silicon nitride, and tantalum oxide.

[0078] Furthermore, the first dielectric structure layer 51 includes a plurality of spaced-apart first dielectric structure units. The surface width of the first dielectric structure unit facing the first semiconductor substrate 20a is greater than the surface width of the first dielectric structure unit away from the first semiconductor substrate 20a, so as to realize optical path modulation based on the first dielectric structure unit. Each first dielectric structure unit corresponds to the photosensitive pixel area 21. That is, in this embodiment, the dielectric structure layer is the first dielectric structure layer 51, and the dielectric structure unit is the first dielectric structure unit.

[0079] like Figure 7f As shown, a second semiconductor substrate 20b is formed on the second surface of the first semiconductor substrate 20a. The second semiconductor substrate 20b fills the area where the first dielectric material layer 51a is etched away. The first semiconductor substrate 20a and the second semiconductor substrate 20b together form the semiconductor structure layer 20.

[0080] Specifically, a semiconductor material layer is first deposited on the second surface of the first semiconductor substrate 20a using a single-crystal silicon deposition process. For example, the semiconductor material layer can be formed using low-temperature liquid phase epitaxy or hot-wire CVD, wherein the epitaxial process temperature is less than 500°C, for example, 100°C, 200°C, or 400°C. Then, a chemical mechanical polishing (CMP) process is used to polish the semiconductor material layer and expose the first dielectric structure layer 51. The portion of the semiconductor material layer that is retained forms the second semiconductor substrate 20b.

[0081] In this embodiment, the dielectric structure unit is formed by a single process, i.e., the dielectric structure unit is formed from a first dielectric structure unit. Light passing through the first dielectric structure unit undergoes diffraction, thereby converting small-angle light into large-angle light that enters the semiconductor structure layer 20, increasing the optical path length within the semiconductor structure layer 20, and thus improving the light absorption efficiency. The diffraction effect of the first dielectric structure unit on infrared light can be improved by adjusting the size of the second semiconductor substrate 20b, thereby increasing the optical path length of infrared light within the semiconductor structure layer 20. For example, this can be achieved by changing the width of the first dielectric structure layer 51 or the spacing between adjacent first dielectric structure layers 51. Alternatively, the size of the first dielectric structure unit can be designed to improve its diffraction effect on green or blue light.

[0082] In this embodiment, both the first dielectric structure layer 51 and the second semiconductor substrate 20b are fabricated using a single process. In other embodiments, to fabricate a more complex first dielectric structure layer 51, both the first dielectric structure layer 51 and the second semiconductor substrate 20b can be fabricated using a multi-process. For example, when fabricating a cross-section of the first dielectric structure layer 51 that is wider in the middle and narrower at the top and bottom, a dielectric material layer is first deposited and etched to form the lower half of the first dielectric structure layer 51; then a semiconductor material layer is deposited and polished to form the lower half of the second semiconductor substrate 20b; then another dielectric material layer is deposited and etched to form the upper half of the first dielectric structure layer 51; finally, another semiconductor material layer is deposited and polished to form the upper half of the second semiconductor substrate 20b.

[0083] In this embodiment, the second semiconductor substrate 20b and the first semiconductor substrate 20a are made of the same material, such as single-crystal silicon. However, in other embodiments, the second semiconductor substrate 20b and the first semiconductor substrate 20a are made of different materials. For example, the first semiconductor substrate 20a is made of single-crystal silicon, while the second semiconductor substrate 20b is made of doped single-crystal silicon, thereby reducing the dark current of the image sensor. The second semiconductor substrate 20b can be made of P-type doped single-crystal silicon, with boron as the dopant element and a doping concentration of 5.00E+13 / cm³. 2 However, after forming the second semiconductor substrate 20b, it needs to be annealed to activate the doped elements. In other schemes, the second semiconductor substrate 20b can also be made of SiGe single crystal with a Ge content of 10%, thereby improving the detection efficiency of the image sensor for infrared light. Of course, the first semiconductor substrate 20a can also be made of doped single-crystal silicon. By using two semiconductor substrates (first semiconductor substrate 20a and second semiconductor substrate 20b) to make the semiconductor structure layer 20, more design space is provided for the design of the semiconductor structure layer 20. For example, the second semiconductor substrate 20b and the first semiconductor substrate 20a can be made of different materials. By using doped single-crystal silicon to make the second semiconductor substrate 20b, the dark current of the image sensor can be reduced and the detection efficiency of the image sensor for infrared light can be improved.

[0084] In this embodiment, the surface width of the first dielectric structure layer 51 facing the first semiconductor substrate 20a is greater than the surface width of the first dielectric structure layer 51 away from the first semiconductor substrate 20a. In this embodiment, the longitudinal section of the first dielectric structure layer 51 is trapezoidal. Of course, in other embodiments, the longitudinal section of the first dielectric structure layer 51 can also be other structures that are narrower at the top and wider at the bottom, for example... Figure 10the combined trapezoid and rectangle structure shown. Of course, the longitudinal sections of the first dielectric structure layer 51 and the groove structure 201 can also be designed as a structure with the same upper and lower widths or a structure with a wider upper part and a narrower lower part, such as a rectangle or an inverted trapezoid. By forming the semiconductor structure layer 20 with a double-layer semiconductor substrate (the first semiconductor substrate 20a and the second semiconductor substrate 20b), greater design space can be provided for the design of the second semiconductor substrate 20b. For example, the first dielectric structure layer 51 can be designed into a structure with a narrower upper part and a wider lower part, so that the structure of the second semiconductor substrate 20b can be designed by designing the structure of the first dielectric structure layer 51. If the semiconductor structure layer 20 does not adopt a double-layer semiconductor substrate structure, it is necessary to etch the semiconductor structure layer from the second surface of the semiconductor structure layer to form a groove structure, and then cover the dielectric structure layer and fill the groove structure. However, the etched groove structure can only be a structure with the same upper and lower widths or a structure with a wider upper part and a narrower lower part, and cannot achieve a structure with a narrower upper part and a wider lower part. The first dielectric structure layer 51 filled into the groove structure can also only be a structure with the same upper and lower widths or a structure with a wider upper part and a narrower lower part.

[0085] Further, the planar shape of the first dielectric structure unit corresponding to the photosensitive pixel region 21 comprises a plurality of circular structures ( Figure 2 ), a combination of circular structures and circular ring structures ( Figure 3 ), a "field" shaped structure ( Figure 4 ), a "well" shaped structure ( Figure 5 ), a "mi" shaped structure ( Figure 6 ) or a mesh structure (not shown). When there are a plurality of circular structures, the plurality of circular structures can be arranged in an array or in a cross shape, and two adjacent circular structures are connected to each other. Of course, the planar shape of the first dielectric structure layer 51 corresponding to the photosensitive pixel region 21 can also be a plurality of square structures, the planar shape thereof can be set according to actual needs, and is not limited thereto.

[0086] As Figure 7g shown, the second semiconductor substrate 20b and the first semiconductor substrate 20a are etched on the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a to form a first trench; a first light-reflective material structure is filled in the first trench to form a trench isolation structure 22. Wherein, the trench isolation structure 22 can be made of a material with a refractive index lower than that of the semiconductor structure layer 20, such as oxides (e.g., hafnium oxide, aluminum oxide, tantalum oxide, silicon oxide), silicon nitride (SiN), high dielectric constant materials of silicon dioxide (SiO2) or air, so that total reflection is formed between the trench isolation structure 22 and the semiconductor structure layer 20, to increase the optical path of light in the semiconductor structure layer 20, thereby improving the light absorption efficiency.

[0087] In this embodiment, the trench isolation structure 22 penetrates the second semiconductor substrate 20b and partially extends into the first semiconductor substrate 20a, but does not penetrate the first semiconductor substrate 20a. Of course, in other embodiments, the trench isolation structure 22 may penetrate both the second semiconductor substrate 20b and the first semiconductor substrate 20a.

[0088] In other embodiments, a metal layer, such as W or Pt, may also be disposed within the trench isolation structure 22 to increase the reflectivity of the trench isolation structure 22. For example, a first reflective material is first filled into the first trench to form a trench isolation structure, then the trench isolation structure is further etched to form a metal-filled groove, and then a metal layer is prepared in the metal-filled groove.

[0089] like Figure 7h As shown, a second insulating layer 60 is formed on the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a. Specifically, a second dielectric material layer 52a is covered on the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a, thereby forming the second insulating layer 60. The first dielectric structure layer 51 and the second insulating layer 60 are made of the same material, for example, both are composed of one or more materials such as silicon oxide, aluminum oxide, silicon nitride, and tantalum oxide. Of course, the first dielectric structure layer 51 and the second insulating layer 60 can also be made of different materials.

[0090] like Figure 7i As shown, an optical structure layer 30 is fabricated on the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a. Specifically, the optical structure layer 30 is fabricated on the surface of the second insulating layer 60 away from the second semiconductor substrate 20b. The optical structure layer 30 includes a color filter layer 31 and a microlens array structure 32. The color filter layer 31 includes red (R), green (G), and blue (B) color filters, and multiple color filters 31 are arranged in an array, with each color filter layer 31 corresponding to a pixel unit. The microlens array structure 32 has a light-focusing effect, converging light onto the photosensitive element to increase the light-receiving performance of the photosensitive element. The specific structure and fabrication method of the optical structure layer 30 can be found in existing technologies and will not be elaborated here.

[0091] [Example 2]

[0092] Figure 8 This is a schematic diagram of the longitudinal cross-sectional structure of the image sensor in Embodiment 2 of the present invention. Figures 9a-9j This is a structural flowchart of the image sensor fabrication method in Embodiment 2 of the present invention. The image sensor provided in Embodiment 2 of the present invention is similar to that in Embodiment 1 (… Figure 1 The image sensors in these are basically the same, the difference being that, for example... Figure 8As shown, in this embodiment, the trench isolation structure 22 of the image sensor includes a first trench isolation structure 221 penetrating the first semiconductor substrate 20a and a second trench isolation structure 222 penetrating the second semiconductor substrate 20b, with the first trench isolation structure 221 corresponding to the second trench isolation structure 222. The first trench isolation structure 221 can be made of a high-dielectric material such as oxides (e.g., hafnium oxide, aluminum oxide, tantalum oxide, silicon oxide), silicon nitride (SiN), silicon dioxide (SiO2), or air, with a refractive index lower than that of the semiconductor structure layer 20. The second trench isolation structure 222 can be composed of one or more materials such as silicon oxide, aluminum oxide, silicon nitride, and tantalum oxide; that is, the second trench isolation structure 222 and the first dielectric structure layer 51 are made of the same material. Of course, the first trench isolation structure 221 and the second trench isolation structure 222 can be made of different materials, or they can be made of the same material, such as silicon dioxide (SiO2).

[0093] like Figures 9a-9j As shown, this embodiment also provides a method for manufacturing an image sensor. This method is used to manufacture the image sensor described above, and the method includes:

[0094] like Figures 9a-9b As shown, a first semiconductor substrate 20a is provided. A second trench is formed by etching the first surface of the first semiconductor substrate 20a. A second reflective material structure is filled into the second trench to form a first trench isolation structure 221. The second trench does not require etching through the first semiconductor substrate 20a. The semiconductor substrate 20a has opposing first and second surfaces. The second surface is typically formed by chemically and mechanically polishing the first semiconductor substrate 20a after flipping it to thin it. The first semiconductor substrate 20a can be made of single-crystal silicon or doped single-crystal silicon. The first trench isolation structure 221 can be made of a high-dielectric material such as oxide (OX), silicon nitride (SiN), silicon dioxide (SiO2), or air, whose refractive index is lower than that of the semiconductor structure layer 20. This allows total internal reflection between the first trench isolation structure 221 and the semiconductor structure layer 20, increasing the optical path length of light within the semiconductor structure layer 20 and thus improving light absorption efficiency.

[0095] like Figure 9cAs shown, a circuit connection layer 10 is fabricated on the first surface of the first semiconductor substrate 20a. In this embodiment, an insulating film is first deposited on the first surface of the first semiconductor substrate 20a to form a first insulating layer 40. Then, a circuit connection layer 10 is fabricated on the side of the first insulating layer 40 away from the first semiconductor substrate 20a. The circuit connection layer 10 is made of multiple conductive layers and multiple insulating layers. In each photosensitive pixel area 21, the semiconductor structure layer 20 forms various transistors such as a transmission transistor (TX), a reset transistor (RST), and a source follower transistor (SF). The specific structure and fabrication method of the circuit connection layer 10 can be referred to the prior art, and will not be described in detail here.

[0096] like Figures 9d-9e As shown, the first semiconductor substrate 20a is polished on its second surface to expose the first trench isolation structure 221. Specifically, the first semiconductor substrate 20a after the circuit connection layer 10 is fabricated is flipped so that the second surface of the first semiconductor substrate 20a is on the upper side. At this time, the second surface of the first semiconductor substrate 20a can be polished to make the first semiconductor substrate 20a thinner, so that the first trench isolation structure 221 is exposed from the second surface of the first semiconductor substrate 20a.

[0097] like Figure 9g-9f As shown, a first dielectric material layer 51a is covered on the second surface of the first semiconductor substrate 20a away from the first surface. The first dielectric material layer 51a is etched to form a patterned first dielectric structure layer 51 and a patterned second trench isolation structure 222. The second surface of the first semiconductor substrate 20a is exposed from the area where the first dielectric material layer 51a is etched away. Specifically, the first dielectric material layer 51a is first covered on the second surface of the first semiconductor substrate 20a, and then the first dielectric material layer 51a is etched to form a patterned first dielectric structure layer 51 and a patterned second trench isolation structure 222. The second trench isolation structure 222 corresponds to the first trench isolation structure 221, and the first trench isolation structure 221 and the second trench isolation structure 222 together form the trench isolation structure 22. When etching the first dielectric material layer 51a, the area where the first dielectric material layer 51a is etched away exposes the second surface of the first semiconductor substrate 20a, that is, the first dielectric material layer 51a is etched through, and the portion of the first dielectric material layer 51a remaining on the second surface of the first semiconductor substrate 20a forms the first dielectric structure layer 51 and the second trench isolation structure 222. The first dielectric material layer 51a can be composed of one or more materials such as silicon oxide, aluminum oxide, silicon nitride, and tantalum oxide. Of course, in other embodiments, the second trench isolation structure 222 can also be fabricated through an additional process, but this will increase the process flow.

[0098] Furthermore, the first dielectric structure layer 51 includes a plurality of spaced-apart first dielectric structure units. The surface width of the first dielectric structure unit facing the first semiconductor substrate 20a is greater than the surface width of the first dielectric structure unit away from the first semiconductor substrate 20a, so as to realize optical path modulation based on the first dielectric structure unit. Each first dielectric structure unit corresponds to the photosensitive pixel area 21.

[0099] like Figure 9h As shown, a second semiconductor substrate 20b is formed on the second surface of the first semiconductor substrate 20a. The second semiconductor substrate 20b fills the area where the first dielectric material layer 51a is etched away. The first semiconductor substrate 20a and the second semiconductor substrate 20b together form the semiconductor structure layer 20. Specifically, a semiconductor material layer is first deposited on the second surface of the first semiconductor substrate 20a using a single-crystal silicon deposition process. For example, a low-temperature liquid phase epitaxy or hot-wire CVD method can be used to form the semiconductor material layer, wherein the temperature of the epitaxial process is less than 500°C. Then, a chemical mechanical polishing (CMP) process is used to polish the semiconductor material layer and expose the first dielectric structure layer 51a and the second trench isolation structure 222. The portion of the semiconductor material layer that is retained forms the second semiconductor substrate 20b.

[0100] In this embodiment, the dielectric structure unit is formed by a single process, i.e., the dielectric structure unit is formed from a first dielectric structure unit. Light passing through the first dielectric structure unit undergoes diffraction, converting small-angle light into large-angle light that enters the semiconductor structure layer 20, thus increasing the optical path length within the semiconductor structure layer 20 and improving light absorption efficiency. The diffraction effect of the first dielectric structure unit on infrared light can be improved by adjusting the size of the second semiconductor substrate 20b, thereby increasing the optical path length of infrared light within the semiconductor structure layer 20. For example, this can be achieved by changing the width of the first dielectric structure layer 51 or the spacing between adjacent first dielectric structure layers 51. Alternatively, the size of the second semiconductor substrate 20b can be designed to improve the diffraction effect of the first dielectric structure unit on green or blue light.

[0101] In this embodiment, both the first dielectric structure layer 51 and the second semiconductor substrate 20b are fabricated using a single process. In other embodiments, to fabricate a more complex first dielectric structure layer 51, both the first dielectric structure layer 51 and the second semiconductor substrate 20b can be fabricated using a multi-process. For example, when fabricating a cross-section of the first dielectric structure layer 51 that is wider in the middle and narrower at the top and bottom, a dielectric material layer is first deposited and etched to form the lower half of the first dielectric structure layer 51; then a semiconductor material layer is deposited and polished to form the lower half of the second semiconductor substrate 20b; then another dielectric material layer is deposited and etched to form the upper half of the first dielectric structure layer 51; finally, another semiconductor material layer is deposited and polished to form the upper half of the second semiconductor substrate 20b.

[0102] In this embodiment, the second semiconductor substrate 20b and the first semiconductor substrate 20a are made of the same material, such as single-crystal silicon. However, in other embodiments, the second semiconductor substrate 20b and the first semiconductor substrate 20a are made of different materials. For example, the first semiconductor substrate 20a is made of single-crystal silicon, while the second semiconductor substrate 20b is made of doped single-crystal silicon, thereby reducing the dark current of the image sensor. The second semiconductor substrate 20b can be made of P-type doped single-crystal silicon, with boron as the dopant element and a doping concentration of 5.00E+13 / cm³. 2 However, after forming the second semiconductor substrate 20b, it needs to be annealed to activate the doped elements. In other schemes, the second semiconductor substrate 20b can also be made of SiGe single crystal with a Ge content of 10%, thereby improving the detection efficiency of the image sensor for infrared light. Of course, the first semiconductor substrate 20a can also be made of doped single-crystal silicon. By using two semiconductor substrates (first semiconductor substrate 20a and second semiconductor substrate 20b) to make the semiconductor structure layer 20, more design space is provided for the design of the semiconductor structure layer 20. For example, the second semiconductor substrate 20b and the first semiconductor substrate 20a can be made of different materials. By using doped single-crystal silicon to make the second semiconductor substrate 20b, the dark current of the image sensor can be reduced and the detection efficiency of the image sensor for infrared light can be improved.

[0103] In this embodiment, the surface width of the first dielectric structure unit facing the first semiconductor substrate 20a is greater than the surface width of the first dielectric structure unit away from the first semiconductor substrate 20a. In this embodiment, the longitudinal section of the first dielectric structure unit is trapezoidal. Of course, in other embodiments, the longitudinal section of the first dielectric structure unit can also be other structures that are narrower at the top and wider at the bottom, for example... Figure 10a combined structure of a trapezoid and a rectangle as shown. Of course, the longitudinal sections of the first dielectric structural unit and the groove structure can also be designed as a structure with the same upper and lower width or a structure with a wider upper part and a narrower lower part, such as a rectangle or an inverted trapezoid. By forming the semiconductor structure layer 20 from a double-layer semiconductor substrate (a first semiconductor substrate 20a and a second semiconductor substrate 20b), greater design space can be provided for the design of the second semiconductor substrate 20b. For example, the first dielectric structure layer 51 can be designed into a structure with a narrower upper part and a wider lower part, so that the structure of the second semiconductor substrate 20b can be designed by designing the structure of the first dielectric structure layer 51. If the semiconductor structure layer 20 does not adopt a double-layer semiconductor substrate structure, it is necessary to etch the semiconductor structure layer 20 from the second surface of the semiconductor structure layer 20 to form the groove structure 201, and then cover the dielectric structure layer and fill the groove structure 201. However, the etched groove structure 201 can only be a structure with the same upper and lower width or a structure with a wider upper part and a narrower lower part, and cannot realize a structure with a narrower upper part and a wider lower part, and the first dielectric structure layer 51 filled in the groove structure 201 can also only be a structure with the same upper and lower width or a structure with a wider upper part and a narrower lower part.

[0104] Further, the planar shape of the first dielectric structural unit corresponding to the photosensitive pixel region 21 includes a plurality of circular structures (see Figure 2 ), a combination of circular structures and circular ring structures (see Figure 3 ), a "tic-tac-toe" shaped structure (see Figure 4 ), a "#" shaped structure (see Figure 5 ), a "rice" shaped structure (see Figure 6 ) or a mesh structure (not shown). When it is a plurality of circular structures, the plurality of circular structures can be arranged in an array or in a "+" shaped arrangement, and two adjacent circular structures are connected to each other. Of course, the planar shape of the first dielectric structure layer 51 corresponding to the photosensitive pixel region 21 can also be a plurality of square structures, and the planar shape can be set according to actual needs, which is not limited thereto.

[0105] As shown in Figure 9i , a second insulating layer 60 is formed on the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a. Specifically, a second dielectric material layer 52a is covered on the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a, thereby forming the second insulating layer 60. The first dielectric structure layer 51 and the second insulating layer 60 are made of the same material, for example, both are made of one or more materials selected from silicon oxide, aluminum oxide, silicon nitride, tantalum oxide and the like. Of course, the first dielectric structure layer 51 and the second insulating layer 60 can also be made of different materials.

[0106] As shown in Figure 9jAs shown, an optical structure layer 30 is fabricated on the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a. Specifically, the optical structure layer 30 is fabricated on the surface of the second insulating layer 60 away from the second semiconductor substrate 20b. The optical structure layer 30 includes a color filter layer 31 and a microlens array structure 32. The color filter layer 31 includes red (R), green (G), and blue (B) color filters, and multiple color filters 31 are arranged in an array, with each color filter layer 31 corresponding to a pixel unit. The microlens array structure 32 has a light-focusing effect, converging light onto the photosensitive element to increase the light-receiving performance of the photosensitive element. The specific structure and fabrication method of the optical structure layer 30 can be found in existing technologies and will not be elaborated here.

[0107] Those skilled in the art should understand that the remaining structures and working principles of this embodiment are the same as those of Embodiment 1, and will not be repeated here.

[0108] [Example 3]

[0109] Figure 10 This is a schematic diagram of the longitudinal cross-sectional structure of the image sensor in Embodiment 3 of the present invention. Figures 11a-11j This is a structural flowchart of the image sensor fabrication method in Embodiment 3 of the present invention. The image sensor provided in Embodiment 3 of the present invention is similar to that in Embodiment 1 (… Figure 1 The image sensors in these are basically the same, the difference being that, for example... Figure 10 As shown, in this embodiment, the image sensor has a negatively charged modulation layer between the second semiconductor substrate 20b and the dielectric structure layer. This modulation layer can be a negatively charged metal oxide structure layer 70. The metal oxide structure layer 70 covers the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a and the inner wall of the groove structure 201, thereby reducing the dark current of the image sensor. The metal oxide structure layer 70 can be materials such as Al2O3, Ta2O5, and HfO2, or a multilayer combination of these materials. Preferably, the metal oxide structure layer 70 includes at least an aluminum oxide layer, wherein the aluminum oxide layer is prepared at a temperature less than 300°C and has a thickness less than 50 nm; furthermore, at least one of TaOx and HfO2 is prepared on the aluminum oxide layer, wherein the TaOx layer is prepared at a temperature less than 300°C and has a thickness less than 150 nm; and the HfO2 layer is prepared at a temperature less than 300°C and has a thickness less than 120 nm.

[0110] In other embodiments, the metal oxide structure layer 70 is simultaneously formed on the exposed surfaces of the first semiconductor substrate 20a and the second semiconductor substrate 20b, that is, the metal oxide structure layer 70 is provided on the surface of the first semiconductor substrate 20a facing the second semiconductor substrate 20b and on the side of the second semiconductor substrate 20b facing the optical structure layer 30.

[0111] In this embodiment, the dielectric structure layer is the second dielectric structure layer 52 within the groove structure 201, and the dielectric structure unit is the second dielectric structure unit. Both the second dielectric structure layer 52 and the groove structure 201 have a combined trapezoidal and rectangular cross-section, with the trapezoid located on the upper side of the rectangle, and the base width of the trapezoid being the same as the width of the rectangle. Of course, in other embodiments, the longitudinal cross-section of the second dielectric structure layer 52 and the groove structure 201 can also be other structures that are narrower at the top and wider at the bottom, for example... Figure 1 The trapezoidal structure shown.

[0112] In this embodiment, the second semiconductor substrate 20b and the first semiconductor substrate 20a are made of different materials. For example, the first semiconductor substrate 20a is made of single-crystal silicon, while the second semiconductor substrate 20b is made of doped single-crystal silicon, thereby reducing the dark current of the image sensor. The second semiconductor substrate 20b can be made of P-type doped single-crystal silicon with boron as the dopant element and a doping concentration of 5.00E+13 / cm³. 2 In other designs, the second semiconductor substrate 20b can also be made of SiGe single crystal with a Ge content of 10%, thereby improving the image sensor's detection efficiency for infrared light. Alternatively, the first semiconductor substrate 20a can also be made of doped single-crystal silicon, with a different doping concentration than the second semiconductor substrate 20b.

[0113] like Figures 11a-11j As shown, this embodiment also provides a method for manufacturing an image sensor. This method is used to manufacture the image sensor described above, and the method includes:

[0114] like Figures 11a-11c As shown, a first semiconductor substrate 20a is provided, and a circuit connection layer 10 is then fabricated on the first surface of the first semiconductor substrate 20a. The semiconductor substrate 20a has opposing first and second surfaces. The second surface is typically formed by thinning the first semiconductor substrate 20a through chemical mechanical polishing after flipping it. The first semiconductor substrate 20a can be made of single-crystal silicon or doped single-crystal silicon. In this embodiment, an insulating film is first deposited on the first surface of the first semiconductor substrate 20a to form a first insulating layer 40. Then, a circuit connection layer 10 is fabricated on the side of the first insulating layer 40 away from the first semiconductor substrate 20a. The circuit connection layer 10 is formed by depositing multiple conductive layers and multiple insulating layers. The semiconductor structure layer 20 forms various transistors such as a transmission transistor (TX), a reset transistor (RST), and a source follower transistor (SF) in each photosensitive pixel area 21. The specific structure and fabrication method of the circuit connection layer 10 can be found in existing technologies and will not be elaborated here.

[0115] like Figure 11d-11eAs shown, a first dielectric material layer 51a is covered on the second surface of the first semiconductor substrate 20a away from the first surface. The first dielectric material layer 51a is etched to form a patterned first dielectric structure layer 51, exposing the second surface of the first semiconductor substrate 20a from the area where the first dielectric material layer 51a is etched away. Specifically, the first semiconductor substrate 20a after the circuit connection layer 10 is fabricated is flipped so that the second surface of the first semiconductor substrate 20a is on the upper side. At this time, the second surface of the first semiconductor substrate 20a can be polished to make the first semiconductor substrate 20a thinner, or it can be left unpolished. Then, the first dielectric material layer 51a is covered on the second surface of the first semiconductor substrate 20a, and the first dielectric material layer 51a is etched to form a patterned first dielectric structure layer 51. When etching the first dielectric material layer 51a, the second surface of the first semiconductor substrate 20a is exposed in the area where the first dielectric material layer 51a is etched away, that is, the first dielectric material layer 51a is etched through, and the portion of the first dielectric material layer 51a remaining on the second surface of the first semiconductor substrate 20a forms the first dielectric structure layer 51. The first dielectric material layer 51a can be composed of one or more materials such as silicon oxide, aluminum oxide, silicon nitride, and tantalum oxide.

[0116] Furthermore, the first dielectric structure layer 51 includes a plurality of spaced-apart first dielectric structure units. The surface width of the first dielectric structure unit facing the first semiconductor substrate 20a is greater than the surface width of the first dielectric structure unit away from the first semiconductor substrate 20a, so as to realize optical path modulation based on the first dielectric structure unit. Each first dielectric structure unit corresponds to the photosensitive pixel area 21. In this embodiment, the longitudinal section of the first dielectric structure unit is a combination of trapezoidal and rectangular structures, with the trapezoid located on the upper side of the rectangle, and the width of the lower base of the trapezoid being the same as the width of the rectangle.

[0117] like Figure 11f As shown, a second semiconductor substrate 20b is formed on the second surface of the first semiconductor substrate 20a. The second semiconductor substrate 20b fills the area where the first dielectric material layer 51a is etched away. The first semiconductor substrate 20a and the second semiconductor substrate 20b together form the semiconductor structure layer 20. Specifically, a semiconductor material layer is first deposited on the second surface of the first semiconductor substrate 20a using a single-crystal silicon deposition process. For example, a low-temperature liquid phase epitaxy or hot-wire CVD method can be used to form the semiconductor material layer, wherein the temperature of the epitaxial process is less than 500°C. Then, a chemical mechanical polishing (CMP) process is used to polish the semiconductor material layer and expose the first dielectric structure layer 51a. The portion of the semiconductor material layer that is retained forms the second semiconductor substrate 20b.

[0118] In this embodiment, both the first dielectric structure layer 51 and the second semiconductor substrate 20b are fabricated using a single process. In other embodiments, to fabricate a more complex first dielectric structure layer 51, both the first dielectric structure layer 51 and the second semiconductor substrate 20b can be fabricated using a multi-process. For example, when fabricating a cross-section of the first dielectric structure layer 51 that is wider in the middle and narrower at the top and bottom, a dielectric material layer is first deposited and etched to form the lower half of the first dielectric structure layer 51; then a semiconductor material layer is deposited and polished to form the lower half of the second semiconductor substrate 20b; then another dielectric material layer is deposited and etched to form the upper half of the first dielectric structure layer 51; finally, another semiconductor material layer is deposited and polished to form the upper half of the second semiconductor substrate 20b.

[0119] In this embodiment, the second semiconductor substrate 20b and the first semiconductor substrate 20a are made of different materials. For example, the first semiconductor substrate 20a is made of single-crystal silicon, while the second semiconductor substrate 20b is made of doped single-crystal silicon, thereby reducing the dark current of the image sensor. The second semiconductor substrate 20b can be made of P-type doped single-crystal silicon with boron as the dopant element and a doping concentration of 5.00E+13 / cm³. 2 However, after forming the second semiconductor substrate 20b, it needs to be annealed to activate the doped elements. In other schemes, the second semiconductor substrate 20b can also be made of SiGe single crystal with a Ge content of 10%, thereby improving the detection efficiency of the image sensor for infrared light. Of course, the first semiconductor substrate 20a can also be made of doped single-crystal silicon. By using two semiconductor substrates (first semiconductor substrate 20a and second semiconductor substrate 20b) to make the semiconductor structure layer 20, more design space is provided for the design of the semiconductor structure layer 20. For example, the second semiconductor substrate 20b and the first semiconductor substrate 20a can be made of different materials. By using doped single-crystal silicon to make the second semiconductor substrate 20b, the dark current of the image sensor can be reduced and the detection efficiency of the image sensor for infrared light can be improved.

[0120] In this embodiment, the surface width of the first dielectric structure layer 51 facing the first semiconductor substrate 20a is greater than the surface width of the first dielectric structure layer 51 away from the first semiconductor substrate 20a. In this embodiment, both the first dielectric structure layer 51 and the groove structure 201 have a combined trapezoidal and rectangular cross-section, with the trapezoid located on top of the rectangle, and the width of the lower base of the trapezoid being the same as the width of the rectangle. Of course, in other embodiments, the longitudinal cross-section of the first dielectric structure layer 51 and the groove structure 201 can also be other structures that are narrower at the top and wider at the bottom, for example... Figure 1the trapezoidal structure shown. By forming the semiconductor structure layer 20 from a double-layer semiconductor substrate (a first semiconductor substrate 20a and a second semiconductor substrate 20b), greater design space can be provided for the design of the second semiconductor substrate 20b. For example, the first dielectric structure layer 51 can be designed to have a structure that is narrow at the top and wide at the bottom, so that the structure of the second semiconductor substrate 20b can be designed by designing the structure of the first dielectric structure layer 51. If the semiconductor structure layer 20 does not adopt a double-layer semiconductor substrate structure, it is necessary to first etch the semiconductor structure layer 20 from the second surface of the semiconductor structure layer 20 to form a groove structure 201, then cover the dielectric structure layer and fill the groove structure 201. However, the etched groove structure 201 can only be a structure with the same upper and lower widths or a structure that is wide at the top and narrow at the bottom, and cannot achieve a structure that is narrow at the top and wide at the bottom, and the first dielectric structure layer 51 filled into the groove structure 201 can also only be a structure with the same upper and lower widths or a structure that is wide at the top and narrow at the bottom.

[0121] Further, the planar shape of the first dielectric structure layer 51 corresponding to the photosensitive pixel region 21 includes a plurality of circular structures ( Figure 2 ), a combination of circular structures and circular ring structures (see Figure 3 ), a "field-shaped" structure (see Figure 4 ), a "well-shaped" structure (see Figure 5 ), a "rice-shaped" structure (see Figure 6 ) or a mesh structure (not shown). When it is a plurality of circular structures, the plurality of circular structures can be arranged in an array, or can be arranged in a cross shape, and two adjacent circular structures are connected to each other. Of course, the planar shape of the first dielectric structure layer 51 corresponding to the photosensitive pixel region 21 can also be a plurality of square structures, and the planar shape can be set according to actual needs, and is not limited thereto.

[0122] As shown in Figure 11g , the first dielectric material layer 51a is removed, and a groove structure 201 is formed in the region corresponding to the first dielectric structure layer 51 in the second semiconductor substrate 20b, that is, the region corresponding to the first dielectric structure layer 51 in the second semiconductor substrate 20b is a cavity structure.

[0123] As Figure 11hAs shown, a metal oxide structure layer 70 is formed on the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a. The metal oxide structure layer 70 covers the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a and the inner wall of the groove structure 201. The metal oxide structure layer 70 is negatively charged, thereby reducing the dark current of the image sensor. The metal oxide structure layer 70 can be a material such as Al2O3, Ta2O5, HfO2, or a multilayer combination of these materials. Specifically, the deposition time of the metal oxide structure layer 70 can be controlled to prevent the metal oxide structure layer 70 from filling the groove structure 201, and the size of the first dielectric structure layer 51 can also be controlled to prevent the metal oxide structure layer 70 from filling the groove structure 201.

[0124] like Figure 11i As shown, the metal oxide structure layer 70, the second semiconductor substrate 20b, and the first semiconductor substrate 20a are etched on the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a to form a third trench; a reflective material is filled in the third trench to form a trench isolation structure 22; a second dielectric structure layer 52 is formed on the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a, that is, after forming a modulation layer with a negative charge, a groove region corresponding to the first dielectric structure layer 51 is formed on its upper surface, and the groove region is filled to form the second dielectric structure layer 52. The second dielectric structure layer 52 includes a plurality of spaced second dielectric structure units that correspond one-to-one with the first dielectric structure units. At this time, optical path modulation is realized based on the second dielectric structure layer 52. In this embodiment, the dielectric structure layer is the second dielectric structure layer 52, the dielectric structure unit is the second dielectric structure unit, and the first dielectric structure layer 51 is a shaping transition structure in the process of fabricating the second dielectric structure layer 52. The cross-sectional shape and planar pattern of the second dielectric structure layer 52 are the same as those of the first dielectric structure layer 51. However, due to the presence of the metal oxide structure layer 70, the cross-sectional size of the second dielectric structure layer 52 is slightly smaller than that of the first dielectric structure layer 51. Other structures are no different from those of the first dielectric structure layer 51. The trench isolation structure 22 can be made of high dielectric materials such as oxide (OX), silicon nitride (SiN), silicon dioxide (SiO2), or air, which have a refractive index lower than that of the semiconductor structure layer 20. This allows total internal reflection to occur between the trench isolation structure 22 and the semiconductor structure layer 20, increasing the optical path length of light within the semiconductor structure layer 20 and thus improving the light absorption efficiency. When fabricating the groove isolation structure 22, it is also necessary to remove the reflective material inside the groove structure 201. Of course, if the groove isolation structure 22 and the second medium structure layer 52 are made of the same material, the step of removing the reflective material inside the groove structure 201 can be reduced.

[0125] In this embodiment, the trench isolation structure 22 penetrates the second semiconductor substrate 20b and partially extends into the first semiconductor substrate 20a, but does not penetrate the first semiconductor substrate 20a. Of course, in other embodiments, the trench isolation structure 22 may penetrate both the second semiconductor substrate 20b and the first semiconductor substrate 20a.

[0126] In this embodiment, the second dielectric structure layer 52 and the second insulating layer 60 are made of the same material, such as silicon oxide, aluminum oxide, silicon nitride, tantalum oxide, or one or more other materials. Specifically, in one example, a second dielectric material layer 52a is covered on the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a. The portion of the second dielectric material layer 52a filling the groove structure 201 forms the second dielectric structure layer 52, while the portion located on the upper surface of the second semiconductor substrate 20b forms the second insulating layer 60. Of course, the second dielectric structure layer 52 and the second insulating layer 60 can also be made of different materials, but an additional process is required to fabricate the second dielectric structure layer 52.

[0127] Furthermore, the second dielectric structure layer 52 includes a plurality of spaced-apart second dielectric structure units. The surface width of the second dielectric structure unit facing the first semiconductor substrate 20a is greater than the surface width of the second dielectric structure unit away from the first semiconductor substrate 20a, so as to realize optical path modulation based on the second dielectric structure unit. Each second dielectric structure unit corresponds to the photosensitive pixel area 21. That is, in this embodiment, the dielectric structure unit is formed by two processes: first, the first dielectric structure unit is fabricated and the specific shape of the dielectric structure unit is determined; then, the first dielectric structure unit is removed and the metal oxide structure layer 70 is fabricated; finally, the second dielectric material layer 52a is filled in the groove structure 201 to form the second dielectric structure unit, so as to realize optical path modulation based on the second dielectric structure unit. Light passing through the dielectric structure unit has a diffraction effect, thereby converting small-angle light into large-angle light that enters the semiconductor structure layer 20, increasing the optical path of the light in the semiconductor structure layer 20, thus improving the light absorption efficiency. The diffraction effect of the dielectric structure unit on infrared light can be improved by adjusting the size of the second semiconductor substrate 20b, thereby increasing the optical path length of infrared light in the semiconductor structure layer 20. This can be achieved by changing the width of the dielectric structure layer or the spacing between adjacent second dielectric structure layers. Alternatively, the size of the dielectric structure unit can be designed to improve its diffraction effect on light sources such as green or blue light.

[0128] like Figure 11jAs shown, an optical structure layer 30 is fabricated on the surface of the second semiconductor substrate 20b away from the first semiconductor substrate 20a. Specifically, the optical structure layer 30 is fabricated on the surface of the second insulating layer 60 away from the second semiconductor substrate 20b. The optical structure layer 30 includes a color filter layer 31 and a microlens array structure 32. The color filter layer 31 includes red (R), green (G), and blue (B) color filters, and multiple color filters 31 are arranged in an array, with each color filter layer 31 corresponding to a pixel unit. The microlens array structure 32 has a light-focusing effect, converging light onto the photosensitive element to increase the light-receiving performance of the photosensitive element. The specific structure and fabrication method of the optical structure layer 30 can be found in existing technologies and will not be elaborated here.

[0129] Those skilled in the art should understand that the remaining structures and working principles of this embodiment are the same as those of Embodiment 1, and will not be repeated here.

[0130] In this document, the directional terms such as up, down, left, right, front, and back are defined according to the position of the structures in the accompanying drawings and the relative positions of the structures, and are only used for clarity and convenience in expressing the technical solution. It should be understood that the use of these directional terms should not limit the scope of protection claimed in this application. It should also be understood that the terms "first" and "second," etc., used herein are only used for distinction in name and are not used to limit the number or order.

[0131] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content without departing from the scope of the technical solution of the present invention, which are equivalent embodiments with equivalent changes. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the technical solution of the present invention shall still fall within the protection scope of the technical solution of the present invention.

Claims

1. A method for manufacturing an image sensor, characterized in that, The manufacturing method includes: Provide a first semiconductor substrate; A circuit connection layer is fabricated on the first surface of the first semiconductor substrate; A first dielectric structure layer is fabricated on a second surface of the first semiconductor substrate away from the first surface. The first dielectric structure layer includes a plurality of spaced first dielectric structure units. The surface width of the first dielectric structure unit facing the first semiconductor substrate is greater than the surface width of the first dielectric structure unit away from the first semiconductor substrate. When light passes through the first dielectric structure unit, the first dielectric structure unit causes the light to diffract, so as to realize optical path modulation based on the first dielectric structure unit. A second semiconductor substrate is formed on the second surface of the first semiconductor substrate, and the second semiconductor substrate fills at least the gap between adjacent first dielectric structure units. The first semiconductor substrate and the second semiconductor substrate together form a semiconductor structure layer. The semiconductor structure layer has a plurality of photosensitive pixel regions arranged in an array, and each photosensitive pixel region is provided with a photosensitive element. Each photosensitive pixel region corresponds to the first dielectric structure unit. An optical structure layer is fabricated on the surface of the second semiconductor substrate away from the first semiconductor substrate.

2. The method for manufacturing an image sensor according to claim 1, characterized in that, The specific steps for forming the second semiconductor substrate include: A semiconductor material layer is formed on the second surface of the first semiconductor substrate using an epitaxial growth process to obtain the second semiconductor substrate, wherein the temperature of the epitaxial growth process is less than 500°C.

3. The method for manufacturing an image sensor according to claim 1, characterized in that, The second semiconductor substrate is made of a different material than the first semiconductor substrate.

4. The method for manufacturing an image sensor according to claim 3, characterized in that, The second semiconductor substrate is made of doped single-crystal silicon or germanium-silicon single crystal, and the following steps are included after the formation of the second semiconductor substrate: The second semiconductor substrate is annealed to activate the doped elements.

5. The method for manufacturing an image sensor according to claim 1, characterized in that, The process further includes the following steps after forming the second semiconductor substrate: Etching is performed on the surface of the second semiconductor substrate away from the first semiconductor substrate to form a first trench on both the second semiconductor substrate and the first semiconductor substrate. A first reflective material structure is filled into the first trench to form a trench isolation structure.

6. The method for manufacturing an image sensor according to claim 1, characterized in that, The step further includes the following step before fabricating the circuit connection layer on the first surface of the first semiconductor substrate: The first semiconductor substrate is etched on its first surface to form a second trench; A second reflective material structure is filled into the second trench to form a first trench isolation structure; Furthermore, after fabricating a circuit connection layer on the first surface of the first semiconductor substrate, the method further includes the following steps: The first semiconductor substrate is ground on the second surface to expose the first trench isolation structure; A first dielectric material layer is formed on the second surface of the first semiconductor substrate, and the first dielectric material layer is etched to form the first dielectric structure layer. When the first dielectric material layer is etched, a second trench isolation structure is also formed. The second trench isolation structure corresponds to the first trench isolation structure, and the first trench isolation structure and the second trench isolation structure together form a trench isolation structure.

7. The method for manufacturing an image sensor according to claim 1, characterized in that, Before forming the circuit connection layer on the first surface of the first semiconductor substrate, the method further comprises the step of: forming a first insulating layer on the first surface of the first semiconductor substrate; or / and, before forming the optical structure layer on the surface of the second semiconductor substrate away from the first semiconductor substrate, the method further comprises the step of: forming a second insulating layer on the surface of the second semiconductor substrate away from the first semiconductor substrate.

8. The method for manufacturing an image sensor according to claim 1, characterized in that, The planar shape of the first dielectric structural unit corresponding to the photosensitive pixel region comprises a plurality of circular structures, a combination of a circular structure and a circular annular structure, a "field"-shaped structure, a "well"-shaped structure, a "mi"-shaped structure or a network structure.

9. The method for manufacturing an image sensor according to any one of claims 1-8, characterized in that, After forming the second semiconductor substrate, the method further comprises the steps of: removing the first dielectric structure layer and forming a groove structure in a region corresponding to the first dielectric structure layer in the second semiconductor substrate; forming a negatively charged modulation layer on the surface of the second semiconductor substrate away from the first semiconductor substrate, wherein the negatively charged modulation layer covers the surface of the second semiconductor substrate away from the first semiconductor substrate and the inner wall of the groove structure; covering a second dielectric material layer on the surface of the negatively charged modulation layer away from the second semiconductor substrate, wherein the second dielectric material layer covers the surface of the negatively charged modulation layer away from the second semiconductor substrate and fills the groove structure to obtain a second dielectric structure layer, the second dielectric structure layer comprises a plurality of second dielectric structural units corresponding to the first dielectric structural units, so as to realize optical path modulation based on the second dielectric structural units.

10. The method for manufacturing an image sensor according to claim 9, characterized in that, The negatively charged modulation layer comprises a metal oxide structure layer, the metal oxide structure layer is prepared by an atomic layer deposition process, the metal oxide structure layer at least comprises an aluminum oxide layer, and the aluminum oxide layer is simultaneously prepared on the exposed surfaces of the first semiconductor substrate and the second semiconductor substrate, wherein the preparation temperature of the aluminum oxide layer is less than 300°C, and the thickness is less than 50nm.

11. The method for manufacturing an image sensor according to claim 10, characterized in that, TaO was also prepared on the alumina layer. x and at least one of HfO2, wherein TaO x The preparation temperature of HfO2 is less than 300℃ and the thickness is less than 150nm; the preparation temperature of HfO2 is less than 300℃ and the thickness is less than 120nm.

12. An image sensor, characterized in that, The image sensor comprises a circuit connection layer, an optical structure layer and a semiconductor structure layer located between the circuit connection layer and the optical structure layer; A plurality of photosensitive pixel regions distributed in an array are arranged in the semiconductor structure layer, and a photosensitive element is arranged in the photosensitive pixel region; The semiconductor structure layer comprises a first semiconductor substrate and a second semiconductor substrate which are arranged in a stacked manner, and the second semiconductor substrate is arranged on a side of the first semiconductor substrate away from the circuit connection layer; A groove structure is arranged in the second semiconductor substrate, a patterned dielectric structure layer is arranged in the groove structure, the dielectric structure layer comprises a plurality of dielectric structural units arranged at intervals, the surface width of the dielectric structural unit facing one side of the first semiconductor substrate is larger than the surface width of the dielectric structural unit away from one side of the first semiconductor substrate, light passes through the dielectric structural unit, and the dielectric structural unit causes light to diffract, so that optical path modulation is realized based on the dielectric structural unit; A plurality of photosensitive pixel regions distributed in an array is arranged in the semiconductor structure layer, a photosensitive element is arranged in each photosensitive pixel region, and each photosensitive pixel region corresponds to one dielectric structure unit.

13. The image sensor according to claim 12, characterized in that, The second semiconductor substrate and the first semiconductor substrate are made of different materials.

14. The image sensor according to claim 12, characterized in that, The planar shape of the dielectric structure unit corresponding to the photosensitive pixel region comprises a plurality of circular structures, a combination of a circular structure and a circular ring structure, a "field"-shaped structure, a "well"-shaped structure, a "mi"-shaped structure or a network structure.

15. The image sensor according to claim 12, characterized in that, A trench isolation structure for isolating a plurality of the photosensitive pixel regions is further arranged in the semiconductor structure layer, the trench isolation structure comprises a first trench isolation structure penetrating through the first semiconductor substrate and a second trench isolation structure penetrating through the second semiconductor substrate, and the first trench isolation structure corresponds to the second trench isolation structure.

16. The image sensor according to any one of claims 12-15, characterized in that, A negatively charged modulation layer is arranged between the second semiconductor substrate and the dielectric structure layer, the negatively charged modulation layer comprises a metal oxide structure layer, and the metal oxide structure layer covers the surface of the second semiconductor substrate away from the first semiconductor substrate and the inner wall of the groove structure.

17. The image sensor according to claim 16, characterized in that, The metal oxide structure layer includes at least an aluminum oxide layer, and the aluminum oxide layer is simultaneously formed on the exposed surfaces of both the first semiconductor substrate and the second semiconductor substrate. The aluminum oxide layer is formed at a temperature less than 300°C and has a thickness less than 50 nm. Furthermore, TaO is also formed on the aluminum oxide layer. x and at least one of HfO2, wherein TaO x The preparation temperature of HfO2 is less than 300℃ and the thickness is less than 150nm; the preparation temperature of HfO2 is less than 300℃ and the thickness is less than 120nm.

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