System and method for decoding codewords in the same page with historical decoding information

Abstract

Systems and methods are provided for decoding data read from a non-volatile storage device. One method can include decoding, using a first decoder, a first codeword read from a storage location of a non-volatile storage device without soft information, determining that the first decoder failed to decode the first codeword, decoding, using a second decoder, the first codeword without soft information, determining that the second decoder successfully decoded the first codeword, generating soft information associated with the storage location using decoding information generated by the second decoder, and decoding a subsequent codeword from the storage location using the soft information associated with the storage location. The second decoder can be more powerful than the first decoder.

Description

Technical Field

[0001] This disclosure relates to decoding data encoded with parity data, and more particularly to decoding encoded data using soft information generated from a previous decoding operation. Background Technology

[0002] A common problem in many data communication or storage systems is data corruption, for example, due to noise during write / read operations in the communication channel or storage system. One technique to address data corruption is the use of error-correcting codes (ECC) or forward error-correcting codes (FEC). ECC and FEC add redundant or parity data to the user data so that even if numerous errors are introduced during transmission or the stored data is corrupted (within the error-correcting capabilities of the codes used), the user data can still be recovered by the receiver or reader.

[0003] Over the years, many different coding schemes have been developed, such as Hamming codes, Reed-Solomon codes, and Turbo codes. Currently, low-density parity-check (LDPC) codes are widely used. However, all of these codes involve complex computations, and the techniques for using them still require improvement. Summary of the Invention

[0004] This disclosure may include a method that includes: decoding a first codeword read from a storage location of a non-volatile storage device using a first decoder without soft information; determining that the first decoder failed to decode the first codeword; decoding the first codeword using a second decoder without soft information; determining that the second decoder successfully decoded the first codeword; generating soft information associated with the storage location using decoding information generated by the second decoder; and decoding subsequent codewords from the storage location using the soft information associated with the storage location. The second decoder may be more powerful than the first decoder.

[0005] In another embodiment, a storage system controller is provided, which may include: a plurality of error-correcting code (ECC) decoders including a first decoder and a second decoder, an ECC decoder controller, and a soft information generator. The second decoder may be more powerful than the first decoder. The ECC decoder controller may be configured to: transmit a first codeword read from a storage location of a non-volatile storage device to the first decoder, causing the first decoder to decode the first codeword without soft information; determine that the first decoder failed to decode the first codeword; transmit the first codeword to the second decoder, causing the second decoder to decode the first codeword without soft information; and determine that the second decoder has successfully decoded the first codeword. The soft information generator may be configured to use decoding information generated by the second decoder to generate soft information associated with the storage location. One of the plurality of decoders may be configured to use the soft information generated by the soft information generator and associated with the storage location to decode subsequent codewords from the storage location.

[0006] In yet another exemplary embodiment, this disclosure may further include a non-transitory machine-readable medium having executable instructions. When executed by a storage controller, the executable instructions cause the storage controller to: decode a first codeword read from a storage location of a non-volatile storage device using a first decoder without soft information; determine that the first decoder failed to decode the first codeword; decode the first codeword using a second decoder without soft information; determine that the second decoder successfully decoded the first codeword; generate soft information associated with the storage location using decoding information generated by the second decoder; and decode subsequent codewords from the storage location using the soft information associated with the storage location. The second decoder may be more powerful than the first decoder. Attached Figure Description

[0007] Figure 1 A storage controller for a non-volatile storage system according to an embodiment of the present disclosure is illustrated schematically.

[0008] Figure 2A , Figure 2B and Figure 2C The effect of a shift in the threshold voltage value of a NAND flash memory cell according to an embodiment of the present disclosure is illustrated schematically.

[0009] Figure 3 The illustration schematically depicts data storage in a non-volatile storage device according to an embodiment of the present disclosure.

[0010] Figure 4This illustration schematically shows how soft information is stored in memory according to one embodiment of the present disclosure.

[0011] Figure 5 This is a flowchart illustrating the process of decoding codewords read from a storage location according to an embodiment of the present disclosure. Detailed Implementation

[0012] Specific embodiments according to this application will now be described in detail with reference to the accompanying drawings. For consistency, the same elements in the various figures are indicated by the same reference numerals.

[0013] This disclosure provides apparatus, systems, and methods for decoding data stored in a non-volatile memory (NVM) storage device, wherein the data is encoded with error correction codes (ECC). Figure 1 A controller 100 of a non-volatile storage system according to one embodiment of the present disclosure is schematically illustrated. The storage controller 100 may include an ECC decoder controller 102, a plurality of ECC decoders 104.1 to 104.K, a raw data buffer 106, a demultiplexer 108, a multiplexer 110, memory 112, a soft information acquirer 114, and a soft information generator 116. The storage controller 100 can be used in a non-volatile storage system having one or more non-volatile storage devices (e.g., NAND devices). Data read from the non-volatile storage device may be received in the raw data buffer 106 and sent via the demultiplexer 108 to the plurality of decoders 104.1 to 104.K. The raw data buffer 106 may include one or more buffer modules, and the memory 112 may include one or more memory modules.

[0014] The ECC decoder controller 102 can be implemented in hardware within a hardware circuit module, or in software within a central processing unit (CPU) or graphics processing unit (GPU), or a combination of both. In some embodiments, when performing a read operation, the ECC decoder controller 102 can receive an ECC task start signal with one or more parameters. The ECC decoder controller 102 can signal the demultiplexer 108 to send data from the raw data buffer 106 to one or more of the plurality of ECC decoders 104.1 to 104.K.

[0015] In various embodiments, at least some of the plurality of ECC decoders 104 may have different decoding capabilities. For example, a more powerful decoder may correct more errors than a less powerful decoder. For illustrative purposes, a decoder with a higher index value may be more powerful than a decoder with a lower index value. For example, decoder 104.2 may be more powerful than decoder 104.1, but not as powerful as decoder 104.3, and decoder 104.K may be the most powerful decoder among the plurality of ECC decoders 104.1 to 104.K, where K is a positive integer.

[0016] Multiple ECC decoders 104.1 to 104.K can decode data received from the raw data buffer 106, and the decoded data can be output via multiplexer 110. In various embodiments, each of the multiple ECC decoders 104.1 to 104.K can be configured to perform a decoding operation on a codeword individually. Decoding information can be generated during or after the decoding operation on the codeword. For example, at the end of a successful decoding operation on the codeword, some bits of the codeword may be flipped from logic one (1) to logic zero (0) (represented as an error flip count or EFC from 1 to 0). 1->0 Other bits of the codeword may toggle from logic 0 to logic 1 (represented by an error toggle count of 0 to 1 or EFC). 0->1 These two error flip counts can be useful decoding information collected by the decoder and sent to the soft information generator 116.

[0017] The soft information generator 116 can be coupled to each of the multiple decoders 104.1 to 104.K to receive decoding information generated by the decoder during decoding operations. For example, the soft information generator 116 can receive a signal from the ECC decoder controller 102 indicating that an ECC decoding task for a codeword has been successfully completed, and generate soft information from the decoding information. In one embodiment, the generated soft information may be the difference between error flip counts, which may be generated by the ECC decoder controller 102. 1->0 Subtract EFC 0->1 (For example, EFC) 1->0 -EFC 0->1 The generated soft information can be sent to memory 112.

[0018] Codewords read from the same storage location can share the same error characteristics (e.g., the reliability of a storage cell in a non-volatile storage device decreases with increasing program / erase cycles). For example, a page in a non-volatile storage device can be the smallest unit that can be programmed (e.g., written) and read, and codewords read from the same page can share the same characteristics. Soft information generated at soft information generator 116 can indicate whether data read from a storage location is more reliable in state 1 or state 0. Each storage location can have an associated unique identifier, for example, for a page, this unique identifier can be the physical page address (PPA). The generated soft information can be associated with the unique identifier and used to decode other codewords from the same storage location.

[0019] In some embodiments, whenever any one of the plurality of ECC decoders 104 successfully decodes a codeword read from a storage location, decoded information can be generated and sent to a soft information generator 116. The soft information generator 116 can search memory 112 by a unique identifier associated with the storage location, read existing soft information associated with the unique identifier, update the soft information using the newly generated decoded information, and save the updated soft information to memory 112.

[0020] In one embodiment, this can be achieved by calculating the average of the differences in the error flip counts (e.g., The soft information generator 116 performs the update of the soft information, and the average of the difference between the two error flip counts can be stored in memory 112. For example, the soft information generator 116 can read existing data from memory 112. And the average value is updated using newly generated decoding information from the most recently decoded codewords from the same storage location. It should be noted that after decoding the first codeword,

[0021] It should be noted that the soft information can be generated by hardware or software. In various embodiments, the soft information generator 116 can be implemented in hardware or software. For example, in one embodiment, the soft information generator 116 can be implemented as software that executes in a processor. However, in another embodiment, the soft information generator 116 can be implemented as hardware circuitry.

[0022] If relevant soft information is available, each of the multiple decoders 104.1 to 104.K can use the soft information to perform soft-decision decoding. Therefore, each of the multiple decoders 104.1 to 104.K can also be coupled to the soft information acquirer 114. When data read from a storage location needs to be decoded, the soft information acquirer 114 can search for soft information in memory 112 using a unique identifier associated with the storage location, and if the soft information for the storage location is found, it retrieves the soft information for that page from memory 112.

[0023] It should be noted that in some embodiments, soft information not generated by the soft information generator 116, such as conventional soft information obtained by repeatedly reading the same data from a non-volatile storage device, can also be obtained from the non-volatile storage device and used for soft decision decoding. For example, in one embodiment, if soft information cannot be obtained from memory 112, conventional soft information can be obtained from a non-volatile storage device and used by one of the ECC decoders 104.1 to 104.K.

[0024] The storage controller 100 can implement multi-level and multi-round error correction schemes. For example, when multiple codewords from a storage location are read into the raw data buffer 106, the ECC decoder controller 102 can attempt to have a first decoder (e.g., ECC decoder 104.1) decode the first codeword among the multiple codewords. The soft information acquirer 114 can search memory 112 using a unique identifier associated with the storage location. At this time, soft information associated with the storage location may not exist in memory 112, and the soft information acquirer 114 may not be able to acquire any soft information for that storage location. The first decoder can attempt to decode the first codeword in a first decoding operation without any soft information.

[0025] The first decoding operation may fail, and this failure can trigger a second decoder, which can be a higher-level decoder (e.g., ECC decoder 104.2). In one embodiment, but not in all embodiments, the soft information acquirer 114 may attempt to acquire the soft information at the storage location again, but fails. The higher-level decoder may then attempt to decode the first codeword without any soft information. If the second decoder also fails to decode the first codeword, a third decoder may be triggered to attempt to decode the first codeword. And this process can continue until the highest-level decoder is attempted. Therefore, the first codeword can undergo multiple rounds of decoding operations through different levels of decoders.

[0026] If any of the higher-level decoders successfully decodes the codeword, soft information can be generated from the decoding information collected from that higher-level decoder. For example, if the second decoder successfully decodes the first codeword, the decoding information (e.g., EFC) is generated. 1->0 and EFC 0->1 The data can be collected by the second decoder and sent to the soft information generator 116. The soft information generator 116 can generate soft information associated with the storage location and send it to the memory 112.

[0027] In some embodiments, while the first codeword can be upgraded to a second decoder (or even a higher-level decoder if the second decoder also fails), the ECC decoder controller 102 can allow the first decoder to attempt to decode subsequent codewords of multiple codewords (e.g., a second codeword, a third codeword, etc., from the same page). If the second (or even higher-level) decoder generates soft information using the decoded information produced by successfully decoding the first codeword, then the generated soft information can be used by any decoder to assist in decoding subsequent codewords whenever it becomes available.

[0028] For example, if soft information has already been generated and is available from memory 112 when the first decoder attempts to decode a subsequent codeword, the first decoder can successfully decode the subsequent codeword using the soft information. However, if the soft information is still not available from memory 112, the first decoder may be unable to decode the subsequent codeword, and the subsequent codeword may be upgraded to the second decoder. In this case, the soft information associated with the storage location may have already been generated and stored in memory 112, and the soft information acquirer 114 can successfully acquire the soft information. The second decoder can now successfully decode the subsequent codeword using the soft information associated with the storage location.

[0029] If the decoder still fails to decode subsequent codewords after soft information becomes available, this failure can trigger the next higher-level decoder to attempt to decode the subsequent codewords with soft information, and this upgrade to the next higher-level decoder can continue until the decoder has soft information available to decode the subsequent codewords.

[0030] Whenever the decoder successfully decodes a subsequent codeword, the decoding information can be collected by the decoder and sent to the soft information generator 116. The soft information generator 116 can read the soft information used in decoding the subsequent codeword from memory 112 and update the soft information, for example, by calculating or updating the average of the differences in the error flip counts using the new value of the error flip count from the most recently successful decoding operation (e.g., By using soft information associated with the storage location to decode (one or more) subsequent codewords, it is possible to decode (one or more) subsequent codewords faster.

[0031] In one embodiment, the storage controller 100 may be a controller for a non-volatile storage system (e.g., but not limited to, a solid-state drive (SSD)) 100. Furthermore, in one embodiment, an ECC decoder controller 102, multiple ECC decoders 104, a raw data buffer 106, a demultiplexer 108, a multiplexer 110, a soft information acquirer 114, and a soft information generator 116 may be integrated into a single storage system controller chip (e.g., an integrated circuit (IC) chip), while the memory 112 may be coupled to the storage system controller chip. In another embodiment, the memory 112 may also be integrated into the storage controller chip 100.

[0032] Memory 112 used to store soft information can be static random access memory (SRAM), double data rate RAM, or MRAM, or any memory with a much shorter read latency than the NAND device. Therefore, in this embodiment, soft information can be obtained from memory 112 much faster than conventional methods of obtaining soft information from the NAND device, such as by rereading data from the NAND device. Furthermore, in at least one embodiment, obtaining soft information from memory 112 and reading raw data from the NAND device can be performed simultaneously because they come from different paths and these operations can be parallelized. For example, when data in a page is read into the raw data buffer 106, the ECC decoder controller 102 can signal the soft information retriever 114 to begin searching for and reading the soft information associated with the page. This parallelism helps avoid the overhead of reading any soft information from the NAND device.

[0033] Figure 2A , Figure 2B and Figure 2C The illustration schematically shows the effect of the threshold voltage value offset of a NAND flash memory cell according to an embodiment of the present disclosure, and how soft information from one codeword can be applied to other codewords on the same page. Figure 2A , Figure 2B and Figure 2C The horizontal axis in the diagram can represent the threshold voltage of the memory cell in a NAND device. Figure 2A , Figure 2B and Figure 2C The vertical axis in the diagram can be the probability distribution function of the threshold voltage of the memory cell.

[0034] Figure 2A Curve 202 in the diagram can indicate the reading of the first logic state (e.g., logic one). Figure 2A Curve 204 in the diagram can indicate the readout of a second logic state (e.g., logic zero). The readout used herein can refer to the readout voltage of any given cell and can be determined by comparing this readout voltage with a reference voltage V. refComparisons are used to assign a logical state to any given bit.

[0035] As in Figure 2A As shown, curve 202 can have an extension exceeding the reference voltage V. ref The tail portion 208 enters a region that can be considered to be in a second logic state, and the curve 204 can have an extension exceeding the reference voltage V. ref The tail portion 206 enters a region that can be considered to be in the first logic state. That is, the correct logic state for the bits read from the tail portion 206 could be the second logic state, but because the threshold voltage of these bits is less than the reference voltage V... ref Therefore, they can be considered as the first logic state. Meanwhile, the correct logic state read from the bits in tail 208 can also be the first logic state, but because the threshold voltage of these bits is greater than the reference voltage V... ref Therefore, they can be considered as second logical states.

[0036] In this embodiment, incorrectly labeled bits can be corrected during the decoding operation. That is, a bit read from portion 206 might be incorrectly labeled as logic state one and flipped to logic state two during the decoding operation, and a bit read from portion 208 might be incorrectly labeled as logic state two and flipped to logic state one during the decoding operation. When the threshold voltage does not shift, such as in Figure 2A Similarly, the sizes of tail 206 and 208 can be close, and the number of corrections from logic state one to logic state two can be close to the number of corrections from logic state two to logic state one.

[0037] In various embodiments, the threshold voltage of the cell can be offset. For example, with increased use (e.g., increased P / E cycles), the threshold voltage of the cell may tend to shift to the right. That is, the reference voltage V ref It may not be in a good position where the sizes of 206 and 208 at the tail are close. Figure 2B This shows that the threshold voltage for logic state one can be shifted slightly to the right, therefore, Figure 2A The curve 202 becomes Figure 2B Curve 202A in the diagram. A right shift of the threshold voltage for logic state one can lead to... Figure 2A The tail section 208 becomes Figure 2B The tail section 208A. Because the offset of curve 202A is to the right, therefore in Figure 2B In the middle, tail 208A can be larger than tail 208, therefore tail 208A can be larger than tail 206. That is to say, in Figure 2B In this case, the number of bits for reading the voltage in tail 208A can be more than the number of bits for reading the voltage in tail 206.

[0038] The impact of threshold voltage offset is a correction for potential imbalances between two logic states. In at least one embodiment, two toggle counts can be used. During a decoding operation of a codeword, one toggle count can record how many bits toggle from a first logic state to a second logic state (e.g., "1" to "0"), while the other toggle count can record how many bits toggle from the second logic state to the first logic state (e.g., "0" to "1"). The difference between the two toggle counts can provide additional information about the NAND device, which can be used to improve ECC decoding performance.

[0039] For example, in Figure 2B In this context, the threshold voltage for logic state one can be shifted higher, and the toggle count from logic state two (e.g., logic 0) to logic state one (e.g., logic 1) can be greater than the toggle count from logic state one (e.g., logic 1) to logic state two (e.g., logic 0). Based on the difference between the toggle counts, bits with readout values ​​of logic state one and bits with readout values ​​of logic state two can be assigned different reliability levels. For example, for data from a physical location, if the soft information indicates that there are more toggles from logic state two to logic state one (e.g., logic 0 to 1) than from logic state one to logic state two (e.g., logic 1 to 0), then logic state one can be reliable, and bits with readout values ​​of logic state one (e.g., logic 1) can be more reliable than bits with readout values ​​of logic state two (e.g., logic 0).

[0040] It should be noted that Figure 2B An example is shown where the threshold voltage of a logic state is offset to a larger value. Figure 2C Another example is shown where the threshold voltage of the logic state is shifted to the left (e.g., becomes smaller), therefore, Figure 2A The curve 202 becomes Figure 2C Curve 202B in the diagram. A left shift of the threshold voltage for logic state one may lead to... Figure 2A The tail section 208 becomes Figure 2C The tail section 208B. Because the offset of curve 202B is to the left, therefore in Figure 2C In the middle, tail 208B can be smaller than tail 208, therefore tail 208B can be smaller than tail 206. That is, in Figure 2C In this case, the number of bits in tail 208B for reading voltage can be less than the number of bits in tail 206 for reading voltage.

[0041] because Figure 2C In this context, the threshold voltage of logic state one can be shifted to a lower value, and the toggle count from logic state two to logic state one (e.g., logic 0 to logic 1) can be less than the toggle count from logic state one to logic state two (e.g., logic 1 to logic 0). Figure 2C In the example, reading a bit in logic state two (e.g., logic 0) is likely more reliable than reading a bit in logic state one (e.g., logic 1).

[0042] In some embodiments, it can be Select a pre-defined reference value. By... By comparing with a predetermined reference value, different reliability levels can be assigned to bit values ​​0 and 1. If Bit value 0 is more reliable than bit value 1, and the magnitude of the difference indicates the degree to which bit value 0 is more reliable than bit value 1. If Bit value 1 is more reliable than bit value 0, and the magnitude of the difference indicates the degree to which bit value 1 is more reliable than bit value 0.

[0043] It should be noted that Figure 2B and Figure 2C The threshold voltage offset shown is merely an exemplary example. In some other embodiments, the threshold voltage of logic state two may also be offset to the left or right. Furthermore, the shapes of curves 202 and 204 may change during the offset; for example, curves 202 and / or 204 may become lower, wider, or both.

[0044] Figure 3 The diagram schematically illustrates data storage in a non-volatile storage device 300 according to an embodiment of the present disclosure. A typical non-volatile storage device may include one or more dies, and each die may include multiple planes. The non-volatile storage device 300 may include two dies 302.1 and 302.2, and each of dies 302.1 and 302.2 may include multiple planes 304.1 to 304.N, where N is a positive integer. A plane (e.g., 304.1) may include a register 306 and multiple blocks (e.g., 308.1 to 308.M). Each block may include multiple pages 310. As an example, a die may include 4 planes (e.g., N is 4), each plane may include 2048 blocks (e.g., M is 2048), and each block may include 64 pages. A page may include multiple codewords, typically 4 or 8, but may be another positive integer.

[0045] Figure 3The example illustrates a page 310 containing four codewords (e.g., codeword 0 (CW0), codeword 1 (CW1), codeword 2 (CW2), and codeword 3 (CW3)). Each codeword may include user data and ECC data (e.g., shaded portions). In one embodiment, a 16KB NAND page may have four ECC codewords, and each codeword may contain 4KB of user data. Because a page in a NAND device is the smallest programmable unit, codewords within the same NAND page can share the same error characteristics (e.g., the reliability of the underlying NAND flash memory cells decreases with increasing PE cycles). Therefore, the reliability soft information obtained from decoding one codeword can be used to decode other codewords on the same page.

[0046] Figure 4 The illustration schematically shows how soft information is stored in memory 112 according to one embodiment of the present disclosure. In various embodiments, memory 112 may use a unique identifier associated with each storage location as an index to store soft information at different storage locations (e.g., In embodiments where the storage location is a page, the physical page address (PPA) can be used as a unique identifier.

[0047] In some embodiments, due to size limitations, memory 112 may not be able to hold soft information for all storage locations of the non-volatile storage device in a non-volatile memory system. That is, if soft information for many physical locations needs to be stored, the required memory size may exceed the size of memory 112. In some embodiments, a caching method can be used. For example, instead of storing soft information for all NAND storage locations, soft information for a subset of NAND storage locations (e.g., T pages) can be stored in memory 112. There are several methods for selecting the T storage locations. Any existing or future-developed caching algorithm can be used. For example, these T storage locations could be recently read or recently erroneous storage locations. Alternatively, Least Recently Used (LRU) entries could be flushed. In some embodiments, memory 112 may also store unique identifiers and soft information for these storage locations together.

[0048] Figure 5This is a flowchart of a process 500 for decoding a codeword read from a storage location according to an embodiment of the present disclosure. In block 502, a first codeword read from a storage location of a non-volatile storage device can be decoded using a first decoder without soft information. For example, ECC decoder controller 102 can instruct the first codeword to be sent to the first decoder (e.g., ECC decoder 104.1) so that the first codeword can be decoded by the first decoder. Soft information acquirer 114 can search for soft information in memory 112 that could help decode the codeword from the storage location, but no soft information associated with the storage location is found. The first decoder can then attempt to decode the first codeword without soft information.

[0049] In box 504, it can be determined that the first decoder failed to decode the first codeword, and in box 506, a second decoder can be used to decode the first codeword without soft information. For example, the first decoder may fail to decode the first codeword, and this failure may allow the first codeword to be sent to a second decoder (e.g., ECC decoder 104.2), which may be more powerful than the first decoder. At this point, memory 112 still does not have soft information associated with the storage location. The second decoder can attempt to decode the first codeword without soft information.

[0050] In box 508, it can be determined that the second decoder has successfully decoded the first codeword, and in box 510, the decoded information generated by the second decoder can be used to generate soft information associated with the storage location. For example, the second decoder can successfully decode the first codeword in a second decoding operation and generate decoded information, such as 0-to-1 error flip counts and 1-to-0 error flip counts. The decoded information can be sent to soft information generator 116. Soft information generator 116 can generate soft information, such as EFC. 1->0 Subtract EFC 0->1 (For example, EFC) 1->0 -EFC 0->1 ( ), to indicate whether a state is more reliable than another state and to what extent it is more reliable.

[0051] In block 512, soft information associated with a storage location can be used to decode subsequent codewords from that storage location. Whenever soft information associated with a storage location is generated and saved to memory 112, it becomes available to decode any subsequent codewords from the same physical location. For example, if a first decoder attempts to decode a subsequent codeword after the soft information becomes available, the soft information acquirer 114 can acquire the soft information and feed it to the first decoder, which can then successfully decode the subsequent codeword using the soft information. Because codewords read from the same storage location (e.g., the same page) can share the same error characteristics, the first decoder (e.g., a weaker decoder) can use the soft information to decode subsequent codewords read from the same location. However, if, when the soft information becomes available, the subsequent codeword has been upgraded from the first decoder to a higher-level decoder, the soft information acquirer 114 can acquire the soft information and feed it to the higher-level decoder, which can then successfully decode the subsequent codeword using the soft information.

[0052] The methods disclosed in the embodiments (including method 500) can be implemented by software (e.g., an executable computer processor (e.g., a central processing unit (CPU), a graphics processing unit (GPU) or both)), hardware (e.g., a field-programmable gate array (FPGA) or an application-specific integrated circuit (ASIC)), firmware or any suitable combination of the three).

[0053] In another embodiment, for example, some or all of the disclosed methods and operations may be implemented in software including computer-executable instructions stored on one or more computer-readable storage media. The one or more computer-readable storage media may include non-transitory computer-readable media (e.g., removable or non-removable disks, magnetic tapes or cassettes, solid-state drives (SSDs), hybrid hard disk drives, CD-ROMs, CD-RWs, DVDs, or any other tangible storage media), volatile storage components (e.g., DRAM or SRAM), or non-volatile storage components (e.g., hard disks). The computer-executable instructions may be executed on a computer (e.g., any commercial computer, including smartphones or other mobile devices that include computer hardware) by a computer processor (e.g., CPU, GPU, or both).

[0054] In one exemplary embodiment, a method is provided that may include: decoding a first codeword read from a storage location of a non-volatile storage device using a first decoder without soft information; determining that the first decoder failed to decode the first codeword; decoding the first codeword using a second decoder without soft information; determining that the second decoder successfully decoded the first codeword; generating soft information associated with the storage location using decoding information generated by the second decoder; and decoding subsequent codewords from the storage location using the soft information associated with the storage location. The second decoder may be more powerful than the first decoder.

[0055] In one embodiment, the method may further include searching for soft information in memory and determining that no soft information is available for the first decoder to decode the first codeword.

[0056] In one embodiment, the method may further include storing soft information associated with the storage location into memory using a unique identifier of the storage location as an index, and reading the soft information associated with the storage location for decoding the subsequent codeword.

[0057] In one embodiment, the method may further include updating the soft information associated with the storage location using decoded information generated by decoding the subsequent codewords.

[0058] In one embodiment, the storage location may be a page, and the unique identifier may be a physical page address (PPA).

[0059] In one embodiment, the soft information may indicate whether one logical state is more reliable than another logical state, and is presented as the difference between the error flip count from state 1 to state 0 and the error flip count from state 0 to state 1.

[0060] In one embodiment, the method may further include using a caching algorithm to cache the soft information associated with the storage location in memory.

[0061] In another embodiment, a storage system controller is provided, which may include: a plurality of error-correcting code (ECC) decoders including a first decoder and a second decoder, an ECC decoder controller, and a soft information generator. The second decoder may be more powerful than the first decoder. The ECC decoder controller may be configured to: transmit a first codeword read from a storage location of a non-volatile storage device to the first decoder, causing the first decoder to decode the first codeword without soft information; determine that the first decoder failed to decode the first codeword; transmit the first codeword to the second decoder, causing the second decoder to decode the first codeword without soft information; and determine that the second decoder has successfully decoded the first codeword. The soft information generator may be configured to use decoding information generated by the second decoder to generate soft information associated with the storage location. One of the plurality of decoders may be configured to use the soft information generated by the soft information generator and associated with the storage location to decode subsequent codewords from the storage location.

[0062] In one embodiment, the storage system controller may further include a soft information acquirer configured to search for soft information in memory and determine that no soft information is available for the first decoder to decode the first codeword.

[0063] In one embodiment, the storage system controller may further include a soft information acquirer. The soft information generator may also be configured to store the soft information associated with the storage location into memory using a unique identifier of the storage location as an index, and wherein the soft information acquirer is configured to read the soft information associated with the storage location for decoding the subsequent codeword.

[0064] In one embodiment, the soft information generator may also be configured to update the soft information associated with the storage location using decoded information generated by decoding the subsequent codewords.

[0065] In one embodiment, the storage location may be a page, and the unique identifier may be a physical page address (PPA).

[0066] In one embodiment, soft information associated with a storage location can indicate whether one logical state is more reliable than another logical state, and is presented as the difference between the error flip count from state 1 to state 0 and the error flip count from state 0 to state 1.

[0067] In one embodiment, the storage system controller may also be memory configured to cache the soft information associated with the storage location using a caching algorithm.

[0068] In yet another exemplary embodiment, this disclosure may further include a non-transitory machine-readable medium having executable instructions. When executed by a storage controller, the executable instructions cause the storage controller to: decode a first codeword read from a storage location of a non-volatile storage device using a first decoder without soft information; determine that the first decoder failed to decode the first codeword; decode the first codeword using a second decoder without soft information; determine that the second decoder successfully decoded the first codeword; generate soft information associated with the storage location using decoding information generated by the second decoder; and decode subsequent codewords from the storage location using the soft information associated with the storage location. The second decoder may be more powerful than the first decoder.

[0069] In one embodiment, when the executable instructions are executed by the storage controller, the storage controller may also search for soft information in memory and determine that no soft information is available for the first decoder to decode the first codeword.

[0070] In one embodiment, when the executable instructions are executed by the storage controller, the storage controller may also use the unique identifier of the storage location as an index to store soft information associated with the storage location into memory, and read the soft information associated with the storage location for decoding the subsequent codeword.

[0071] In one embodiment, when the executable instructions are executed by the storage controller, the storage controller may also use decoded information generated by decoding the subsequent codewords to update the soft information associated with the storage location.

[0072] In one embodiment, the storage location may be a page, and the unique identifier may be a physical page address (PPA).

[0073] In one embodiment, the soft information may indicate whether one logical state is more reliable than another logical state, and is presented as the difference between the error flip count from state 1 to state 0 and the error flip count from state 0 to state 1.

[0074] Embodiments according to this disclosure can be implemented for any type of ECC code, such as, but not limited to, rectangular parity check, LDPC, and Hamming codes.

[0075] While various aspects and embodiments have been disclosed herein, other aspects and embodiments will be apparent to those skilled in the art. The aspects and embodiments disclosed herein are for illustrative purposes and are not intended to be limiting; the true scope and spirit are indicated by the appended claims.

Claims

1. A method for decoding codewords on the same page using historical decoding information, characterized in that, include: The first decoder is used to decode a first codeword read from a storage location on a non-volatile storage device without any soft information. It is determined that the first decoder failed to decode the first codeword; The first codeword is decoded using a second decoder without soft information; the second decoder is more powerful than the first decoder. It is confirmed that the second decoder has successfully decoded the first codeword; The decoding information generated by the second decoder is used to generate soft information associated with the storage location, wherein the soft information indicates whether one logical state is more reliable than another logical state, and is presented as the difference between the error flip count from state 1 to state 0 and the error flip count from state 0 to state 1. as well as The subsequent codewords from the storage location are decoded using the soft information associated with the storage location.

2. The method as described in claim 1, characterized in that, Before using the first decoder to decode a first codeword read from a storage location on a non-volatile storage device in the absence of soft information, the method further includes searching for soft information in memory and determining that no soft information is available for the first decoder to decode the first codeword.

3. The method as described in claim 1, characterized in that, Also includes: The soft information associated with the storage location is stored in memory using the unique identifier of the storage location as an index; as well as Read the soft information associated with the storage location for use in decoding the subsequent codewords.

4. The method as described in claim 3, characterized in that, It also includes using decoded information generated by decoding the subsequent codewords to update the soft information associated with the storage location.

5. The method as described in claim 3, characterized in that, The storage location is a page, and the unique identifier is the physical page address (PPA).

6. The method as described in claim 1, characterized in that, It also includes using a caching algorithm to cache the soft information associated with the storage location in memory.

7. A storage system controller, characterized in that, include: Multiple ECC decoders, including a first decoder and a second decoder, wherein the second decoder is more powerful than the first decoder; ECC decoder controller, the ECC decoder controller being configured as follows: A first codeword read from a storage location on a non-volatile storage device is transmitted to the first decoder, so that the first decoder can decode the first codeword without soft information. It is determined that the first decoder failed to decode the first codeword; The first codeword is transmitted to the second decoder so that the second decoder can decode the first codeword without soft information; as well as It is confirmed that the second decoder has successfully decoded the first codeword; as well as A soft information generator is configured to generate soft information associated with the storage location using decoding information generated by the second decoder, wherein the soft information associated with the storage location indicates whether one logical state is more reliable than another logical state and is presented as the difference between the error flip count from state 1 to state 0 and the error flip count from state 0 to state 1, wherein one of the plurality of ECC decoders is configured to use the soft information associated with the storage location to decode subsequent codewords from the storage location.

8. The storage system controller as claimed in claim 7, characterized in that, It also includes a soft information acquirer, which is configured to search for soft information in memory and determine that no soft information is available for the first decoder to decode the first codeword.

9. The storage system controller as claimed in claim 7, characterized in that, It also includes a soft information acquirer, wherein the soft information generator is further configured to store the soft information associated with the storage location into memory using a unique identifier of the storage location as an index, and wherein the soft information acquirer is configured to read the soft information associated with the storage location for use in decoding the subsequent codeword.

10. The storage system controller as claimed in claim 9, characterized in that, The soft information generator is also configured to update the soft information associated with the storage location using decoded information generated by decoding the subsequent codewords.

11. The storage system controller as claimed in claim 9, characterized in that, The storage location is a page, and the unique identifier is the physical page address (PPA).

12. The storage system controller as claimed in claim 7, characterized in that, It also includes memory configured to cache the soft information associated with the storage location using a caching algorithm.

13. A non-transitory machine-readable medium having executable instructions, characterized in that, When executed by the storage controller, the executable instructions cause the storage controller to perform the following operations: The first decoder is used to decode a first codeword read from a storage location on a non-volatile storage device without any soft information. It is determined that the first decoder failed to decode the first codeword; The first codeword is decoded using a second decoder without soft information; the second decoder is more powerful than the first decoder. It is confirmed that the second decoder has successfully decoded the first codeword; The decoding information generated by the second decoder is used to generate soft information associated with the storage location, wherein the soft information indicates whether one logical state is more reliable than another logical state, and is presented as the difference between the error flip count from state 1 to state 0 and the error flip count from state 0 to state 1. as well as The subsequent codewords from the storage location are decoded using the soft information associated with the storage location.

14. The non-transitory machine-readable medium as claimed in claim 13, characterized in that, Before using the first decoder to decode a first codeword read from a storage location of a non-volatile storage device in the absence of soft information, the executable instructions, when executed by the storage controller, also cause the storage controller to search for soft information in memory and determine that no soft information is available for the first decoder to decode the first codeword.

15. The non-transitory machine-readable medium according to claim 13, characterized in that, When executed by the storage controller, the executable instructions also cause the storage controller to perform the following operations: The soft information associated with the storage location is stored in memory using the unique identifier of the storage location as an index; and Read the soft information associated with the storage location for use in decoding the subsequent codewords.

16. The non-transitory machine-readable medium as claimed in claim 13, characterized in that, When executed by the storage controller, the executable instructions also cause the storage controller to update the soft information associated with the storage location using decoded information generated by decoding the subsequent codewords.

17. The non-transitory machine-readable medium as claimed in claim 15, characterized in that, The storage location is a page, and the unique identifier is the physical page address (PPA).

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