Substrate, epitaxial wafer, and method for manufacturing a substrate

Abstract

The present disclosure provides a substrate, an epitaxial wafer and a preparation method of the substrate, and belongs to the technical field of optoelectronic manufacturing. The substrate comprises a substrate body and a heat conduction member. One side of the substrate body has a plurality of blind holes. The heat conduction member corresponds to the blind holes one by one, and the heat conduction member is at least partially located in the corresponding blind hole. The present disclosure can improve the heat dissipation performance of the substrate.

Description

Technical Field

[0001] This disclosure relates to the field of optoelectronic manufacturing technology, and in particular to a substrate, an epitaxial wafer, and a method for preparing the substrate. Background Technology

[0002] Light-emitting diode (LED) chips are a type of semiconductor device. As a highly influential new product in the optoelectronics industry, they are characterized by small size, long lifespan, rich and colorful colors, and low energy consumption. They are widely used in lighting, displays, signal lights, backlights, toys, and other fields.

[0003] In related technologies, epitaxial wafers are a crucial component of light-emitting diode (LED) chips, primarily consisting of a substrate and an epitaxial layer. Sapphire is a common substrate material, widely used due to its mature technology and low cost. However, a major drawback of sapphire substrates is their poor heat dissipation performance, which not only affects the thermal reliability of LED chips but also limits the injection current of high-power LED chips to some extent. To address this issue, a replacement method is typically used during substrate fabrication. This involves bonding the epitaxial layer to another substrate with superior thermal conductivity, followed by peeling off the sapphire substrate. Essentially, this involves using bonding and peeling techniques to replace the sapphire substrate with one of superior thermal conductivity.

[0004] However, using the replacement method in substrate preparation requires multiple additional steps, which significantly increases manufacturing costs. Summary of the Invention

[0005] This disclosure provides a substrate, an epitaxial wafer, and a method for fabricating the substrate, which can improve the heat dissipation performance of the substrate. The technical solution is as follows:

[0006] In one aspect, embodiments of this disclosure provide a substrate, the substrate comprising:

[0007] A substrate body, one side of which has a plurality of blind holes;

[0008] A heat-conducting component corresponds one-to-one with each of the blind holes, and the heat-conducting component is at least partially located within the corresponding blind hole.

[0009] In one implementation of this disclosure, the bottom area of ​​the blind hole is larger than the opening area of ​​the blind hole.

[0010] In one implementation of this disclosure, the heat-conducting element is located at the opening of the blind hole and is flush with one side of the substrate body.

[0011] In one implementation of this disclosure, the heat-conducting element is any one of SiC or a metallic material.

[0012] In one implementation of this disclosure, the substrate further includes protrusions;

[0013] The protrusions correspond one-to-one with the heat-conducting components, and the protrusions are stacked on the corresponding heat-conducting components so that the protrusions protrude from one side of the substrate body.

[0014] In one implementation of this disclosure, the protrusion has a frustum-shaped structure, and the end of the protrusion with a larger area contacts the heat-conducting component.

[0015] In one implementation of this disclosure, the protrusion is made of SiO2 material.

[0016] On the other hand, this disclosure also provides an epitaxial wafer, which includes: a substrate, and a U-type GaN layer, an N-type GaN layer, a quantum hydrazine layer and a P-type GaN layer sequentially stacked on the substrate, wherein the substrate is the substrate described above.

[0017] In another aspect, embodiments of this disclosure also provide a method for preparing a substrate, the method comprising:

[0018] Provide a substrate body;

[0019] Multiple blind holes are etched to form on one side of the substrate body;

[0020] A heat-conducting element is deposited within the blind hole.

[0021] In one implementation of this disclosure, the preparation method further includes:

[0022] A protrusion is formed on the heat-conducting component by photolithography, and the protrusion is made of SiO2 material.

[0023] The beneficial effects of the technical solutions provided in this disclosure include at least the following:

[0024] The substrate body forms the main structure of the substrate. One side of the substrate body has multiple blind vias, which provide housing space for heat-conducting components. Each heat-conducting component corresponds one-to-one with a blind via, ensuring that each component has reliable housing space. The heat-conducting components are located within their corresponding blind vias, effectively improving the overall heat dissipation performance of the substrate.

[0025] In other words, by placing a heat-conducting component inside the blind hole of the substrate, the overall heat dissipation performance of the substrate can be effectively improved due to the good heat dissipation performance of the heat-conducting component. Attached Figure Description

[0026] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0027] Figure 1 This is a schematic diagram of the substrate structure provided in the embodiments of this disclosure;

[0028] Figure 2 This is provided by the embodiments of this disclosure. Figure 1 View from direction A;

[0029] Figure 3 This is a schematic diagram of the structure of the epitaxial wafer provided in the embodiments of this disclosure;

[0030] Figure 4 This is a flowchart of a substrate fabrication method provided in an embodiment of this disclosure;

[0031] Figure 5 This is a flowchart of another substrate preparation method provided in this disclosure embodiment;

[0032] Figure 6 This is a schematic diagram of a substrate fabrication process provided in an embodiment of this disclosure;

[0033] Figure 7 This is a schematic diagram of a substrate fabrication process provided in an embodiment of this disclosure;

[0034] Figure 8 This is a schematic diagram of a substrate fabrication process provided in an embodiment of this disclosure.

[0035] Example in the image is as follows:

[0036] 10. Substrate body;

[0037] 110. Blind hole;

[0038] 20. Thermal conductive components;

[0039] 30. Protrusion;

[0040] 100, Substrate; 200, U-type GaN layer; 300, N-type GaN layer; 400, Quantum hydrazine layer; 500, P-type GaN layer; 600, Buffer layer. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this disclosure clearer, the embodiments of this disclosure will be described in further detail below with reference to the accompanying drawings.

[0042] Light-emitting diode (LED) chips are a type of semiconductor device. As a highly influential new product in the optoelectronics industry, they are characterized by small size, long lifespan, rich and colorful colors, and low energy consumption. They are widely used in lighting, displays, signal lights, backlights, toys, and other fields.

[0043] In related technologies, epitaxial wafers are a crucial component of light-emitting diode (LED) chips, primarily consisting of a substrate and an epitaxial layer. Sapphire is a common substrate material, widely used due to its mature technology and low cost. However, a major drawback of sapphire substrates is their poor heat dissipation performance (0.41 W / (cm·K)). Since the substrate occupies a large volume proportion in an LED chip, its heat dissipation performance plays a dominant role in the overall heat dissipation performance of the LED chip. Poor heat dissipation performance not only affects the thermal reliability of the LED chip but also limits the increase in injection current for high-power LED chips to some extent.

[0044] To solve this problem, a replacement method is usually used when preparing the substrate. This involves bonding the epitaxial layer to another substrate with excellent thermal conductivity and then peeling off the sapphire substrate. Essentially, the bonding and peeling techniques are used to replace the sapphire substrate with a substrate that has excellent thermal conductivity.

[0045] However, using the replacement method in substrate preparation requires multiple additional steps, which significantly increases manufacturing costs.

[0046] To address the aforementioned technical problems, this disclosure provides a substrate. Figure 1 See the schematic diagram of the substrate structure. Figure 1 In this embodiment, the substrate includes a substrate body 10 and a heat-conducting element 20. One side of the substrate body 10 has a plurality of blind holes 110, and the heat-conducting element 20 corresponds one-to-one with the blind holes 110, and the heat-conducting element 20 is at least partially located in the corresponding blind hole 110.

[0047] The substrate body 10 is the main structure of the substrate. One side of the substrate body 10 has multiple blind holes 110, which provide accommodating space for the heat-conducting components 20. Each heat-conducting component 20 corresponds one-to-one with a blind hole 110, ensuring that each heat-conducting component 20 has reliable accommodating space. The heat-conducting components 20 are located within their corresponding blind holes 110, effectively improving the overall heat dissipation performance of the substrate.

[0048] In other words, a heat-conducting element 20 is provided in the blind hole 110 of the substrate body 10. Since the heat-conducting element 20 has good heat dissipation performance, the overall heat dissipation performance of the substrate can be effectively improved by providing the heat-conducting element 20.

[0049] As an example, the substrate body 10 is made of sapphire, which gives the substrate body 10 the advantages of mature technology and low cost.

[0050] In this embodiment, one side of the substrate body 10 has a plurality of blind holes 110, which are evenly spaced on the substrate body 10. Correspondingly, multiple heat-conducting elements 20 are also provided, each located within a corresponding blind hole 110. In this way, the multiple heat-conducting elements 20 can also be evenly spaced on the substrate body 10, thereby uniformly improving the heat dissipation performance of the substrate and avoiding the problem of uneven heat dissipation of the substrate.

[0051] For example, the heat-conducting element 20 is made of either SiC or a metallic material.

[0052] In the above implementation, since SiC has good thermal conductivity, designing the heat-conducting component 20 as SiC material can effectively ensure the heat dissipation performance of the heat-conducting component 20. Similarly, the metal material used for the heat-conducting component 20 is a material with good thermal conductivity, such as copper, and this disclosure does not limit it.

[0053] See also Figure 1 In this embodiment, the bottom area of ​​the blind hole 110 is larger than the opening area of ​​the blind hole 110.

[0054] The side where the opening of the blind via 110 is located is the side of the substrate 10 where the epitaxial layer is grown. Designing the opening area of ​​the blind via 110 to be relatively small maximizes the area on the substrate 10 available for epitaxial layer growth, thus facilitating the growth of the epitaxial layer on the substrate. The bottom surface of the blind via 110 is located inside the substrate 10, so it does not affect the growth of the epitaxial layer. Therefore, designing the bottom surface of the blind via 110 to be relatively large maximizes the space for accommodating the heat-conducting components 20, allowing the blind via 110 to accommodate as many heat-conducting components 20 as possible, thereby improving the overall heat dissipation effect of the substrate.

[0055] For example, the inner contour of the blind hole 110 is a frustum shape, the bottom surface of the blind hole 110 is the lower bottom surface of the frustum with a larger area, and the opening of the blind hole 110 is the upper bottom surface of the frustum with a smaller area. This design makes the cross-section of the blind hole 110 gradually increase in the direction from the opening to the bottom surface, which is beneficial for depositing the heat-conducting element 20 in the blind hole 110.

[0056] Correspondingly, the outer contour of the heat conductor 20 is frustum-shaped, so that the outer contour of the heat conductor 20 matches the inner contour of the blind hole 110. The heat conductor 20 can fill the blind hole 110 as much as possible to improve the heat dissipation performance of the heat conductor 20, thereby improving the overall heat dissipation performance of the substrate.

[0057] Of course, in other embodiments, the inner contour of the blind hole 110 can also be other shapes, as long as the bottom area of ​​the blind hole 110 is larger than the opening area of ​​the blind hole 110. Accordingly, the outer contour shape of the heat-conducting element 20 also changes.

[0058] Figure 2 for Figure 1 A-direction view, combined Figure 2 In this embodiment, the opening shape of the blind hole 110 is circular. Of course, in other embodiments, the opening of the blind hole 110 can also be other shapes, such as elliptical, polygonal, etc., and this disclosure does not limit it.

[0059] See you again Figure 1 In this embodiment, the heat-conducting element 20 is located at the opening of the blind hole 110 and is flush with one side of the substrate body 10.

[0060] If the portion of the heat-conducting element 20 at the opening of the blind via 110 protrudes beyond the opening, it will affect the subsequent growth of the epitaxial layer on the substrate, requiring additional steps and increasing manufacturing costs. If the portion of the heat-conducting element 20 at the opening of the blind via 110 is recessed relative to the opening, it will reduce the volume of the heat-conducting element 20, hindering its heat dissipation performance and thus affecting the overall heat dissipation performance of the substrate. Therefore, making the portion of the heat-conducting element 20 at the opening of the blind via 110 flush with one side of the substrate body 10 avoids affecting the subsequent growth of the epitaxial layer on the substrate while improving the heat dissipation performance of the heat-conducting element 20 and thus the overall heat dissipation performance of the substrate.

[0061] Of course, in other embodiments, the portion of the heat-conducting element 20 at the opening of the blind hole 110 can be either protruding from the opening of the blind hole 110, recessed into the opening of the blind hole 110, or flush with the opening of the blind hole 110. These can all be selected according to actual needs, and this disclosure does not impose any restrictions on them.

[0062] See also Figure 1 In this embodiment, the substrate further includes protrusions 30, which correspond one-to-one with the heat-conducting elements 20. The protrusions 30 are stacked on the corresponding heat-conducting elements 20, so that the protrusions 30 protrude from one side of the substrate body 10.

[0063] In the above implementation, the substrate is designed as a patterned sapphire substrate (PSS). Compared to a traditional flat substrate, the epitaxial layer grown on a patterned sapphire substrate has a lower dislocation density, resulting in a higher luminous efficiency for the fabricated LED chip. Furthermore, since the bump 30 is designed on the heat-conducting component 20, the area of ​​the heat-conducting component 20 can be utilized, preventing the bump 30 from occupying the area of ​​the epitaxial layer and effectively improving space utilization.

[0064] For example, the orthographic projection of the protrusion 30 onto one side of the substrate body 10 is located within the heat conductor 20. In this way, the protrusion 30 can be effectively prevented from extending beyond the heat conductor 20 in the horizontal direction, thereby avoiding the protrusion 30 from affecting the growth of the epitaxial layer.

[0065] For example, the protrusion 30 has a frustum-shaped structure, and the end of the protrusion 30 with a larger area contacts the heat-conducting component 20.

[0066] In the above implementation, the protrusion 30 is designed as a frustum-shaped structure. The lower base of the frustum, with a larger area, contacts the heat-conducting component 20, while the upper base, with a smaller area, protrudes from the substrate body 10. This reduces stress at the epitaxial layer edges during epitaxial layer growth, minimizes edge warping, and effectively reduces the thickness difference between the epitaxial layer edges and the center, resulting in a more uniform epitaxial layer thickness.

[0067] In this embodiment, the bottom of the protrusion 30 coincides with the side of the heat conductor 20 at the opening of the blind hole 110. In this way, the area of ​​the heat conductor 20 can be utilized as much as possible, so that the protrusion 30 will not occupy the area of ​​the epitaxial layer and effectively improve the space utilization rate.

[0068] Of course, in other embodiments, the protrusion 30 can also be other shapes, such as conical, hemispherical, semi-ellipsoidal, etc., and this disclosure does not limit it. If the protrusion 30 is conical, then the lower base with a larger area of ​​the cone contacts the heat-conducting element 20.

[0069] For example, protrusion 30 is made of SiO2 material.

[0070] Since SiO2 patterned sapphire substrates have higher reflectivity than traditional patterned sapphire substrates, designing protrusion 30 as SiO2 material can further improve the light extraction efficiency of the substrate.

[0071] Figure 3 This is a schematic diagram of the structure of an epitaxial wafer provided in an embodiment of this disclosure. See also... Figure 3The epitaxial wafer includes a substrate 100, a U-type GaN layer 200, an N-type GaN layer 300, a quantum hydrazine layer 400, and a P-type GaN layer 500. The substrate 100 is... Figure 1-2 The substrate 100 shown. A U-type GaN layer 200, an N-type GaN layer 300, a quantum hydrazine layer 400 and a P-type GaN layer 500 are sequentially stacked on the side of the substrate 100 with a blind via 110.

[0072] The substrate body 10 is the main structure of the substrate 100. One side of the substrate body 10 has multiple blind holes 110, which provide accommodating space for the heat-conducting components 20. Each heat-conducting component 20 corresponds one-to-one with a blind hole 110, ensuring that each heat-conducting component 20 has reliable accommodating space. The heat-conducting component 20 is located within its corresponding blind hole 110, effectively improving the overall heat dissipation performance of the substrate 100. In other words, by placing the heat-conducting component 20 within the blind holes 110 of the substrate body 10, and because the heat-conducting component 20 has good heat dissipation performance, the overall heat dissipation performance of the substrate 100 can be effectively improved.

[0073] Because the substrate 100 has good overall heat dissipation performance, the thermal reliability of the epitaxial wafer is effectively improved.

[0074] In this embodiment, the U-type GaN layer 200 is a low-Si-doped U-type GaN layer 200, the N-type GaN layer 300 is a high-Si-doped N-type GaN layer 300, and the P-type GaN layer 500 is a Mg-doped P-type GaN layer 500.

[0075] In the above implementation, a low-Si-doped U-type GaN layer 200 and a high-Si-doped N-type GaN layer 300 are sequentially grown under low pressure and high temperature using metal-organic chemical vapor deposition (MOCVD). Next, a quantum hydrazine layer 400, representing the core region of electron-hole recombination, is grown. Finally, a Mg-doped P-type GaN layer 500 is grown under an H2 atmosphere. To increase the hole concentration in the P-type GaN layer 500, the epitaxial wafer is thermally annealed under an N2 atmosphere to activate the Mg acceptors.

[0076] In this embodiment, the epitaxial wafer further includes a buffer layer 600, which is located between the substrate 100 and the U-shaped GaN layer 200. By providing the buffer layer 600, the lattice mismatch between the substrate 100 and the U-shaped GaN layer 200 can be effectively reduced, thereby improving the light extraction effect.

[0077] For example, when generating the buffer layer 600, NH3 is continuously introduced at a temperature of 500°C for several minutes to nitrid the substrate 100, thereby generating the buffer layer 600.

[0078] Table 1 is a summary table of the thermal conductivity of common substrates 100 and epitaxial layers. See Table 1 for details.

[0079] Material Thermal conductivity / (W / (cm·K)) sapphire 0.35-0.42 GaN 1.70-1.80 InGaN 1.70 InN 0.45 AIN 1.70-2.00 / 3.10 Si 1.25-1.50 <![CDATA[SiO2]]> 1.20 6H-SiC 4.90 Ag 4.27 Pure Cu 3.98 Au 3.15 AI 2.37 Au-Sn(80-20) 0.57 W 1.73 Zn 1.16 Single-layer suspended graphene 30-53 diamond 20-22

[0080] Table 1

[0081] As shown in Table 1, sapphire has very low thermal conductivity, while 6H-SiC has thermal conductivity that is more than ten times that of sapphire. On the same horizontal cross-section, when the area of ​​6H-SiC reaches 1 / 2 of the total area of ​​sapphire, the total thermal conductivity can be increased by 2.245 W / (cm·K). Therefore, setting a heat-conducting element 20 in the substrate 100 body can effectively improve the overall thermal conductivity of the substrate 100.

[0082] Figure 4 A flowchart illustrating a method for fabricating a substrate 100 according to an embodiment of this disclosure is provided. See also: Figure 4 In this embodiment, the preparation method includes:

[0083] Step 401: Provide a substrate body 10.

[0084] Step 402: Etch a plurality of blind holes 110 on one side of the substrate body 10.

[0085] Step 403: Deposit a heat-conducting element 20 within the blind hole 110.

[0086] pass Figure 4 The preparation method shown can prepare Figure 1-2 The substrate 100 shown has Figure 1-2 All the beneficial effects of the substrate 100 shown will not be elaborated here.

[0087] Figure 5 For a flowchart of another method for fabricating substrate 100 provided in this embodiment of the disclosure, see [link to flowchart]. Figure 5 In this embodiment, the preparation method includes:

[0088] Step 501: Provide a substrate body 10 (see...) Figure 6 ).

[0089] For example, the substrate 10 is sapphire, and the size can be 2 inches or larger, so as to take advantage of the mature technology and low cost of sapphire substrate 100.

[0090] Step 502: Etch a plurality of blind holes 110 on one side of the substrate body 10 (see Figure 7 ).

[0091] In step 502, a layer of photoresist is first coated on one side of the substrate body 10. Then, after exposure and development, a pattern corresponding to the opening of the blind hole 110 is formed. Then, the blind hole 110 is etched on the substrate body 10 by dry etching technology. Finally, the photoresist is removed and cleaned to obtain a substrate body 10 with multiple blind holes 110.

[0092] Step 503: Deposit and form a heat-conducting element 20 within the blind via 110 (see...) Figure 8 ).

[0093] In step 503, a mask layer is formed on one side of the substrate body 10 and the blind hole 110 is exposed by photolithography. Then, a layer of high thermal conductivity material, such as SiC or metal material, is deposited / evaporated. Then, the mask layer outside the blind hole 110 is removed by a lift-off technique, leaving only a certain thickness of high thermal conductivity material in the blind hole 110, which is the heat-conducting element 20.

[0094] Step 504: Photolithographically form protrusion 30 on the heat-conducting component 20 (see...) Figure 1 ).

[0095] In step 504, SiO2 is first deposited on one side of the substrate 10, then a mask layer is formed, and the area outside the heat conductor 20 is exposed by photolithography. Then, through etching and resist removal cleaning, only a certain thickness of SiO2 material, i.e., protrusion 30, is left on the heat conductor 20.

[0096] Unless otherwise defined, the technical or scientific terms used herein shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” “third,” and similar terms used in this patent application specification and claims do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an” or “a” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising” or “including” and similar terms mean that the elements or objects preceding “comprising” or “including” encompass the elements or objects listed following “comprising” or “including” and their equivalents, and do not exclude other elements or objects. The terms “connected” or “linked” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. The terms “upper,” “lower,” “left,” “right,” etc., are used only to indicate relative positional relationships; when the absolute position of the described objects changes, the relative positional relationship may also change accordingly.

[0097] The above description is merely an optional embodiment of this disclosure and is not intended to limit this disclosure. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this disclosure should be included within the protection scope of this disclosure.

Claims

1. A substrate, characterized in that, include: A substrate body (10) has a plurality of blind holes (110) on one side, the bottom area of ​​the blind holes (110) being larger than the opening area of ​​the blind holes (110); A heat-conducting element (20) corresponds one-to-one with the blind hole (110), and the heat-conducting element (20) is at least partially located within the corresponding blind hole (110); The protrusion (30) corresponds one-to-one with the heat-conducting element (20). The protrusion (30) is stacked on the corresponding heat-conducting element (20). The orthographic projection of the protrusion (30) on one side of the substrate body (10) is located inside the heat-conducting element (20), so that the protrusion (30) protrudes out of one side of the substrate body (10).

2. The substrate according to claim 1, characterized in that, The heat-conducting element (20) is located at the opening of the blind hole (110) and is flush with one side of the substrate body (10).

3. The substrate according to claim 1, characterized in that, The heat-conducting component (20) is either SiC or a metallic material.

4. The substrate according to claim 1, characterized in that, The protrusion (30) has a frustum-shaped structure, and the end of the protrusion (30) with a larger area is in contact with the heat-conducting component (20).

5. The substrate according to claim 1, characterized in that, The protrusion (30) is made of SiO2 material.

6. An epitaxial wafer, characterized in that, include: The substrate (100) and the U-type GaN layer (200), N-type GaN layer (300), quantum hydrazine layer (400) and P-type GaN layer (500) sequentially stacked on the substrate (100), wherein the substrate (100) is the substrate (100) according to any one of claims 1-5.

7. A method for preparing a substrate, characterized in that, include: A substrate body (10) is provided; A plurality of blind holes (110) are etched on one side of the substrate body (10), and the bottom area of ​​the blind holes (110) is larger than the opening area of ​​the blind holes (110); A heat-conducting element (20) is deposited within the blind hole (110); A protrusion (30) is formed by photolithography on the heat-conducting element (20). The protrusion (30) corresponds one-to-one with the heat-conducting element (20). The protrusion (30) is stacked on the corresponding heat-conducting element (20). The orthographic projection of the protrusion (30) on one side of the substrate body (10) is located in the heat-conducting element (20), so that the protrusion (30) protrudes out of one side of the substrate body (10).

8. The preparation method according to claim 7, characterized in that, Also includes: The protrusion (30) is made of SiO2 material.

Images