A three-resistor sampling method and system

Abstract

The application discloses a three-resistance sampling method and system, which ensures sampling accuracy. The method comprises the following steps: in the process of controlling a three-phase inverter by adopting SVPWM, it is judged whether there is at least one sampleable period under the current carrier cycle; three-phase lower bridge arms of the three-phase inverter are respectively connected with sampling resistors in series; the sampleable period refers to a period in which the duration of a preset state is greater than the sampling window time; the preset state refers to a case that current fluctuations of two phases with the longest lower bridge arm conduction time are both less than a preset value under the condition that the lower bridge arms of the two phases are all turned on; if yes, the current of the two phases with the longest lower bridge arm conduction time is collected under any one sampleable period, and then the current of the third phase is calculated; if no, a sampleable period is generated by prolonging the lower bridge arm conduction time of the corresponding phase, the current of the two phases with the longest lower bridge arm conduction time is collected under the generated period, and then the current of the third phase is calculated.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and more specifically, to a three-resistance sampling method and system. Background Technology

[0002] In the process of controlling a three-phase inverter using SVPWM (Space Vector Pulse Width Modulation) strategy, a key technical aspect is the sampling of three-phase current. There are various three-phase current sampling schemes, such as single-resistor sampling, dual-resistor sampling, and three-resistor sampling, among which the three-resistor sampling scheme has the simplest algorithm. The existing three-resistor sampling scheme involves connecting sampling resistors Ra, Rb, and Rc in series in the three lower bridge arms of the three-phase inverter (e.g., ...). Figure 1 As shown, when the lower arm of a certain phase is turned on, the current flowing through the sampling resistor of the lower arm of that phase is equal to the current of that phase. The on and off times of the three lower arms are different. When all three lower arms are turned on, the current of the phase with the shortest conduction time is not collected. Only the currents of the other two phases are collected. Then, the current of the third phase is calculated using the current reconstruction method.

[0003] A short conduction time of the lower bridge arm in a certain phase will result in a short sampling window time for that phase, leading to inaccurate current sampling for that phase. In some carrier cycles of SVPWM, only one phase has a short conduction time of the lower bridge arm, while in other carrier cycles, at least two phases have short conduction times of the lower bridge arm. Since the existing three-resistor sampling scheme avoids sampling the current of the phase with the shortest lower bridge arm conduction time, it can guarantee sampling accuracy for the former, but it can no longer guarantee sampling accuracy for the latter.

[0004] In addition, if other phases switch on during the current sampling process, the current in that phase will fluctuate, which will also lead to inaccurate sampling of the current in that phase. Summary of the Invention

[0005] In view of this, the present invention provides a three-resistance sampling method and system to ensure sampling accuracy.

[0006] A three-resistance sampling method, comprising:

[0007] In the process of controlling a three-phase inverter using the Space Vector Pulse Width Modulation (SVPWM) strategy, it is determined whether there is at least one sampleable time period under the current carrier cycle. Each of the three lower bridge arms of the three-phase inverter is connected in series with a sampling resistor. The sampleable time period refers to a period in which the duration of a preset state is greater than or equal to Tsample, where Tsample represents the sampling window time. The preset state refers to a situation where, when the lower bridge arms of the two phases with the longest conduction time are both on, the current fluctuations of those two phases are both less than a preset value.

[0008] If so, the current of the two phases with the longest conduction time of the lower bridge arm is collected during any sampleable period, and then the current of the third phase is calculated using the current reconstruction method;

[0009] If not, a sampleable period is generated by extending the conduction time of the lower arm of the corresponding phase. During the generated sampleable period, the current of the two phases with the longest lower arm conduction time is collected, and then the current of the third phase is calculated using the current reconstruction method.

[0010] Optionally, before determining whether at least one sampleable time period exists in the current carrier period, the method further includes:

[0011] Determine the sector in which the three-phase inverter output voltage is located;

[0012] Determine the order of the conduction time of the lower three-phase lower arm in the current sector.

[0013] Optionally, the SVPWM strategy is a five-segment SVPWM strategy.

[0014] Optionally, when the SVPWM strategy is a five-segment SVPWM strategy, it is determined whether there is at least one sampleable period in the current carrier cycle; if so, the current of the two phases with the longest lower arm conduction time is collected during any sampleable period, and then the current of the third phase is calculated using the current reconstruction method; if not, a sampleable period is generated by extending the lower arm conduction time of the corresponding phase, and the current of the two phases with the longest lower arm conduction time is collected during the generated sampleable period, and then the current of the third phase is calculated using the current reconstruction method, including:

[0015] Determine whether Tpwm-2*Tmax is greater than Tsample+Tnoise; if so, start collecting the current of the two phases with the longest conduction time of the lower bridge arm from time Tpwm / 2, and then use the current reconstruction method to calculate the current of the third phase; if not, determine whether Tmax-Tmiddle is greater than Tsample+Tnoise.

[0016] If satisfied, the current of the two phases with the longest conduction time of the lower bridge arm is collected starting from time Tmiddle+(Tmax-Tmiddle) / 2, and then the current of the third phase is calculated using the current reconstruction method; if not satisfied, a sampleable time period is generated by extending the conduction time of the lower bridge arm of the corresponding phase, and the current of the two phases with the longest conduction time of the lower bridge arm is collected starting from time Tpwm / 2, and then the current of the third phase is calculated using the current reconstruction method.

[0017] Where Tpwm represents the modulation period; Tmiddle represents the upper arm conduction time of the phase with the middle lower arm conduction time in the first half of the cycle; Tmax represents the upper arm conduction time of the phase with the shortest lower arm conduction time in the first half of the cycle; and Tnoise represents the time during which the current fluctuation of any phase's lower arm conducts after conduction is greater than or equal to the preset value in the first half of the cycle.

[0018] Another three-resistance sampling method includes:

[0019] In the process of controlling a three-phase inverter using the Space Vector Pulse Width Modulation (SVPWM) strategy, it is determined whether there is at least one sampleable time period under the current carrier cycle. Each of the three upper arms of the three-phase inverter is connected in series with a sampling resistor. The sampleable time period refers to a period in which the duration of a preset state is greater than or equal to Tsample, where Tsample represents the sampling window time. The preset state refers to a situation where, when the upper arms of the two phases with the longest conduction time are both on, the current fluctuations of those two phases are both less than a preset value.

[0020] If so, the current of the two phases with the longest conduction time of the upper bridge arm is collected during any sampleable period, and then the current of the third phase is calculated using the current reconstruction method;

[0021] If not, a sampleable period is generated by extending the conduction time of the upper arm of the corresponding phase. During the generated sampleable period, the current of the two phases with the longest upper arm conduction time is collected, and then the current of the third phase is calculated using the current reconstruction method.

[0022] Optionally, the SVPWM strategy is a five-segment SVPWM strategy.

[0023] A three-resistor sampling system includes: a control unit and sampling resistors connected in series in the three lower bridge arms of a three-phase inverter;

[0024] The control unit stores a program that, when executed, performs any of the corresponding three-resistance sampling methods disclosed above.

[0025] Another three-resistor sampling system includes: a control unit and sampling resistors connected in series in the three upper arms of a three-phase inverter;

[0026] The control unit stores a program that, when executed, performs any of the corresponding three-resistance sampling methods disclosed above.

[0027] As can be seen from the above technical solution, this invention considers all time periods in which the current of the two phases with the longest lower arm conduction time is greater than or equal to the sampling window time Tsample as sampleable time periods. Therefore, sampling the current of the two phases with the longest lower arm conduction time during any sampleable time period can obviously guarantee sampling accuracy. When a sampleable time period exists within a carrier cycle, phase current sampling and reconstruction can be performed directly; if not, this invention creates such a time period by adjusting the on / off time of the lower arm of the corresponding phase to ensure the smooth and accurate execution of phase current sampling and reconstruction. Attached Figure Description

[0028] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 The circuit diagram disclosed in the prior art shows a circuit structure in which sampling resistors are connected in series in the three lower bridge arms of a three-phase inverter.

[0030] Figure 2 An application disclosed in an embodiment of the present invention is... Figure 1 The flowchart of the three-resistor sampling method for the circuit shown is as follows;

[0031] Figure 3 A spatial vector diagram of a three-phase inverter;

[0032] Figure 4a for Figure 1 The circuit shown has a signal waveform over one carrier cycle.

[0033] Figure 4b for Figure 1 The signal waveform of the circuit shown in another carrier cycle;

[0034] Figure 4c for Figure 1 The signal waveform of the circuit shown in another carrier cycle;

[0035] Figure 4d For based on Figure 4c Extend the conduction time of the lower bridge arm of the corresponding phase to generate a signal waveform diagram after a sampleable period;

[0036] Figure 4e This is another application disclosed in the embodiments of the present invention. Figure 1 The flowchart of the three-resistor sampling method for the circuit shown is as follows;

[0037] Figure 5 This is a circuit diagram showing the circuit structure after connecting sampling resistors in series in the three upper arms of a three-phase inverter;

[0038] Figure 6 An application disclosed in an embodiment of the present invention is... Figure 5 The flowchart of the three-resistor sampling method for the circuit shown is presented. Detailed Implementation

[0039] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0040] This invention discloses a three-resistance sampling method, which is applied to... Figure 1 The three-phase inverter shown is... Figure 1 The three-phase inverter shown has a sampling resistor Ra connected in series in the lower arm of phase A, a sampling resistor Rb connected in series in the lower arm of phase B, and a sampling resistor Rc connected in series in the lower arm of phase C. The method is as follows: Figure 2 As shown, it includes:

[0041] Step S01: During the control of the three-phase inverter using the SVPWM strategy, determine whether there is at least one sampleable time period in the current carrier cycle; if yes, proceed to step S02; otherwise, proceed to step S03. The sampleable time period refers to a period in which the duration of a preset state is greater than or equal to the sampling window time Tsample; the preset state refers to a situation where, when the lower bridge arms of the two phases with the longest lower bridge arm conduction time are both on, the current fluctuations of the two phases are both less than a preset value.

[0042] Specifically, SVPWM is one of the common control strategies for three-phase inverters. The basic principle of SVPWM is: the instantaneous value of the three-phase inverter output voltage is represented by a space vector Uout rotating at an angular velocity ω = 2πf (where f is the power supply frequency). This 360° rotation space of the space vector Uout is divided into six equal sectors; this rotation space is also called the space vector diagram of the three-phase inverter, such as... Figure 3As shown, the six sectors are sector I (0°≤θ<60°, θ=ωt=2πft), sector II (60°≤θ<120°), sector III (120°≤θ<180°), sector IV (180°≤θ<240°), sector V (240°≤θ<300°), and sector VI (300°≤θ<360°) in the two-phase αβ coordinate system. The spatial vector Uout, when rotated to any sector, can be represented by three vectors located at the boundary of that sector. The position-specific space vectors are synthesized (common SVPWM types include seven-segment SVPWM, five-segment SVPWM, and three-segment SVPWM; for seven-segment SVPWM, there are eight position-specific space vectors from U0 to U7; for five-segment 000-injected SVPWM, there are seven position-specific space vectors from U0 to U6; for five-segment 111-injected SVPWM, there are seven vectors from U1 to U7, where U0 and U7 are zero vectors). Figure 3 Taking a five-segment 000 injection SVPWM as an example, the magnitude and direction of the space vector Uout are controlled by controlling the duration of the three position-specific space vectors involved in vector synthesis. The same sector contains multiple carrier cycles (also called switching cycles or modulation cycles).

[0043] Within the same sector, the phase with the longest lower bridge arm conduction time remains constant. However, in different sectors, the phase with the longest lower bridge arm conduction time varies. For example, in some sectors, phase A has the longest lower bridge arm conduction time, while in others, phase C has the longest. Therefore, when determining the order of the three-phase lower bridge arm conduction times over a carrier cycle, one can first determine the sector where the three-phase inverter output voltage is located to identify the phase with the longest lower bridge arm conduction time. Then, the conduction times of the other two phases are obtained and compared to determine the order of the three-phase lower bridge arm conduction times within the current sector.

[0044] When sampling the phase current of a phase, if the conduction time of the lower bridge arm of that phase is less than the sampling window time Tsample, the current sampling of that phase will be inaccurate. Furthermore, even if the conduction time of the lower bridge arm of that phase is greater than or equal to Tsample, after deducting the time occupied by the current rise noise caused by the instant the lower bridge arm turns on and the time occupied by the current disturbance noise caused by the switching action of other phases, several periods with essentially no current fluctuations (current fluctuations less than a preset value are considered essentially no fluctuations) remain. If the duration of each period with essentially no current fluctuations is less than Tsample, the current sampling of that phase will still be inaccurate. Based on this, this embodiment of the invention improves upon the existing three-resistor sampling scheme by considering all periods in which the state of "the current of the two phases with the longest lower bridge arm conduction time is essentially no fluctuation when both lower bridge arms are on" with a duration greater than or equal to Tsample as sampleable periods. Sampling the current of the two phases with the longest lower bridge arm conduction time during any sampleable period obviously ensures sampling accuracy.

[0045] The following example uses a five-segment SVPWM to illustrate the concept, assuming that under one carrier cycle... Figure 1 The drive signals for the upper arm of phase A, the lower arm of phase A, the upper arm of phase B, the lower arm of phase B, the upper arm of phase C, and the lower arm of phase C are respectively as follows: Figure 4a As shown in PWMAH, PWMAL, PWMBH, PWMBL, PWMCH, and PWMCL, it is clear that the conduction time of the lower bridge arm of phase C is greater than that of the lower bridge arm of phase B, which is greater than that of the lower bridge arm of phase A. The waveforms of the currents in phases A, B, and C are as follows: Figure 4a As shown in Ia, Ib, and Ic, in the first half of the cycle, when both Ib and Ic are greater than 0, after removing the periods with fluctuations in Ib and Ic, there are three periods with basically no fluctuations in Ib and Ic: ①, ②, and ③. Assuming that only the duration of period ② is greater than or equal to Tsample, then period ② is the sampleable period. Figure 4a In the diagram, Tpwm represents the carrier period, and the dashed lines on Ia, Ib, and Ic represent the current fluctuations.

[0046] To give another example, still using a five-segment SVPWM, suppose the waveforms of the drive signals PWMAH, PWMAL, PWMBH, PWMBL, PWMCH, and PWMCL in one carrier cycle are as follows: Figure 4b As shown in the figure, the sequence of the conduction times of the three-phase lower arm is as follows: Figure 4a The waveforms of phase currents Ia, Ib, and Ic are consistent, as shown in the figure. Figure 4b As shown in the figure, in the first half of the cycle, when both Ib and Ic are greater than 0, after removing the periods when Ib and Ic fluctuate, there are three periods when Ib and Ic are basically without fluctuation: ①, ②, and ③. Assuming that only the duration of periods ① and ③ is greater than or equal to Tsample, then periods ① and ③ are sampleable periods.

[0047] Step S02: Collect the current of the two phases with the longest conduction time of the lower bridge arm during any sampleable time period, and then use the current reconstruction method to calculate the current of the third phase.

[0048] Step S03: Generate a sampleable time period by extending the conduction time of the lower arm of the corresponding phase. During the generated sampleable time period, collect the current of the two phases with the longest conduction time of the lower arm, and then use the current reconstruction method to calculate the current of the third phase.

[0049] Specifically, when there is a sampleable period within a carrier cycle (e.g.) Figure 4a and Figure 4b If the corresponding carrier period is not present, the phase current can be directly sampled and reconstructed; if it is not present (e.g., ... Figure 4c As shown), embodiments of the present invention create such time periods by adjusting the on / off times of the corresponding lower bridge arm (e.g., Figure 4d As shown in the figure, this is to ensure the smooth and accurate execution of phase current sampling and reconstruction. Figure 4c Taking the five-segment SVPWM as an example, Figure 4c The diagram shows the waveforms of the drive signals PWMAH, PWMAL, PWMBH, PWMBL, PWMCH, and PWMCL during another carrier cycle. The order of the three-phase lower arm conduction times is shown in the diagram. Figure 4a The waveforms of phase currents Ia, Ib, and Ic are consistent, as shown in the figure. Figure 4c As shown, in the first half of the cycle, when both Ib and Ic are greater than 0, after removing the periods with fluctuations in Ib and Ic, there are three periods with basically no fluctuations in Ib and Ic: ①, ②, and ③. Assuming the duration of these three periods is less than Tsample, then there are no sampleable periods. Figure 4c The on / off time of phase A bridge arm can be adjusted to obtain the following result: Figure 4d The waveform diagram shown creates a sampleable time period ②.

[0050] Optionally, considering that five-segment SVPWM has advantages over seven-segment and three-segment SVPWM, such as longer sampling time, lower harmonic content, and fewer switching cycles, it is more suitable for three-resistor sampling schemes. Therefore, this embodiment of the invention recommends using five-segment SVPWM to control the three-phase inverter. To simplify calculations, an example satisfying the above three-resistor sampling scheme is given under five-segment SVPWM, such as... Figure 4e As shown:

[0051] Step S21: During the control of the three-phase inverter using the SVPWM strategy, determine whether Tpwm-2*Tmax is greater than Tsample+Tnoise. If so (e.g.) Figure 4aIf the above conditions are not met, proceed to step S22; otherwise, proceed to step S23.

[0052] Step S22: Starting from time Tpwm / 2, the current of the two phases with the longest lower bridge arm conduction time is collected, and then the current of the third phase is calculated using the current reconstruction method; Tpwm represents the switching cycle; Tmax represents the upper bridge arm conduction time of the phase with the shortest lower bridge arm conduction time in the first half of the cycle; Tnoise represents the time during which the current fluctuation of any phase lower bridge arm is greater than or equal to the preset value after conduction in the first half of the cycle.

[0053] Step S23: Determine if Tmax - Tmiddle is greater than Tsample + Tnoise. If so (e.g.) Figure 4b (as shown), proceed to step S24; if not (e.g.) Figure 4c (As shown), proceed to step S25;

[0054] Step S24: Start sampling the three resistors from time Tmiddle + (Tmax - Tmiddle) / 2. Tmiddle represents the conduction time of the upper bridge arm of the phase in the middle of the lower bridge arm conduction time in the first half of the cycle. Among them, the upper and lower bridge arms of the same phase conduct complementaryly, and Tpwm - the conduction time of the lower bridge arm of a certain phase = the conduction time of the lower bridge arm of that phase.

[0055] Step S25: Generate a sampleable time period by extending the conduction time of the lower arm of the corresponding phase (e.g., Figure 4d As shown in the figure, three-resistor sampling begins at time Tpwm / 2.

[0056] The three-resistor sampling method disclosed above is applied to the control of a three-phase inverter using an SVPWM strategy. This process involves current loop control based on the sampled and reconstructed three-phase currents, followed by control of the three-phase output voltage based on the current loop. Simulation comparisons reveal that: on the one hand, this process can improve sampling accuracy; on the other hand, because this process only limits the PWM output under specific operating conditions (i.e., when there is no sampleable period in the current carrier cycle) (step S03 essentially limits the phase voltage output), and does not limit the PWM output under all operating conditions, this process can output higher phase voltages, thus significantly improving voltage utilization.

[0057] The above describes how to perform three-resistance sampling by connecting sampling resistors in series on each of the three lower bridge arms of a three-phase inverter. Alternatively, sampling resistors can also be connected in series on each of the three upper bridge arms of a three-phase inverter for three-resistance sampling, such as... Figure 5 As shown. Since the upper and lower bridge arms of the same phase are complementary in conduction, the corresponding three-resistance sampling method can be obtained by connecting sampling resistors in series on the three upper bridge arms of the three-phase inverter for three-resistance sampling, as follows. Figure 6 As shown, it includes:

[0058] Step S11: During the control of the three-phase inverter using the Space Vector Pulse Width Modulation (SVPWM) strategy, determine whether there is at least one sampleable time period under the current carrier cycle. If yes, proceed to step S12; otherwise, proceed to step S13. The sampleable time period refers to a period whose duration is greater than or equal to Tsample; Tsample represents the sampling window time; the preset state refers to a situation where, when the upper arms of the two phases with the longest upper arm conduction time are fully on, the current fluctuations of both phases are less than a preset value.

[0059] Step S12: Collect the current of the two phases with the longest conduction time of the upper bridge arm during any sampleable time period, and then use the current reconstruction method to calculate the current of the third phase.

[0060] Step S13: Generate a sampleable time period by extending the conduction time of the upper arm of the corresponding phase. Under the generated sampleable time period, collect the current of the two phases with the longest conduction time of the upper arm, and then use the current reconstruction method to calculate the current of the third phase.

[0061] Optionally, the SVPWM strategy is a five-segment SVPWM strategy.

[0062] Furthermore, this invention also discloses a three-resistor sampling system, comprising: a control unit and sampling resistors connected in series in the three lower bridge arms of a three-phase inverter; the control unit stores a program, which, when executed, performs any of the above-disclosed applications... Figure 1 The circuit shown uses a three-resistor sampling method.

[0063] This invention also discloses another three-resistor sampling system, comprising: a control unit and sampling resistors connected in series in the three upper arms of a three-phase inverter; the control unit stores a program, which, when executed, performs any of the above-disclosed applications... Figure 5 The circuit shown uses a three-resistor sampling method.

[0064] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the systems disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple; relevant parts can be referred to the method section.

[0065] For system embodiments, since they basically correspond to method embodiments, the description is relatively simple; relevant details can be found in the descriptions of the method embodiments. The apparatus embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0066] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the embodiments of the invention. Therefore, the embodiments of the invention are not to be limited to the embodiments shown herein, but are to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A three-resistance sampling method, characterized in that, include: In the process of controlling a three-phase inverter using the Space Vector Pulse Width Modulation (SVPWM) strategy, it is determined whether there is at least one sampleable time period under the current carrier cycle. Each of the three lower bridge arms of the three-phase inverter is connected in series with a sampling resistor. The sampleable time period refers to a period in which the duration of a preset state is greater than or equal to Tsample, where Tsample represents the sampling window time. The preset state refers to a situation where, when the lower bridge arms of the two phases with the longest conduction time are both on, the current fluctuations of those two phases are both less than a preset value. If so, the current of the two phases with the longest conduction time of the lower bridge arm is collected during any sampleable period, and then the current of the third phase is calculated using the current reconstruction method; If not, a sampleable period is generated by extending the conduction time of the lower arm of the corresponding phase. During the generated sampleable period, the current of the two phases with the longest conduction time of the lower arm is collected, and then the current of the third phase is calculated by the current reconstruction method. Before determining whether at least one sampleable time period exists in the current carrier period, the method further includes: Determine the sector in which the three-phase inverter output voltage is located; Determine the order of the conduction time of the lower three-phase lower arm in the current sector.

2. The three-resistance sampling method according to claim 1, characterized in that, The SVPWM strategy is a five-segment SVPWM strategy.

3. The three-resistance sampling method according to claim 2, characterized in that, Determine whether there is at least one sampleable period in the current carrier cycle; if so, collect the current of the two phases with the longest conduction time of the lower bridge arm in any sampleable period, and then use the current reconstruction method to calculate the current of the third phase. If not, a sampleable period is generated by extending the conduction time of the lower arm of the corresponding phase. During this sampleable period, the currents of the two phases with the longest lower arm conduction times are collected. Then, the current of the third phase is calculated using the current reconstruction method, including: Determine whether Tpwm-2*Tmax is greater than Tsample+Tnoise; if so, start collecting the current of the two phases with the longest conduction time of the lower bridge arm from time Tpwm / 2, and then use the current reconstruction method to calculate the current of the third phase; if not, determine whether Tmax-Tmiddle is greater than Tsample+Tnoise. If satisfied, the current of the two phases with the longest conduction time in the lower arm is collected starting from time Tmiddle + (Tmax - Tmiddle) / 2, and then the current of the third phase is calculated using the current reconstruction method; if not satisfied, a sampleable period is generated by extending the conduction time of the lower arm of the corresponding phase, and the current of the two phases with the longest conduction time in the lower arm is collected starting from time Tpwm / 2, and then the current of the third phase is calculated using the current reconstruction method. Where Tpwm represents the modulation period; Tmiddle represents the upper arm conduction time of the phase with the middle lower arm conduction time in the first half of the cycle; Tmax represents the upper arm conduction time of the phase with the shortest lower arm conduction time in the first half of the cycle; and Tnoise represents the time during which the current fluctuation of any phase's lower arm conducts after conduction is greater than or equal to the preset value in the first half of the cycle.

4. A three-resistance sampling method, characterized in that, include: In the process of controlling a three-phase inverter using the Space Vector Pulse Width Modulation (SVPWM) strategy, it is determined whether there is at least one sampleable time period under the current carrier cycle. Each of the three upper arms of the three-phase inverter is connected in series with a sampling resistor. The sampleable time period refers to a period in which the duration of a preset state is greater than or equal to Tsample, where Tsample represents the sampling window time. The preset state refers to a situation where, when the upper arms of the two phases with the longest conduction time are both on, the current fluctuations of those two phases are both less than a preset value. If so, the current of the two phases with the longest conduction time of the upper bridge arm is collected during any sampleable period, and then the current of the third phase is calculated using the current reconstruction method; If not, a sampleable period is generated by extending the conduction time of the upper arm of the corresponding phase. During the generated sampleable period, the current of the two phases with the longest upper arm conduction time is collected, and then the current of the third phase is calculated using the current reconstruction method. Before determining whether at least one sampleable time period exists in the current carrier period, the method further includes: Determine the sector in which the three-phase inverter output voltage is located; Determine the order of conduction time of the upper arm of the three phases in the current sector.

5. The three-resistance sampling method according to claim 4, characterized in that, The SVPWM strategy is a five-segment SVPWM strategy.

6. A three-resistance sampling system, characterized in that, include: The control unit and the sampling resistors connected in series in the three lower bridge arms of the three-phase inverter; The control unit stores a program that executes the three-resistance sampling method as described in any one of claims 1 to 3 when the program is run.

7. A three-resistance sampling system, characterized in that, include: The control unit and the sampling resistors connected in series in the three upper arms of the three-phase inverter; The control unit stores a program that executes the three-resistance sampling method as described in any one of claims 4 to 5 when the program is run.

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