一种适用于超低输入电压工作的负压驱动电路
By incorporating a built-in negative voltage charge pump circuit and a soft-start circuit, the problem of increased on-resistance of the load switch under low input voltage is solved, achieving low power consumption and stable PMOS drive.
CN115800984BActive Publication Date: 2026-07-17WUXI MINGXIN MICROELECTRONICS CO LTD
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- WUXI MINGXIN MICROELECTRONICS CO LTD
- Filing Date
- 2022-12-12
- Publication Date
- 2026-07-17
AI Technical Summary
Technical Problem
Existing load switches have difficulty effectively driving external NMOS at input voltages below 1V, resulting in a significant increase in on-resistance and failing to meet low power consumption requirements.
Method used
A built-in negative voltage charge pump circuit is used to generate a negative voltage GATE. Combined with a soft-start circuit and a GATE negative voltage clamping circuit, it ensures that the PMOS transistor maintains a sufficient Vsg voltage under low input voltage, thereby reducing conduction losses.
Benefits of technology
It achieves low on-resistance and low power consumption at an input voltage of 1V, effectively driving external PMOS load switches and avoiding device damage.
✦ Generated by Eureka AI based on patent content.
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Figure CN115800984B_ABST
Abstract
本发明公开一种适用于超低输入电压工作的负压驱动电路，属于电子电路领域，包括负压电荷泵电路、软启动电路和GATE负压钳位电路。所述负压电荷泵电路内置功率PMOS管；在1V输入电压情况下，通过所述负压电荷泵电路产生负压的GATE电压，使得功率PMOS管有足够的Vsg电压，使其处在完全导通状态；所述软启动电路用于开通瞬间控制开通速度，防止瞬态大电流对系统造成伤害；所述GATE负压钳位电路用于钳住Vsg的电压使其低于功率PMOS管的栅源极的耐压。本发明可支持低至1V的工作电压，且增加超小的导通电阻和功率损耗。
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