An embedded hardware anti-lookup table circuit

Abstract

The application discloses an embedded hardware reverse lookup table circuit, which comprises a lookup table circuit, a 1 multi-selector control signal MUX_sel and a 1 clock signal Clock, M multi-selectors and M D flip-flops, wherein the lookup table circuit is used for converting an m-bit signal into an M-bit signal, the input signal of the lookup table circuit is R[1:m], the output of the lookup table circuit is X[1:M], the lookup value signal of the lookup table circuit is S[1:M], the D flip-flop is used for outputting Q[1:M], and the Q[1:M] is sequentially subjected to XOR operation with the output X[1:M] of the lookup table circuit. The application does not need a memory and a read-write circuit thereof, does not need an operation and analysis processor, and only needs a small amount of logic units to complete reverse table, realizes the function of real-time online detection, and improves the convenience of online detection.

Description

Technical Field

[0001] This invention relates to the field of smart hardware technology, and in particular to an embedded hardware reverse lookup table circuit. Background Technology

[0002] In scientific research and engineering experiments, it is often necessary to deduce physical quantities from measured values. For example, the phase shift angle of a signal can be deduced from the measured value of phase delay or time delay, or the physical length of signal transmission can be deduced. In the laboratory, the deduction process can be easily achieved by using software.

[0003] However, industrial online monitoring also requires the measurement and analysis of phase delay or time delay. For example, the phase shift angle of a signal can be calculated based on the delay time of SAW and ultrasonic signals; or the temperature value can be calculated based on the resistance measurement values ​​of platinum resistance thermometers PT1000 and PT100. However, since the above applications use specialized testing instruments for calculation, they cannot be applied online in real time, making online measurement very inconvenient.

[0004] To address this issue, an embedded hardware reverse lookup table circuit is provided. Summary of the Invention

[0005] The embedded hardware reverse lookup table circuit described in this invention does not require a memory and its read / write circuits, nor does it require an arithmetic and analysis processor. It only requires a small number of logic units to complete the reverse lookup table, realizing the function of real-time online detection, improving the convenience of online detection, and solving the problems mentioned in the background art.

[0006] To achieve the above objectives, the present invention provides the following technical solution:

[0007] The present invention discloses an embedded hardware reverse lookup table circuit, the reverse lookup circuit comprising: a lookup table circuit, the lookup table circuit being used to convert an m-bit signal into an M-bit signal, the input signal of the lookup table circuit being R[1:m], the output of the lookup table circuit being X[1:M], and the lookup value signal of the lookup table circuit being S[1:M].

[0008] One multiplexer control signal MUX_sel and one clock signal Clock;

[0009] M multiplexers and M D flip-flops, wherein the D flip-flops are used to output Q[1:M], and Q[1:M] are XORed with the output X[1:M] of the lookup table circuit in sequence.

[0010] Preferably, the lookup table circuit, based on the input signal R[1:m] value, causes X[1:M] to output the corresponding value in the lookup table.

[0011] Preferably, after performing an XOR operation between Q[1:M] and the output X[1:M] of the lookup table circuit, an XOR value is obtained. The XOR value is then subjected to an OR operation to obtain an OR value. The result of the OR value is represented by "0" or "1".

[0012] Preferably, when the result of the OR operation is "0", it indicates that the found value is not true; when the result of the OR operation is "1", it indicates that the found value is true.

[0013] Preferably, the logic values ​​of the multiplexer control signal MUX_sel are represented by "0" or "1" respectively. The logic values ​​of the multiplexer control signal MUX_sel are used to latch the lookup value signal S[1:M] onto the input of the D flip-flop, or to form the D flip-flop into a shift register.

[0014] Preferably, when the multiplexer control signal MUX_sel is logic value 0, the lookup value signals S[1:M] are respectively input to the input terminals of the corresponding D flip-flops, and when the clock signal Clock is valid, it is latched onto the corresponding D flip-flops;

[0015] When the multiplexer control signal MUX_sel is logic 1, the D flip-flop is configured as a shift register.

[0016] Preferably, Q[1:M] is the latched value of the lookup value signal S[1:M], and the output X[1:M] value of the lookup table circuit and Q[1:M] are respectively subjected to a bitwise logical XOR operation to obtain the XOR array expression:

[0017] X[i]XOR Q[i];

[0018] In the formula, (i∈(1,M).

[0019] Preferably, the output of the XOR array is the input of the OR gate G_or, then the logical OR operation expression is as follows:

[0020]

[0021] In the formula, “∨” represents a logical OR operation, and the result of the operation is represented by “0” or “1” respectively.

[0022] The beneficial effects of this invention are as follows:

[0023] The embedded hardware reverse lookup table circuit described in this invention, compared with the existing method of using professional testing instruments for calculation, not only eliminates the need for memory and read / write circuits, but also eliminates the need for arithmetic and analysis processors. It only requires a small number of logic units to complete the reverse lookup table, realizing the function of real-time online detection and improving the convenience of online detection. Attached Figure Description

[0024] Figure 1 This is a schematic diagram of an embedded hardware reverse lookup table circuit according to the present invention. Detailed Implementation

[0025] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0026] This invention provides an embedded hardware reverse lookup table circuit, combined with Figure 1 To illustrate, the reverse lookup table circuit includes: a lookup table circuit, which is used to convert an m-bit signal into an M-bit signal. The input signal of the lookup table circuit is R[1:m], the output of the lookup table circuit is X[1:M], and the lookup value signal of the lookup table circuit is S[1:M].

[0027] One multiplexer control signal MUX_sel and one clock signal Clock;

[0028] M multiplexers and M D flip-flops are used to output Q[1:M]. Q[1:M] is XORed with the output X[1:M] of the lookup table circuit in sequence.

[0029] The M multiplexers include: MUX1, MUX2, ..., MUXM;

[0030] The M D flip-flops include: D1, D2, ..., DM.

[0031] The lookup table circuit outputs the corresponding value in the lookup table based on the input signal R[1:m].

[0032] Example: The resistance value of the platinum resistance thermometer PT1000 to be measured is converted into binary values ​​10000010001 and 1001110010 by an AD converter. Then the lookup value signal S[1:20] = 100000100011001110010;

[0033] The logic values ​​of the multiplexer control signal MUX_sel are represented by "0" or "1" respectively. The logic values ​​of the multiplexer control signal MUX_sel are used to latch the lookup value signal S[1:M] onto the input of the D flip-flop, or to form a shift register from the D flip-flop.

[0034] When the multiplexer control signal MUX_sel is logic 0, the lookup value signals S[1:M] are input to the corresponding D flip-flops respectively. When the clock signal Clock is valid, the clock signal is latched onto the corresponding D flip-flops.

[0035] When the multiplexer control signal MUX_sel is logic 1, the D flip-flop forms a shift register. If the logic value of the multiplexer control signal MUX_sel is 0, then D[1:20] = 100000100011001110010;

[0036] After the rising edge of the clock signal Clock, Q[1:20] = 100000100011001110010, and the input values ​​of the hot code circuit and their mapping relationship are as follows:

[0037] R

[99] →10.6(℃)→1041.313(Ω). The execution logic of the lookup table circuit is as follows:

[0038] 10: row_onehot={{(813){1'b0}}, 1'b1, {(210){1'b0}}};

[0039] assign AND_res

[10] [6]=row_onehot

[10] &column_pt1000

[10] [6];

[0040] The output of the lookup table circuit is X[1:20] = 100000100011001110010.

[0041] Q[1:M] is the latched value of the lookup value signal S[1:M]. The output values ​​X[1:M] and Q[1:M] of the lookup table circuit are respectively subjected to a bitwise XOR operation. The XOR array expression is as follows:

[0042] X[i]XOR Q[i], where (i∈(1,M);

[0043] According to the XOR array expression, we have:

[0044] X[1:20]XOR Q[1:20], since Z=∑X[i]XOR Q[i]=0(i∈(1,20),

[0045] Therefore, the binary values ​​of AD are 10000010001 and 1001110010, and the corresponding input signal R[1:10] has an input value of 99, which is a decimal representation, thus the obtained mapped temperature value is 10.6℃.

[0046] Therefore, the embedded hardware reverse lookup table circuit provided by this invention, compared with the existing method of using professional testing instruments for calculation, not only eliminates the need for memory and read / write circuits, but also eliminates the need for arithmetic and analysis processors. It only requires a small number of logic units to complete the reverse lookup table, realizing the function of real-time online detection and improving the convenience of online detection.

[0047] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention, and they should all be covered within the scope of the claims and specification of the present invention.

Claims

1. An embedded hardware anti-lookup table circuit, comprising: The reverse lookup table circuit includes: a lookup table circuit, which is used to convert an m-bit signal into an M-bit signal, the input signal of the lookup table circuit is R[1:m], the output of the lookup table circuit is X[1:M], and the lookup value signal of the lookup table circuit is S[1:M]. One multiplexer control signal MUX_sel and one clock signal Clock; M multiplexers and M D flip-flops, wherein the D flip-flops are used to output Q[1:M], and Q[1:M] are XORed with the output X[1:M] of the lookup table circuit in sequence; The lookup table circuit, based on the input signal R[1:m] value, causes X[1:M] to output the corresponding value in the lookup table; The XOR operation is performed between Q[1:M] and the output X[1:M] of the lookup table circuit to obtain the XOR value. The XOR value is then ORed to obtain the OR value. The result of the OR value is represented by "0" or "1". When the result of the OR operation is "0", it means that the found value is not true; when the result of the OR operation is "1", it means that the found value is true. When the result of the OR operation is "0", it means that the output X[1:M] of the lookup table circuit does not match the latch value Q[1:M], that is, no corresponding reverse lookup relationship was found; when the result of the OR operation is "1", it means that the output X[1:M] of the lookup table circuit matches the latch value Q[1:M], that is, the corresponding reverse lookup relationship was found.

2. The embedded hardware reverse lookup table circuit according to claim 1, characterized in that, The logic values ​​of the multiplexer control signal MUX_sel are represented by "0" or "1" respectively. The logic values ​​of the multiplexer control signal MUX_sel are used to latch the lookup value signal S[1:M] onto the input of the D flip-flop, or to form the D flip-flop into a shift register.

3. The embedded hardware reverse lookup table circuit according to claim 1, characterized in that, When the multiplexer control signal MUX_sel is logic value 0, the lookup value signals S[1:M] are respectively input to the input terminals of the corresponding D flip-flops. When the clock signal Clock is valid, it is latched onto the corresponding D flip-flops. When the multiplexer control signal MUX_sel is logic 1, the D flip-flop is configured as a shift register.

4. The embedded hardware reverse lookup table circuit according to claim 1, characterized in that, Q[1:M] is the latched value of the lookup value signal S[1:M]. The output X[1:M] value of the lookup table circuit and Q[1:M] are respectively subjected to a bitwise logical XOR operation to obtain the XOR array expression: X[i] XOR Q[i]; In the formula, i∈(1,M).

5. An embedded hardware reverse lookup table circuit according to claim 4, characterized in that, The output of the XOR array is the input of the OR gate G_or, so the logical OR operation expression is as follows: ； In the formula, " The '" symbol represents a logical OR operation, and the result of the operation is represented by "0" or "1".

Images