Display panel and manufacturing method thereof

Abstract

The application discloses a display panel and a manufacturing method thereof. The display panel comprises a substrate, a thin film transistor structure, a binding trace, a binding pad and a light-emitting functional layer. The substrate comprises a display area and a pad area. The thin film transistor structure is arranged on the substrate and located in the display area. The binding trace is arranged on the substrate and located in the pad area. The binding pad is arranged on a side of the binding trace away from the substrate. The binding pad comprises a water-oxygen barrier film. The light-emitting functional layer is arranged on a side of the thin film transistor structure away from the substrate. Since the commonly used binding trace is easy to be oxidized and thus affects the conductive performance, the binding trace cannot be directly used as a metal pad. In the embodiment of the application, the water-oxygen barrier film is arranged on the binding trace. Since the surface of the binding trace is covered by the water-oxygen barrier film, the binding trace can be prevented from being corroded.

Description

Technical Field

[0001] This application relates to the field of display technology, and in particular to a display panel and a method for manufacturing the same. Background Technology

[0002] Organic light-emitting display panels are self-emissive panels with low power consumption, fast response time, high luminous efficiency, high brightness, and wide viewing angle. Because copper-containing metals have good electrical conductivity, current organic light-emitting display panel products generally use copper-containing metals as bonding traces. However, copper-containing metals are easily oxidized, affecting their conductivity; therefore, bonding traces cannot be directly used as metal pads.

[0003] Therefore, how to prevent the bonding traces from being oxidized has become an urgent technical problem to be solved. Summary of the Invention

[0004] This application provides a display panel and its manufacturing method to solve the technical problem that the bonding traces are easily oxidized.

[0005] This application provides a display panel, including:

[0006] A substrate, the substrate including a display area and a pad area;

[0007] A thin-film transistor structure is disposed on the substrate, and the thin-film transistor structure is located in the display area;

[0008] Bonding traces are disposed on the substrate, and the bonding traces are located in the pad area;

[0009] Bonding pads are disposed on the side of the bonding trace away from the substrate, wherein the bonding pads include a water and oxygen barrier film;

[0010] A light-emitting functional layer is disposed on the side of the thin-film transistor structure away from the substrate.

[0011] Optionally, in some embodiments provided in this application, the light-emitting functional layer includes an anode layer, which is connected to the thin-film transistor structure, and the material of the anode layer is the same as the material of the bonding pad.

[0012] Optionally, in some embodiments provided in this application, the bonding pad further includes a first bonding portion, a second bonding portion, and a third bonding portion. The first bonding portion is disposed on the side of the bonding trace close to the thin-film transistor structure, the second bonding portion is disposed on the side of the first bonding portion away from the bonding trace, the water and oxygen barrier film is disposed on the side of the second bonding portion away from the first bonding portion, and the third bonding portion is disposed on the side of the water and oxygen barrier film away from the second bonding portion. The anode layer includes a first anode sublayer, a second anode sublayer, a water and oxygen barrier film, and a third anode sublayer sequentially disposed on the thin-film transistor structure.

[0013] Optionally, in some embodiments provided in this application, the orthographic projection of the first anode sublayer onto the substrate covers the orthographic projection of the second anode sublayer onto the substrate.

[0014] Optionally, in some embodiments provided in this application, the first bonding portion and the first anode sublayer are made of the same material, and the material of the first bonding portion includes one of indium tin oxide, indium zinc oxide, molybdenum, nickel, niobium or titanium.

[0015] Optionally, in some embodiments provided in this application, the material of the second bonding portion is the same as the material of the second anode sublayer, and the material of the second bonding portion includes a mixture of aluminum, nickel, copper and lanthanum or an aluminum alloy.

[0016] Optionally, in some embodiments provided in this application, the material of the third anode sublayer is the same as the material of the third bonding portion, and the material of the third bonding portion includes indium tin oxide.

[0017] Optionally, in some embodiments provided in this application,

[0018] The water-oxygen barrier film and the material of the water-oxygen barrier film include metal oxides.

[0019] Optionally, in some embodiments provided in this application, the display panel further includes a passivation layer, a planarization layer, a first opening, and a second opening. The passivation layer is disposed on the substrate, and the planarization layer is disposed on the side of the passivation layer away from the substrate. The first opening penetrates the passivation layer and exposes at least a portion of the surface of the bonding trace on the side away from the substrate. The bonding pad is connected to the bonding trace through the first opening. The second opening penetrates the planarization layer and the passivation layer and exposes a portion of the surface of the thin-film transistor structure. The anode layer is connected to the thin-film transistor structure through the second opening. Correspondingly, embodiments of this application also provide a method for manufacturing a display panel, the method comprising the following steps:

[0020] A substrate is provided, the substrate including a display area and a pad area;

[0021] A thin-film transistor structure and bonding traces are formed on the substrate, wherein the thin-film transistor structure is located in the display area and the bonding traces are located in the pad area;

[0022] Bonding pads and a light-emitting functional layer are formed on the substrate, wherein the bonding pads are located on the bonding traces and include a water and oxygen barrier film, and the light-emitting functional layer is located on the thin-film transistor structure.

[0023] Optionally, in some embodiments provided in this application, the light-emitting functional layer includes an anode layer, and the steps of forming bonding pads and the light-emitting functional layer on the substrate include:

[0024] The anode layer and the bonding pads are formed on the substrate using the same mask process. The anode layer is connected to the thin-film transistor structure. The bonding pads are located on the side of the bonding traces away from the substrate. The bonding pads also include a first bonding portion, a second bonding portion, and a third bonding portion. The anode layer includes a first anode sublayer, a second anode sublayer, a water and oxygen barrier film, and a third anode sublayer, which are sequentially stacked on the thin-film transistor structure.

[0025] Optionally, in some embodiments provided in this application, the step of forming an anode layer and bonding pads on the substrate using the same mask process includes:

[0026] A first conductive metal layer and a second conductive metal layer are sequentially formed on the substrate;

[0027] The surface of the second conductive metal layer away from the first conductive metal layer is oxidized to form a barrier layer;

[0028] A third conductive metal layer is formed on the barrier layer;

[0029] The first conductive metal layer, the second conductive metal layer, the barrier layer, and the third conductive metal layer are processed using the same mask process to form the first anode sublayer, the second anode sublayer, the water and oxygen barrier film, and the third anode sublayer sequentially stacked on the thin film crystal structure, and the first bonding portion, the second bonding portion, the water and oxygen barrier film, and the third bonding portion sequentially stacked on the bonding trace.

[0030] This application provides a display panel and its manufacturing method. The display panel includes a substrate, a thin-film transistor (TFT) structure, bonding traces, bonding pads, and a light-emitting functional layer. The substrate includes a display area and a pad area. The TFT structure is disposed on the substrate and located in the display area. The bonding traces are disposed on the substrate and located in the pad area. The bonding pads are located on the side of the bonding traces away from the substrate. The bonding pads include a water-oxygen barrier film. The light-emitting functional layer is located on the side of the TFT structure away from the substrate. Since commonly used bonding traces are made of metallic materials and are easily oxidized, affecting their conductivity, they cannot be directly used as metal pads. This application embodiment provides a water-oxygen barrier film on the bonding traces to prevent water and oxygen from corroding them. Attached Figure Description

[0031] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0032] Figure 1 This is a schematic diagram of a first structure of a display panel provided in an embodiment of this application;

[0033] Figure 2 This is a schematic diagram of a second structure of the display panel provided in an embodiment of this application;

[0034] Figure 3 A flowchart illustrating the steps of a method for manufacturing a display panel according to an embodiment of this application;

[0035] Figure 4 This is a schematic diagram illustrating a method for manufacturing a display panel according to an embodiment of this application. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings. Please refer to the figures in the drawings, where the same component symbols represent the same components. The following description is based on the specific embodiments of this application shown, and should not be considered as limiting other specific embodiments not detailed herein. The term "embodiment" as used in this specification means example, illustration, or illustration.

[0037] In the description of this application, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, features defined with "first" and "second" may explicitly or implicitly include one or more of the stated features. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0038] This application provides a display panel and a method for manufacturing the same. Detailed descriptions are provided below. It should be noted that the order of description of the following embodiments is not intended to limit the preferred order of the embodiments.

[0039] The display panel provided in this application will be described in detail below through specific embodiments.

[0040] Please refer to Figure 1 , Figure 1 This is a schematic diagram of a first structure of a display panel provided in an embodiment of this application. This application provides a display panel 100, which includes a substrate 101, a thin-film transistor structure 102, bonding traces 107, bonding pads 112, and a light-emitting functional layer EL. The substrate 101 includes a display area AA and a bonding pad area PA. The thin-film transistor structure 102 is disposed on the substrate 101 and located in the display area AA. The bonding traces 107 are disposed on the substrate 101 and located in the bonding pad area PA. The bonding pads 112 are disposed on the side of the bonding traces 107 away from the substrate 101. The bonding pads 112 include a water and oxygen barrier film 1123 disposed on the bonding traces 107. The light-emitting functional layer EL is disposed on the side of the thin-film transistor structure 102 away from the substrate 101. In this application embodiment, a water and oxygen barrier film 1123 is disposed on the bonding traces 107 to prevent water and oxygen from corroding the bonding traces 107.

[0041] Please refer to Figure 2 , Figure 2This is a second structural schematic diagram of a display panel provided in an embodiment of this application. This application provides a display panel 100, which includes a substrate 101, a thin-film transistor structure 102, bonding traces 107, bonding pads 112, and a light-emitting functional layer EL. The substrate 101 includes a display area AA and a pad area PA. The thin-film transistor structure 102 is disposed on the substrate 101 and located in the display area AA. The bonding traces 107 are disposed on the substrate 101 and located in the pad area PA. The bonding pads 112 are disposed on the side of the bonding traces 107 away from the substrate 101. The bonding pads 112 include a first bonding portion 1121, a second bonding portion 1122, a water and oxygen barrier film 1123, and a third bonding portion 1124 sequentially disposed on the bonding traces 107. The light-emitting functional layer EL is disposed on the side of the thin-film transistor structure 102 away from the substrate 101.

[0042] In this embodiment, since the bonding pad 112 includes a water-oxygen barrier film 1123, the water-oxygen barrier film 1123 is provided on the bonding trace 107 to prevent water-oxygen barrier corrosion of the bonding trace 107. Furthermore, the anode layer 111 and the bonding pad 112 can be formed using the same mask process, thus reducing the number of manufacturing steps for the display panel 100 and lowering its production cost.

[0043] Furthermore, the light-emitting functional layer EL includes an anode layer 111, which is connected to the thin-film transistor structure 102. The material of the anode layer 111 is the same as the material of the bonding pads 112. The anode layer 111 and the bonding pads 112 can be formed through the same mask process, thus reducing the number of manufacturing steps for the display panel 100 and lowering the production cost of the display panel 100.

[0044] The display panel 100 further includes a light-shielding layer 103, a buffer layer 104, a gate insulating layer 105, an interlayer dielectric layer 106, a passivation layer 109, a planarization layer 110, a first opening h1, and a second opening h2. The thin-film transistor structure 102 includes an active layer 1021, a gate 1022, a source 1023, and a drain 1024. The bonding trace 107 is disposed on the same layer as the source 1023 and the drain 1024.

[0045] It should be noted that "same layer" refers to a layer structure formed using the same film deposition process to create a specific pattern, and then using the same photomask to form a single patterning process. Depending on the specific pattern, a single patterning process may include multiple exposure, development, or etching processes, and the specific pattern in the formed layer structure can be continuous or discontinuous, and these specific patterns may also be at different heights or have different thicknesses.

[0046] In some embodiments, a light-shielding layer 103 is disposed on a substrate 101. The material of the light-shielding layer 103 may be at least one of molybdenum, titanium, copper, and manganese.

[0047] A buffer layer 104 is disposed on the substrate 101 and covers the light-shielding layer 103. The material of the buffer layer 104 may be at least one of silicon oxide, silicon nitride, and silicon oxynitride.

[0048] The active layer 1021 is disposed on the side of the buffer layer 104 away from the substrate 101. The material of the active layer 1021 can be one of indium gallium zinc oxide, indium gallium tin oxide, or indium gallium zinc tin oxide. Alternatively, the active layer 1021 can also be a low-temperature polycrystalline silicon active layer or an a-Si active layer.

[0049] Oxide thin film transistors (OTFTs) have become a hot topic in thin film transistor development due to their advantages such as high carrier mobility, low power consumption, and applicability to low-frequency driving. An oxide thin film transistor refers to a thin film transistor where the active layer 1021 is formed using metal oxide semiconductors. This application uses metal oxide as the material for the active layer 1021 to improve the driving capability of the driving substrate.

[0050] The gate insulating layer 105 is disposed on the side of the active layer 1021 away from the buffer layer 104. The material of the gate insulating layer 105 may be at least one of silicon oxide, silicon nitride, and silicon oxynitride.

[0051] The gate 1022 is disposed on the side of the gate insulating layer 105 away from the active layer 1021. The material of the gate 1022 can be one of molybdenum, titanium, copper, or an alloy of them.

[0052] An interlayer dielectric layer 106 is disposed on the side of the gate 1022 away from the gate insulating layer 105. The material of the interlayer dielectric layer 106 may be at least one of silicon oxide, silicon nitride, and silicon oxynitride.

[0053] The source electrode 1023, drain electrode 1024, and bonding trace 107 are spaced apart on the interlayer dielectric layer 106. The source electrode 1023, drain electrode 1024, and bonding trace 107 can be made of molybdenum, titanium, copper, manganese, or an alloy of these materials.

[0054] The drain 1024 and the light-shielding layer 103 are connected. In this embodiment, the light-shielding layer 103 not only shields the active layer 1021 from light to prevent light from affecting its stability, but also, since the light-shielding layer 103 and the drain 1024 are electrically connected, parasitic capacitances are formed between the light-shielding layer 103, the active layer 1021, and the gate 1022 on the substrate 101 due to overlapping projections. When the display panel 100 is operating, the voltage on the drain 1024 changes with the voltage applied to the data signal line, causing the voltage on the light-shielding layer 103 to change accordingly, thus affecting the electrical performance of the active layer 1021. By connecting the light-shielding layer 103 and the source 1023 to form an equipotential connection, the voltage change on the light-shielding layer 103 can be prevented from affecting the electrical performance of the active layer 1021.

[0055] A passivation layer 109 is disposed on the side of the interlayer dielectric layer 106 away from the gate insulating layer 105. A first opening h1 penetrates the passivation layer 109, and a bonding pad 112 is connected to a bonding trace 107 through the first opening h1. The material of the passivation layer 109 can be at least one of silicon oxide, silicon nitride, and silicon oxynitride.

[0056] The planarization layer 110 is disposed on the side of the passivation layer 109 away from the interlayer dielectric layer 106 and located in the display area AA. The second opening h2 penetrates through the planarization layer 110 and the passivation layer 109, and the anode layer 111 is connected to the drain electrode 1024 through the second opening h2. The material of the planarization layer 110 can be an organic resin.

[0057] It should be noted that, in the embodiments of this application, the thin film transistor structure 102 can be a top-gate thin film transistor structure or a bottom-gate thin film transistor structure. The embodiments of this application use the top-gate thin film transistor structure as an example for illustration, but are not limited thereto.

[0058] The first bonding portion 1121 is disposed on the side of the bonding trace 107 away from the thin-film transistor structure 102. The second bonding portion 1122 is disposed on the side of the first bonding portion 1121 away from the bonding trace 107. The third bonding portion 1124 is disposed on the side of the water-oxygen barrier film 1123 away from the second bonding portion 1122.

[0059] In some embodiments, the water-oxygen barrier film 1123 is formed by contacting oxygen with the surface of the second bonding portion 1122 away from the first bonding portion 1121. That is, the formation of the water-oxygen barrier film 1123 is related to the material properties of the second bonding portion 1122, which includes a dense metal oxide formed in an oxygen atmosphere, and simultaneously has the ability to block water and oxygen intrusion without affecting the conductivity of the metal pads.

[0060] In some embodiments, the water-oxygen barrier film 1123 includes an aluminum oxide film. In this embodiment, the surface of the second bonding portion 1122 away from the first bonding portion 1121 comes into contact with oxygen to form the water-oxygen barrier film 1123. The water-oxygen barrier film 1123 is used to prevent oxygen from further entering the film layer below the display panel 100 and corroding the bonding traces 107.

[0061] In some embodiments, the thickness of the water-oxygen barrier film 1123 is less than 500 angstroms. For example, the thickness of the water-oxygen barrier film 1123 can be any one of 50 angstroms, 100 angstroms, 150 angstroms, 200 angstroms, 300 angstroms, 550 angstroms, and 500 angstroms. In the embodiments of this application, the thickness of the water-oxygen barrier film 1123 is set to be less than 500 angstroms, so that the water-oxygen barrier film 1123 can both prevent oxygen from further entering the film layer below the display panel 100 and corroding the bonding traces 107, and will not affect the conductivity of the bonding pads 112.

[0062] It should be noted that, in the embodiments of this application, since the water and oxygen barrier film 1123 is very thin, when there is a potential difference between the second binding part 1122 and the third binding part 1124, electrons in the second binding part 1122 can still be excited to move in a directional manner. Because the oxide film is thin, it cannot provide a large resistance, and the conductivity does not change much.

[0063] In some embodiments, the display panel 100 may further include a storage capacitor C, which includes a lower electrode c1 and an upper electrode c2 disposed opposite to each other. The lower electrode c1 and the light-shielding layer 103 are disposed on the same layer, and the upper electrode c2 and the active layer 1021 are disposed on the same layer. That is, the lower electrode c1 and the light-shielding layer 103 are formed using the same mask, and the upper electrode c2 and the active layer 1021 are formed using the same mask process. This embodiment simplifies the manufacturing steps of the display panel 100 and reduces its production cost by configuring the lower electrode c1 and the light-shielding layer 103 and the upper electrode c2 and the active layer 1021 on the same layer.

[0064] The anode layer 111 includes a first anode sublayer 1111, a second anode sublayer 1112, a water-oxygen barrier film 1113, and a third anode sublayer 1114 sequentially disposed on the thin-film transistor structure 102. The second anode sublayer 1112 is attached to the side of the first anode sublayer 1111 away from the thin-film transistor structure 102, and the orthogonal projection of the second anode sublayer 1112 on the substrate 101 covers the orthogonal projection of the first anode sublayer 1111 on the substrate 101. The third anode layer 1114 is attached to the side of the second anode sublayer 1112 away from the first anode sublayer 1111. The first bonding portion 1121 and the first anode sublayer 1111 can be made of the same material. The material of the first bonding portion 1121 includes one of indium tin oxide, indium zinc oxide, molybdenum, nickel, niobium, or titanium. Preferably, the material of the first bonding portion 1121 is titanium. Because titanium is a hydrogen-absorbing material, hydrogen atoms can be stored in the interstitial spaces of the titanium lattice or react with titanium to form hydrides (TiHx; x = 1.5–1.99). Once hydrogen atoms enter titanium, a higher activation energy is required for them to escape. Therefore, when hydrogen atoms in the interlayer dielectric layer 106, passivation layer 109, or planarization layer 110 begin to diffuse due to high temperatures, the diffused hydrogen atoms will enter the titanium. Furthermore, since the anode layout occupies a large portion of the display area, titanium can effectively absorb hydrogen atoms, reducing their diffusion into the active layer of the thin-film transistor structure 102, thereby improving the stability of the TFT.

[0065] In this embodiment, since the second anode sublayer 1112 is attached to the side of the first anode sublayer 1111 away from the thin-film transistor structure 102, and the orthogonal projection of the first anode sublayer 1111 on the substrate 101 covers the orthogonal projection of the second anode sublayer 1112 on the substrate 101, direct contact between the second anode sublayer 1112 and the water vapor evaporated in the planarization layer 110 to generate hydrogen ions is avoided. These hydrogen ions would diffuse into the thin-film transistor structure, causing the thin-film transistor structure 102 to fail. Therefore, the display panel 100 in this embodiment does not need to introduce a first alumina protective layer and a second alumina protective layer above the thin-film transistor structure 102 to protect the active layer 1021, solving the technical problems of reduced product yield and high cost caused by introducing alumina.

[0066] The material of the second bonding portion 1122 and the material of the second anode sublayer 1112 can be the same. The material of the second bonding portion 1122 includes an alloy of aluminum, nickel, copper, and lanthanum (ANCL) or an aluminum alloy. ANCL is an alloy with aluminum as the main component. ANCL has relatively stable performance and can improve the black spot problem of the display panel 100. Furthermore, aluminum metal forms a dense aluminum oxide film in an oxygen atmosphere, preventing moisture from penetrating the active layer 1021 of the thin-film transistor structure 102, thereby improving the stability of the TFT.

[0067] The water and oxygen barrier film 1113 and the water and oxygen barrier film 1123 can be made of the same material, and the material of the water and oxygen barrier film 1113 and the water and oxygen barrier film 1123 can include dense alumina.

[0068] The material of the third anode sublayer 1114 is the same as that of the third bonding portion 1124, and the material of the third bonding portion 1124 includes indium tin oxide. This prevents the film thickness from decreasing during the water washing process after the formation of the third anode sublayer 1114.

[0069] The light-emitting functional layer EL also includes a pixel definition layer 113, a light-emitting layer 114, and a cathode layer 115. The pixel definition layer 113 is disposed on the anode layer 111, and includes an opening that exposes the surface of the anode layer 111. The light-emitting layer 114 is disposed within the opening. The cathode layer 115 is disposed on the side of the pixel definition layer 113 away from the anode layer 111, and covers both the pixel definition layer 113 and the light-emitting layer 114.

[0070] This application provides a display panel, which includes a substrate, a thin-film transistor (TFT) structure, bonding traces, bonding pads, and a light-emitting functional layer. The substrate includes a display area and a pad area. The TFT structure is disposed on the substrate and located in the display area. The bonding traces are disposed on the substrate and located in the pad area. The bonding pads are disposed on the side of the bonding traces away from the substrate. Each bonding pad includes a first bonding portion, a second bonding portion, a water-oxygen barrier film, and a third bonding portion sequentially disposed on the bonding traces. The light-emitting functional layer is disposed on the side of the TFT structure away from the substrate. Since copper is commonly used as the material for bonding traces, and copper is easily oxidized, affecting its conductivity, bonding traces cannot be directly used as metal pads. This application provides bonding pads on the bonding traces, and because the bonding pads include a water-oxygen barrier film, water and oxygen corrosion of the bonding traces can be prevented. Furthermore, the anode layer and bonding pads can be formed through the same mask process, thus reducing one mask process and lowering the production cost of the display panel. In addition, the orthogonal projection of the first anode sublayer onto the substrate covers the orthogonal projection of the second anode sublayer onto the substrate, avoiding direct contact between the second anode sublayer and the planarization layer to generate hydrogen ions and cause thin film transistor structure failure. Therefore, the display panel of this application embodiment does not need to introduce a first alumina protective layer and a second alumina protective layer above the thin film transistor structure to protect the active layer 1021, solving the technical problem of reduced product yield caused by the introduction of alumina.

[0071] Accordingly, this application also provides a method for manufacturing a display panel. Please refer to the following embodiments. Figure 3 and Figure 4 , Figure 3 A flowchart illustrating the steps of a method for manufacturing a display panel according to an embodiment of this application. Figure 4 This is a schematic diagram illustrating a method for manufacturing a display panel according to an embodiment of this application. The method for manufacturing the display panel includes the following steps:

[0072] Step B001: Provide a substrate 101, which includes a display area AA and a pad area PA.

[0073] In some embodiments, substrate 101 may be a glass substrate 101.

[0074] Following step B001, the following is included:

[0075] A metal layer is deposited on the substrate 101 and patterned to form a light-shielding layer 103.

[0076] A buffer layer 104 is deposited on the substrate 101.

[0077] Step B002: A thin film transistor structure 102 and a bonding trace 107 are formed on the substrate 101. The thin film transistor structure 102 is located in the display area AA, and the bonding trace 107 is located in the pad area PA.

[0078] Specifically, a metal oxide semiconductor material is deposited on the buffer layer 104 and patterned to form an active layer 1021.

[0079] An insulating layer and a conductive metal layer are sequentially formed on the active layer 1021. Using a photolithography process, the gate 1022 is first etched out, and then the gate insulating layer 105 is etched out using the gate 1022 as a self-alignment. The gate insulating layer 105 exists only below the film layer with the gate 1022; the insulating layer is etched out in all other places.

[0080] The entire surface is subjected to plasma treatment. For the active layer 1021, which is not protected by the gate 1022 and the gate insulating layer 105, the resistance is significantly reduced after the treatment, forming a doped region. The active layer 1021 corresponding to the gate 1022 maintains semiconductor characteristics and serves as the channel of the active layer 1021.

[0081] An interlayer dielectric layer 106 is formed on the substrate 101, and contact holes are defined using photolithography, and first contact holes, second contact holes, and third contact holes are formed by etching.

[0082] A conductive metal layer is deposited on the interlayer dielectric layer 106, followed by photolithography and etching to form the source 1023, drain 1024, and bonding traces 107. The active layer 1021, gate 1022, source 1023, and drain 1024 constitute the thin-film transistor structure 102.

[0083] A passivation layer 109 is formed on the interlayer dielectric layer 106, and a first opening h1 is etched to form the first opening h1, which exposes a portion of the surface of the bonding trace 107 away from the substrate 101.

[0084] A planarization layer 110 is formed and patterned on the passivation layer 109, and a second opening h2 is formed by etching. The planarization layer 110 corresponds to the display area AA.

[0085] Step B003: A bonding pad 112 and a light-emitting functional layer EL are formed on the substrate 101, wherein the bonding pad 112 is located on the bonding trace 107 and includes a water and oxygen barrier film 1123, and the light-emitting functional layer EL is located on the thin film transistor structure 102.

[0086] The light-emitting functional layer EL includes an anode layer 111. The steps of forming bonding pads 112 and the light-emitting functional layer EL on the substrate 101 include:

[0087] An anode layer 111 and bonding pads 112 are formed on a substrate 101 using the same masking process. The anode is connected to the thin-film transistor structure 102. The bonding pads 112 are located on the side of the bonding traces 107 away from the substrate 101. The bonding pads 112 include a first bonding portion 1121, a second bonding portion 1122, a water and oxygen barrier film 1123, and a third bonding portion 1124. The anode layer 111 includes a first anode sublayer 1111, a second anode sublayer 1112, a water and oxygen barrier film 1113, and a third anode sublayer 1114, which are sequentially stacked on the thin-film transistor structure 102.

[0088] In some embodiments, step B003 includes:

[0089] A first conductive metal layer and a second conductive metal layer are sequentially formed on the substrate 101.

[0090] The surface of the second conductive metal layer is oxidized away from the first conductive metal layer to form a barrier layer.

[0091] Specifically, the substrate with the first conductive metal layer and the second conductive metal layer fabricated is placed in a separate vacuum chamber, and oxygen is used to oxidize the side of the second conductive metal layer away from the first conductive metal layer to form a dense metal oxide film, i.e., a barrier layer.

[0092] A third conductive metal layer is formed on the barrier layer.

[0093] The first conductive metal layer, the second conductive metal layer, the barrier layer, and the third conductive metal layer are processed by the same mask process to form a first anode sublayer 1111, a second anode sublayer 1112, a water and oxygen barrier film 1113, and a third anode sublayer 1114 sequentially stacked on the thin film transistor structure 102, and a first bonding portion 1121, a second bonding portion 1122, a water and oxygen barrier film 1123, and a third bonding portion 1124 sequentially stacked on the bonding trace 107.

[0094] Next, the step of forming bonding pads 112 and light-emitting functional layer EL on substrate 101 further includes forming light-emitting layer 114 on anode layer 111 and forming cathode layer 115 on light-emitting layer 114, wherein anode layer 111, light-emitting layer 114 and cathode layer 115 constitute light-emitting functional layer EL.

[0095] This application provides a method for manufacturing a display panel. The method includes providing a substrate, the substrate including a display area and a pad area; forming a thin-film transistor structure and bonding traces on the substrate, the thin-film transistor structure being located in the display area and the bonding traces being located in the pad area; forming an anode layer and bonding pads on the substrate using the same masking process, the anode being connected to the thin-film transistor structure, and the bonding pads being disposed on the side of the bonding traces away from the substrate, wherein the bonding pads include a first bonding portion, a second bonding portion, a water and oxygen barrier film, and a third bonding portion; forming a light-emitting layer on the anode layer; and forming a cathode layer on the light-emitting layer, the anode layer, the light-emitting layer, and the cathode layer constituting a light-emitting functional layer. In the display panel manufacturing method provided in this application, bonding pads are provided on the bonding traces, and the bonding pads and bonding traces constitute metal pads for bonding driver chips that process information for the display panel. Furthermore, since the surface of the bonding traces is covered by the bonding pads, corrosion of the bonding traces can be prevented. Moreover, the anode layer and bonding pads can be formed using the same masking process, thus reducing the number of manufacturing steps for the display panel and lowering the production cost.

[0096] In summary, although the present application has disclosed the preferred embodiments as described above, the above preferred embodiments are not intended to limit the present application. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be determined by the scope defined in the claims.

Claims

1. A display panel, characterized by, include: A substrate, the substrate including a display area and a pad area; A thin-film transistor structure is disposed on the substrate, and the thin-film transistor structure is located in the display area; Bonding traces are disposed on the substrate, and the bonding traces are located in the pad area; Bonding pads are disposed on the side of the bonding trace away from the substrate. The bonding pads include a second bonding portion and a water-oxygen barrier film. The second bonding portion is disposed on the side of the bonding trace away from the substrate. The water-oxygen barrier film is disposed on the side of the second bonding portion away from the bonding trace. The water-oxygen barrier film is formed by oxidizing the surface of the second bonding portion away from the bonding trace with oxygen. The thickness of the water-oxygen barrier film is less than 500 angstroms. A light-emitting functional layer is disposed on the side of the thin-film transistor structure away from the substrate.

2. The display panel of claim 1, wherein, The light-emitting functional layer includes an anode layer, which is connected to the thin-film transistor structure, and the material of the anode layer is the same as the material of the bonding pad.

3. The display panel of claim 2, wherein, The bonding pad further includes a first bonding portion and a third bonding portion. The first bonding portion is disposed on the side of the bonding trace close to the thin film transistor structure. The second bonding portion is disposed on the side of the first bonding portion away from the bonding trace. The water and oxygen barrier film is disposed on the side of the second bonding portion away from the first bonding portion. The third bonding portion is disposed on the side of the water and oxygen barrier film away from the second bonding portion. The anode layer includes a first anode sublayer, a second anode sublayer, a water and oxygen barrier film, and a third anode sublayer sequentially disposed on the thin film transistor structure.

4. The display panel of claim 3, wherein, The orthographic projection of the first anode sublayer onto the substrate covers the orthographic projection of the second anode sublayer onto the substrate.

5. The display panel of claim 3, wherein, The first bonding portion and the first anode sublayer are made of the same material, and the material of the first bonding portion includes one of indium tin oxide, indium zinc oxide, molybdenum, nickel, niobium or titanium.

6. The display panel of claim 3, wherein, The material of the second bonding part is the same as the material of the second anode sublayer, and the material of the second bonding part includes a mixture of aluminum, nickel, copper and lanthanum or an aluminum alloy.

7. The display panel according to claim 3, characterized in that, The material of the third anode sublayer is the same as the material of the third bonding portion, and the material of the third bonding portion includes indium tin oxide.

8. The display panel of claim 1, wherein, The water-oxygen barrier film and the material of the water-oxygen barrier film include metal oxides.

9. The display panel according to claim 2, characterized in that, The display panel further includes a passivation layer, a planarization layer, a first opening, and a second opening. The passivation layer is disposed on the substrate, and the planarization layer is disposed on the side of the passivation layer away from the substrate. The first opening penetrates the passivation layer and exposes at least a portion of the surface of the bonding trace away from the substrate. The bonding pad is connected to the bonding trace through the first opening. The second opening penetrates the planarization layer and the passivation layer and exposes a portion of the surface of the thin-film transistor structure. The anode layer is connected to the thin-film transistor structure through the second opening.

10. The display panel of claim 9, wherein, The thin-film transistor structure includes an active layer, a gate, a source, and a drain, and the bonding traces are disposed on the same layer as the source and the drain.

11. A method for manufacturing a display panel, characterized in that, The method for manufacturing the display panel includes the following steps: A substrate is provided, the substrate including a display area and a pad area; A thin-film transistor structure and bonding traces are formed on the substrate, wherein the thin-film transistor structure is located in the display area and the bonding traces are located in the pad area; Bonding pads and a light-emitting functional layer are formed on the substrate, wherein the bonding pads are located on the bonding traces, and the bonding pads include a second bonding portion and a water-oxygen barrier film. The light-emitting functional layer is located on the thin-film transistor structure. The second bonding portion is disposed on the side of the bonding trace away from the substrate, and the water-oxygen barrier film is disposed on the side of the second bonding portion away from the bonding trace. The water-oxygen barrier film is formed by oxidation of the surface of the second bonding portion away from the bonding trace by oxygen, and the thickness of the water-oxygen barrier film is less than 500 angstroms.

12. The method for manufacturing a display panel according to claim 11, characterized in that, The light-emitting functional layer includes an anode layer, and the step of forming bonding pads and the light-emitting functional layer on the substrate includes: The anode layer and the bonding pads are formed on the substrate using the same mask process. The anode layer is connected to the thin-film transistor structure. The bonding pads are located on the side of the bonding traces away from the substrate. The bonding pads also include a first bonding portion, a second bonding portion, and a third bonding portion. The anode layer includes a first anode sublayer, a second anode sublayer, a water and oxygen barrier film, and a third anode sublayer, which are sequentially stacked on the thin-film transistor structure.

13. The manufacturing method of a display panel according to claim 12, wherein, The steps of forming an anode layer and bonding pads on the substrate using the same mask process include: A first conductive metal layer and a second conductive metal layer are sequentially formed on the substrate; The surface of the second conductive metal layer away from the first conductive metal layer is oxidized to form a barrier layer; A third conductive metal layer is formed on the barrier layer; The first conductive metal layer, the second conductive metal layer, the barrier layer, and the third conductive metal layer are processed using the same mask process to form the first anode sublayer, the second anode sublayer, the water and oxygen barrier film, and the third anode sublayer sequentially stacked on the thin film crystal structure, and the first bonding portion, the second bonding portion, the water and oxygen barrier film, and the third bonding portion sequentially stacked on the bonding trace.

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