Operating system booting method, device, storage medium and program product

Abstract

This application provides an operating system boot method, device, storage medium, and program product. The method includes loading a first program, initializing a first CPU, setting a first kernel entry address corresponding to the first CPU based on the first program, jumping to a second security level according to a pre-stored exception vector address, entering the kernel according to the first kernel entry address, performing kernel initialization and calling a power management interface, jumping to the first security level according to the power management interface, initializing a second CPU based on the first program and passing in a second kernel entry address corresponding to the second CPU, jumping to the second security level according to a pre-stored exception vector address, entering the kernel through the initialized second CPU at the second security level according to the second kernel entry address, and waking up the initialized first CPU. The method provided in this embodiment improves the efficiency of operating system boot.

Description

Technical Field

[0001] This application relates to the field of computer technology, and in particular to an operating system boot method, device, storage medium, and program product. Background Technology

[0002] The bootloader program of an embedded system is a small program that runs before the operating system loads. This program initializes the basic hardware devices and provides an optimal hardware and software environment for the operating system to run.

[0003] In related technologies, a universal bootloader (uboot) can be used to boot embedded systems.

[0004] However, in the process of implementing this application, the inventors discovered that the prior art has at least the following problems: the above-mentioned boot startup method has a lot of redundant customized functions, resulting in long loading time and low efficiency. Summary of the Invention

[0005] This application provides an operating system boot method, device, storage medium, and program product to improve the boot efficiency of the operating system.

[0006] In a first aspect, embodiments of this application provide an operating system boot method, including:

[0007] With the first security level, load the first program, initialize the first CPU, and set the first kernel entry address corresponding to the first CPU based on the first program through the initialized first CPU.

[0008] The system jumps to the second security level based on the pre-stored exception vector address, and then enters the kernel at the second security level according to the first kernel entry address to perform kernel initialization and call the power management interface; the first security level is higher than the second security level.

[0009] According to the power management interface, the system jumps to the first security level, and based on the first program, initializes the second CPU and passes in the second kernel entry address corresponding to the second CPU.

[0010] Based on the pre-stored exception vector address, jump to the second security level, enter the kernel through the initialized second CPU at the second security level and according to the second kernel entry address, and wake up the initialized first CPU.

[0011] In one possible design, loading the first program includes:

[0012] The second program, which is embedded inside the system-on-a-chip (SOC), is executed to initialize the SOC, and the third program is loaded into the SOC's static memory.

[0013] By executing the third program, the memory driver is loaded, and the memory driver is initialized.

[0014] The first program is loaded into the preset address of the memory after driver initialization.

[0015] In one possible design, the initialization of the first CPU includes:

[0016] Set the first reset address of the first CPU;

[0017] Write the first reset address into the first register;

[0018] Set the operating frequency and clock of the first CPU;

[0019] Power on the power management unit inside the first CPU.

[0020] In one possible design, setting the first kernel entry address corresponding to the first CPU based on the first program includes:

[0021] Based on the linker, determine the entry function of the first program;

[0022] By executing the entry function, the entry address of the kernel image corresponding to the first CPU and the entry address of the device tree image are set;

[0023] The entry address of the kernel image and the entry address of the device tree image are determined as the first kernel entry address.

[0024] In one possible design, the jump to the second security level based on the pre-stored anomaly vector address includes:

[0025] By executing the entry function, the exception vector address is read and saved to the second register;

[0026] Obtain the address of the exception vector in the second register;

[0027] Based on the anomaly vector address, the system will jump from the current first security level to the second security level.

[0028] In one possible design, the method further includes:

[0029] By executing the entry function, the interrupt control register is initialized so that the first CPU can run based on the interrupt control register.

[0030] In one possible design, the initialization of the second CPU includes:

[0031] Set the second reset address of the second CPU;

[0032] Write the second reset address into the second register; the second reset address and the second reset address correspond to different CPU subscript values;

[0033] Set the operating frequency and clock of the second CPU;

[0034] Power on the internal power management unit of the second CPU.

[0035] Secondly, embodiments of this application provide an operating system boot device, comprising:

[0036] The first initialization module is used to load the first program at the first security level, initialize the first CPU, and set the first kernel entry address corresponding to the first CPU based on the first program after initialization.

[0037] The kernel initialization module is used to jump to the second security level according to the pre-stored exception vector address, and enter the kernel according to the first kernel entry address at the second security level to perform kernel initialization and call the power management interface; the first security level is higher than the second security level.

[0038] The second initialization module is used to jump to the first security level according to the power management interface, and initialize the second CPU based on the first program at the first security level and pass in the second kernel entry address corresponding to the second CPU.

[0039] The wake-up module is used to jump to the second security level according to the pre-stored exception vector address, enter the kernel through the initialized second CPU at the second security level according to the second kernel entry address, and wake up the initialized first CPU.

[0040] Thirdly, embodiments of this application provide an operating system boot device, comprising: at least one processor and a memory;

[0041] The memory stores computer-executed instructions;

[0042] The at least one processor executes computer execution instructions stored in the memory, causing the at least one processor to perform the method described in the first aspect above and various possible designs of the first aspect.

[0043] Fourthly, embodiments of this application provide a computer-readable storage medium storing computer-executable instructions, which, when executed by a processor, implement the method described in the first aspect and various possible designs of the first aspect.

[0044] Fifthly, embodiments of this application provide a computer program product, including a computer program that, when executed by a processor, implements the method described in the first aspect and various possible designs of the first aspect.

[0045] The operating system booting method, device, storage medium, and program product provided in this embodiment include: loading a first program at a first security level; initializing a first CPU; setting a first kernel entry address corresponding to the first CPU based on the first program using the initialized first CPU; jumping to a second security level according to a pre-stored exception vector address; entering the kernel at the second security level according to the first kernel entry address; performing kernel initialization and calling the power management interface; if the first security level is higher than the second security level, jumping to the first security level according to the power management interface; initializing a second CPU at the second security level based on the first program and passing in the second kernel entry address corresponding to the second CPU; jumping to the second security level according to the pre-stored exception vector address; entering the kernel at the second security level according to the second kernel entry address using the initialized second CPU; and waking up the initialized first CPU. The operating system boot method provided in this embodiment loads the bootloader program (first program) in advance. After initializing the first CPU, the bootloader program is run to quickly enter the kernel and complete kernel initialization. Then, the bootloader program can continue to run to initialize the second CPU. After the second CPU enters the kernel, it wakes up the first CPU, thus achieving successful loading of both CPUs and fast startup of the operating system, improving boot efficiency. Attached Figure Description

[0046] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0047] Figure 1 A schematic diagram of the composition model of the embedded system to be started provided in an embodiment of this application;

[0048] Figure 2A flowchart illustrating the operating system booting method provided in this application embodiment;

[0049] Figure 3 This is a schematic diagram of the structure of the operating system boot device provided in an embodiment of this application;

[0050] Figure 4 This is a hardware structure block diagram of an operating system boot device provided in an embodiment of this application. Detailed Implementation

[0051] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0052] The bootloader program, also known as the embedded system bootloader, is a small program that runs before the operating system loads. This program initializes the basic hardware devices, providing an optimal hardware and software environment for the operating system. Typically, the most commonly used operating system bootloader in the embedded field is the universal bootloader (uboot). uboot contains definitions for various platforms, is very powerful, but its implementation is also complex. During startup, it usually needs to load the customized implementation corresponding to the SoC. Various platforms require customization, such as implementing network, display, and storage functions. The more customized functions, the more complex the bootloader implementation, the longer the bootloader loading time, and the slower the operating system boot process. Therefore, for embedded systems, designing a streamlined and efficient bootloader is a pressing issue. Solving this problem can not only accelerate system startup time but also improve the user experience.

[0053] To address the aforementioned technical problems, the inventors of this application have discovered that the Bootloader program can be loaded during the SBL stage, and the first CPU can be initialized based on the loaded Bootloader program. This allows for kernel initialization via the first CPU, followed by the initialization of the second CPU. After the second CPU enters the kernel, it wakes up the first CPU, thus achieving rapid initialization of both CPUs and a fast, efficient startup of the embedded system. Specifically, the linker LDS can determine the main function entry point of the embedded system's Linux kernel. In the main entry function of the assembly code, one CPU, designated A-CPU, runs first, while the other CPU, designated B-CPU, is temporarily in a holding state. Before A-CPU runs, the exception vector address can be pre-initialized, enabling the Power State Coordination Interface (PSCI) call and setting the entry address of the Linux kernel image. This allows A-CPU to call the armv8_switch_to_el2 function to jump to the Linux kernel for execution. After entering the Linux system, A-CPU initializes the kernel. Upon entering the SMP_INIT function, it can call the PSCI interface to trap into the EL3 exception level, preparing to load B-CPU for execution. Then, the `armv8_switch_to_el2` function can be called, passing in the starting address of the B-CPU. The B-CPU boots successfully and begins running the kernel. At this point, both the A-CPU and B-CPU have successfully booted and are guiding the Linux system to complete the boot process. Based on this, this application provides an operating system boot method.

[0054] Figure 1 This is a schematic diagram of the composition model of an embedded system to be started, provided as an embodiment of this application. For example... Figure 1 As shown, Arm Trusted Firmware is a secure and trusted firmware provided by ARM. This firmware is responsible for switching between the secure world and the insecure world. The so-called secure world and insecure world can be understood as a set of execution mechanisms designed to protect the operating system.

[0055] In addition, Arm Trusted Firmware is divided into four exception levels: EL0-EL3, with EL0 being the lowest and EL3 the highest. Arm Trusted Firmware includes boot stages such as BL1 / BL2. BL1 primarily runs the vendor's internal ROM program for the SOC, hence it is also called the Bootrom program. BL2's main functions are initializing some basic modules, loading the Bootloader image, and initializing DDR memory; this stage can also be called SBL. The Bootloader is the system boot program used to boot the Linux system. The KERNEL is the Linux kernel, the core of the Linux system, composed of process management, memory management, device drivers, etc. ROOTFS is the root file system, a method and data structure used by the operating system to define files on storage devices or partitions; ROOTFS is loaded by the KERNEL. The operating system boot method provided in this application embodiment is implemented based on the ARMv8 processor architecture. This boot method is very streamlined, enabling the bootloader to execute quickly and load the Linux system for startup. For example, a System-on-a-Chip (SoC) can be a multi-core heterogeneous CPU consisting of four A76 cores and two A55 cores, where the two A55 cores run the Linux operating system and the four A76 cores run the Android operating system. The boot method provided in this application embodiment can implement a bootloader for the two A55 cores to load and run the Linux system.

[0056] It should be noted that, Figure 1 The schematic diagram shown is merely an example and does not constitute a limitation on the technical solutions provided in the embodiments of this application. As those skilled in the art will know, with the evolution of the system and the emergence of new business scenarios, the technical solutions provided in the embodiments of this application are also applicable to similar technical problems.

[0057] The technical solutions of this application will be described in detail below with specific embodiments. The following specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0058] Figure 2 This is a flowchart illustrating the operating system booting method provided in an embodiment of this application. Figure 2 As shown, the method includes:

[0059] 201. Load the first program at the first security level, initialize the first CPU, and set the first kernel entry address corresponding to the first CPU based on the first program after initialization.

[0060] The execution subject of this embodiment can be a device or component with an embedded system, such as a system-on-a-chip (SoC).

[0061] In some embodiments, loading the first program may include: initializing the SOC by executing a second program embedded within the system-on-a-chip (SOC); loading a third program into the SOC's static memory; initializing the memory by executing the third program to load the memory driver; and loading the first program into a preset address of the memory after driver initialization.

[0062] For example, taking a SoC based on the ARMV8 processor architecture as an example, after the system is powered on, the Bootrom program (second program) in the SoC starts running. The Bootrom program is a startup program embedded inside the SoC, which is used to perform basic initialization operations on the SoC, such as loading a simplified version of the Universal Flash Storage (UFS) driver, so that the system can reach an optimal operating environment.

[0063] After the Bootrom program runs, it loads the third-party program SBL image into the SOC's internal static random-access memory (SRAM). At this point, the Bootrom execution is complete, and the SBL starts running.

[0064] In SBL, driver initialization of UFS can be performed. This differs from the basic initialization of the SOC via the Bootrom program, which only requires basic configuration of the UFS. UFS is a type of memory used to store the image required by the embedded system. SBL also loads a Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM) driver; all programs can be loaded into DDR to enable normal CPU access.

[0065] In some embodiments, initializing the first CPU may include: setting a first reset address for the first CPU; writing the first reset address into a first register; setting the operating frequency and clock of the first CPU; and powering on the internal power management unit of the first CPU.

[0066] For example, after the DDR driver initialization is complete, SBL can load the Bootloader image into the specified address BOOT_IMAGE_RAM_BASE in the DDR, preparing for the Bootloader to run. Then, the A-CPU's reset address can be set to PRIMARY_BOOT_RAM_BASE, and the value of PRIMARY_BOOT_RAM_BASE can be written to the Reset Vector Base Address Register (RVBAR) using the mmio_write_32 function. At this time, the CPU index value corresponding to the RVBAR register of the first CPU (A-CPU) is 0. The RVBAR register is a register provided by the ARMv8 architecture processor, used to set the A-CPU's boot address during reset. After setting PRIMARY_BOOT_RAM_BASE to the RVBAR register, the A-CPU will start running from this address every time it boots. Then, the A-CPU's operating frequency can be set, the A-CPU's clock CLK can be enabled, and finally, the A-CPU's internal power management unit is powered on, at which point the A-CPU initialization is complete.

[0067] In some embodiments, setting the first kernel entry address corresponding to the first CPU based on the first program may include: determining the entry function of the first program based on the linker; setting the entry address of the kernel image and the entry address of the device tree image corresponding to the first CPU by executing the entry function; and determining the entry address of the kernel image and the entry address of the device tree image as the first kernel entry address.

[0068] For example, the A-CPU has been initialized and the Bootloader program has started running. The entry function of the Bootloader is determined by the LDS linker, and for example, the function name can be set to start64.

[0069] A-CPU enters the start64 function for execution, at which point it fully enters the Bootloader program for execution.

[0070] 202. Jump to the second security level according to the pre-stored exception vector address, and enter the kernel according to the first kernel entry address at the second security level to perform kernel initialization and call the power management interface; the first security level is higher than the second security level.

[0071] In some embodiments, the step of jumping to the second security level based on the pre-stored exception vector address may include: reading the exception vector address by executing the entry function and saving the exception vector address to a second register; obtaining the exception vector address in the second register; and jumping from the current first security level to the second security level based on the exception vector address.

[0072] In some embodiments, the method may further include: initializing the interrupt control register by executing the entry function to run the first CPU based on the interrupt control register.

[0073] For example, in the start64 function, the addresses of vectors el1 / el2 / el3 can be read sequentially and saved into the base address registers VBAR_EL1 / VBAR_EL2 / VBAR_EL3 respectively, so as to determine the entry address of the exception when an exception occurs later, thereby realizing the jump of the security level.

[0074] In the start64 function, the registers of the Generic Interrupt Controller (GIC) are initialized so that they can be used during the subsequent operation of the first and second CPUs.

[0075] In the start64 function, A-CPU jumps to the main function to begin execution. The main function is the entry point for A-CPU to enter the Linux kernel.

[0076] The A-CPU enters the main function and sets the entry address for the embedded system's (e.g., Linux) kernel image and the entry address for the Linux device tree blob (DTB) image. The kernel image and DTB image are typically required for Linux system startup. The DTB image contains definitions for Linux system peripherals and memory allocations, while the kernel image is the compiled Linux kernel, a bootable kernel image.

[0077] In the main function, the armv8_switch_to_el2 function can be called, passing in the set kernel image address and DTB address. Typically, the Linux system runs at the EL1 non-secure level, while the bootloader is currently at the EL3 secure level. The bootloader's armv8_switch_to_el2 function can switch from the current EL3 level to the EL1 level; specifically, switching from EL3 to EL1 can be done via the ERET instruction. At this point, the A-CPU is about to enter the Linux kernel for execution.

[0078] The A-CPU officially enters the Linux kernel, where it initializes device drivers, memory, and the file system, and calls the Linux kernel's Power State Coordination Interface (PSCI). PSCI is a power management interface specification defined by ARM, through which a second CPU, also known as the B-CPU, can run.

[0079] 203. Jump to the first security level according to the power management interface, and initialize the second CPU based on the first program at the first security level and pass in the second kernel entry address corresponding to the second CPU.

[0080] For example, the A-CPU can call the `invoke_psci_fn` function in the PSCI interface within the Linux kernel, using the SMC instruction to jump from the current EL1 level to the EL3 level, which is the Bootloader. The `invoke_psci_fn` function can be used to pass the B-CPU's entry address `SECOND_CPU_BOOT_ENTRY`. The exception vector address has already been set in the above steps, so the `boot_exception_aarch64` function can now be entered for processing.

[0081] The `boot_exception_aarch64` function implements the `std_svc_handler` function. Within `std_svc_handler`, the B-CPU's reset address `SECOND_BOOT_RAM_BASE` is set, and this address is written to the `RVBAR` register. It's important to note that the `RVBAR` register is offset by one CPU index value (1), representing the second CPU, i.e., the B-CPU's `RVBAR` register. When setting the reset address for the first CPU, i.e., the A-CPU, the `RVBAR` register corresponds to the first CPU's index value (0). After setting the B-CPU's reset address, the B-CPU can run from this address after power-on. Next, the B-CPU's operating clock is set, and the B-CPU's internal power management unit is powered on. At this point, the B-CPU initialization is complete.

[0082] 204. Based on the pre-stored exception vector address, jump to the second security level, enter the kernel through the initialized second CPU at the second security level according to the second kernel entry address, and wake up the initialized first CPU.

[0083] For example, the B-CPU calls the SMP_BOOT function in the Bootloader. In the SMP_BOOT function, the armv8_switch_to_el2 function can be called, with the B-CPU kernel entry address SECOND_CPU_BOOT_ENTRY passed in as a parameter. This allows the B-CPU to switch from the Bootloader's EL3 level to the Linux kernel's EL1 level, which means it enters the Linux kernel and starts running.

[0084] After the B-CPU enters the kernel, the Memory Manager Unit (MMU) is enabled, and the A-CPU is woken up. Thus, both CPUs are successfully loaded, and the Linux system boots normally. The bootloader execution is complete.

[0085] The operating system booting method provided in this embodiment loads the bootloader program (first program) in advance (for example, by preloading the bootloader image into DDR during the SBL stage). After initializing the first CPU, the bootloader program is run to quickly enter the kernel, complete kernel initialization, and then the bootloader program can continue to run to initialize the second CPU. After the second CPU enters the kernel, it wakes up the first CPU, thus achieving successful loading of both CPUs and fast startup of the operating system, improving boot efficiency.

[0086] Figure 3 This is a schematic diagram of the structure of an operating system boot device provided in an embodiment of this application. Figure 3 As shown, the operating system boot device 30 includes: a first initialization module 301, a kernel initialization module 302, a second initialization module 303, and a wake-up module 304.

[0087] The first initialization module 301 is used to load the first program at the first security level, initialize the first CPU, and set the first kernel entry address corresponding to the first CPU based on the first program after initialization.

[0088] The kernel initialization module 302 is used to jump to the second security level according to the pre-stored exception vector address, and enter the kernel according to the first kernel entry address at the second security level to perform kernel initialization and call the power management interface; the first security level is higher than the second security level.

[0089] The second initialization module 303 is used to jump to the first security level according to the power management interface, and initialize the second CPU based on the first program at the first security level and pass in the second kernel entry address corresponding to the second CPU.

[0090] The wake-up module 304 is used to jump to the second security level according to the pre-stored exception vector address, enter the kernel through the initialized second CPU at the second security level according to the second kernel entry address, and wake up the initialized first CPU.

[0091] The operating system boot device provided in this application preloads a bootloader program (first program). After initializing the first CPU, the bootloader program is run to quickly enter the kernel, complete kernel initialization, and then the bootloader program can continue to run to initialize the second CPU. After the second CPU enters the kernel, it wakes up the first CPU, thus achieving successful loading of both CPUs and fast startup of the operating system, improving boot efficiency.

[0092] The operating system boot device provided in this application embodiment can be used to execute the above method embodiment. Its implementation principle and technical effect are similar, and will not be repeated here.

[0093] Figure 4 This is a hardware structure block diagram of an operating system boot device provided in an embodiment of this application. The device may be a device or component with an embedded operating system.

[0094] Device 40 may include one or more of the following components: processing component 401, memory 402, power supply component 403, multimedia component 404, audio component 405, input / output (I / O) interface 406, sensor component 407, and communication component 408.

[0095] Processing component 401 typically controls the overall operation of device 40, such as operations associated with display, telephone calls, data communication, camera operation, and recording. Processing component 401 may include one or more processors 409 to execute instructions to perform all or part of the steps of the methods described above. Furthermore, processing component 401 may include one or more modules to facilitate interaction between processing component 401 and other components. For example, processing component 401 may include a multimedia module to facilitate interaction between multimedia component 404 and processing component 401.

[0096] Memory 402 is configured to store various types of data to support the operation of device 40. Examples of such data include instructions for any application or method operating on device 40, contact data, phonebook data, messages, pictures, videos, etc. Memory 402 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk.

[0097] Power supply component 403 provides power to the various components of device 40. Power supply component 403 may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power to device 40.

[0098] Multimedia component 404 includes a screen that provides an output interface between the device 40 and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touchscreen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touches, swipes, and gestures on the touch panel. The touch sensors may sense not only the boundaries of the touch or swipe action but also the duration and pressure associated with the touch or swipe operation. In some embodiments, multimedia component 404 includes a front-facing camera and / or a rear-facing camera. When the device 40 is in an operating mode, such as a shooting mode or a video mode, the front-facing camera and / or the rear-facing camera may receive external multimedia data. Each front-facing camera and rear-facing camera may be a fixed optical lens system or have focal length and optical zoom capabilities.

[0099] Audio component 405 is configured to output and / or input audio signals. For example, audio component 405 includes a microphone (MIC) configured to receive external audio signals when device 40 is in an operating mode, such as call mode, recording mode, and voice recognition mode. The received audio signals may be further stored in memory 402 or transmitted via communication component 408. In some embodiments, audio component 405 also includes a speaker for outputting audio signals.

[0100] I / O interface 406 provides an interface between processing component 401 and peripheral interface modules, such as keyboards, click wheels, buttons, etc. These buttons may include, but are not limited to, home buttons, volume buttons, power buttons, and lock buttons.

[0101] Sensor assembly 407 includes one or more sensors for providing state assessments of various aspects of device 40. For example, sensor assembly 407 may detect the on / off state of device 40, the relative positioning of components such as the display and keypad of device 40, changes in the position of device 40 or a component of device 40, the presence or absence of user contact with device 40, the orientation or acceleration / deceleration of device 40, and temperature changes of device 40. Sensor assembly 407 may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. Sensor assembly 407 may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, sensor assembly 407 may also include an accelerometer, a gyroscope, a magnetometer, a pressure sensor, or a temperature sensor.

[0102] Communication component 408 is configured to facilitate wired or wireless communication between device 40 and other devices. Device 40 can access wireless networks based on communication standards, such as WiFi, 2G, or 3G, or combinations thereof. In one exemplary embodiment, communication component 408 receives broadcast signals or broadcast-related information from an external broadcast management system via a broadcast channel. In one exemplary embodiment, communication component 408 also includes a near-field communication (NFC) module to facilitate short-range communication. For example, the NFC module may be implemented based on radio frequency identification (RFID) technology, Infrared Data Association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology, and other technologies.

[0103] In an exemplary embodiment, device 40 may be implemented by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components to perform the methods described above.

[0104] In an exemplary embodiment, a non-transitory computer-readable storage medium including instructions is also provided, such as a memory 402 including instructions, which can be executed by a processor 409 of device 40 to perform the above-described method. For example, the non-transitory computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0105] The aforementioned computer-readable storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. The readable storage medium can be any available medium accessible to a general-purpose or special-purpose computer.

[0106] An exemplary readable storage medium is coupled to a processor, enabling the processor to read information from and write information to the readable storage medium. Of course, the readable storage medium can also be a component of the processor. The processor and the readable storage medium can reside in an Application Specific Integrated Circuit (ASIC). Alternatively, the processor and the readable storage medium can exist as discrete components in the device.

[0107] Those skilled in the art will understand that all or part of the steps of the above-described method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0108] This application also provides a computer program product, including a computer program, which, when executed by a processor, implements the operating system booting method executed by the above-mentioned operating system booting device.

[0109] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A method for booting an operating system, characterized in that, include: With the first security level, load the first program, initialize the first CPU, and set the first kernel entry address corresponding to the first CPU based on the first program through the initialized first CPU. Jump to the second security level according to the pre-stored exception vector address, and enter the kernel according to the first kernel entry address at the second security level to perform kernel initialization and call the power management interface; The first security level is higher than the second security level; According to the power management interface, the system jumps to the first security level, and based on the first program, initializes the second CPU and passes in the second kernel entry address corresponding to the second CPU. Based on the pre-stored exception vector address, jump to the second security level, and enter the kernel through the initialized second CPU at the second security level, according to the second kernel entry address, and wake up the initialized first CPU; The step of jumping to the second security level based on the pre-stored anomaly vector address includes: By executing the entry function, the exception vector address is read and the exception vector address is saved to the second register. The entry function is the entry function of the first program determined by the linker. Obtain the address of the exception vector in the second register; Based on the anomaly vector address, the system will jump from the current first security level to the second security level.

2. The method according to claim 1, characterized in that, The loading of the first program includes: The second program, which is embedded inside the system-on-a-chip (SOC), is executed to initialize the SOC, and the third program is loaded into the SOC's static memory. By executing the third program, the memory driver is loaded, and the memory driver is initialized. The first program is loaded into the preset address of the memory after driver initialization.

3. The method according to claim 1, characterized in that, The initialization of the first CPU includes: Set the first reset address of the first CPU; Write the first reset address into the first register; Set the operating frequency and clock of the first CPU; Power on the power management unit inside the first CPU.

4. The method according to any one of claims 1-3, characterized in that, The step of setting the first kernel entry address corresponding to the first CPU based on the first program includes: Based on the linker, determine the entry function of the first program; By executing the entry function, the entry address of the kernel image corresponding to the first CPU and the entry address of the device tree image are set; The entry address of the kernel image and the entry address of the device tree image are determined as the first kernel entry address.

5. The method according to claim 4, characterized in that, The method further includes: By executing the entry function, the interrupt control register is initialized so that the first CPU can run based on the interrupt control register.

6. The method according to any one of claims 1-3, characterized in that, The initialization of the second CPU includes: Set the second reset address of the second CPU; Write the second reset address into the second register; the second reset address and the second reset address correspond to different CPU subscript values; Set the operating frequency and clock of the second CPU; Power on the internal power management unit of the second CPU.

7. An operating system boot device, characterized in that, include: The first initialization module is used to load the first program at the first security level, initialize the first CPU, and set the first kernel entry address corresponding to the first CPU based on the first program after initialization. The kernel initialization module is used to jump to the second security level according to the pre-stored exception vector address, and enter the kernel according to the first kernel entry address at the second security level to perform kernel initialization and call the power management interface. The first security level is higher than the second security level; The second initialization module is used to jump to the first security level according to the power management interface, and initialize the second CPU based on the first program at the first security level and pass in the second kernel entry address corresponding to the second CPU. The wake-up module is used to jump to the second security level according to the pre-stored exception vector address, enter the kernel through the initialized second CPU at the second security level according to the second kernel entry address, and wake up the initialized first CPU. When jumping to the second security level based on the pre-stored exception vector address, the kernel initialization module and the wake-up module are specifically used for: By executing the entry function, the exception vector address is read and the exception vector address is saved to the second register. The entry function is the entry function of the first program determined by the linker. Obtain the address of the exception vector in the second register; Based on the anomaly vector address, the system will jump from the current first security level to the second security level.

8. An operating system boot device, characterized in that, include: At least one processor and memory; The memory stores computer-executed instructions; The at least one processor executes computer execution instructions stored in the memory, causing the at least one processor to perform the operating system boot method as described in any one of claims 1 to 6.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, implement the operating system boot method as described in any one of claims 1 to 6.

10. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by the processor, it implements the operating system boot method according to any one of claims 1 to 6.

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