A general silicon adapter board design method for SPI memory integration

Abstract

This invention relates to a universal silicon interposer design method for SPI memory integration, belonging to the field of chip packaging. The invention fabricates chip bonding pads on the upper surface of the silicon interposer and TSV vias in the silicon. Bumps are fabricated at the locations of the TSV vias on the back side to achieve bonding-to-flip-chip conversion. The surface surface is designed to accommodate the bonding requirements of various commonly used SPI memory bare chips, with at least 20 bonding pads. These 20 bonding pads ensure the bonding needs of various commonly used SPI memory chips. Simultaneously, 20 bumps are arranged vertically and horizontally on the lower surface for interconnection with the substrate. This invention utilizes the simultaneous fabrication of two interconnect structures on the silicon interposer, achieving process compatibility between bonding and flip-chip bonding. The universal design is compatible with commonly used SPI memory bare chips using bonding methods. The TSV structure enables interconnection between the upper and lower layers, and through thinning, the overall thickness of the silicon interposer can be controlled to within 150µm.

Description

Technical Field

[0001] This invention belongs to the field of chip packaging, specifically relating to a general silicon adapter board design method for SPI memory integration. Background Technology

[0002] A typical silicon adapter board mainly consists of a silicon substrate, an RDL layer, TSV vias, and interconnect structures such as bumps. The upper RDL layer is connected to the mounted active chips via microbumps; these active chips can be ordinary two-dimensional chips or three-dimensional chip stacks. The lower RDL layer (or solder pads) is connected to the package substrate via ordinary bumps or solder balls, achieving electrical connection between the adapter board and the package shell. The adapter board substrate can be silicon, glass, or organic polymer materials. The RDL of the adapter board includes metal wiring and an insulating dielectric layer used to achieve interconnection.

[0003] System-in-package (SiP) products are often designed with limitations in terms of bare chip interconnection methods, frequently compromising the soldering limits of the organic substrate. This often involves integrating both flip-chip and bonded components simultaneously on the substrate, resulting in significant reliability issues. Current solutions integrate flip-chip and surface-mount (SMT) packages onto the substrate to replace bonded dies; however, repeated packaging also presents reliability limitations. Another approach, under conditions suitable for mass production, involves manufacturers performing RDL layer transitions on bonded wafers to flip-chip interconnects before further production. However, this method is impractical for developers using bulk components for small-batch production.

[0004] Therefore, this invention aims to solve the problem of integrating bare chips with bulk bonding interconnects and flip-chip bare chips on the same organic substrate for SPI memory required for various system packaging integrations, based on silicon interposer technology. Summary of the Invention

[0005] (a) Technical problems to be solved

[0006] The technical problem to be solved by this invention is how to provide a universal silicon adapter board design method for SPI memory integration, so as to solve the problem that bare SPI memory chips cannot be packaged and integrated on a flip-chip substrate.

[0007] (II) Technical Solution

[0008] To address the aforementioned technical problems, this invention proposes a universal silicon adapter board design method for SPI memory integration. The method includes: fabricating chip bonding pads on the upper surface of the silicon adapter board, fabricating TSV vias in the silicon adapter board, and fabricating bumps at the positions of the TSV vias on the back side, thereby achieving the conversion of bonding flip-chip.

[0009] No fewer than 20 bonding pads are provided on the surface of the silicon interposer, and no fewer than 20 bumps are arranged on the lower surface corresponding to the positions of the bonding pads for interconnection with the substrate.

[0010] The silicon adapter board is flip-chip bonded to the chip packaging substrate using bumps. Then, the bare SPI memory chip is bonded to the silicon adapter board. Finally, the die pads on the chip and the chip bonding pads are directly connected with gold wire using a bonding process, thus completing the interconnection between the chip and the silicon adapter board.

[0011] Furthermore, the SPI memory bare chip is a 128MB chip.

[0012] Furthermore, the SPI memory bare chip is a 256MB chip.

[0013] Furthermore, on the upper surface of the silicon adapter board, six bonding pads are set on both the front and back of the SPI memory bare chip.

[0014] Furthermore, on the upper surface of the silicon adapter board, four bonding pads are provided on each side of the SPI memory bare chip.

[0015] Furthermore, on the lower surface of the silicon interposer, 20 bumps are arranged corresponding to the bonding pads for interconnection with the substrate.

[0016] Furthermore, the bare SPI memory chip is positioned at the center of the upper surface of the silicon adapter.

[0017] Furthermore, the bare SPI memory chip is bonded to the silicon adapter board using adhesive.

[0018] Furthermore, the silicon adapter plate is thinned.

[0019] Furthermore, the thickness of the silicon adapter plate is controlled to be within 150um.

[0020] (III) Beneficial Effects

[0021] This invention proposes a universal silicon adapter board design method for SPI memory integration. The technical advantages of this invention are:

[0022] By simultaneously fabricating two interconnect structures on a silicon interposer board, bonding and flip-chip process compatibility can be achieved.

[0023] It adopts a universal design and is compatible with commonly used, bonded SPI memory bare chips.

[0024] The TSV structure is used to achieve interconnection between the upper and lower layers.

[0025] By thinning the silicon adapter, the overall thickness can be controlled to within 150um. Attached Figure Description

[0026] Figure 1 This is a cross-sectional interconnect diagram of the universal silicon adapter board for SPI memory integration of the present invention;

[0027] Figure 2 This is a schematic diagram of the upper surface of the present invention used for SPI memory integration;

[0028] Figure 3 This is a schematic diagram of the lower surface of the present invention used for SPI memory integration. Detailed Implementation

[0029] To make the objectives, contents, and advantages of the present invention clearer, the specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples.

[0030] This invention relates to a bonding-to-flip-chip interconnection method based on silicon interposer technology, to solve the problem that bare SPI memory chips cannot be packaged and integrated on a flip-chip substrate. A silicon interposer refers to a method that uses a silicon wafer as an interconnect layer to fabricate interconnect lines and structures on the silicon wafer to achieve the interconnection and switching of chip signals.

[0031] The purpose of this invention is to develop a bonding-to-flip-chip interconnection method based on silicon interposer technology to solve the problem that bare SPI memory chips cannot be integrated into flip-chip substrates.

[0032] The technical solution of the present invention is as follows:

[0033] This invention addresses the common use of bonded SPI memory bare chips in system packaging, with capacities including 128MB and 256MB. It designs a silicon adapter board that is compatible with various SPI memories, enabling flip-chip interconnection of bonded SPI memories on a flip-chip substrate.

[0034] Two interconnect structures are fabricated simultaneously on the designed silicon adapter board. The two interconnect structures are then interconnected inside the silicon. The upper surface of the silicon adapter board is an interconnect structure for bonding, and the bottom is a bump structure. The upper and lower surfaces are interconnected using TSV vias.

[0035] Example 1:

[0036] like Figure 1 As shown in the figure, a cross-sectional view of a universal silicon adapter board for SPI memory integration according to the present invention illustrates the interconnection between the upper and lower surfaces. Chip bonding pads are fabricated on the upper surface of the silicon adapter board, and TSV vias are fabricated in the silicon adapter board. Bumps are fabricated at the locations of the TSV vias on the back side, thereby enabling the conversion of bonding flip-chip.

[0037] The surface design of a universal silicon adapter board for SPI memory integration in this invention takes into account compatibility with various commonly used SPI memory bare chips, such as... Figure 2 As shown. To fully consider the bonding requirements of various commonly used SPI memory bare chips, at least 20 bonding pads are provided on the surface of the silicon interposer. These 20 bonding pads ensure the bonding requirements of various commonly used SPI memory chips, arranged as shown... Figure 2 As shown. Meanwhile, on the lower surface, at least 20 bumps are arranged corresponding to the bonding pads for interconnection with the substrate.

[0038] In the process assembly of a universal silicon adapter board for SPI memory integration according to the present invention, the silicon adapter board is first flip-chip bonded to the chip packaging substrate through bumps. Then, the bare SPI memory chip is bonded to the silicon adapter board. Finally, the die pads on the chip and the chip bonding pads are directly connected by gold wire using a bonding process, thereby completing the interconnection between the chip and the silicon adapter board, so that the signal can be transmitted from the SPI die pads to the chip bonding pads and then through silicon microvias to the bumps.

[0039] Furthermore, such as Figure 2 , 3 As shown, on the upper surface of the silicon adapter board, there are 6 bonding pads on the front and back of the SPI memory bare chip.

[0040] Furthermore, on the upper surface of the silicon adapter board, four bonding pads are provided on each side of the bare SPI memory chip.

[0041] Furthermore, the bare SPI memory chip is positioned at the center of the upper surface of the silicon adapter.

[0042] Furthermore, the bare SPI memory chip is bonded to the silicon adapter board using adhesive.

[0043] Furthermore, the silicon adapter plate is thinned.

[0044] Furthermore, the thickness of the silicon adapter plate can be controlled to within 150um.

[0045] The technical advantages of this invention are:

[0046] By simultaneously fabricating two interconnect structures on a silicon interposer board, bonding and flip-chip processes can be made compatible.

[0047] It adopts a universal design and is compatible with commonly used, bonded SPI memory bare chips.

[0048] The TSV structure is used to achieve interconnection between the upper and lower layers.

[0049] By thinning the silicon adapter, the overall thickness can be controlled to within 150um.

[0050] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A general silicon adapter board design method for SPI memory integration, characterized in that, The method includes: fabricating chip bonding pads on the upper surface of a silicon adapter board, fabricating TSV vias in the silicon adapter board, and fabricating bumps at the positions of the TSV vias on the back side, thereby achieving the conversion of bonding flip-chip. No fewer than 20 bonding pads are provided on the surface of the silicon interposer, and no fewer than 20 bumps are arranged on the lower surface corresponding to the positions of the bonding pads for interconnection with the substrate. The silicon adapter board is flip-chip bonded to the chip packaging substrate using bumps. Then, the bare SPI memory chip is bonded to the silicon adapter board. Finally, the die pads on the chip and the chip bonding pads are directly connected with gold wire using a bonding process, thus completing the interconnection between the chip and the silicon adapter board. in, On the upper surface of the silicon adapter board, there are 6 bonding pads on the front and back of the SPI memory bare chip; On the upper surface of the silicon adapter board, four bonding pads are set on the left and right sides of the SPI memory bare chip; On the lower surface of the silicon interposer, 20 bumps are arranged corresponding to the bonding pads for interconnection with the substrate.

2. The universal silicon adapter board design method for SPI memory integration as described in claim 1, characterized in that, The SPI memory bare chip is a 128MB chip.

3. The universal silicon adapter board design method for SPI memory integration as described in claim 1, characterized in that, The SPI memory bare chip is a 256MB chip.

4. The universal silicon adapter board design method for SPI memory integration as described in claim 1, characterized in that, The bare SPI memory chip is positioned at the center of the upper surface of the silicon adapter.

5. The universal silicon adapter board design method for SPI memory integration as described in claim 4, characterized in that, The bare SPI memory chip is bonded to the silicon adapter board using adhesive.

6. The universal silicon adapter board design method for SPI memory integration as described in claim 1, characterized in that, The thickness of the silicon adapter board is controlled within 150um.

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