A method for manufacturing a back-illuminated device in a liner and a back-illuminated device

Abstract

The application discloses a preparation method of a back-illumination device gasket and a back-illumination device, and applies to the technical field of integrated circuits.The preparation method comprises the following steps: an etching-resistant layer is arranged on the surface of a conductive layer to form a precursor; the etching-resistant layer is filled into a groove; the whole surface of the precursor is etched to expose the conductive layer on the surface of a substrate while the etching-resistant layer in the groove is reserved; the whole surface of the precursor with the exposed conductive layer is etched to expose an interlayer dielectric under the conductive layer while the etching-resistant layer in the groove is reserved; and the etching-resistant layer in the groove is removed to complete the preparation of the gasket. By arranging the etching-resistant layer on the surface of the conductive layer, the etching-resistant layer is filled into the groove; then the whole surface of the precursor is etched twice, the etching gas left due to photolithography and etching can be reduced or even avoided, the metal precipitation caused by the continuous reaction between the etching gas and the gasket after packaging is avoided, the reliability of the finished product is improved, the difficulty of tape-out is reduced, the tape-out period is shortened, and the tape-out cost is saved.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a method for preparing a pad in a back-illuminated device and a back-illuminated device. Background Technology

[0002] In the integrated circuit (IC) manufacturing process, semiconductor integrated circuits are integrated onto the same wafer, which is typically a silicon substrate wafer. The integrated circuits on the wafer are led out through metal layers, and pads are formed on the top metal layer, connecting to external circuitry via these pads. The traditional manufacturing process for aluminum PAD lead-out layers includes aluminum thin film deposition, resist coating, photolithography, development, etching, and cleaning. In existing back-illuminated (BSI) image sensor processes, aluminum PADs are formed by photolithographic etching of aluminum (Al) in a silicon trench. Due to the stacking of pixel wafers, the aluminum PADs are often located within silicon trenches several micrometers deep, requiring a thicker photoresist layer. Because of the thicker photoresist and longer etching time, a greater amount of polymer is formed within the several-micrometer-deep silicon trench after etching, with this polymer concentrated at the edges of the PAD etching location. Even with subsequent dry and wet stripping processes, it's difficult to completely remove the polymer as effectively as conventional A1 PAD surface extraction processes. Incompletely removed polymer residue, along with etching gases, continues to etch the product. Specifically, the chlorine (Cl) in these etching gases reacts continuously with the aluminum, causing aluminum precipitation. This affects shipments, or, if products are left unpackaged for extended periods after shipment, leads to metal corrosion, ultimately resulting in serious reliability issues. Furthermore, traditional processes lack self-alignment, requiring photolithography of the aluminum, adding an extra photolithography step and wasting time. Additionally, photolithography misalignment increases measurement requirements, extending fabrication time and cost. Therefore, simplifying the pad fabrication process while improving the reliability of back-illuminated equipment is a pressing issue for those skilled in the art. Summary of the Invention

[0003] The purpose of this invention is to provide a method for preparing a liner in a back-illuminated device, which can simplify the liner preparation process and improve the reliability of the back-illuminated device. Another purpose of this invention is to provide a back-illuminated device that can simplify the liner preparation process and improve the reliability of the back-illuminated device.

[0004] To solve the above-mentioned technical problems, the present invention provides a method for preparing a liner in a back-illuminated device, comprising:

[0005] A conductive layer is conformally deposited on the substrate surface using a back-illuminated process; the substrate surface is provided with grooves, the grooves are formed in an interlayer dielectric, and the conductive layer covers the surface of the grooves;

[0006] An anti-etching layer is formed on the surface of the conductive layer to form a precursor; the anti-etching layer is then filled into the groove.

[0007] The entire surface of the precursor is etched to expose the conductive layer on the substrate surface, while retaining the anti-etching layer in the groove;

[0008] The entire surface of the precursor exposing the conductive layer is etched to expose the interlayer dielectric, while retaining the anti-etching layer in the groove;

[0009] Remove the anti-etching layer in the groove to complete the preparation of the gasket.

[0010] Optionally, the step of providing an anti-etching layer on the surface of the conductive layer includes:

[0011] A fluid-based anti-etching material is disposed on the surface of the conductive layer, so that the anti-etching material fills the groove and forms the anti-etching material layer;

[0012] The anti-etching material is cured to form the anti-etching layer.

[0013] Optionally, the etching rate ratio of the anti-etching layer to the conductive layer is 1:1.

[0014] Optionally, the conductive layer is an aluminum conductive layer, and the anti-etching layer is a BARC layer.

[0015] Optionally, removing the anti-etching layer within the groove includes:

[0016] The anti-etching layer in the groove is removed using a glue remover.

[0017] Optionally, etching the entire surface of the precursor to expose the conductive layer on the substrate surface while retaining the anti-etching layer within the groove includes:

[0018] The entire surface of the precursor is etched using a dielectric etching machine to expose the conductive layer on the substrate surface, while retaining the anti-etching layer within the groove.

[0019] Optionally, etching the entire surface of the precursor using a dielectric etching machine to expose the conductive layer on the substrate surface includes:

[0020] The entire surface of the precursor is etched using a dielectric etching machine, and the etching endpoint is determined based on the endpoint signal control, thereby exposing the conductive layer on the substrate surface.

[0021] Optionally, etching the entire surface of the precursor exposing the conductive layer to expose the interlayer dielectric beneath the conductive layer while retaining the etching-resistant layer within the groove includes:

[0022] The entire surface of the precursor that exposes the conductive layer is etched using a metal etching machine to expose the interlayer dielectric while retaining the anti-etching layer within the groove.

[0023] Optionally, the etching of the entire surface of the precursor exposing the conductive layer using a metal etching machine, to expose the interlayer dielectric, includes:

[0024] The entire surface of the precursor exposing the conductive layer is etched using a metal etching machine, and the etching endpoint is determined based on the endpoint signal control to expose the interlayer medium.

[0025] The present invention also provides a back-illuminated device, comprising a liner prepared by the method for preparing a liner in a back-illuminated device as described in any of the preceding claims.

[0026] The present invention provides a method for preparing a pad in a back-illuminated device, comprising: conformally depositing a conductive layer on a substrate surface using a back-illuminated process; forming grooves on the substrate surface, the grooves being formed in an interlayer dielectric, and the conductive layer covering the surface of the grooves; forming an etch-resistant layer on the surface of the conductive layer to prepare a precursor; filling the grooves with the etch-resistant layer; etching the entire surface of the precursor to expose the conductive layer on the substrate surface while retaining the etch-resistant layer in the grooves; etching the entire surface of the precursor exposing the conductive layer to expose the interlayer dielectric while retaining the etch-resistant layer in the grooves; and removing the etch-resistant layer in the grooves to complete the preparation of the pad.

[0027] By setting an anti-etching layer on the surface of the conductive layer, the anti-etching layer fills the grooves; then, the entire surface of the precursor is etched in two stages, without photolithography to create a specific pattern. This reduces or even eliminates the generation and residue of etching gas caused by photolithography, thereby preventing metal precipitation caused by the continuous reaction of etching gas with the pads after packaging, and improving the reliability of the finished product. At the same time, it saves a photomask layer and related process steps for the corresponding pads, increasing production capacity while reducing the difficulty of fabrication, shortening the fabrication cycle, and saving fabrication costs.

[0028] The present invention also provides a back-illuminated device, which has the same beneficial effects as described above, and will not be described in detail here. Attached Figure Description

[0029] To more clearly illustrate the technical solutions of the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figures 1 to 4 A process flow diagram of a method for preparing a liner in a back-illuminated device provided in an embodiment of the present invention;

[0031] Figures 5 to 8 This is a process flow diagram of a specific method for preparing a liner in a back-illuminated device provided in an embodiment of the present invention.

[0032] In the diagram: 1. Conductive layer, 2. Etching-resistant layer, 3. Interlayer dielectric. Detailed Implementation

[0033] The core of this invention is to provide a method for preparing a pad in a back-illuminated device, comprising: conformally depositing a conductive layer on a substrate surface based on a back-illuminated process; forming grooves on the substrate surface, the grooves being formed in an interlayer dielectric, and the conductive layer covering the surface of the grooves; forming an etch-resistant layer on the surface of the conductive layer to form a precursor; filling the grooves with the etch-resistant layer; etching the entire surface of the precursor to expose the conductive layer on the substrate surface while retaining the etch-resistant layer in the grooves; etching the entire surface of the precursor exposing the conductive layer to expose the interlayer dielectric while retaining the etch-resistant layer in the grooves; and removing the etch-resistant layer in the grooves to complete the preparation of the pad.

[0034] By setting an anti-etching layer on the surface of the conductive layer, the anti-etching layer fills the grooves; then, the entire surface of the precursor is etched in two stages, without photolithography to create a specific pattern. This reduces or even eliminates the generation and residue of etching gas caused by photolithography, thereby preventing metal precipitation caused by the continuous reaction of etching gas with the pads after packaging, and improving the reliability of the finished product. At the same time, it saves a photomask layer and related process steps for the corresponding pads, increasing production capacity while reducing the difficulty of fabrication, shortening the fabrication cycle, and saving fabrication costs.

[0035] To enable those skilled in the art to better understand the present invention, the invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are merely some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0036] Please refer to Figures 1 to 4 , Figures 1 to 4This is a process flow diagram of a method for preparing a liner in a back-illuminated device provided in an embodiment of the present invention.

[0037] See Figure 1 In this embodiment of the invention, the method for preparing the liner in the back-illuminated device includes:

[0038] S 101: Conformal deposition of a conductive layer on the substrate surface based on a back-illuminated process.

[0039] In this embodiment of the invention, a groove is provided on the surface of the substrate, the groove is formed in the interlayer dielectric 3, and the conductive layer 1 covers the surface of the groove.

[0040] For details regarding the back-illuminated process, please refer to existing technologies, which will not be elaborated here. The substrate described above has an interlayer dielectric 3, and based on the back-illuminated process, grooves, i.e., the aforementioned silicon trenches, are formed in the interlayer dielectric of the substrate. In this step, a conductive layer 1 is conformally deposited on the substrate surface, including the surface of the aforementioned trenches. The deposition process of this conductive layer 1 does not change the morphology of the substrate, ensuring that the aforementioned trenches remain after deposition. Typically, in this step, a conductive material is conformally deposited on the substrate surface based on a deposition process to form the conductive layer 1. This conductive layer 1 specifically covers the substrate surface and the surface of the trenches; that is, the conductive layer 1 typically does not completely fill the trenches of the substrate. For details regarding the conformal deposition, please refer to existing technologies, which will not be elaborated here.

[0041] S 102: An anti-etching layer is formed on the surface of the conductive layer to create a precursor.

[0042] In this embodiment of the invention, the anti-etching layer 2 is filled into the groove.

[0043] In this step, an anti-etching layer 2 is further formed on the surface of the conductive layer 1. The material of the anti-etching layer 2 can be an organic material or other materials, and its specific details will be described in detail in the following embodiments. The aforementioned anti-etching layer 2 needs to be formed on the surface of the conductive layer 1 and simultaneously fill the aforementioned grooves. The anti-etching layer 2 filling the grooves can protect the conductive layer 1 formed within the grooves from etching.

[0044] S 103: Etch the entire surface of the precursor to expose the conductive layer on the substrate surface while retaining the anti-etching layer in the groove.

[0045] See Figure 2 In this step, the entire surface of the precursor will be etched. The main step is to etch the anti-etching layer 2, remove the anti-etching layer 2 on the surface of the conductive layer 1 (excluding the groove), expose the conductive layer 1 on the substrate surface, and retain the anti-etching layer 2 in the groove.

[0046] S 104: Etch the entire surface of the precursor to expose the conductive layer, exposing the interlayer dielectric while retaining the anti-etching layer in the groove.

[0047] See Figure 3 In this step, the precursor surface will continue to be etched as a whole. Based on the previous step, the exposed conductive layer 1 will be further etched to expose the interlayer dielectric 3 beneath the conductive layer 1, while retaining the anti-etching layer 2 within the groove. Since the anti-etching layer 2 is still retained within the groove in this step, it can protect the conductive layer 1 forming the groove from being etched, thereby retaining the required conductive layer 1 to form the conductive layer 1 required for the pad (PAD).

[0048] S 105: Remove the anti-etching layer in the groove to complete the preparation of the gasket.

[0049] See Figure 4 In this step, the anti-etching layer 2 in the groove needs to be removed to expose the liner and complete the preparation of the liner.

[0050] The present invention provides a method for preparing a pad in a back-illuminated device. By forming an anti-etching layer 2 on the surface of a conductive layer 1, the anti-etching layer 2 is filled into a groove. Then, the entire surface of the precursor is etched in two stages without photolithography to create a specific pattern. This reduces or even avoids the generation and residue of etching gas caused by photolithography, thereby preventing metal precipitation caused by the continuous reaction of etching gas with the pad after packaging and improving the reliability of the finished product. At the same time, it saves a photomask and related process steps for the corresponding pad, increases production capacity, reduces the difficulty of fabrication, shortens the fabrication cycle, and saves fabrication costs.

[0051] The specific details of the method for preparing a liner in a back-illuminated device provided by the present invention will be described in detail in the following embodiments.

[0052] Please refer to Figures 5 to 8 , Figures 5 to 8 This is a process flow diagram of a specific method for preparing a liner in a back-illuminated device provided in an embodiment of the present invention.

[0053] See Figure 5 In this embodiment of the invention, the method for preparing the liner in the back-illuminated device includes:

[0054] S201: Conformal deposition of a conductive layer on the substrate surface based on a back-illuminated process.

[0055] This step is basically the same as S101 in the above-described embodiment of the invention. For details, please refer to the above-described embodiment of the invention. It will not be repeated here.

[0056] S202: A fluid-based anti-etching material is placed on the surface of the conductive layer, so that the anti-etching material fills the groove and forms an anti-etching material layer.

[0057] In this step, a fluid anti-etching material is specifically applied to the surface of the conductive layer 1. Typically, this anti-etching material is a liquid. The anti-etching material, which is fluid before curing, is applied to the surface of the conductive layer 1. This anti-etching material can automatically flow into the groove and ensure that the surface of the anti-etching material layer facing away from the conductive layer 1 is a flat surface. This also includes the surface of the anti-etching layer 2 facing away from the conductive layer 1 after curing, which is a flat surface, making it easier to etch the entire surface of the precursor.

[0058] S203: Cures the anti-etching material to form an anti-etching layer.

[0059] In this step, the anti-etching material of the above fluid needs to be cured to form anti-etching layer 2.

[0060] S204: Etch the entire surface of the precursor to expose the conductive layer on the substrate surface while retaining the anti-etching layer in the groove.

[0061] See Figure 6 In this step, the entire surface of the precursor is first etched using a dielectric etching machine. The main focus of this step is etching the anti-etching layer 2 to expose the conductive layer 1 on the precursor surface, while the conductive layer 1 forming the groove remains protected and isolated by the anti-etching layer 2 within the groove. Specifically, this step includes: etching the entire surface of the precursor using a dielectric etching machine to expose the conductive layer on the substrate surface, while retaining the anti-etching layer within the groove.

[0062] Specifically, in this embodiment of the invention, the etching rate selection ratio between the anti-etching layer 2 and the conductive layer 1 is 1:1. That is, when etching the conductive layer 1, the conductive layer 1 and the anti-etching layer 2 can be removed synchronously, ensuring that the precursor surface is flat during etching, which is beneficial to the etching process.

[0063] Specifically, the conductive layer 1 mentioned above is an aluminum conductive layer 1, and the anti-etching layer 2 is a BARC layer. That is, the material of the conductive layer 1 is aluminum (Al). In this case, the anti-etching layer 2 can first use a BARC (bottom anti-reflective coating) with an etching rate selectivity ratio of 1:1 with aluminum. It is usually an organic adhesive. By selecting the BARC layer as the anti-etching layer 2, an etching rate selectivity ratio of 1:1 can be formed with the aluminum conductive layer 1, thereby ensuring a smooth surface during the subsequent second full-surface etching of the precursor surface, which facilitates the etching process.

[0064] Specifically, this step may include: etching the entire surface of the precursor using a dielectric etching machine, determining the etching endpoint based on an endpoint signal control, and exposing the conductive layer 1 on the substrate surface. The endpoint signal control method allows etching to be terminated after the conductive layer 1 is exposed, stopping the etching at the upper surface of the conductive layer 1. Specific details regarding endpoint signal control can be found in existing technologies and will not be elaborated here. In this step, since the area of ​​the exposed conductive layer 1 typically occupies 90% of the precursor surface, this etching process can effectively capture the endpoint signal.

[0065] S205: Etch the entire surface of the precursor to expose the conductive layer, exposing the interlayer dielectric while retaining the anti-etching layer in the groove.

[0066] See Figure 7 In this step, the entire surface of the precursor is first etched using a metal etching machine. This step primarily involves etching the exposed conductive layer 1 to expose the interlayer dielectric 3 beneath it, while the conductive layer 1 forming the groove remains protected and isolated by the anti-etching layer 2 within the groove. Specifically, this step includes: etching the entire surface of the precursor exposing the conductive layer using a metal etching machine to expose the interlayer dielectric, while retaining the anti-etching layer within the groove.

[0067] Specifically, this step may include: etching the entire surface of the precursor exposing the conductive layer 1 using a metal etching machine, determining the etching endpoint based on the endpoint signal control, and exposing the interlayer dielectric 3. The etching can be terminated after the conductive layer 1 is completely removed using endpoint signal control, stopping the etching at the upper surface of the interlayer dielectric 3. Specific details regarding endpoint signal control can be found in existing technologies and will not be elaborated here. In this step, since the area of ​​the exposed conductive layer 1 typically occupies 90% of the precursor surface, the etching process can effectively capture the endpoint signal. Unlike S204, where etching is terminated when the conductive layer 1 appears, this step terminates etching after the conductive layer 1 is completely etched away. That is, in S204, etching is stopped on the upper aluminum layer using endpoint signal control; while in this step, the etching is stopped on the ILD (interlayer dielectric) layer after the upper aluminum layer is completely etched away using endpoint signal control, leaving resist in the tank to prevent further etching after the process is complete.

[0068] S206: Remove the anti-etching layer in the groove using a glue remover.

[0069] See Figure 8 In this step, the organic adhesive can be removed using a de-adhesive machine and a cleaning machine. At this point, a self-aligning pad (PAD) is formed in the groove, eliminating the need for measurement steps such as overlay accuracy.

[0070] The present invention provides a method for preparing a pad in a back-illuminated device. By setting an anti-etching layer 2 on the surface of the conductive layer 1, the anti-etching layer 2 is filled into the groove. Then, the entire surface of the precursor is etched in two stages, without photolithography to form a specific pattern. This can reduce or even avoid the etching gas remaining due to photolithography, thereby avoiding metal precipitation caused by the continuous reaction of etching gas with the pad after packaging, and improving the reliability of the finished product. At the same time, it saves a photomask and related process steps for the corresponding pad, increases production capacity, reduces the difficulty of fabrication, shortens the fabrication cycle, and saves fabrication costs.

[0071] The present invention also provides a back-illuminated device, which specifically includes a pad structure prepared by the pad preparation method provided in any of the above embodiments of the invention.

[0072] Because the method for preparing the gasket in a back-illuminated device provided in the above embodiments of the invention can improve the reliability of the finished product, while reducing the difficulty of fabrication, shortening the fabrication cycle, and saving fabrication costs, the back-illuminated device in the embodiments of the invention has lower manufacturing costs and higher reliability. The specific structure and preparation process of the gasket in the back-illuminated device provided by the present invention have been described in detail in the above embodiments of the invention, and will not be repeated here.

[0073] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.

[0074] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0075] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein can be implemented directly by hardware, a software module executed by a processor, or a combination of both. The software module can be located in random access memory (RAM), main memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art.

[0076] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0077] The preparation method of the liner in a back-illuminated device provided by the present invention and the back-illuminated device itself have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of the present invention. It should be noted that those skilled in the art can make several improvements and modifications to the present invention without departing from the principles of the present invention, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. A method for preparing a liner in a back-illuminated device, characterized in that, include: A conductive layer is conformally deposited on the substrate surface using a back-illuminated process. The substrate surface is provided with a groove, the groove is formed in the interlayer dielectric, and the conductive layer covers the surface of the groove; An anti-etching layer is formed on the surface of the conductive layer to form a precursor; the anti-etching layer is filled into the groove; the etching rate ratio of the anti-etching layer to the conductive layer is 1:1; Without photolithography, the entire surface of the precursor is etched to expose the conductive layer on the substrate surface, while retaining the anti-etching layer in the groove. Without photolithography, the entire surface of the precursor exposing the conductive layer is etched to expose the interlayer dielectric, while retaining the anti-etching layer in the groove. Remove the anti-etching layer in the groove to complete the preparation of the gasket; The process of forming an anti-etching layer on the surface of the conductive layer includes: A fluid-based anti-etching material is disposed on the surface of the conductive layer, so that the anti-etching material fills the groove and forms an anti-etching material layer; The anti-etching material is cured to form the anti-etching layer.

2. The method according to claim 1, characterized in that, The conductive layer is an aluminum conductive layer, and the anti-etching layer is a BARC layer.

3. The method according to claim 2, characterized in that, The removal of the anti-etching layer within the groove includes: The anti-etching layer in the groove is removed using a glue remover.

4. The method according to claim 1, characterized in that, The step of etching the entire surface of the precursor to expose the conductive layer on the substrate surface while retaining the anti-etching layer within the groove includes: The entire surface of the precursor is etched using a dielectric etching machine to expose the conductive layer on the substrate surface, while retaining the anti-etching layer within the groove.

5. The method according to claim 4, characterized in that, The entire surface of the precursor is etched using a dielectric etching machine to expose the conductive layer on the substrate surface, including: The entire surface of the precursor is etched using a dielectric etching machine, and the etching endpoint is determined based on the endpoint signal control, thereby exposing the conductive layer on the substrate surface.

6. The method according to claim 1, characterized in that, The step of etching the entire surface of the precursor that exposes the conductive layer to expose the interlayer dielectric while retaining the etching-resistant layer within the groove includes: The entire surface of the precursor that exposes the conductive layer is etched using a metal etching machine to expose the interlayer dielectric while retaining the anti-etching layer within the groove.

7. The method according to claim 6, characterized in that, The etching of the entire surface of the precursor exposing the conductive layer using a metal etching machine, thereby exposing the interlayer dielectric, includes: The entire surface of the precursor exposing the conductive layer is etched using a metal etching machine, and the etching endpoint is determined based on the endpoint signal control to expose the interlayer medium.

8. A back-illuminated device, characterized in that, Including the liner prepared by the method for preparing a liner in a back-illuminated device as described in any one of claims 1 to 7.

Images