A multiple output power supply circuit

Abstract

The application provides a multi-output power supply circuit, which comprises a first output circuit comprising a first switch circuit, a main switch tube and a magnetic element, a main control circuit for controlling the on-off of the main switch tube to output a first output voltage; a second output circuit, an input end of which is connected with a first node, an output end of which outputs a second output voltage, the second output circuit comprising a second switch tube and a second control circuit, the second switch tube being connected between the first node and the output end of the second output circuit, the second control circuit generating a second control signal to control the on-off of the second switch tube according to the second output voltage and a switch node voltage of the first switch circuit, the switch node voltage being a node voltage on a loop between an input end and an output end of the first switch circuit, and the first node being one end of the magnetic element. The multi-output power supply circuit can be realized on the basis of different types of first switch circuits, has a small number of components and high efficiency, and has a fast dynamic response and good output voltage stability when a trigger unit is arranged.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a multi-output power supply circuit. Background Technology

[0002] With the rapid development of the Internet of Things (IoT), big data, and AI, the number of corresponding devices and terminals is increasing, and their functions are becoming more diverse. Therefore, power supply solutions for different load terminals are also changing. Different terminals require different functions, such as MCU control, Wi-Fi / ZiGBEE power supply, relay drive, fan power supply, and microwave radar, all of which require different supply voltages. Traditional power supply methods, which generate a single output voltage, cannot meet the power voltage requirements of different functions. Furthermore, with macro-control measures such as energy conservation, emission reduction, carbon neutrality, and environmental protection, global energy-saving regulations and corresponding product access standards are becoming increasingly stringent. Traditional power supply solutions for applications with multiple output voltage requirements typically connect an LDO directly after the first-stage output voltage (e.g., 12V / 18V), or connect an LDO after the coupling winding of an inductive device to achieve other voltage requirements (e.g., 5V / 3.3V), or use a traditional DC-DC converter connected to the subsequent stage to achieve the above multiple output requirements. These methods suffer from low efficiency, high power consumption, high heat generation, a large number of components leading to high cost, poor cross-regulation of multiple output voltages, and slow dynamic response. Summary of the Invention

[0003] In view of this, the purpose of the present invention is to provide a multi-output power supply circuit to solve the technical problems of existing technology, such as a large number of system components, low efficiency, poor cross-regulation of multi-output voltage, and slow dynamic response.

[0004] The technical solution of the present invention is to provide a multi-output power supply circuit, the multi-output power supply circuit including a first output circuit and a second output circuit.

[0005] The first output circuit includes a first switching circuit, which includes a main switching transistor and a magnetic element. Its input terminal receives an input voltage, and the main control circuit controls the switching on and off of the main switching transistor to output a first output voltage.

[0006] The input terminal of the second output circuit is connected to the first node of the first switching circuit, and the output terminal outputs a second output voltage. The second output circuit includes a second switching transistor and a second control circuit. The second switching transistor is connected between the first node and the output terminal of the second output circuit. The second control circuit generates a second control signal based on the second output voltage and the switching node voltage of the first switching circuit to control the switching on and off of the second switching transistor. The switching node voltage is the node voltage on the loop between the input and output terminals of the first switching circuit.

[0007] The first node is one end of the magnetic element.

[0008] Optionally, the multi-output power supply circuit includes a first switch connected between the first node and the output terminal of the first switch circuit. When the second switch is turned on, the first switch is turned off.

[0009] Optionally, the second control circuit determines the turn-on time of the main switch based on the voltage of the switching node, and controls the second switch to turn off at the turn-on time of the main switch.

[0010] Optionally, the second control circuit includes a synchronization unit.

[0011] The synchronization unit samples the switching node voltage to obtain a switching node voltage sampling signal, and generates a clock signal based on the switching node voltage sampling signal;

[0012] The second control circuit controls the turn-off time of the second switching transistor according to the clock signal.

[0013] Optionally, the second control circuit further includes:

[0014] The second output voltage detection unit detects the second output voltage to output a second output feedback voltage;

[0015] The modulation unit generates the second control signal based on the second output feedback voltage and the clock signal.

[0016] Optionally, the modulation unit includes:

[0017] The first operational amplifier receives a first reference voltage at its first input terminal and a second output feedback voltage at its second input terminal. It amplifies the error between the second output feedback voltage and the first reference voltage to output a compensation signal.

[0018] A ramp signal generation circuit receives the clock signal to generate a ramp signal with the same frequency as the clock signal;

[0019] The first comparator circuit has a first input terminal that receives the compensation signal and a second input terminal that receives the ramp signal.

[0020] The trigger has a first input terminal that receives the output signal of the first comparator circuit, a second input terminal that receives the clock signal, and an output terminal that outputs the second control signal.

[0021] Optionally, the second control circuit includes:

[0022] A trigger unit is connected between the output terminal of the first switching circuit and the output terminal of the second output circuit. The trigger unit controls the current between the output terminals of the first switching circuit and the second output circuit according to the first output voltage and / or the second output voltage.

[0023] Optionally, the second output voltage is less than the first output voltage. When the second output voltage is less than the first threshold voltage, the trigger unit controls the output terminal of the first switching circuit to transmit current to the output terminal of the second output circuit.

[0024] Optionally, the second output voltage is less than the first output voltage. When the first output voltage is greater than the second threshold voltage, the triggering unit controls the output terminal of the first switching circuit to transmit current to the output terminal of the second output circuit.

[0025] Optionally, the triggering unit includes:

[0026] A first controlled current source or a first controlled resistor is connected between the output terminal of the first switching circuit and the output terminal of the second output circuit.

[0027] The second operational amplifier or the second comparator circuit receives the first threshold voltage at its first input terminal and the second output voltage at its second input terminal, and outputs a first signal based on the first threshold voltage and the second output voltage.

[0028] The control terminal of the first controlled current source or the first controlled resistor receives the first signal.

[0029] Optionally, the second output voltage is less than the first output voltage, and the first switch includes a first diode, with the anode of the first diode connected to the first node and the cathode connected to the output terminal of the first switch circuit.

[0030] Optionally, the first switch includes a first switching transistor, which is controlled to be turned on or off according to the output signal of the second control circuit.

[0031] Optionally, the first switch further includes a diode, which is connected in series with the first switch transistor between the first node and the output terminal of the first switch circuit.

[0032] Optionally, the first switch further includes a switch tube disposed back-to-back with the first switch tube.

[0033] Optionally, when the multi-output power supply circuit includes two outputs, the first switching transistor is turned on / off according to the non-signal of the second control signal.

[0034] Optionally, the second output circuit further includes a second diode, which is connected in series with the second switch between the first node and the output terminal of the second output circuit.

[0035] Optionally, the second output circuit further includes a switching transistor disposed back-to-back with the second switching transistor.

[0036] Optionally, the multi-output power supply circuit further includes output circuits 3 to N, wherein,

[0037] The input terminal of the k-th output circuit is connected to the first node, and the output terminal outputs the k-th output voltage. The k-th output circuit includes a k-th switch and a k-th control circuit. The k-th switch is connected between the input terminal of the k-th output circuit, the first node, and the output terminal of the k-th output circuit. The k-th control circuit generates a k-th control signal to control the on / off state of the k-th switch.

[0038] The kth control circuit generates the kth control signal based on the switching node voltage and the kth output voltage, or generates the kth control signal based on at least one of the signals output by the second to N control circuits other than the kth control circuit and the kth output voltage.

[0039] Where N is an integer greater than or equal to 3, and k is an integer from 3 to N.

[0040] Compared with the prior art, the circuit structure of this invention has the following advantages: it can realize the multi-output power supply circuit described in this invention based on different types of first switching circuits, with a wide range of applications and flexible use; it can synchronize the switching frequency of the second switching transistor in the second output circuit with the operating frequency of the first switching circuit without changing the circuit structure of the main control circuit of the first switching circuit and without increasing the pins of the integrated chip where the main control circuit is located, so that the output voltage of the multi-output power supply circuit has a smaller ripple; compared with the prior art scheme of connecting an LDO after the first stage output voltage, the multi-output power supply circuit of this invention has the advantage of higher efficiency; compared with the prior art scheme of connecting a DC-DC converter after the first stage output voltage, the multi-output power supply circuit of this invention has the advantage of fewer components; when the multi-output power supply circuit of this invention is equipped with a trigger unit, it can effectively improve the dynamic response rate and improve the output voltage cross-regulation performance, thereby making the multi-output voltage more stable. Attached Figure Description

[0041] Figure 1 This is a circuit block diagram of a multi-output power supply circuit according to an embodiment of the present invention;

[0042] Figures 2a-2d Examples of the first and second switches in this embodiment of the invention;

[0043] Figure 3 This is a schematic diagram of the circuit structure of the multi-output power supply circuit according to the first embodiment of the present invention;

[0044] Figure 4 According to Figure 3 A waveform diagram of a multi-output power supply circuit;

[0045] Figures 5a-5b According to Figure 3 A waveform diagram of a multi-output power supply circuit that may appear without a synchronization unit;

[0046] Figure 6 This is a schematic diagram of the circuit structure of the multi-output power supply circuit according to the second embodiment of the present invention;

[0047] Figures 7a-7b This is an example of a circuit structure diagram of the trigger unit according to an embodiment of the present invention;

[0048] Figure 8 This is a schematic diagram of the circuit structure of the multi-output power supply circuit according to the third embodiment of the present invention;

[0049] Figure 9 This is a schematic diagram of the circuit structure of the multi-output power supply circuit according to the fourth embodiment of the present invention;

[0050] Figure 10This is a schematic diagram of the circuit structure of the multi-output power supply circuit according to the fifth embodiment of the present invention. Detailed Implementation

[0051] The preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings, but the present invention is not limited to these embodiments. The present invention covers any substitutions, modifications, equivalent methods, and solutions made within the spirit and scope of the present invention.

[0052] To provide the public with a thorough understanding of the present invention, specific details are described in detail in the following preferred embodiments of the invention, but those skilled in the art can fully understand the invention without these details.

[0053] The invention is described in more detail below by way of example with reference to the accompanying drawings. It should be noted that the drawings are in a simplified form and use non-precise proportions, and are only used to facilitate and clarify the illustration of the embodiments of the invention.

[0054] like Figure 1 The diagram shown is a circuit block diagram of a multi-output power supply circuit according to an embodiment of the present invention, including a first output circuit 10 and a second output circuit 20. The first output circuit 10 includes a first switching circuit, which includes a main switching transistor M00, a diode D00, and a magnetic element such as a first inductor L01. The input terminal of the first switching circuit receives an input voltage Vin, and the main control circuit 101 controls the switching of the main switching transistor M00 to output a first output voltage Vo1. The input terminal of the second output circuit 20 is connected to a first node A of the first switching circuit, where the first node A is one end of the magnetic element (first inductor L01). The output terminal outputs a second output voltage Vo2. The second output circuit 20 includes a second switch. 201, a second control circuit 202, and a second output capacitor Co2. The second switch 201 includes a second switching transistor M02, which is connected between the first node A and the output terminal of the second output circuit 20. The second control circuit 202 generates a second control signal S2 based on the second output voltage Vo2 and the switching node voltage Vsw (i.e., the voltage of the switching node SW) of the first switching circuit to control the on / off state of the second switching transistor M02. The switching node voltage Vsw is the voltage of node SW in the loop between the input and output terminals of the first switching circuit. In this application, the switching node SW is a node in the first switching circuit where the voltage changes between high and low levels under normal operating conditions. The multi-output power supply circuit includes a first switch 21, which is connected between the first node A and the output terminal of the first switching circuit. When the second switching transistor M02 is turned on, the first switch 21 is turned off, that is, when energy flows into the output terminal of the second output circuit, the energy flow into the output terminal of the first switching circuit is blocked, so as to ensure a stable output of the first output voltage Vo1 and the second output voltage Vo2.

[0055] Figures 2a-2d Examples of the first switch 21 and the second switch 201 applicable to embodiments of the present invention are given, wherein, Figures 2a-2b Suitable for multi-output power supply circuits where the second output voltage is less than the first output voltage. Figures 2c-2d It is applicable to multi-output power supply circuits where the second output voltage is lower than the first output voltage, and also applicable to multi-output power supply circuits where the second output voltage is higher than the first output voltage. Specifically, in Figure 2a In the circuit, the first switch 21 includes a first diode D01, the anode of which is connected to the first node A, and the cathode of which is connected to the output terminal of the first switch circuit. The second switch 201 includes a second switching transistor M02, the drain of which is connected to the first node A, and the source of which is connected to the output terminal of the second output circuit 20. The second control signal S2 controls the switching on and off of the second switching transistor M02. When the second switching transistor M02 is on, the voltage at the first node A is approximately equal to the second output voltage Vo2. Since the second output voltage Vo2 is less than the first output voltage Vo1, the first diode D01 will be off. That is, as long as the second switching transistor M02 is turned on, energy can be preferentially transferred to the second output voltage Vo2. When the second switching transistor M02 is turned off, the first diode D01 is on. The first diode D01, which has unidirectional conduction characteristics, and the body diode of the second switching transistor M02 (not shown in the figure) both prevent the energy of the first output voltage Vo1 from flowing to the second output voltage Vo2, causing a short circuit between the first output voltage Vo1 and the second output voltage Vo2. Figure 2b In, with Figure 2a The difference lies in that the first switch 21 includes a first switching transistor M01, the source of which is connected to the first node A, and the drain of which is connected to the output of the first switching circuit. A first control signal S1 controls the on / off state of the first switching transistor M01. The first control signal S1 can be generated based on the output signal of the second control circuit 202. It can be understood that in a multi-output power supply circuit embodiment including two outputs, the first control signal S1 and the second control signal S2 can be controlled to be complementary signals to achieve the first switching transistor M01 being turned off when the second switching transistor M02 is on and turned on when the second switching transistor M02 is off. For example, the negation of the second control signal S2 can be used as the first control signal S1. Figure 2c In, with Figure 2b In comparison, the first switch 21 further includes a diode D01', which is connected in series with the first switching transistor M01 between the first node A and the output terminal of the first switching circuit. The second switch 201 further includes a second diode D02, which is connected in series with the second switching transistor M02 between the first node A and the output terminal of the second output circuit. Figure 2b The difference is, Figure 2cThe source of the first switching transistor M01 faces the output of the first switching circuit, and the drain faces the first node A. Figure 2d In the first switch 21, there are a first switching transistor M01 and a switching transistor M01' arranged back-to-back with the first switching transistor M01. The second switch 201 includes a second switching transistor M02 and a switching transistor M02' arranged back-to-back with the second switching transistor M02. Wherein... Figures 2c-2d In the middle, we can use and Figure 2b The same method is used to generate the first control signal S1 to control the on / off state of the first switching transistor M01, which will not be elaborated further here. It is easily understood that... Figures 2c-2d In both cases, the parasitic body diode (not shown in the figure) is turned off when the first switch M01 is turned off, and the parasitic body diode (not shown in the figure) is also turned off when the second switch M02 is turned off, so as to prevent a short circuit between the first output voltage Vo1 and the second output voltage Vo2, thus satisfying the requirement that it is applicable to both situations where the second output voltage is less than the first output voltage and situations where the second output voltage is greater than the first output voltage.

[0056] It should be noted that the second output voltage Vo2 mentioned in this application represents the voltage difference between the high-potential output terminal and the low-potential output terminal of the second output circuit, and the first output voltage Vo1 represents the voltage difference between the high-potential output terminal and the low-potential output terminal of the first switching circuit.

[0057] Figure 3 A schematic diagram of the circuit structure of the multi-output power supply circuit according to the first embodiment of the present invention is shown, and in conjunction with... Figure 1 As can be seen, this embodiment uses a first output circuit 10 including a Buck topology first switching circuit as an example. The first switching circuit includes a main switch transistor M00, a diode D00, a magnetic element, an input capacitor Cin, and a first output capacitor Co1, wherein the magnetic element is a first inductor L01. The first node A is one end of the first inductor L01, and the switching node SW is the other end of the first inductor L01. Furthermore, for ease of understanding, this embodiment uses a second output voltage lower than the first output voltage as an example. The first switch 21 and the second switch 201 respectively include... Figure 2aThe first diode D01 and the second switch M02 are shown. Specifically, the second control circuit 202 includes a second output voltage detection unit 2021, a modulation unit 2022, and a synchronization unit 2023. The synchronization unit 2023 samples the switch node voltage Vsw to generate a clock signal clk, and the second control circuit 202 controls the turn-off time of the second switch M02 according to the clock signal clk. The second output voltage detection unit 2021 detects the second output voltage Vo2 to output a second output feedback voltage FB2. The modulation unit 2022 generates a second control signal S2 based on the second output feedback voltage FB2 and the clock signal clk. Further, in one embodiment, the synchronization unit 2023 includes a switching node voltage sampling circuit 20231 and a third comparison circuit U04. The switching node voltage sampling circuit 20231 samples the switching node voltage Vsw to obtain a switching node voltage sampling signal. The first input terminal of the third comparison circuit U04 receives the switching node voltage sampling signal, and the second input terminal receives a second reference voltage Vref2. Based on the comparison result of the switching node voltage sampling signal and the second reference voltage Vref2, a clock signal clk is output. In this embodiment, the rising edge of the clock signal clk can characterize the moment when the switching node voltage Vsw changes from a low level to a high level, that is, it can characterize the turn-on moment of the main switch M00. It can be understood that in another embodiment, a rising edge pulse generation unit can also be connected to the output terminal of the third comparison circuit U04. Figure 3 (not shown) to generate a clock signal with a fixed pulse width; in another embodiment, the synchronization unit 2023 may also not utilize the third comparator circuit U04, but instead utilize a differentiator ( Figure 3(Not shown in the diagram) to generate a clock signal. For example, the second output voltage detection unit 2021 includes a first resistor R01 and a second resistor R02 connected in series between the two output terminals of the second output circuit 20, and the common terminal of the two outputs outputs a second output feedback voltage FB2. For example, the modulation unit 2022 includes a first operational amplifier U01, a ramp signal generation circuit 20221, a first comparator circuit U02, and a trigger U03. The first input terminal of the first operational amplifier U01 receives a first reference voltage Vref1, and the second input terminal receives a second output feedback voltage FB2. The second output feedback voltage FB2 and the first reference voltage Vref1 are amplified to output a compensation signal Vc. The ramp signal generation circuit 20221 receives a clock signal clk output by the synchronization unit 2023 to generate a ramp signal Vramp with the same frequency as the clock signal clk. The first input terminal of the first comparator circuit U02 receives the compensation signal Vc, and the second input terminal receives the ramp signal Vramp. The first input terminal of the trigger U03 receives the output signal of the first comparator circuit U02, the second input terminal receives the clock signal clk, and the output terminal outputs a second control signal S2. The second control signal S2 controls the on / off state of the second switch M02.

[0058] Figure 4 It shows that according to Figure 3 The waveform diagram of the multi-output power supply circuit is shown below. Vsw represents the switching node voltage, Vramp represents the ramp signal, S2 represents the second control signal, the inductor current iL is the current flowing through the first inductor L01, and the second current i2 is the current flowing through the second switch M02. The node voltage Vsw changes from low to high at times t0 and t3. The ramp signal Vramp is reset to a higher potential at both times t0 and t3, and decreases during the t0-t3 time period. During the t0-t1 time period, the node voltage Vsw is high, corresponding to the main switch M00 being in the on state, and the inductor current iL increases. During the t1-t3 time period, the node voltage Vsw is low, corresponding to the main switch M00 being in the off state, and the inductor current iL decreases. During the time interval t0-t2, the ramp signal Vramp is greater than the compensation signal Vc, the second control signal S2 is low, the second switch M02 is turned off, and the first diode D01 is turned on. During this period, the inductor current iL flows through the first diode D01, and the second current i2 is 0. At time t2, the ramp signal Vramp reaches the compensation signal Vc, and correspondingly... Figure 3When the output voltage of the first comparator circuit U02 changes, the second control signal S2 output by the trigger U03 changes from low to high, the second switch M02 turns on, and the first diode D01 turns off. During the conduction period of the second switch M02, the inductor current iL flows through the second switch M02, and the second current i2 is equal to the inductor current iL. That is, the energy stored in the first inductor L01 flows into the second output capacitor Co2, forming the second output voltage Vo2. At time t3, the switching node voltage Vsw changes from low to high, which corresponds to the turn-on time of the main switch M00, and also corresponds to... Figure 3 At the rising edge of the clock signal clk, the second control signal S2 output by flip-flop U03 changes from high to low, the second switch M02 turns off, and the first diode D01 turns on. When the load current of the second output voltage Vo2 increases, the compensation signal Vc increases, and the time t2 when the magnitude of the ramp signal Vramp reaches the magnitude of the compensation signal Vc will be earlier. Within one switching cycle of the main switch M00, the conduction time of the second switch M02 will increase, and more energy stored in the first inductor L01 will be transferred to the second output voltage. Conversely, when the load of the second output voltage Vo2 decreases, the second control circuit 202 will reduce the energy transferred to the second output voltage Vo2. When the load current of the second output voltage Vo2 increases, the energy transferred to the first output voltage Vo1 decreases within one switching cycle of the main switch M00. The main control circuit 101 will control the main switch M00 to increase its duty cycle or peak conduction current based on the actual first output voltage Vo1, thereby increasing the energy transferred from the input voltage to the first inductor L01. This ensures the stability of both the second and first output voltage Vo1. Furthermore, during the time interval t1-t3, the switching node voltage Vsw is 0. During the time interval t1-t2, the first diode D01 is turned on, and the voltage at the first node A is approximately equal to the first output voltage Vo1. During the time interval t2-t3, the second switch M02 is turned on, and the voltage at the first node A is approximately equal to the second output voltage Vo2. Since the second output voltage Vo2 is less than the first output voltage Vo1, the absolute value of the slope of the inductor current iL decreasing during the time interval t2-t3 is less than the absolute value of the slope decreasing during the time interval t1-t2.

[0059] Figures 5a-5b It shows that according to Figure 3This diagram illustrates two different waveforms that may appear under the same load conditions in a multi-output power supply circuit without the synchronization unit 2023. Here, clk2 represents the second clock signal. Without the synchronization unit 2023, the second control circuit requires a clock signal generation circuit (not shown in the diagram) to generate the second clock signal clk2. Then, the ramp signal Vramp and the second control signal S2 are controlled according to the second clock signal clk2. It is easy to understand that the second clock signal clk2 cannot always be synchronized with the operating frequency of the first switching circuit. Figures 5a-5b It can be seen that the switching frequency of the second switching transistor M02 is not synchronized with the operating frequency of the first switching circuit. Figure 4 In comparison, the amplitude of the second current i2 will be larger or will vary more significantly in different main switch cycles. This means that the energy flowing into the second output capacitor Co2 is more unstable, which will cause the second output voltage Vo2 to fluctuate more, and will also indirectly affect the ripple of the first output voltage Vo1.

[0060] Combination Figure 3 and Figure 4 and comparison Figure 4 and Figures 5a-5b As can be seen, in Embodiment 1 of the present invention, no signal transmission is required between the second control circuit 202 and the main control circuit 101. The second control circuit 202 receives the switching node voltage Vsw of the first switching circuit, determines the turn-on time of the main switch M00 based on the switching node voltage Vsw, and controls the second switch to turn off at the turn-on time of the main switch M00. This achieves synchronization between the switching frequency of the second switch M02 and the operating frequency of the first switching circuit, ensuring that the ripple variation frequency of the second output voltage Vo2 is almost synchronized with the ripple of the first output voltage Vo1 of the first switching circuit. The second output voltage Vo2 has high stability and low ripple. At the same time, it can also minimize the overlap between the conduction time of the second switch M02 and the conduction time of the main switch M00 of the first switching circuit. Under the same load current conditions, it can make the peak current flowing through the second switch M02 smaller, reduce the loss of the second switch M02, improve reliability, and reduce the cost of device selection. Furthermore, since no signal transmission is required between the second control circuit and the main control circuit, the multi-output circuit of this embodiment can be implemented without changing the circuit structure of the main control circuit of the first switching circuit and without increasing the number of pins on the integrated chip where the main control circuit is located, thus saving design costs. Compared with the prior art scheme of connecting an LDO after the first stage output voltage, the multi-output power supply circuit of this embodiment has the advantage of higher efficiency; compared with the prior art scheme of connecting a DC-DC converter after the first stage output voltage, the multi-output power supply circuit of this embodiment has the advantage of fewer components.

[0061] like Figure 6 As shown, the circuit structure of the multi-output power supply circuit in the second embodiment of the present invention is basically the same as that in the first embodiment, and will not be described again here. The difference is that in this embodiment, the second control circuit 202 further includes a trigger unit 2024, which is connected between the output terminal of the first switching circuit and the output terminal of the second output circuit 20. The trigger unit 2024 controls the current between the output terminal of the first switching circuit and the output terminal of the second output circuit according to the first output voltage Vo1 and / or the second output voltage Vo1. Specifically, if the second output voltage Vo2 is less than the first output voltage Vo1, in one embodiment, the trigger unit 2024 can be configured to control the output terminal of the first switching circuit to transmit current to the output terminal of the second output circuit when the second output voltage Vo2 is less than the first threshold voltage. In this way, when the second output voltage Vo2 experiences an undervoltage condition, the current transferred from the first output voltage Vo1 to the second output voltage Vo2 will affect the obtained first output voltage Vo1. The triggering main control circuit 101 can then quickly adjust and compensate for the drop in the non-master-controlled second output voltage Vo2 based on the actual first output voltage Vo1, thereby ensuring the second output voltage remains stable within a certain range and improving the accuracy of the output voltage. In another embodiment, the triggering unit 2024 can also be configured to control the output terminal of the first switching circuit to transfer current to the output terminal of the second output circuit when the first output voltage Vo1 is greater than the second threshold voltage. In this way, when the first output voltage Vo1 experiences an overvoltage condition, the current transferred from the first output voltage Vo1 to the second output voltage Vo2 can alleviate the overvoltage condition of the first output voltage Vo1 while simultaneously replenishing energy to the second output voltage Vo2. In another embodiment, the trigger unit 2024 can also be configured to control the output terminal of the first switching circuit to transmit current to the output terminal of the second output circuit when the second output voltage Vo2 is less than the first threshold voltage or the first output voltage Vo1 is greater than the second threshold voltage. It is readily understood that if the second output voltage Vo2 is greater than the first output voltage Vo1, the trigger unit 2024 can be configured to control the output terminal of the second output circuit to transmit current to the output terminal of the first switching circuit when the second output voltage Vo2 is greater than the third threshold voltage, or when the first output voltage Vo1 is less than the fourth threshold voltage, or when the second output voltage Vo2 is greater than the third threshold voltage or the first output voltage Vo1 is less than the fourth threshold voltage.

[0062] The circuit structure of the trigger unit 2024 is described below, taking the example that the second output voltage Vo2 is less than the first output voltage Vo1, and when the second output voltage Vo2 is less than the first threshold voltage, the trigger unit 2024 controls the output terminal of the first switching circuit to transmit current to the output terminal of the second output circuit. In one embodiment, such as Figure 7aAs shown, the trigger unit 2024 includes a first controlled current source U05 and a second operational amplifier U07 or a second comparator circuit U07. The first controlled current source U05 is connected between the output terminal of the first switching circuit and the output terminal of the second output circuit. The second operational amplifier U07 or the second comparator circuit U07 receives a first threshold voltage V1 at its first input terminal and a second output voltage Vo2 at its second input terminal, and outputs a first signal according to the first threshold voltage V1 and the second output voltage Vo2. The control terminal of the first controlled current source U05 receives the first signal and adjusts the magnitude of the current It according to the first signal. When the magnitude of the current It is not 0, the current direction is from the output terminal of the first switching circuit to the output terminal of the second output circuit. In another embodiment, as shown... Figure 7b As shown, the circuit structure of the trigger unit 2024 is similar to... Figure 7a The circuit structure of the trigger unit 2024 shown is basically the same, except that the first controlled current source U05 is replaced with the first controlled resistor U06. It can still achieve the same result: when the second output voltage Vo2 is less than the first threshold voltage V1, it controls the output terminal of the first switching circuit to transmit current I to the output terminal of the second output circuit. t The effect.

[0063] In addition to possessing all the advantages of Embodiment 1 described above, Embodiment 2 of the present invention also establishes a certain connection between the first output voltage Vo1 and the second output voltage Vo2 through the trigger unit 2024. This enables the main control circuit 101, which does not transmit signals directly, and the second output circuit 20 to achieve a faster response, effectively improving the dynamic response rate, improving the cross-regulation performance of the output voltage, and improving the accuracy and stability of the multi-channel output voltage.

[0064] Figure 8FIG. shows a schematic circuit diagram of a multi-output power supply circuit according to the third embodiment of the present invention; compared with the first and second embodiments, the multi-output power supply circuit of this embodiment further includes a 3rd output circuit 30 to an Nth output circuit N0, where N is an integer greater than or equal to 3. Among them, k is an integer from 3 to N. The input end of the kth output circuit k0 is connected to the first node A, and the kth output voltage Vok is output at the output end; the kth output circuit k0 includes a kth switch k01 and a kth control circuit k02. The kth switch k01 includes a kth diode D0k and a kth switching transistor M0k. The kth diode D0k and the kth switching transistor M0k are connected between the first node A and the output end of the kth output circuit k0. The kth control circuit k01 generates a kth control signal Sk to control the on / off of the kth switching transistor M0k. For ease of understanding, this embodiment is exemplified by VoN <... < Vo2 < Vo1. Among them, the first switch 21 includes a first diode D01; the circuit structure of the second output circuit 20 is basically the same as that of the second embodiment and will not be described herein again. The difference is that in this embodiment, the second switch 201 further includes a second diode D02. The second diode D02 and the second switching transistor M02 are connected in series between the first node A and the output end of the second output circuit. In another embodiment, the Nth switch N01 may also not include the Nth diode D0N. In this embodiment, the kth control circuit k02 generates the kth control signal according to the switching node voltage Vsw of the first switch circuit and the kth output voltage Vok, and the kth control signal controls the on / off of the kth switch k01. When the Nth control circuit k0N controls the Nth switching transistor M0N to conduct, the voltage of the first node A is approximately equal to the Nth output voltage VoN. The first diode D01, the second diode D02, and the 3rd diode D03 to the (N - 1)th diode D0(N - 1) will all be cut off. Therefore, this embodiment can achieve that the energy is preferentially transferred to the Nth output voltage VoN with the lowest voltage, and then the Nth control circuit N02 controls the Nth switching transistor M0N to turn off, and the energy is transferred to the (N - 1)th output voltage Vo(N - 1), and finally to the first output voltage Vo1. In this embodiment, the control circuit of each output voltage can be independent, which can conveniently and flexibly meet the requirements of multiple outputs without redundant design. It can be understood that in some other embodiments, in order to synchronize the multi-path output with the operating frequency of the first switch circuit, the kth control circuit k02 may not directly receive the switching node voltage Vsw of the first switch circuit, but generate the kth control signal according to at least one of the signals output by the 2nd to Nth control circuits except the kth control circuit and the kth output voltage Vok. For example, in one embodiment, the kth control circuit k02 may also generate the kth control signal according to the clock signal clk generated by the 2nd control circuit 201 and the kth output voltage Vok.

[0065] In the above three embodiments, the first switching circuit is a Buck topology. In other embodiments, the first switching circuit may also adopt other topologies, as described below. Figure 9 and Figure 10 The multi-output power supply circuits of the fourth and fifth embodiments shown are used as examples for description.

[0066] refer to Figure 9 In the multi-output power supply circuit of the fourth embodiment of the present invention, the first output circuit includes a first switching circuit with a Buck-Boost topology. The first switching circuit includes a main switch transistor M00, a diode D00′, a magnetic element, an input capacitor Cin, and a first output capacitor Co1, wherein the magnetic element is a second inductor L01′. The first node A is one end of the second inductor L01′, and the switching node SW is the other end of the second inductor L01′. The first switch 21 includes a first diode D01, the anode of the first diode D01 is connected to the first node A, and the cathode is connected to the output terminal of the first switching circuit. The circuit structure of the second output circuit 20 in this embodiment is basically the same as that in embodiment one or embodiment two, and will not be described again here. The main difference is that the reference ground of the second control circuit 202 in embodiment one or embodiment two is GND, while the reference ground of the second control circuit 202 in this embodiment is not GND, but its reference ground is also connected to the low-potential output terminal of the first switching circuit and the second output circuit 20.

[0067] refer to Figure 10 In the multi-output power supply circuit of the fifth embodiment of the present invention, the first output circuit includes a first switching circuit with a flyback topology. The first switching circuit includes a main switch transistor M00, a first diode D01, a magnetic element, an input capacitor Cin, and a first output capacitor Co1. The magnetic element is a first transformer T01. The first node A is one end of the secondary winding of the first transformer T01. The anode of the first diode D01 is connected to the first node A, and the cathode is connected to the output terminal of the first switching circuit. In this embodiment, the first diode D01 is one of the elements in the first switching circuit that constitutes the flyback topology, and it is also an element that constitutes the first switch 21. The first node A also serves as the switching node SW of the first switching circuit. The second switch 201 includes a second diode D02 and a second switch transistor M02, which are connected in series between the first node A and the output terminal of the second output circuit 20. It is easy to understand that the synchronization unit 2023 in the second control circuit 202 can directly receive the switching node voltage Vsw, or it can receive the voltage of the common terminal of the second diode D02 and the second switch transistor M02 to output a clock signal clk. Those skilled in the art can easily obtain the specific circuit structure of the second control circuit 202 of this embodiment and understand its working principle based on Embodiment 1 or Embodiment 2, so it will not be described in detail here.

[0068] In summary, the multi-output power supply circuit of the present invention can be implemented on different types of first switching circuits, has a wide range of applications, and is flexible in application. Furthermore, no signal transmission is required between the second control circuit and the main control circuit. It can achieve synchronization between the switching frequency of the second switching transistor and the operating frequency of the first switching circuit without changing the circuit structure of the main control circuit of the first switching circuit or increasing the number of pins on the integrated chip containing the main control circuit. The second output voltage has high stability and low ripple. Compared with the prior art, the multi-output power supply circuit of this embodiment has the advantages of simultaneously meeting the requirements of fewer components and higher efficiency. When a trigger unit is provided, it can effectively improve the dynamic response rate and the output voltage cross-regulation performance, thereby providing better stability for the multiple output voltages.

[0069] The embodiments described above do not constitute a limitation on the scope of protection of this technical solution. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the above embodiments should be included within the scope of protection of this technical solution.

Claims

1. A multi-output power supply circuit, characterized in that, Includes a first output circuit and a second output circuit. The first output circuit includes a first switching circuit, which includes a main switching transistor and a magnetic element. Its input terminal receives an input voltage, and the main control circuit controls the switching on and off of the main switching transistor to output a first output voltage. The input terminal of the second output circuit is connected to the first node of the first switching circuit, and the output terminal outputs a second output voltage. The second output circuit includes a second switching transistor and a second control circuit. The second switching transistor is connected between the first node and the output terminal of the second output circuit. The second control circuit generates a second control signal based on the second output voltage and the switching node voltage of the first switching circuit to control the switching on and off of the second switching transistor. The switching node voltage is the node voltage on the loop between the input and output terminals of the first switching circuit. The first node is one end of the magnetic element.

2. The multi-output power supply circuit according to claim 1, characterized in that, The multi-output power supply circuit includes a first switch, which is connected between the first node and the output terminal of the first switch circuit. When the second switch is turned on, the first switch is turned off.

3. The multi-output power supply circuit according to claim 1, characterized in that, The second control circuit determines the turn-on time of the main switch based on the voltage of the switching node, and controls the second switch to turn off at the turn-on time of the main switch.

4. The multi-output power supply circuit according to claim 1, characterized in that, The second control circuit includes a synchronization unit. The synchronization unit samples the switching node voltage to obtain a switching node voltage sampling signal, and generates a clock signal based on the switching node voltage sampling signal; The second control circuit controls the turn-off time of the second switching transistor according to the clock signal.

5. The multi-output power supply circuit according to claim 4, characterized in that, The second control circuit also includes: The second output voltage detection unit detects the second output voltage to output a second output feedback voltage; The modulation unit generates the second control signal based on the second output feedback voltage and the clock signal.

6. The multi-output power supply circuit according to claim 5, characterized in that, The modulation unit includes: The first operational amplifier receives a first reference voltage at its first input terminal and a second output feedback voltage at its second input terminal. It amplifies the error between the second output feedback voltage and the first reference voltage to output a compensation signal. A ramp signal generation circuit receives the clock signal to generate a ramp signal with the same frequency as the clock signal; The first comparator circuit has a first input terminal that receives the compensation signal and a second input terminal that receives the ramp signal. The trigger has a first input terminal that receives the output signal of the first comparator circuit, a second input terminal that receives the clock signal, and an output terminal that outputs the second control signal.

7. The multi-output power supply circuit according to claim 1, characterized in that, The second control circuit includes: A trigger unit is connected between the output terminal of the first switching circuit and the output terminal of the second output circuit. The trigger unit controls the current between the output terminals of the first switching circuit and the second output circuit according to the first output voltage and / or the second output voltage.

8. The multi-output power supply circuit according to claim 7, characterized in that, The second output voltage is less than the first output voltage. When the second output voltage is less than the first threshold voltage, the trigger unit controls the output terminal of the first switching circuit to transmit current to the output terminal of the second output circuit.

9. The multi-output power supply circuit according to claim 7, characterized in that, The second output voltage is less than the first output voltage. When the first output voltage is greater than the second threshold voltage, the trigger unit controls the output terminal of the first switching circuit to transmit current to the output terminal of the second output circuit.

10. The multi-output power supply circuit according to claim 8, characterized in that, The triggering unit includes: A first controlled current source or a first controlled resistor is connected between the output terminal of the first switching circuit and the output terminal of the second output circuit; The second operational amplifier or the second comparator circuit receives the first threshold voltage at its first input terminal and the second output voltage at its second input terminal, and outputs a first signal based on the first threshold voltage and the second output voltage. The control terminal of the first controlled current source or the first controlled resistor receives the first signal.

11. The multi-output power supply circuit according to claim 1, characterized in that, The second output voltage is less than the first output voltage. The first switching circuit includes a first diode, the anode of which is connected to the first node, and the cathode of which is connected to the output terminal of the first switching circuit.

12. The multi-output power supply circuit according to claim 1, characterized in that, The first switching circuit includes a first switching transistor, which is controlled to turn on / off according to the output signal of the second control circuit.

13. The multi-output power supply circuit according to claim 12, characterized in that, The first switching circuit further includes a diode, which is connected in series with the first switching transistor between the first node and the output terminal of the first switching circuit.

14. The multi-output power supply circuit according to claim 12, characterized in that, The first switching circuit also includes a switching transistor disposed back-to-back with the first switching transistor.

15. The multi-output power supply circuit according to claim 12, characterized in that, When the multi-output power supply circuit includes two outputs, the first switching transistor is turned on / off according to the non-signal of the second control signal.

16. The multi-output power supply circuit according to any one of claims 11-14, characterized in that, The second output circuit also includes a second diode, which is connected in series with the second switch between the first node and the output terminal of the second output circuit.

17. The multi-output power supply circuit according to any one of claims 11-14, characterized in that, The second output circuit also includes a switch transistor arranged back-to-back with the second switch transistor.

18. The multi-output power supply circuit according to any one of claims 1-14, characterized in that, The multi-output power supply circuit also includes output circuits 3 to N, wherein... The input terminal of the k-th output circuit is connected to the first node, and the output terminal outputs the k-th output voltage. The k-th output circuit includes a k-th switch and a k-th control circuit. The k-th switch is connected between the first node and the output terminal of the k-th output circuit. The k-th control circuit generates a k-th control signal to control the on / off state of the k-th switch. The kth control circuit generates the kth control signal based on the switching node voltage and the kth output voltage, or generates the kth control signal based on at least one of the signals output by the second to Nth control circuits other than the kth control circuit and the kth output voltage. Where N is an integer greater than or equal to 3, and k is an integer from 3 to N.

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