Valley fill circuit and method of controlling the same

Abstract

The application relates to a valley fill circuit and a control method thereof, which comprises a control circuit, a first power tube and a first capacitor; the first power tube is connected in series with the first capacitor and then connected between a high potential input end and a low potential input end of the valley fill circuit, and also connected between a high potential output end and a low potential output end of the valley fill circuit; the control circuit controls the working state of the first power tube, so that the voltage of the first capacitor is stabilized within an error range of a preset voltage; when the voltage of the first capacitor is less than the preset voltage, the control circuit controls the first power tube to be completely turned on. The valley fill circuit and the control method thereof in the embodiment of the application realize the valley fill function under high-voltage input, and optimize PF and THD; under low-voltage input, the first power tube is completely turned on, and the working state of the valley fill circuit is completely the same as that of a traditional rectification scheme. Compared with the traditional rectification scheme, the first capacitor in the application can be selected to have a lower withstand voltage, so that the volume of the system is greatly reduced.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a valley-filling circuit and its control method. Background Technology

[0002] Currently, most AC / DC converters are connected to the power grid via a rectifier circuit. Their input section typically consists of a bridge rectifier and filter capacitors, such as... Figure 1 As shown, both are nonlinear components. Due to the presence of the large-capacity filter capacitor, the conduction angle of the rectifier diode becomes very narrow, and it can only conduct near the peak value of the AC input voltage, causing severe distortion of the AC input current, turning it into a spike pulse.

[0003] To solve the above problems, in the prior art, a valley filler circuit is usually added to the back end of the bridge rectifier circuit. The valley filler circuit can expand the current waveform after AC mains rectification and filtering from a narrow pulse shape to a shape close to a sine wave, which is equivalent to "filling up" a large part of the circuit in the valley area of ​​the narrow pulse current waveform.

[0004] Existing valley-fill circuits such as Figure 2 As shown, in addition to the two capacitors, three additional diodes are required, increasing the cost. Furthermore, during valley filling operation, all three diodes generate significant conduction losses, resulting in low efficiency. For example, Figure 2 The minimum voltage of the valley-fill circuit output voltage Vo is the peak voltage V. AC Because it is only 1 / 2 of the voltage, Vo fluctuates significantly at low input voltages, and the minimum voltage of Vo is relatively low. This results in a wide input voltage range for downstream loads and lower efficiency. Summary of the Invention

[0005] This invention provides a valley-filling circuit and its control method to at least solve the problems of high hardware cost and low working efficiency of valley-filling circuits in the prior art.

[0006] In a first aspect, embodiments of the present invention provide a valley-fill circuit that receives rectified voltage to provide input voltage for subsequent circuits, characterized in that it includes a control circuit, a first power transistor, and a first capacitor; wherein...

[0007] The first power transistor and the first capacitor are connected in series and then connected between the high-potential input terminal and the low-potential input terminal of the valley filling circuit. The first power transistor and the first capacitor are also connected in series and then connected between the high-potential output terminal and the low-potential output terminal of the valley filling circuit.

[0008] The control circuit controls the operating state of the first power transistor so that the voltage of the first capacitor is stabilized within a preset voltage error range.

[0009] Specifically, when the voltage of the first capacitor is less than the preset voltage, the control circuit controls the first power transistor to be fully turned on.

[0010] Furthermore, when the voltage supplied to the first capacitor is greater than the preset voltage, the control circuit controls the operating state of the first power transistor to stabilize the voltage of the first capacitor at the preset voltage.

[0011] Furthermore, when the voltage supplied to the first capacitor is greater than the preset voltage, the control circuit controls the first power transistor to operate in the linear region.

[0012] Furthermore, the valley-filling circuit also includes a first inductor and a second power transistor, which, together with the first power transistor and the first capacitor, form a switching power supply, wherein the voltage of the first capacitor serves as the output voltage of the switching power supply.

[0013] When the voltage supplied to the first capacitor is greater than the preset voltage, the control circuit controls the first power transistor to operate in switching mode.

[0014] In some preferred embodiments, the control circuit includes a voltage detection terminal and a driving terminal; the voltage detection terminal of the control circuit is connected to the first capacitor to obtain a capacitor voltage sampling signal; the driving terminal of the control circuit is connected to the control terminal of the first power transistor; the control circuit controls the operating state of the first power transistor according to the capacitor voltage sampling signal.

[0015] In some preferred embodiments, a reference voltage is provided in the control circuit. The control circuit amplifies the error between the capacitor voltage sampling signal and the reference voltage, generates a drive signal based on the error amplification result, and outputs the drive signal from the drive terminal of the control circuit.

[0016] Furthermore, the first terminal of the first capacitor is connected to the high-potential input terminal of the valley filling circuit, the second terminal of the first capacitor is connected to the first power terminal of the first power transistor, the second power terminal of the first power transistor is connected to the low-potential input terminal of the valley filling circuit, and the first terminal of the first capacitor and the second power terminal of the first power transistor serve as the high-potential output terminal and the low-potential output terminal of the valley filling circuit, respectively.

[0017] The voltage detection terminals of the control circuit include a first voltage detection terminal and a second voltage detection terminal, which are respectively connected to the first terminal and the second terminal of the first capacitor.

[0018] Furthermore, the first power terminal of the first power transistor is connected to the high-potential input terminal of the valley-filling circuit, the second power terminal of the first power transistor is connected to the first terminal of the first capacitor, the second terminal of the first capacitor is connected to the low-potential input terminal of the valley-filling circuit, and the first power terminal of the first power transistor and the second terminal of the first capacitor serve as the high-potential output terminal and the low-potential output terminal of the valley-filling circuit, respectively.

[0019] The voltage detection terminal of the control circuit is connected to the first terminal of the first capacitor.

[0020] In some preferred embodiments, one end of the first inductor is connected to one of the high-potential input terminal and the low-potential input terminal of the valley-fill circuit, wherein,

[0021] When one end of the first inductor is connected to the high-potential input terminal of the valley filling circuit, the other end of the first inductor is connected to the high-potential output terminal of the valley filling circuit.

[0022] When one end of the first inductor is connected to the low-potential input terminal of the valley filling circuit, the other end of the first inductor is connected to the low-potential output terminal of the valley filling circuit.

[0023] Secondly, the present invention provides a control method for a valley-filling circuit based on any of the above embodiments, characterized in that,

[0024] Control the operating state of the first power transistor so that the voltage of the first capacitor is stabilized within the preset voltage error range;

[0025] Specifically, when the voltage of the first capacitor is less than the preset voltage, the first power transistor is controlled to be fully turned on.

[0026] Furthermore, when the voltage supplied to the first capacitor is greater than the preset voltage, the operating state of the first power transistor is controlled so that the voltage of the first capacitor is stabilized at the preset voltage.

[0027] Furthermore, when the voltage supplied to the first capacitor is greater than the preset voltage, the first power transistor is controlled to operate in the linear region or in switching mode.

[0028] In some preferred embodiments, controlling the operating state of the first power transistor includes:

[0029] The capacitor voltage sampling signal is obtained based on the voltage across the first capacitor.

[0030] The capacitor voltage sampling signal and the reference voltage are amplified to generate an error signal based on the error amplification result.

[0031] The operating state of the first power transistor is controlled according to the drive signal.

[0032] Compared to related technologies, the valley-filling circuit and its control method provided in this embodiment of the invention control the voltage across the first capacitor within a preset voltage error range. Specifically, when the voltage of the first capacitor is less than the preset voltage, the control circuit controls the first power transistor to be fully turned on. Through the valley-filling circuit of this invention, when the AC rectified output voltage is greater than the preset voltage, the voltage of the first capacitor equals the preset voltage. At this time, the subsequent DC-DC circuit receives current from the AC input voltage, increasing the conduction angle of the input current and optimizing THD (Total Harmonic Distortion) and PF (Power Factor). When the AC rectified output voltage is less than the preset voltage, the first power transistor is fully turned on, the first capacitor provides current to the subsequent load, and the first capacitor discharges, thus realizing the valley-filling circuit function under high voltage input. Therefore, under high voltage input, the valley-filling circuit of this embodiment of the invention achieves the valley-filling function and optimizes PF and THD; under low voltage input, the first power transistor is fully turned on, and the valley-filling circuit operates in the same state as the traditional rectification scheme. Moreover, compared to the traditional rectification scheme, for the same capacitor capacity, the first capacitor in this invention can have a lower withstand voltage, greatly reducing the system size. Attached Figure Description

[0033] The accompanying drawings, which are included to provide a further understanding of the invention and form part of this invention, illustrate exemplary embodiments of the invention and are used to explain the invention, but do not constitute an undue limitation of the invention. In the drawings:

[0034] Figure 1 The diagram shown is the circuit schematic of a traditional rectification scheme.

[0035] Figure 2 The diagram shown is a schematic of a valley-filling circuit in the prior art.

[0036] Figure 3 The diagram shown is a circuit schematic of a valley-filling circuit according to an embodiment of the present invention.

[0037] Figure 4 As shown Figure 3 Waveform of the output voltage of the valley-filling circuit in the embodiment;

[0038] Figure 5 The diagram shown is a circuit schematic of a valley-filling circuit according to another embodiment of the present invention.

[0039] Figure 6 The diagram shown is a circuit schematic of a valley-filling circuit according to another embodiment of the present invention.

[0040] Figure 7 The diagram shown is a circuit schematic of a valley-filling circuit according to another embodiment of the present invention. Detailed Implementation

[0041] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be described and illustrated below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention. All other embodiments obtained by those skilled in the art based on the embodiments provided by this invention without inventive effort are within the scope of protection of this invention. Furthermore, it is understood that although the efforts made in such a development process may be complex and lengthy, for those skilled in the art related to the content disclosed in this invention, some design, manufacturing, or production modifications based on the technical content disclosed in this invention are merely conventional technical means and should not be construed as insufficient disclosure of the invention.

[0042] In this invention, the reference to "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of the invention. The appearance of this phrase in various places in the specification does not necessarily refer to the same embodiment, nor is it a mutually exclusive, independent, or alternative embodiment. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described in this invention may be combined with other embodiments without conflict.

[0043] Unless otherwise defined, the technical or scientific terms used in this invention shall have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms "a," "an," "an," "the," and similar words used in this invention do not indicate quantity limitation and may indicate singular or plural. The terms "comprising," "including," "having," and any variations thereof used in this invention are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or device that includes a series of steps or modules (units) is not limited to the listed steps or units, but may also include steps or units not listed, or may include other steps or units inherent to these processes, methods, products, or devices. The terms "connected," "linked," "coupled," and similar words used in this invention are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "A plurality" in this invention means two or more. "And / or" describes the relationship between related objects, indicating that three relationships may exist; for example, "A and / or B" can represent: A alone, A and B simultaneously, and B alone. The terms "first," "second," and "third" used in this invention are merely to distinguish similar objects and do not represent a specific ordering of the objects.

[0044] The valley-filling circuit provided by this invention is connected between the output terminal of a rectifier circuit and the input terminal of a subsequent DC-DC circuit. It receives the rectified voltage to provide the input voltage for the subsequent circuit. Its basic implementation scheme is as follows: it includes a control circuit, a first power transistor, and a first capacitor. The first power transistor and the first capacitor are connected in series between the high-potential and low-potential input terminals of the valley-filling circuit. Furthermore, the first power transistor and the first capacitor are connected in series between the high-potential and low-potential output terminals of the valley-filling circuit. In this embodiment, the control circuit controls the operating state of the first power transistor to stabilize the voltage of the first capacitor within a preset voltage error range.

[0045] This invention controls the capacitor voltage within a preset voltage error range. When the rectified voltage output by the rectifier circuit is high, the voltage supplied to the first capacitor is sufficiently large, thus stabilizing the capacitor voltage at the preset voltage. Conversely, when the rectified voltage output by the rectifier circuit is low, the voltage supplied to the first capacitor is less than the preset voltage, resulting in a lower capacitor voltage. Therefore, when the capacitor voltage is less than the preset voltage, it indicates that the rectified voltage output by the rectifier circuit is too low, requiring the control circuit to fully turn on the first power transistor, allowing the first capacitor to simultaneously supply power to the subsequent circuit. When the voltage supplied to the first capacitor is greater than the preset voltage, the control circuit controls the operating state of the first power transistor to stabilize the voltage of the first capacitor at the preset voltage. Specifically, when the voltage supplied to the first capacitor is greater than the preset voltage, the control circuit controls the first power transistor to operate in the linear region, preventing it from fully conducting and thus preventing the first capacitor from supplying power to the subsequent circuit. In other words, the valley-filling circuit of this invention, when a suitable preset voltage is selected, can effectively increase the conduction angle.

[0046] In some preferred embodiments, the control circuit includes a voltage detection terminal and a driving terminal; the first power transistor is connected in series with the first capacitor and then connected between the positive output terminal and the negative output terminal of the rectifier circuit; the voltage detection terminal of the control circuit is connected to the first capacitor to obtain a capacitor voltage sampling signal; the driving terminal of the control circuit is connected to the control terminal of the first power transistor; the control circuit controls the operating state of the first power transistor according to the capacitor voltage sampling signal.

[0047] The control circuit of the present invention is provided with a reference voltage. The control circuit amplifies the error between the capacitor voltage sampling signal and the reference voltage, generates a drive signal based on the error amplification result, and outputs the drive signal from the drive terminal of the control circuit.

[0048] In a preferred embodiment of the present invention, the valley-filling circuit further includes a first inductor and a second power transistor, which, together with the first power transistor and the first capacitor, constitute a switching power supply. The voltage of the first capacitor serves as the output voltage of the switching power supply. Similarly, when the voltage of the first capacitor is less than a preset voltage, the control circuit controls the first power transistor to be fully turned on; when the voltage supplied to the first capacitor is greater than the preset voltage, the control circuit controls the first power transistor to operate in switching mode.

[0049] Based on the above basic implementation scheme, four embodiments are used to illustrate the details. Figure 3 , Figures 5 to 7 The circuit structures of embodiments one through four are illustrated respectively. All are based on the same inventive concept, but the specific circuit implementations differ. Furthermore, the first switching transistor in these embodiments uses an N-type MOS transistor to suit the corresponding application. The drain of the N-type MOS transistor serves as the first power terminal, the source as the second power terminal, and the gate as the control terminal. For valley-fill circuits using P-type MOS transistors, the circuit connections can be modified according to the characteristics of the P-type MOS transistor; this will not be described in detail here.

[0050] In one embodiment of the present invention, a first terminal of the first capacitor is connected to the high-potential input terminal of the valley-filling circuit, a second terminal of the first capacitor is connected to the first power terminal of the first power transistor, a second power terminal of the first power transistor is connected to the low-potential input terminal of the valley-filling circuit, and the first terminal of the first capacitor and the second power terminal of the first power transistor serve as the high-potential output terminal and the low-potential output terminal of the valley-filling circuit, respectively; the voltage detection terminal of the control circuit includes a first voltage detection terminal and a second voltage detection terminal, which are respectively connected to the first terminal and the second terminal of the first capacitor.

[0051] The circuit connection relationship in this embodiment is more specifically as follows: Figure 3 As shown, in this embodiment, the first capacitor is an electrolytic capacitor C1. The first and second terminals of the first capacitor are the positive and negative terminals of the electrolytic capacitor C1, respectively. The first voltage detection terminal of the control circuit U1 and the positive terminal of the electrolytic capacitor C1 are both connected to the positive output terminal of the rectifier circuit. The negative terminal of the electrolytic capacitor C1 is coupled to the drain of the first power transistor Q1 and the second voltage detection terminal of the control circuit U1. The source of the first power transistor Q1 and the first port of the control circuit U1 are both connected to the negative output terminal of the rectifier circuit. The gate of the first power transistor Q1 serves as the control terminal and is connected to the driving terminal of the control circuit U1. The positive terminal of the electrolytic capacitor C1 and the source of the first power transistor Q1 serve as the high-potential output terminal and low-potential output terminal of the valley-filling circuit, respectively. In this embodiment, the low-potential input terminal and low-potential output terminal of the valley-filling circuit are grounded. The control circuit U1 also includes a third port, which is grounded.

[0052] As shown Figure 3 , the valley filling circuit is connected between the rectifier circuit and the subsequent circuit such as the DC-DC circuit. The rectifier circuit of this embodiment is a bridge circuit composed of four diodes. The rectifier circuit rectifies the accessed AC input voltage (AC Input) to output a rectified voltage. The valley filling circuit receives the rectified voltage to obtain the AC rectified output voltage V_dclink, and the AC rectified output voltage V_dclink is used as the input voltage of the subsequent DC-DC circuit. The control circuit of this embodiment can use a control chip. The valley filling circuit controls the first power transistor Q1 through the control circuit U1 to stabilize the voltage Vc (i.e., the capacitor voltage) across the first capacitor within the error range of the preset voltage Vreg. Specifically, a reference voltage is preset in the control circuit of the present invention. The control circuit U1 compares the capacitor voltage sampling signal representing the capacitor voltage Vc with the reference voltage, and then the control circuit U1 performs error amplification according to the comparison result, generates a drive signal according to the amplified result, and the drive signal is output from the drive terminal of the control circuit. The operating state of the first power transistor Q1 is controlled according to the drive signal, so that the voltage across the electrolytic capacitor C1 is stabilized at the preset voltage Vreg.

[0053] The waveform of the rectified output voltage V_dclink of the present invention refers to Figure 4 , in the interval t1~t2, V_dclink > Vreg, the first power transistor Q1 operates in the linear region or approximately the cut-off region. At this time, the electrolytic capacitor C1 does not supply power to the subsequent DC-DC circuit and only consumes the leakage current of the electrolytic capacitor C1. Therefore, the first power transistor Q1 is in an approximately cut-off state at this time; in the interval t2~t3, V_dclink < Vreg, the electrolytic capacitor C1 supplies power to the subsequent DC-DC circuit, the first power transistor Q1 is fully turned on, and the capacitor voltage Vc is approximately equal to V_dclink. From Figure 4 the waveform, it can be seen that the conduction angle of the input current is greatly increased compared with that of Figure 1 the traditional rectification scheme, achieving the effect of optimizing THD (total harmonic distortion) and PF (power factor). On the other hand, the valley filling circuit of the present invention can be compatible with the implementation of the traditional rectification scheme under low voltage input. Since the present invention controls the capacitor voltage Vc within the error range of the preset voltage, the electrolytic capacitor C1 in the present invention can be a first capacitor with low withstand voltage, thus achieving the effect of greatly reducing the volume of the first capacitor.

[0054] By controlling the voltage across the first capacitor within the error range of the preset voltage, when the AC rectified output voltage V_dclink is greater than the preset voltage Vreg, the capacitor voltage Vc = Vreg (a tiny error can be ignored). At this time, the subsequent DC-DC circuit is supplied with current by the AC input (AC input voltage), increasing the conduction angle of the input current and optimizing THD and PF. When the AC rectified output voltage V_dclink < Vreg, the first power transistor Q1 operates in the saturation region and is fully turned on. The electrolytic capacitor C1 supplies current to the subsequent load, and the electrolytic capacitor C1 discharges, thus realizing the function of the valley-fill circuit under high-voltage input.

[0055] In summary, under high-voltage input, the valley-fill circuit of the embodiment of the present invention realizes the valley-fill function and optimizes PF and THD. Under low-voltage input, the first power transistor Q1 is fully turned on, and the working state of the valley-fill circuit is the same as that of Figure 1 the traditional rectification scheme. However, compared with the traditional rectification scheme and with the same capacitor capacity, the present invention can stabilize the voltage across the two ends of the first capacitor within the error range of the preset voltage. Therefore, the withstand voltage of the electrolytic capacitor C1 in the present invention can be selected to be lower, greatly reducing the volume of the system.

[0056] In another embodiment of the present invention, the connection relationship among the control circuit, the first power transistor, and the first capacitor can be adjusted. For example, the first power transistor is placed on the high-potential side. Specifically, the first power terminal of the first power transistor is connected to the high-potential input terminal of the valley-fill circuit, the second power terminal of the first power transistor is connected to the first end of the first capacitor, the second end of the first capacitor is connected to the low-potential input terminal of the valley-fill circuit, and the first power terminal and the second end of the first capacitor of the first power transistor serve as the high-potential output terminal and the low-potential output terminal of the valley-fill circuit respectively. The voltage detection terminal of the control circuit is connected to the first end of the first capacitor. [[ID=⑨]] [[ID=⑩]]

[0057] Specifically, reference can be made to Figure 5The drain of the first power transistor Q1 is connected to the positive output terminal of the rectifier circuit. The voltage detection terminal of the control circuit U1 and the positive terminal of the electrolytic capacitor C1 are both coupled to the source of the first power transistor Q1. The cathode of the electrolytic capacitor C1 and the first port of the control circuit U1 are both connected to the negative output terminal of the rectifier circuit. The gate of the first power transistor Q1 serves as the control terminal and is connected to the driving terminal of the control circuit U1. The drain of the first power transistor Q1 and the cathode of the electrolytic capacitor C1 serve as the positive and negative output terminals of the valley-filling circuit, respectively. In this embodiment, the low-potential input and low-potential output terminals of the valley-filling circuit are grounded, and the control circuit U1 also includes a second port, which is grounded. It should be noted that specific examples in this embodiment can refer to the examples described in the above embodiments and optional implementations; these will not be repeated here.

[0058] In other embodiments of the present invention, the present invention is not limited to the linear power supply structure mentioned in the above embodiments, and can also be any DC-DC power supply, such as a buck switching power supply like a BUCK. For the DC-DC power supply circuit, the valley-filling circuit of the present invention further includes a first inductor and a second power transistor, which, together with the first power transistor and the first capacitor, constitute a switching power supply. Specifically, one end of the first inductor of the present invention is connected to one of the high-potential input terminal and the low-potential input terminal of the valley-filling circuit. Wherein, when one end of the first inductor is connected to the high-potential input terminal of the valley-filling circuit, the other end of the first inductor is connected to the high-potential output terminal of the valley-filling circuit; when one end of the first inductor is connected to the low-potential input terminal of the valley-filling circuit, the other end of the first inductor is connected to the low-potential output terminal of the valley-filling circuit.

[0059] In one embodiment of the present invention, the second power transistor is a diode, and the specific connection relationship between the diode and the first inductor is referred to [reference needed]. Figure 6 The valley-filling circuit in this embodiment is Figure 3 A diode and an inductor are added to the existing structure. The anode of diode D1 is coupled to the drain of the first power transistor Q1 and the cathode of the electrolytic capacitor C1, and the cathode of diode D1 is connected to the positive output terminal of the rectifier circuit. The first terminal of the first inductor L is connected to the positive output terminal of the rectifier circuit, and the second terminal of the first inductor L is connected to the positive terminal of the electrolytic capacitor C1. In this embodiment, the first inductor L, diode D1, first power transistor Q1, and electrolytic capacitor C1 constitute a switching power supply. The voltage across the first capacitor C1 serves as the output voltage of the switching power supply. When the voltage supplied to the first capacitor C1 is greater than a preset voltage, the control circuit U1 controls the first power transistor Q1 to operate in switching mode; when the voltage supplied to the first capacitor C1 is less than the preset voltage, the control circuit U1 controls the first power transistor Q1 to operate in the saturation region, and the first power transistor Q1 is turned on.

[0060] refer to Figure 7 In another embodiment of the present invention, the anode of diode D1 is coupled to the negative output terminal of the rectifier circuit and the first terminal of the first inductor L, the cathode of diode D1 is coupled to the source of the first power transistor Q1 and the positive terminal of the electrolytic capacitor C1, and the second terminal of the first inductor L is connected to the negative terminal of the electrolytic capacitor C1. In this embodiment, the control circuit U1 has only a driving terminal and a voltage detection terminal. The driving terminal is connected to the control terminal of the first power transistor Q1, and the voltage detection terminal is connected to the positive terminal of the electrolytic capacitor C1. In this embodiment, the first inductor L, diode D1, first power transistor Q1, and electrolytic capacitor C1 constitute a switching power supply. Similarly, the voltage across the first capacitor C1 serves as the output voltage of the switching power supply. When the voltage supplied to the first capacitor C1 is greater than a preset voltage, the control circuit U1 controls the first power transistor Q1 to operate in switching mode; when the voltage supplied to the first capacitor C1 is less than the preset voltage, the control circuit U1 controls the first power transistor Q1 to operate in the saturation region, and the first power transistor Q1 is turned on.

[0061] In other embodiments of the present invention, the inductor may also be connected in series between the first capacitor and the first switching transistor. Specific examples in this embodiment can be referred to the examples described in the above embodiments and optional embodiments, and will not be repeated here.

[0062] Based on the valley-filling circuit described above, the present invention provides a control method to control the operating state of the first power transistor so that the voltage of the first capacitor is stabilized within a preset voltage error range. Specifically, when the voltage of the first capacitor is less than the preset voltage, the first power transistor is fully turned on; when the voltage supplied to the first capacitor is greater than the preset voltage, the operating state of the first power transistor is controlled so that the voltage of the first capacitor is stabilized at the preset voltage.

[0063] Specifically, the control circuit of the present invention acquires the capacitor voltage sampling signal of the first capacitor through its voltage detection terminal; then, it controls the operating state of the first power transistor according to the capacitor voltage sampling signal to increase the conduction angle of the rectifier circuit. The control circuit includes a reference voltage, and amplifies the error between the capacitor voltage sampling signal and the reference voltage, or amplifies the error of the comparison result between the capacitor voltage sampling signal and the reference voltage, generating a drive signal based on the error amplification result; the operating state of the first power transistor is controlled according to the drive signal. That is, when the voltage supplied to the first capacitor is greater than the preset voltage, the first power transistor is controlled to operate in the linear region or switching mode; when the voltage of the first capacitor is less than the preset voltage, the first power transistor is controlled to operate in the saturation region, thereby stabilizing the voltage across the first capacitor within the preset voltage error range.

[0064] In the present invention, by controlling the voltage Vc across the first capacitor to the preset voltage Vreg, when the input voltage is low, if the voltage across the first capacitor is less than the preset voltage Vreg, Q1 operates in the saturation region and is fully turned on, thereby achieving the effect of increasing the conduction angle.

[0065] Combined with Figure 3 and Figure 4 To illustrate the method of the present invention, in the interval from t1 to t2, when the AC rectified output voltage V_dclink > Vreg, the first power transistor Q1 operates in the linear region or approximately the cut-off region. At this time, the electrolytic capacitor C1 does not supply power to the subsequent circuit and only consumes the leakage current of the electrolytic capacitor C1. Therefore, the first power transistor Q1 is in an approximately cut-off state at this time; in the interval from t2 to t3, when the AC rectified output voltage V_dclink < Vreg, the electrolytic capacitor C1 supplies power to the subsequent circuit, and the first power transistor Q1 is fully turned on, and the capacitor voltage Vc is approximately equal to V_dclink. From Figure 4 the waveform of, it can be seen that the conduction angle of the input current is greatly increased compared to Figure 1 the conduction angle of the traditional rectification scheme, achieving the effect of optimizing THD and PF. On the other hand, the valley filling circuit adopting the control method of the present invention can be compatible with the traditional rectification scheme under low-voltage input, but compared to Figure 1 the traditional rectification scheme shown in, the electrolytic capacitor C1 in the present invention can select a first capacitor with low withstand voltage, thereby achieving the effect of greatly reducing the volume of the first capacitor.

[0066] It should be noted that the specific examples in this embodiment can refer to the examples described in the above embodiments and optional implementation manners, and will not be elaborated herein.

[0067] Those skilled in the art should understand that the technical features of the above embodiments can be combined arbitrarily. For the sake of concise description, not all possible combinations of the technical features in the above embodiments are described. However, as long as these combinations of technical features do not conflict, they should be considered as the scope described in this specification.

[0068] The above embodiments only represent several implementation manners of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be pointed out that for those of ordinary skill in the art, without departing from the concept of the present invention, several modifications and improvements can still be made, and these all belong to the protection scope of the present invention. Therefore, the protection scope of the invention patent should be subject to the appended claims.

Claims

1. A valley fill circuit receiving a rectified voltage to provide an input voltage for a subsequent circuit, characterized by, It includes a control circuit, a first power transistor, and a first capacitor; among which, The first power transistor and the first capacitor are connected in series and then connected between the high-potential input terminal and the low-potential input terminal of the valley filling circuit. The first power transistor and the first capacitor are also connected in series and then connected between the high-potential output terminal and the low-potential output terminal of the valley filling circuit. The control circuit controls the operating state of the first power transistor so that the voltage of the first capacitor is stabilized within a preset voltage error range. Wherein, when the voltage of the first capacitor is less than the preset voltage, the control circuit controls the first power transistor to be fully turned on; when the voltage supplied to the first capacitor is greater than the preset voltage, the control circuit controls the operating state of the first power transistor to stabilize the voltage of the first capacitor at the preset voltage. The control circuit includes a voltage detection terminal, which is connected to the first capacitor to obtain a capacitor voltage sampling signal; the control circuit controls the operating state of the first power transistor based on the capacitor voltage sampling signal.

2. The valley fill circuit of claim 1, wherein, When the voltage supplied to the first capacitor is greater than the preset voltage, the control circuit controls the first power transistor to operate in the linear region.

3. The valley-filling circuit according to claim 1, characterized in that, The valley-filling circuit further includes a first inductor and a second power transistor, which, together with the first power transistor and the first capacitor, form a switching power supply. The voltage across the first capacitor serves as the output voltage of the switching power supply. When the voltage supplied to the first capacitor is greater than the preset voltage, the control circuit controls the first power transistor to operate in switching mode.

4. The valley-filling circuit according to claim 1, characterized in that, The control circuit also includes a drive terminal, which is connected to the control terminal of the first power transistor.

5. The valley-filling circuit according to claim 4, characterized in that, The control circuit is equipped with a reference voltage. The control circuit amplifies the error between the capacitor voltage sampling signal and the reference voltage, generates a drive signal based on the error amplification result, and outputs the drive signal from the drive terminal of the control circuit.

6. The valley-filling circuit according to claim 4, characterized in that, The first terminal of the first capacitor is connected to the high-potential input terminal of the valley filling circuit, the second terminal of the first capacitor is connected to the first power terminal of the first power transistor, the second power terminal of the first power transistor is connected to the low-potential input terminal of the valley filling circuit, and the first terminal of the first capacitor and the second power terminal of the first power transistor serve as the high-potential output terminal and the low-potential output terminal of the valley filling circuit, respectively. The voltage detection terminals of the control circuit include a first voltage detection terminal and a second voltage detection terminal, which are respectively connected to the first terminal and the second terminal of the first capacitor.

7. The valley-filling circuit according to claim 4, characterized in that, The first power terminal of the first power transistor is connected to the high-potential input terminal of the valley-filling circuit, the second power terminal of the first power transistor is connected to the first terminal of the first capacitor, the second terminal of the first capacitor is connected to the low-potential input terminal of the valley-filling circuit, and the first power terminal of the first power transistor and the second terminal of the first capacitor serve as the high-potential output terminal and the low-potential output terminal of the valley-filling circuit, respectively. The voltage detection terminal of the control circuit is connected to the first terminal of the first capacitor.

8. The valley-filling circuit according to claim 3, characterized in that, One end of the first inductor is connected to one of the high-potential input terminal and the low-potential input terminal of the valley-filling circuit, wherein, When one end of the first inductor is connected to the high-potential input terminal of the valley filling circuit, the other end of the first inductor is connected to the high-potential output terminal of the valley filling circuit. When one end of the first inductor is connected to the low-potential input terminal of the valley filling circuit, the other end of the first inductor is connected to the low-potential output terminal of the valley filling circuit.

9. A control method based on the valley-filling circuit according to any one of claims 1-8, characterized in that, Control the operating state of the first power transistor so that the voltage of the first capacitor is stabilized within the preset voltage error range; Specifically, when the voltage of the first capacitor is less than the preset voltage, the first power transistor is controlled to be fully turned on.

10. The control method according to claim 9, characterized in that, When the voltage supplied to the first capacitor is greater than the preset voltage, the operating state of the first power transistor is controlled so that the voltage of the first capacitor is stabilized at the preset voltage.

11. The control method according to claim 10, characterized in that, When the voltage supplied to the first capacitor is greater than the preset voltage, the first power transistor is controlled to operate in the linear region or in switching mode.

12. The control method according to claim 11, characterized in that, The control of the operating state of the first power transistor includes: The capacitor voltage sampling signal is obtained based on the voltage across the first capacitor. The capacitor voltage sampling signal and the reference voltage are amplified to generate an error signal based on the error amplification result. The operating state of the first power transistor is controlled according to the drive signal.

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